Mask Resist Contains Organic Compound Patents (Class 216/49)
  • Patent number: 8945408
    Abstract: Provided is a method for preparing a patterned directed self-assembly layer, comprising: providing a substrate having a block copolymer layer comprising a first phase-separated polymer defining a first pattern in the block copolymer layer and a second phase-separated polymer defining a second pattern in the block copolymer layer; and performing an etching process to selectively remove the second phase-separated polymer while leaving behind the first pattern of the first phase-separated polymer on the surface of the substrate, the etching process being performed at a substrate temperature less than or equal to about 20 degrees C. The method further comprises providing a substrate holder for supporting the substrate, the substrate holder having a first temperature control element for controlling a first temperature at a central region and second temperature control element at an edge region of the substrate and setting a target value for the first and the second temperature.
    Type: Grant
    Filed: June 14, 2013
    Date of Patent: February 3, 2015
    Assignee: Tokyo Electron Limited
    Inventors: Vidhya Chakrapani, Akiteru Ko, Kaushik Kumar
  • Patent number: 8945406
    Abstract: A method for manufacturing a symbol on an exterior of an electronic device is provided. The method includes preparing a support layer, preparing a nanograting layer on the support layer, the nanograting layer including a first nanograting area corresponding to a preset symbol and a second nanograting area corresponding to an area other than the preset symbol, wherein each of the first nanograting area and the second nanograting area includes three-dimensional (3D) nanostructures and a pitch between the 3D nanostructures arranged in the first nanograting area is different from a pitch between the 3D nanostructures arranged in the second nanograting area.
    Type: Grant
    Filed: September 6, 2012
    Date of Patent: February 3, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seong-eun Chung, Il-yong Jung
  • Publication number: 20150027980
    Abstract: The invention relates to a method for manufacturing an apparatus for the processing of single molecules. According to this method, a self-assembling resist (155) is deposited on a processing layer (110, PL) and allowed to self-assemble into a pattern of two phases (155a, 155b). One of these phases (155a) is then selectively removed, and at least one aperture is generated in the processing layer (110, PL) through the mask of the remaining resist (155b). Thus apertures of small size can readily be produced that allow for the processing of single molecules (M), for example in DNA sequencing.
    Type: Application
    Filed: March 14, 2013
    Publication date: January 29, 2015
    Applicant: KONINKLIJKE PHILIPS N.V.
    Inventors: Pieter Jan Van Der Zaag, Emiel Peeters, Roelof Koole, Falco Cornelius Marinus Jacobus Maria Van Delft
  • Patent number: 8920664
    Abstract: According to one embodiment, a pattern forming method includes forming a physical guide that includes a first predetermined pattern in a first region on a lower layer film, and includes a second predetermined pattern and a dummy pattern in a second region on the lower layer film, forming a block polymer inside the physical guide, making the block polymer microphase-separated to form a pattern having a first polymer section and a second polymer section, removing the second polymer section to form a hole pattern, and processing the lower layer film after removal of the second polymer section, with the physical guide and the first polymer section used as a mask. Shapes of the hole patterns in the first and the second predetermined patterns are transferred to the lower layer film. A shape of the hole pattern in the dummy pattern is not transferred to the lower layer film.
    Type: Grant
    Filed: January 30, 2013
    Date of Patent: December 30, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yuriko Seino, Hirokazu Kato, Hiroki Yonemitsu
  • Patent number: 8916052
    Abstract: The present disclosure provides various methods for removing a resist layer from a wafer. An exemplary method includes performing an etching process to remove a resist layer from a wafer. During the etching process, a first heating process is performed to effect a first graded thermal profile in the resist layer, the first graded thermal profile having a temperature that increases along a direction perpendicular to the wafer. Further during the etching process, and after performing the first heating process, a second heating process is performed to effect a second graded thermal profile in the resist layer, the second graded thermal profile having a temperature that decreases along the direction perpendicular to the wafer. In an example, the method further includes, before performing the etching process, performing an ion implantation process to the wafer using the resist layer as a mask.
    Type: Grant
    Filed: February 1, 2013
    Date of Patent: December 23, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jung-Jui Li, Buh-Kuan Fang
  • Publication number: 20140360975
    Abstract: Disclosed herein is a block copolymer comprising a first block derived from a cyclo-alkyl vinyl monomer, a hydrogenated vinyl aromatic polymer or a hydrogenated vinyl pyridine polymers; and a second block derived from an acrylate monomer. Disclosed herein too is a method comprising reacting a first block derived from a cyclo-alkyl vinyl monomer, a hydrogenated vinyl aromatic polymer or a hydrogenated vinyl pyridine polymers with an initiator to form a macroinitiator; and polymerizing a second block onto the first block to form a block copolymer; where the second block is derived by polymerizing an acrylate monomer; and where the block copolymer has a chi parameter of greater than or equal to about 0.05, when measured at a temperature of 200° C. to 210° C.; where the chi parameter is a measure of interactions between the first block and the second block of the copolymer.
    Type: Application
    Filed: June 7, 2013
    Publication date: December 11, 2014
    Applicants: Regents of the University of Minnesota, Dow Global Technologies LLC
    Inventors: Phillip Dene Hustad, Frank Steven Bates, Marc Andrew Hillmyer, Justin Glenn Kennemur
  • Patent number: 8900467
    Abstract: A method for making a chemical contrast pattern uses directed self-assembly of block copolymers (BCPs) and sequential infiltration synthesis (SIS) of an inorganic material. For an example with poly(styrene-block-methyl methacrylate) (PS-b-PMMA) as the BCP and alumina as the inorganic material, the PS and PMMA self-assemble on a suitable substrate. The PMMA is removed and the PS is oxidized. A surface modification polymer (SMP) is deposited on the oxidized PS and the exposed substrate and the SMP not bound to the substrate is removed. The structure is placed in an atomic layer deposition chamber. Alumina precursors reactive with the oxidized PS are introduced and infuse by SIS into the oxidized PS, thereby forming on the substrate a chemical contrast pattern of SMP and alumina. The resulting chemical contrast pattern can be used for lithographic masks, for example to etch the underlying substrate to make an imprint template.
    Type: Grant
    Filed: May 25, 2013
    Date of Patent: December 2, 2014
    Assignee: HGST Netherlands B.V.
    Inventors: Yves-Andre Chapuis, Ricardo Ruiz, Lei Wan
  • Patent number: 8901004
    Abstract: A method of producing plurality of etched features in an electronic device is disclosed that avoids micro-loading problems thus maintaining more uniform sidewall profiles and more uniform critical dimensions. The method comprises performing a first time-divisional plasma etch process step within a plasma chamber to a first depth of the plurality of etched features, and performing a flash process step to remove any polymers from exposed surfaces of the plurality of etched features without requiring an oxidation step. The flash process step is performed independently of the time-divisional plasma etch step. A second time-divisional plasma etch process step is performed within the plasma chamber to a second depth of the plurality of etched features. The method may be repeated until a desired etch depth is reached.
    Type: Grant
    Filed: July 20, 2010
    Date of Patent: December 2, 2014
    Assignee: Lam Research Corporation
    Inventors: Tom Kamp, Qian Fu, I. C. Jang, Linda Braly, Shenjian Liu
  • Patent number: 8900468
    Abstract: A method includes forming a hydrophilic guide layer, a DBARC layer and a photoresist film. A portion of the photoresist film and DBARC layer is exposed to form exposed and unexposed portions. The unexposed photoresist film is removed to form a photoresist pattern including the exposed photoresist film portion. A neutral layer is formed on the photoresist pattern. The photoresist pattern and the DBARC layer of the exposed portion are removed to form first opening portions exposing the guide layer. A block copolymer layer includes a block copolymer having first and second polymer blocks coated on the neutral layer while filling the first opening portions. The block copolymer layer is microphase separated to form a pattern layer including first and second patterns. A pattern including one polymer block is removed to form a pattern mask. The object layer is etched to form a pattern including second opening portions.
    Type: Grant
    Filed: May 30, 2013
    Date of Patent: December 2, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Eun-Sung Kim, Jae-Woo Nam, Chul-Ho Shin, Shi-Yong Yi
  • Publication number: 20140346141
    Abstract: A method of forming a self-assembled block polymer layer, oriented to form an ordered array of alternating domains, is disclosed. The method involves providing a layer of the self-assemblable block copolymer on the substrate and depositing a first surfactant onto the external surface of the layer prior to inducing self-assembly of the layer to form the ordered array of domains. The first surfactant has a hydrophobic tail and a hydrophilic head group and acts to reduce the interfacial energy at the external surface of the block copolymer layer in order to promote formation of assembly of the block copolymer polymer into an ordered array having the alternating domains.
    Type: Application
    Filed: December 18, 2012
    Publication date: November 27, 2014
    Applicant: ASML Netherlands B.V.
    Inventors: Aurelie Marie Andree Brizard, Roelof Koole, Emiel Peeters
  • Publication number: 20140349486
    Abstract: Some embodiments include methods of forming patterns utilizing copolymer. A main body of copolymer may be formed across a substrate, and self-assembly of the copolymer may be induced to form a pattern of structures across the substrate. A uniform thickness throughout the main body of the copolymer may be maintained during the inducement of the self-assembly. In some embodiments, the uniform thickness may be maintained through utilization of a wall surrounding the main body of copolymer to impede dispersal of the copolymer from the main body. In some embodiments, the uniform thickness may be maintained through utilization of a volume of copolymer in fluid communication with the main body of copolymer.
    Type: Application
    Filed: August 8, 2014
    Publication date: November 27, 2014
    Inventors: Scott E. Sills, Dan Millward
  • Patent number: 8894869
    Abstract: A method includes forming a patterned hard mask layer, with a trench formed in the patterned hard mask layer. A Bulk Co-Polymer (BCP) coating is dispensed in the trench, wherein the BCP coating includes Poly-Styrele (PS) and Poly Methyl Metha Crylate (PMMA). An annealing is performed on the BCP coating to form a plurality of PS strips and a plurality of PMMA strips allocated in an alternating layout. The PMMA strips are selectively etched, with the PS strips left in the trench.
    Type: Grant
    Filed: November 13, 2012
    Date of Patent: November 25, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Sheng Chang, Tsung-Jung Tsai, Chung-Ju Lee, Tien-I Bao
  • Patent number: 8883645
    Abstract: Methods for fabrication of nanopillar field effect transistors are described. These transistors can have high height-to-width aspect ratios and be CMOS compatible. Silicon nitride may be used as a masking material. These transistors have a variety of applications, for example they can be used for molecular sensing if the nanopillar has a functionalized layer contacted to the gate electrode. The functional layer can bind molecules, causing an electrical signal in the transistor.
    Type: Grant
    Filed: July 12, 2013
    Date of Patent: November 11, 2014
    Assignee: California Institute of Technology
    Inventors: Chieh-Feng Chang, Aditya Rajagopal, Axel Scherer
  • Patent number: 8883023
    Abstract: A method for forming a pattern includes providing a composition to form a resist underlayer film on a surface of a substrate to be processed. The composition contains a calixarene based compound having a group represented by a following formula (i) bound to at least a part of an aromatic ring or at least a part of a heteroaromatic ring of the calixarene based compound. The resist underlayer film on the surface of the substrate is treated with heat or an acid. A resist pattern is formed on a surface of the resist underlayer film. The resist underlayer film and the substrate are etched using the resist pattern as a mask to form the pattern on the substrate. The dry-etched resist underlayer film is removed from the substrate with a basic solution.
    Type: Grant
    Filed: September 28, 2012
    Date of Patent: November 11, 2014
    Assignee: JSR Corporation
    Inventors: Goji Wakamatsu, Hayato Namai, Syun Aoki
  • Patent number: 8871106
    Abstract: This present invention provides a masking method for locally treating surface of a workpiece by masking the workpiece. The workpiece has a targeting treatment area and a non-targeting treatment area. The masking method includes: covering a fixture on the non-targeting treatment area of the workpiece to expose the targeting treatment area of the workpiece; by using an adsorbing force existing between the fixture and the workpiece, getting the fixture to closely contact with the non-targeting treatment area of the workpiece and to make an end edge of the fixture correspond to the edge of the targeting treatment area of the workpiece, wherein the adsorbing force is a vacuum adsorbing force or a static electric adsorbing force. Thereby the surface treatment only effects in an area within the range of the targeting treatment area of the workpiece so as to reduce the treatment defect.
    Type: Grant
    Filed: October 23, 2012
    Date of Patent: October 28, 2014
    Assignee: Apone Technology Ltd.
    Inventor: Wei-Lin Liu
  • Patent number: 8858814
    Abstract: A photomask blank is provided comprising a transparent substrate, a single or multi-layer film including an outermost layer composed of chromium base material, and an etching mask film. The etching mask film is a silicon oxide base material film formed of a composition comprising a hydrolytic condensate of a hydrolyzable silane, a crosslink promoter, and an organic solvent and having a thickness of 1-10 nm. The etching mask film has high resistance to chlorine dry etching, ensuring high-accuracy processing of the photomask blank.
    Type: Grant
    Filed: March 26, 2010
    Date of Patent: October 14, 2014
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Satoshi Watanabe, Hideo Kaneko, Ryuji Koitabashi, Shinichi Igarashi, Yoshio Kawai, Shozo Shirai
  • Publication number: 20140299575
    Abstract: A BCP having first block of first monomer and second block of second monomer, adapted to undergo a transition from disordered state to ordered state at a temperature less than TOD, further including a bridging moiety having a functional group to provide hydrogen bonding between bridging moieties of adjacent first and second BCP molecules when in the ordered state and at a temperature in excess of a glass transition temperature Tg for the BCP. Composition including BCP comprising first block of first monomer and second block of second monomer, and a crosslinking compound having first and second terminal groups joined by a central moiety and arranged to crosslink second blocks of adjacent first and second BCP molecules by providing non-covalent bonding between the terminal groups and a functional group of the second monomer of the second blocks when the BCP is in the ordered state.
    Type: Application
    Filed: June 7, 2012
    Publication date: October 9, 2014
    Applicant: ASML Netherlands B.V.
    Inventors: Aurelie Marie Andree Brizard, Wilhelmus Sebastianus Marcus Maria Ketelaars, Sander Frederik Wuister, Roelof Koole, Emiel Peeters, Christianus Martinus Van Heesch, Henri Marie Joseph Boots, Thanh Trung Nguyen
  • Publication number: 20140263175
    Abstract: Surface-modifying layers, including neutral layers for vertical domain-forming block copolymers of styrene and methyl methacrylate are provided. Also provided are self-assembled block copolymer structures incorporating the surface modifying layers, methods of fabricating such structures and methods of using the structures in BCP lithography applications. The surface-modifying layers comprise a crosslinked copolymer film, wherein the crosslinked copolymers are random copolymers polymerized from styrene monomers and/or (meth)acrylate monomers and crosslinkable epoxy group-functionalized monomers. The crosslinked copolymer films are characterized by a high content of the crosslinkable epoxy group-functionalized monomer.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Inventors: Padma Gopalan, Eungnak Han, Myungwoong Kim
  • Publication number: 20140273361
    Abstract: Methods of fabricating patterned substrates, including patterned graphene substrates, using etch masks formed from self-assembled block copolymer films are provided. Some embodiments of the methods are based on block copolymer (BCP) lithography in combination with graphoepitaxy. Some embodiments of the methods are based on BCP lithography techniques that utilize hybrid organic/inorganic etch masks derived from BCP templates. Also provided are field effect transistors incorporating graphene nanoribbon arrays as the conducting channel and methods for fabricating such transistors.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Applicant: Wisconsin Alumni Research Foundation
    Inventors: Michael S. Arnold, Padma Gopalan, Nathaniel S. Safron, Myungwoong Kim, Jonathan Woosun Choi
  • Patent number: 8828253
    Abstract: A method of lithography on a substrate uses a self-assembled polymer (SAP) layer deposited on the substrate, with first and second domains arranged in a pattern across the layer. A planarization layer is formed over the SAP and a development etch applied to substantially remove a portion of the planarization layer over the second domain leaving a cap of the planarization layer substantially covering the first domain. The uncapped second domain is then removed from the surface by a breakthrough etch leaving the capped first domain as a pattern feature on the surface. A transfer etch may then be used to transfer the pattern feature to the substrate using the capped first domain. The capping allows the second domain to be removed, e.g., without excessive loss of lateral feature width for the remaining first domain, even when the difference in etch resistance between the first and second domains is small.
    Type: Grant
    Filed: July 21, 2011
    Date of Patent: September 9, 2014
    Assignee: ASML Netherlands B.V.
    Inventors: Roelof Koole, Johan Frederik Dijksman, Sander Frederik Wuister, Emiel Peeters
  • Patent number: 8828304
    Abstract: A method of forming a resist pattern of high aspect ratio excelling in etching resistance by the use of nanoimprint lithography. The method of forming a resist pattern by nanoimprint lithography comprises the steps of disposing organic layer (4) on support (1); providing resist layer (2) on the organic layer (4) with the use of chemical amplification type negative resist composition containing silsesquioxane resin (A); pressing light transmission allowing mold (3) with partial light shielding portion (5) against the resist layer (2) and thereafter carrying out exposure from the upside of the mold (3); and detaching the mold (3).
    Type: Grant
    Filed: May 30, 2007
    Date of Patent: September 9, 2014
    Assignee: Tokyo Ohka Kogyo Co., Ltd.
    Inventors: Kazufumi Sato, Tomotaka Yamada
  • Publication number: 20140245948
    Abstract: A graphoepitaxy template to align a self-assembled block polymer adapted to self-assemble into a 2-D array having parallel rows of discontinuous first domains extending parallel to a first axis, mutually spaced along an orthogonal second axis, and separated by a continuous second domain. The graphoepitaxy template has first and second substantially parallel side walls extending parallel to and defining the first axis and mutually spaced along the second axis to provide a compartment to hold at least one row of discontinuous first domains of the self-assembled block copolymer on the substrate between and parallel to the side walls, and separated therefrom by a continuous second domain. The compartment has a graphoepitaxial nucleation feature arranged to locate at least one of the discontinuous first domains at a specific position within the compartment. Methods for forming the graphoepitaxy template and its use for device lithography are also disclosed.
    Type: Application
    Filed: October 2, 2012
    Publication date: September 4, 2014
    Applicant: ASML Netherlands B.V.
    Inventors: Thanh Trung Nguyen, Jozef Maria Finders, Wilhelmus Sebastianus Marcus Maria Ketelaars, Sander Frederik Wuister, Eddy Cornelis Antonius Van Der Heijden, Hieronymus Johannus Christiaan Meessen, Roelof Koole, Emiel Peeters, Christianus Martinus Van Heesch, Aurelie Marie Andree Brizard, Henri Marie Joseph Boots, Tamara Druzhinina, Jessica Marggaretha De Ruiter
  • Patent number: 8821739
    Abstract: A method for processing a substrate is provided; wherein the method comprises applying a film of a copolymer composition, comprising a poly(styrene)-b-poly(siloxane) block copolymer component; and, an antioxidant to a surface of the substrate; optionally, baking the film; subjecting the film to a high temperature annealing process under a gaseous atmosphere for a specified period of time; followed by a treatment of the annealed film to remove the poly(styrene) from the annealed film and to convert the poly(siloxane) in the annealed film to SiOx.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: September 2, 2014
    Assignees: Rohm and Haas Electronic Materials LLC, Dow Global Technologies LLC
    Inventors: Xinyu Gu, Shih-Wei Chang, Phillip D. Hustad, Jeffrey D. Weinhold, Peter Trefonas
  • Patent number: 8821738
    Abstract: A method for processing a substrate is provided; wherein the method comprises applying a film of a copolymer composition, comprising a poly(styrene)-b-poly(siloxane) block copolymer component; and, an antioxidant to a surface of the substrate; optionally, baking the film; annealing the film in a gaseous atmosphere containing ?20 wt % oxygen; followed by a treatment of the annealed film to remove the poly(styrene) from the annealed film and to convert the poly(siloxane) in the annealed film to SiOx.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: September 2, 2014
    Assignees: Rohm and Haas Electronic Materials LLC, Dow Global Technologies LLC
    Inventors: Phillip D. Hustad, Xinyu Gu, Shih-Wei Chang, Jeffrey D. Weinhold, Peter Trefonas
  • Publication number: 20140231380
    Abstract: In one embodiment, a pattern forming method includes forming a physical guide that includes a first pattern in a first region and a second pattern in a second region on an underlying film, embedding a polymer material into a concave portion of the physical guide, microphase-separating the polymer material, to form a self-assembly pattern having a first and a second polymer sections, observing the self-assembly pattern in the second region, to determine from an observation result whether or not the self-assembly pattern in the first region has a predetermined shape, and selectively removing the first polymer section in the case of determining that the self-assembly pattern in the first region has the predetermined shape. The second pattern includes a pattern with a larger coverage ratio than the first pattern and a pattern with a smaller coverage ratio than the first pattern.
    Type: Application
    Filed: July 26, 2013
    Publication date: August 21, 2014
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Yuriko SEINO, Hiroki Yonemitsu
  • Publication number: 20140231388
    Abstract: According to one embodiment, a guide pattern data correcting method is for correcting guide pattern data of a physical guide for formation of a polymer material to be microphase-separated. The physical guide has a plurality of concave portions in the guide pattern data, and at least two concave portions out of the plurality of concave portions are connected to each other. The guide pattern data is subjected to correction by shifting or rotation of at least either of the two connected concave portions.
    Type: Application
    Filed: August 1, 2013
    Publication date: August 21, 2014
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Hiroki Yonemitsu
  • Patent number: 8791027
    Abstract: A problem of a resist mask collapse due to a plasma process is solved. In a method of manufacturing a semiconductor device including steps of a plasma process to a sample having a mask made of an organic material, the plasma process includes a first step of a plasma process under a gas containing any of fluorine, oxygen, or nitrogen, or containing all of them, and a second step of the plasma process under a gas containing a rare gas without containing any of fluorine, oxygen, and nitrogen, and the first step and the second step are repeated.
    Type: Grant
    Filed: June 4, 2010
    Date of Patent: July 29, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Naoyuki Kofuji, Hideo Miura
  • Patent number: 8790522
    Abstract: A method includes forming a chemical guide layer above a process layer. A template having a plurality of elements is formed above the process layer. The chemical guide layer is disposed on at least portions of the process layer disposed between adjacent elements of the template. A directed self-assembly layer is formed over the chemical guide layer. The directed self-assembly layer has alternating etchable components and etch-resistant components. The etchable components of the directed self-assembly layer are removed. The process layer is patterned using the template and the etch-resistant components of the directed self-assembly layer as an etch mask.
    Type: Grant
    Filed: February 11, 2013
    Date of Patent: July 29, 2014
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Gerard M. Schmid, Richad A. Farrell, Ji Xu, Jason R. Cantone, Moshe E. Preil
  • Patent number: 8784974
    Abstract: Methods for fabricating sub-lithographic, nanoscale microchannels utilizing an aqueous emulsion of an amphiphilic agent and a water-soluble, hydrogel-forming polymer, and films and devices formed from these methods are provided.
    Type: Grant
    Filed: May 17, 2012
    Date of Patent: July 22, 2014
    Assignee: Micron Technology, Inc.
    Inventor: Dan B. Millward
  • Publication number: 20140197133
    Abstract: The invention provides compositions and methods for inducing and enhancing order and nanostructures in organosilicon block copolymers compositions by including certain organic additives in such compositions that include one or more moieties comprising a hydrogen bond acceptor or a hydrogen bond donor. Such block copolymer compositions may be used, for example, as a mask for lithographic patterning as is used, for example, during various stages of semiconductor device fabrication.
    Type: Application
    Filed: January 13, 2014
    Publication date: July 17, 2014
    Inventors: Damien Montarnal, Craig J. Hawker, Edward J. Kramer, Glenn H. Fredrickson
  • Publication number: 20140197132
    Abstract: A block copolymer is provided. The block copolymer according to an exemplary embodiment includes a first block represented by Chemical Formula 1 and a second block represented by Chemical Formula 2: wherein COM1 and COM2 are independently selected from a polystyrene moiety, polymethylmethacrylate moiety, polyethylene oxide moiety, polyvinylpyridine moiety, polydimethylsiloxane moiety, polyferrocenyldimethylsilane moiety, and polyisoprene moiety, R1 is hydrogen or an alkyl group with 1 to 10 carbon atoms, Ph is a phenyl group, a is 1 to 50, R2 is hydrogen or an alkyl group with 1 to 10 carbon atoms, and b is 1 to 50.
    Type: Application
    Filed: November 21, 2013
    Publication date: July 17, 2014
    Applicants: Samsung Display Co., Ltd., Sogang University Research Foundation, KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION
    Inventors: Min Hyuck KANG, Su Mi LEE, Myung Im KIM, Tae Woo KIM, Seung-Won PARK, Xie LEI, Na Na KANG, Bong-Jin MOON, Joona BANG, Sang Hoon WOO, Jin Yeong LEE, Hyun Jung JUNG, June HUH
  • Patent number: 8778204
    Abstract: A method and apparatus for monitoring a target layer in a plasma process having a photoresist layer is provided. The method is useful in removing noise associated with the photoresist layer, and is particularly useful when signals associated with the target layer is weak, such as when detecting an endpoint for a photomask etching process.
    Type: Grant
    Filed: October 26, 2011
    Date of Patent: July 15, 2014
    Assignee: Applied Materials, Inc.
    Inventor: Michael N. Grimbergen
  • Patent number: 8778201
    Abstract: A pattern forming material contains a block copolymer or graft copolymer and forms a structure having micro polymer phases, in which, with respect to at least two polymer chains among polymer chains constituting the block copolymer or graft copolymer, the ratio between N/(Nc?No) values of monomer units constituting respective polymer chains is 1.4 or more, where N represents total number of atoms in the monomer unit, Nc represents the number of carbon atoms in the monomer unit, No represents the number of oxygen atoms in the monomer unit.
    Type: Grant
    Filed: October 21, 2011
    Date of Patent: July 15, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koji Asakawa, Toshiro Hiraoka, Yoshihiro Akasaka, Yasuyuki Hotta
  • Patent number: 8771534
    Abstract: Some embodiments relate to a method for processing a workpiece. In the method, an anti-reflective coating layer is provided over the workpiece. A first patterned photoresist layer, which has a first photoresist tone, is provided over the anti-reflective coating layer. A second patterned photoresist layer, which has a second photoresist tone opposite the first photoresist tone, is provided over the first patterned photoresist layer. An opening extends through the first and second patterned photoresist layers to allow a treatment to be applied to the workpiece through the opening. Other embodiments are also disclosed.
    Type: Grant
    Filed: January 13, 2012
    Date of Patent: July 8, 2014
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chun-Chang Chen, Shih-Chi Fu, Wang-Pen Mo, Hung-Chang Hsieh
  • Publication number: 20140183162
    Abstract: A method of forming a metal pattern is disclosed. In the method, a metal layer is formed on a base substrate. A photoresist composition is coated on the metal layer to form a coating layer. The photoresist composition includes a binder resin, a photo-sensitizer and a mixed solvent including a first solvent, a second solvent having a higher volatility than the first solvent, and a third solvent having a higher volatility than the second solvent. The coating layer is exposed to light. The coating layer is partially removed to form a photoresist pattern. The metal layer is patterned by using the photoresist pattern as a mask.
    Type: Application
    Filed: June 6, 2013
    Publication date: July 3, 2014
    Inventors: Ki-Hyun CHO, Hoon KANG, Jae-Sung KIM, Dong-Min KIM, Seung-Ki KIM, Eun JEAGAL
  • Patent number: 8765612
    Abstract: A double patterning process is described. A substrate having a first area and a second area is provided. A target layer is formed over the substrate. A patterned first photoresist layer is formed over the target layer, wherein the patterned first photoresist layer has openings and has a first thickness in the first area, and at least a portion of the patterned first photoresist layer in the second area has a second thickness less than the first thickness. A second photoresist layer is then formed covering the patterned first photoresist layer and filling in the openings.
    Type: Grant
    Filed: September 14, 2012
    Date of Patent: July 1, 2014
    Assignee: Nanya Technology Corporation
    Inventors: Jenn-Wei Lee, Hung-Jen Liu
  • Patent number: 8764996
    Abstract: A method of patterning a first material on a polymeric substrate is described. The method includes providing a polymeric film substrate having a major surface with a relief pattern including a recessed region and an adjacent raised region, depositing a first material onto the major surface of the polymeric film substrate to form a coated polymeric film substrate, forming a layer of a functionalizing material selectively on the raised region of the coated polymeric film substrate to form a functionalized raised region and an unfunctionalized recessed region, and etching the first material from the polymeric substrate selectively from the unfunctionalized recessed region.
    Type: Grant
    Filed: October 18, 2006
    Date of Patent: July 1, 2014
    Assignee: 3M Innovative Properties Company
    Inventors: Matthew H. Frey, Khanh P. Nguyen
  • Patent number: 8759227
    Abstract: A method for processing a target object includes arranging a first electrode and a second electrode for supporting the target object in parallel to each other in a processing chamber and processing the target object supported by the second electrode by using a plasma of a processing gas supplied into the processing chamber, the plasma being generated between the first electrode and the second electrode by applying a high frequency power between the first electrode and the second electrode. The target object includes an organic film and a photoresist layer formed on the organic film. The processing gas contains H2 gas, and the organic film is etched by a plasma containing H2 by using the photoresist layer as a mask while applying a negative DC voltage to the first electrode.
    Type: Grant
    Filed: September 7, 2010
    Date of Patent: June 24, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Kazuki Narishige, Kazuo Shigeta
  • Publication number: 20140170377
    Abstract: The present invention relates to techniques for lowering friction between moving surfaces of, for example, an internal combustion engine. Friction reduction is achieved by adding texture modifications to surfaces that come in contact with each other. Texture modifications that reduce friction in accordance with the present invention include dimples of varying geometries and depths ion the surfaces of components. The present invention also relates to the fabrication technique for applying the textures to the surfaces. In another embodiment, the patterned soft mask is applied onto a large surface (flat or curved including cylindrical rollers surfaces) to be followed by electrochemical etching to imprint the textures onto the component. And, in another embodiment, a diamond-like-carbon (DLC) film may be applied to the turbine component to also reduce friction.
    Type: Application
    Filed: February 21, 2012
    Publication date: June 19, 2014
    Applicant: The George Washington University
    Inventors: Stephen M. Hsu, Yang Jing, Yufei Mo, Dongyun Hua, Ming Chen
  • Patent number: 8747682
    Abstract: According to one embodiment, a pattern formation method is disclosed. The method includes forming a plurality of regions on a foundation and the plurality of the regions correspond to different pattern sizes. The method includes separating each of a plurality of block copolymers from another one of the plurality of the block copolymers and segregating the each of the plurality of the block copolymers into a corresponding one of the regions. The method includes performing a phase separation of the each of the block copolymers of each of the regions. The method includes selectively removing a designated phase of each of the phase-separated block copolymers to form a pattern of the each of the block copolymers and the pattern has a different pattern size for the each of the regions.
    Type: Grant
    Filed: August 3, 2010
    Date of Patent: June 10, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kentaro Matsunaga, Tomoya Oori, Eishi Shiobara, Yukiko Sato, Yoshihisa Kawamura
  • Patent number: 8734659
    Abstract: A process for etching a silicon-containing substrate to form structures is provided. In the process, a metal is deposited and patterned onto a silicon-containing substrate (commonly one with a resistivity above 1-10 ohm-cm) in such a way that the metal is present and touches silicon where etching is desired and is blocked from touching silicon or not present elsewhere. The metallized substrate is submerged into an etchant aqueous solution comprising about 4 to about 49 weight percent HF and an oxidizing agent such as about 0.5 to about 30 weight percent H2O2, thus producing a metallized substrate with one or more trenches. A second silicon etch is optionally employed to remove nanowires inside the one or more trenches.
    Type: Grant
    Filed: October 9, 2009
    Date of Patent: May 27, 2014
    Assignee: Bandgap Engineering Inc.
    Inventors: Brent A. Buchine, Faris Modawar, Marcie R. Black
  • Publication number: 20140140365
    Abstract: A sensor for differential calorimetric measurement including a thermometric cell and another cell, each cell including: a membrane of a low thermal conductivity material, having first and second surfaces; and a mechanism supporting the membrane, of a high thermal diffusivity coefficient material, in contact with the first surface of the membrane, the thermometric cell including at least two active thermometric elements located on the first surface of the membrane, the two cells configured to be assembled such that the second surfaces of the membranes of the cells are opposite one another, a sample and a reference used for taking measurement configured to be placed between the two membranes and directly in contact with the second surfaces, and at least one of the cells including a sealing mechanism opposite the first surface of the membrane, wherein a free space for a gas is arranged between the sealing mechanism and the membrane.
    Type: Application
    Filed: June 18, 2012
    Publication date: May 22, 2014
    Applicants: Setaram Instrumentation, Centre National de la Recherche Scientifique
    Inventors: Jean-Luc Garden, Gael Moiroux, Pierre Lachkar
  • Patent number: 8728336
    Abstract: A method of chemically milling a workpiece includes the step of depositing a masking material on portions of a workpiece according to a predefined masking pattern such that other portions of the workpiece that are desired to be milled are unmasked. The masking material is deposited using a masking printer that moves in three dimensions to deposit the masking material onto the workpiece. The method also includes the step of chemically removing material from unmasked desired milling areas of the workpiece.
    Type: Grant
    Filed: August 20, 2012
    Date of Patent: May 20, 2014
    Assignee: United Technologies Corporation
    Inventor: Edris Raji
  • Patent number: 8728563
    Abstract: A method of manufacturing an endoluminal implantable surface, stent, or graft includes the steps of providing an endoluminal implantable surface, stent, or graft having an inner wall surface, an outer wall surface, and a wall thickness and forming a pattern design into the endoluminal implantable surface, stent, or graft. At least one groove is created in the inner surface of the intravascular stent by applying a laser machining method to the inner surface.
    Type: Grant
    Filed: May 3, 2011
    Date of Patent: May 20, 2014
    Assignee: Palmaz Scientific, Inc.
    Inventors: Julio C. Palmaz, Armando Garza
  • Patent number: 8728331
    Abstract: A method of fabricating an imprint mold is disclosed. The method includes: forming a first photo resist pattern on a substrate; etching the substrate using the first photo resist pattern as an etch mask to form a first pattern in the substrate; ashing the first photo resist pattern to form a second photo resist pattern; and etching the substrate using the second photo resist pattern to form a second pattern derived from the substrate and a third pattern derived from the first pattern.
    Type: Grant
    Filed: December 7, 2010
    Date of Patent: May 20, 2014
    Assignee: LG Display Co., Ltd.
    Inventors: Doo Hee Jang, Dhang Kwon, Hang Sup Cho, Ho Su Kim
  • Publication number: 20140131312
    Abstract: A method includes forming a patterned hard mask layer, with a trench formed in the patterned hard mask layer. A Bulk Co-Polymer (BCP) coating is dispensed in the trench, wherein the BCP coating includes Poly-Styrele (PS) and Poly Methyl Metha Crylate (PMMA). An annealing is performed on the BCP coating to form a plurality of PS strips and a plurality of PMMA strips allocated in an alternating layout. The PMMA strips are selectively etched, with the PS strips left in the trench.
    Type: Application
    Filed: November 13, 2012
    Publication date: May 15, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Sheng Chang, Tsung-Jung Tsai, Chung-Ju Lee, Tien-I Bao
  • Publication number: 20140131313
    Abstract: A simulation method predicts wet spreading and unions of a plurality of droplets arranged on a patterned surface defined by a fine pattern of protrusions and recesses, the patterned surface causing anisotropy to occur in the wet spreading of the droplets. The influence imparted by the pattern of protrusions and recesses that defines the patterned surface, which is the target of analysis, on the wet spreading of the droplets is treated as wetting properties of an analysis surface, and the wet spreading and unions of the plurality of droplets on the analysis surface are analyzed by gas liquid two phase flow analysis that incorporates the wetting property parameters that represents the wetting properties.
    Type: Application
    Filed: September 26, 2013
    Publication date: May 15, 2014
    Applicant: FUJIFILM CORPORATION
    Inventors: Satoshi WAKAMATSU, Takeshi UNEMURA, Kenichi KODAMA, Takafumi NOGUCHI
  • Patent number: 8721905
    Abstract: A method for forming a minute pattern mask includes forming an etching target layer on a substrate. A convex pattern including a plurality of convex parts is formed on the etching target layer. A resin composition is coated on the convex pattern to form a resin layer including a first region neighboring the convex part and a second region positioned between the neighboring convex parts. The resin layer is ashed or etched to form the plurality of first resin patterns. The plurality of first resin patterns is processed to form a minute pattern mask including a plurality of second resin patterns. The etching target layer is etched using the plurality of second resin patterns as an etch mask to form a minute pattern.
    Type: Grant
    Filed: March 27, 2012
    Date of Patent: May 13, 2014
    Assignees: Samsung Display Co., Ltd., SNU R & DB Fountdation
    Inventors: Se-Hwan Yu, Ji Seon Lee, Yoon Ho Khang, Kahp Yang Suh, Hyoung Sick Um, Jae Jun Chae, Sung Hun Lee
  • Patent number: 8716151
    Abstract: The present disclosure relates to a method of fabricating semiconductor devices. In the method provided by the present invention, by filling with diblock copolymer a recess of an interlayer dielectric layer naturally formed between two gate lines and then performing a self-assembly process of the diblock copolymer, a small-sized contact hole precisely aligned with an doped area can be formed, and thus misalignment between the contact hole and the doped area can be eliminated or alleviated.
    Type: Grant
    Filed: December 15, 2011
    Date of Patent: May 6, 2014
    Assignee: Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Haiyang Zhang, Dongjiang Wang
  • Patent number: 8709267
    Abstract: Methods for patterning material layers, which may be implemented in forming integrated circuit device features, are disclosed. In an example, a method includes forming a first resist layer over a material layer; forming a second resist layer over the first resist layer; forming an opening that extends through the second resist layer and the first resist layer to expose the material layer, wherein the opening has a substantially constant width in the second resist layer and a tapered width in the first resist layer; and performing a tilt-angle deposition process to form a feature over the exposed material layer.
    Type: Grant
    Filed: July 21, 2011
    Date of Patent: April 29, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chwen Yu, Fei-Gwo Tsai, Kai-Wen Cheng