By Electrical Means Or Of An Electrical Property Patents (Class 216/61)
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Patent number: 12159767Abstract: Systems and methods for plasma processing are disclosed. An exemplary system may include a plasma processing chamber comprising a source to produce a plasma in the processing chamber and at least two bias electrodes arranged within the plasma processing chamber to control plasma sheaths proximate to the bias electrodes. A chuck is disposed to support a substrate, and a source generator is coupled to the plasma electrode. At least one bias supply is coupled to the at least two bias electrodes, and a controller is included to control the at least one bias supply to control the plasma sheaths proximate to the bias electrodes.Type: GrantFiled: September 5, 2022Date of Patent: December 3, 2024Assignee: Advanced Energy Industries, Inc.Inventors: Daniel Carter, Kevin Fairbairn, Denis Shaw, Victor Brouk
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Patent number: 12136536Abstract: The present disclosure relates to a method and apparatus for controlling a plasma sheath near a substrate edge. Changing the voltage/current distribution across the inner electrode and the outer electrode with in the substrate assembly facilitates the spatial distribution of the plasma across the substrate. The method includes providing a first radio frequency power to a central electrode embedded in a substrate support assembly, providing a second radio frequency power to an annular electrode embedded in the substrate support assembly at a location different than the central electrode, wherein the annular electrode circumferentially surrounds the central electrode, monitoring parameters of the first and second radio frequency power, and adjusting one or both of the first and second radio frequency power based on the monitored parameters.Type: GrantFiled: February 28, 2019Date of Patent: November 5, 2024Assignee: APPLIED MATERIALS, INC.Inventors: Edward P. Hammond, IV, Jonghoon Baek
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Patent number: 12080520Abstract: A plasma generation system includes an impedance matching network calibrated to map desired matching network impedance values to closest available settings of impedance control components. The tuning controller defines a set of target impedance values spaced-apart throughout the tuning range and drives the matching network to generate a set of closest frame tuning values proximate to each target impedance value. The tuning controller computes interpolated tuning values between adjacent pairs of frame tuning values and stores a tuning database that maps available matching network impedance values to specific sets of settings for the impedance control components. After the calibration stage, the tuning controller automatically utilizes the tuning database to map desired matching network impedance values to available settings of the impedance control components on an ongoing basis. Representative embodiments include variable loading and tuning capacitors in series with a fixed or variable phase-shift inductor.Type: GrantFiled: December 13, 2022Date of Patent: September 3, 2024Assignee: COMET TECHNOLOGIES USA, INC.Inventors: Anthony Oliveti, Dean Maw, Keith Rouse, Gary Russell, Tigran Poghosyan
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Patent number: 11978613Abstract: Bias supplies and bias control methods are disclosed. One method comprises applying an asymmetric periodic voltage waveform and providing a corresponding current waveform at an output node relative to a return node; receiving a signal to change from a current state of the asymmetric periodic voltage waveform to a next state of the asymmetric periodic voltage waveform; and adjusting, during a transition from the current state to the next state, at least one portion of the asymmetric periodic voltage waveform and simultaneously adjusting a fundamental frequency of the asymmetric periodic voltage waveform to settle at the next state.Type: GrantFiled: September 1, 2022Date of Patent: May 7, 2024Assignee: Advanced Energy Industries, Inc.Inventor: Hien Minh Nguyen
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Patent number: 11942309Abstract: Bias supplies and plasma processing systems are disclosed. One bias supply comprises an output node, a return node, and a power section coupled to the output node and the return node. A resonant switch section is coupled to the power section at a first node, a second node, and a third node wherein the resonant switch section is configured to connect and disconnect a current pathway between the first node and the second node to apply an asymmetric periodic voltage waveform at the output node relative to the return node. The asymmetric periodic voltage waveform includes a first portion that begins with a first negative voltage and changes to a positive peak voltage, a second portion that changes from the positive peak voltage level to a third voltage level and a fourth portion that includes a negative voltage ramp from the third voltage level to a fourth voltage level.Type: GrantFiled: January 26, 2022Date of Patent: March 26, 2024Assignee: Advanced Energy Industries, Inc.Inventor: Maneesh Kumar Singh
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Patent number: 11887811Abstract: Exemplary semiconductor substrate supports may include a pedestal having a shaft and a platen. The semiconductor substrate supports may include a cover plate. The cover plate may be coupled with the platen along a first surface of the cover plate. The cover plate may define a recessed channel in a second surface of the cover plate opposite the first surface. The semiconductor substrate supports may include a puck coupled with the second surface of the cover plate. The puck may incorporate an electrode. The puck may define a plurality of apertures extending vertically through the puck to fluidly access the recessed channel defined in the cover plate.Type: GrantFiled: September 8, 2020Date of Patent: January 30, 2024Assignee: Applied Materials, Inc.Inventors: Khokan Chandra Paul, Ravikumar Patil
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Patent number: 11699571Abstract: Exemplary semiconductor substrate supports may include a pedestal shaft. The semiconductor substrate supports may include a platen. The platen may define a fluid channel across a first surface of the platen. The semiconductor substrate supports may include a platen insulator positioned between the platen and the pedestal shaft. The semiconductor substrate supports may include a conductive puck coupled with the first surface of the platen and configured to contact a substrate supported on the semiconductor substrate support. The semiconductor substrate supports may include a conductive shield extending along a backside of the platen insulator and coupled between a portion of the platen insulator and the pedestal shaft.Type: GrantFiled: September 8, 2020Date of Patent: July 11, 2023Assignee: Applied Materials, Inc.Inventors: Khokan Chandra Paul, Ravikumar Patil, Vijet Patil, Carlaton Wong, Adam J. Fischbach, Timothy Franklin, Tsutomu Tanaka, Canfeng Lai
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Patent number: 11437221Abstract: Systems and methods for plasma processing are disclosed. An exemplary system may include a plasma processing chamber comprising a source to produce a plasma in the processing chamber and at least two bias electrodes arranged within the plasma processing chamber to control plasma sheaths proximate to the bias electrodes. A chuck is disposed to support a substrate, and a source generator is coupled to the plasma electrode. At least one bias supply is coupled to the at least two bias electrodes, and a controller is included to control the at least one bias supply to control the plasma sheaths proximate to the bias electrodes.Type: GrantFiled: February 9, 2021Date of Patent: September 6, 2022Assignee: Advanced Energy Industries, Inc.Inventors: Daniel Carter, Kevin Fairbairn, Denis Shaw, Victor Brouk
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Patent number: 11049692Abstract: Plasma processing apparatus and associated methods are provided. In one example, a method can include admitting a process gas into a plasma chamber. The method can include exciting with RF energy an inductive coupling element to initiate ignition of a plasma induced in the process gas. The method can include adjusting an RF voltage of an electrostatic shield located between the inductive coupling element and the plasma chamber. The electrostatic shield can have a stray capacitance to a ground reference. The method can include conducting an ion-assisted etching process on the workpiece based at least in part on the RF voltage of the electrostatic shield.Type: GrantFiled: July 17, 2019Date of Patent: June 29, 2021Assignees: Mattson Technology, Inc., Beijing E-Town Semiconductor Technology Co., Ltd.Inventors: Stephen E. Savas, Shawming Ma
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Patent number: 11031213Abstract: A device includes a microwave generation unit that averages the first measured values and the second measured values at a predetermined movement average time and a predetermined sampling interval, and controls the microwave such that a value obtained by subtracting the averaged second measured value from the averaged first measured value comes close to the setting power, and in which the predetermined movement average time is 60 ?s or less, and a relationship of y?78.178x0.1775 is satisfied when the predetermined sampling interval is indicated by x, and the predetermined movement average time is indicated by y.Type: GrantFiled: May 2, 2018Date of Patent: June 8, 2021Assignee: Tokyo Electron LimitedInventors: Kazushi Kaneko, Yuji Onuma
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Patent number: 10896807Abstract: Systems and methods for plasma processing are disclosed. A method includes applying pulsed power to a plasma processing chamber with an excitation source during a first processing step with a first duty cycle and applying, during the first processing step, an asymmetric periodic voltage waveform to a substrate support to produce a first plasma sheath voltage between a substrate and a plasma. Pulsed power is applied to the plasma processing chamber with the excitation source during a second processing step with a second duty cycle and during the second processing step, a different asymmetric periodic voltage waveform is applied to the substrate support to produce a different plasma sheath voltage between the substrate and the plasma.Type: GrantFiled: February 27, 2020Date of Patent: January 19, 2021Assignee: Advanced Energy Industries, Inc.Inventors: Kevin Fairbairn, Denis Shaw, Daniel Carter
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Patent number: 10707056Abstract: Systems and methods for determining ion energy are described. One of the methods includes detecting output of a generator to identify a generator output complex voltage and current (V&I). The generator is coupled to an impedance matching circuit and the impedance matching circuit is coupled to an electrostatic chuck (ESC). The method further includes determining from the generator output complex V&I a projected complex V&I at a point along a path between an output of a model of the impedance matching circuit and a model of the ESC. The operation of determining of the projected complex V&I is performed using a model for at least part of the path. The method includes applying the projected complex V&I as an input to a function to map the projected complex V&I to a wafer bias value at the ESC model and determining an ion energy from the wafer bias value.Type: GrantFiled: November 9, 2017Date of Patent: July 7, 2020Assignee: Lam Research CorporationInventors: John C. Valcore, Jr., Bradford J. Lyndaker
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Patent number: 10395896Abstract: Methods and apparatus for boosting ion energies are contemplated herein. In one embodiment, the methods and apparatus comprises a controller, a process chamber with a symmetrical plasma source configured to process a wafer, one or more very high frequency (VHF) sources, coupled to the process chamber, to generate plasma density and two or more frequency generators that generate low frequencies relative to the one or more VHF sources, coupled to a bottom electrode of the process chamber, the two or more low frequency generators configured to dissipate energy in the plasma sheath, wherein the controller controls the one or more VHF sources to generate a VHF signal and the two or more low frequency sources to generate two or more low frequency signals.Type: GrantFiled: March 3, 2017Date of Patent: August 27, 2019Assignee: APPLIED MATERIALS, INC.Inventors: Wonseok Lee, Kartik Ramaswamy, Ankur Agarwal, Haitao Wang
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Patent number: 10312475Abstract: Embodiments of the present disclosure generally describe a method for depositing a barrier layer of SiN using a high density plasma chemical vapor deposition (HDP-CVD) process, and in particular, controlling a film stress of the deposited SiN layer by biasing the substrate during the deposition process.Type: GrantFiled: June 5, 2017Date of Patent: June 4, 2019Assignee: APPLIED MATERIALS, INC.Inventors: Tae Kyung Won, Soo Young Choi, Sanjay D. Yadav, Carl A. Sorensen, Chien-Teh Kao, Suhail Anwar, Young Dong Lee
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Patent number: 9865439Abstract: A processing apparatus and a processing method for a semiconductor wafer, which allow stable end point detection, are provided. In the plasma processing apparatus or method in which a processing-target film layer of a film structure including a plurality of film layers formed in advance on a surface of a wafer mounted on a sample stage deployed within a processing chamber inside a vacuum vessel, by using plasma formed with the processing chamber, intensities of lights of a plurality of wavelengths are detected using data composed of results of reception of lights during a plurality of different time-intervals by an optical receiver which receives lights of the plurality of wavelengths from an inside of the processing chamber while processing is going.Type: GrantFiled: September 11, 2015Date of Patent: January 9, 2018Assignee: HITACHI HIGH-TECHNOLOGIES CORPORATIONInventors: Shigeru Nakamoto, Tatehito Usui, Satomi Inoue, Kousuke Fukuchi
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Patent number: 9842725Abstract: Systems and methods for determining ion energy are described. One of the methods includes detecting output of a generator to identify a generator output complex voltage and current (V&I). The generator is coupled to an impedance matching circuit and the impedance matching circuit is coupled to an electrostatic chuck (ESC). The method further includes determining from the generator output complex V&I a projected complex V&I at a point along a path between an output of a model of the impedance matching circuit and a model of the ESC. The operation of determining of the projected complex V&I is performed using a model for at least part of the path. The method includes applying the projected complex V&I as an input to a function to map the projected complex V&I to a wafer bias value at the ESC model and determining an ion energy from the wafer bias value.Type: GrantFiled: February 19, 2014Date of Patent: December 12, 2017Assignee: Lam Research CorporationInventors: John C. Valcore, Jr., Bradford J. Lyndaker
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Patent number: 9299538Abstract: A system provides post-match control of microwaves in a radial waveguide. The system includes the radial waveguide, and a signal generator that provides first and second microwave signals that have a common frequency. The signal generator adjusts a phase offset between the first and second signals in response to a correction signal. The system also includes first and second electronics sets, each of which amplifies a respective one of the first and second microwave signals. The system transmits the amplified, first and second microwave signals into the radial waveguide, and matches an impedance of the amplified microwave signals to an impedance presented by the waveguide. The system also includes at least two monitoring antennas disposed within the waveguide. A signal controller receives analog signals from the monitoring antennas, determines the digital correction signal based at least on the analog signals, and transmits the correction signal to the signal generator.Type: GrantFiled: March 20, 2014Date of Patent: March 29, 2016Assignee: Applied Materials, Inc.Inventors: Satoru Kobayashi, Soonam Park, Dmitry Lubomirsky
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Patent number: 9299537Abstract: A system provides post-match control of microwaves in a radial waveguide. The system includes the radial waveguide, and a signal generator that provides first and second microwave signals that have a common frequency. The signal generator adjusts a phase offset between the first and second signals in response to a correction signal. The system also includes first and second electronics sets, each of which amplifies a respective one of the first and second microwave signals. The system transmits the amplified, first and second microwave signals into the radial waveguide, and matches an impedance of the amplified microwave signals to an impedance presented by the waveguide. The system also includes at least two monitoring antennas disposed within the waveguide. A signal controller receives analog signals from the monitoring antennas, determines the digital correction signal based at least on the analog signals, and transmits the correction signal to the signal generator.Type: GrantFiled: March 20, 2014Date of Patent: March 29, 2016Assignee: Applied Materials, Inc.Inventors: Satoru Kobayashi, Soonam Park, Dmitry Lubomirsky, Hideo Sugai
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Patent number: 9252023Abstract: An etching method comprises etching an oxide layer with a first dc bias of a plasma chamber, removing a photoresist layer with a second dc bias of the plasma chamber and etching through a liner film with a third dc bias of the plasma chamber. In order to reduce the copper deposition on the wall of the plasma chamber, the third dc bias is set to be less than the first and second dc bias.Type: GrantFiled: September 16, 2011Date of Patent: February 2, 2016Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shih-Hung Chen, Chien-An Chen, Ying Xiao, Ying Zhang
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Publication number: 20150144594Abstract: A plasma processing apparatus includes a processing chamber which plasma-processes a sample, a first high-frequency power supply which supplies first high-frequency power for plasma generation to the processing chamber, a second high-frequency power supply which supplies second high-frequency power to a sample stage on which the sample is placed and a pulse generation device which generate first pulses for time-modulating the first high-frequency power and second pulses for time-modulating the second high-frequency power. The pulse generation device includes a control device which controls the first and second pulses so that frequency of the first pulses is higher than frequency of the second pulses and the on-period of the second pulse is contained in the on-period of the first pulse.Type: ApplicationFiled: January 30, 2015Publication date: May 28, 2015Inventors: Shunsuke Kanazawa, Naoki Yasui, Michikazu Morimoto, Yasuo Ohgoshi
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Patent number: 9005461Abstract: A plasma monitoring method using a sensor, the sensor having a substrate; a first electrode, the first electrode being a conductive electrode and formed on the substrate while being isolated from the substrate; an insulating film formed on the first electrode; a contact hole formed in the insulating film and having a depth from a surface of the insulating film to the first electrode; and a second electrode, the second electrode being a conductive electrode, formed on the surface of the insulating film, and faced to plasma during a plasma process, the plasma monitoring method including measuring and monitoring potentials of the first electrode and the second electrode or a potential difference between the first electrode and the second electrode during the plasma process is disclosed. A plasma monitoring system carrying out the plasma monitoring method is also disclosed.Type: GrantFiled: July 16, 2008Date of Patent: April 14, 2015Assignees: Lapis Semiconductor Co., Ltd., Tohoku UniversityInventors: Tomohiko Tatsumi, Seiji Samukawa
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Publication number: 20150096959Abstract: Etch rate distributions are captured at a succession of hardware tilt angles of the RF source power applicator relative to the workpiece and their non-uniformities computed, and the behavior is modeled as a non-uniformity function for each one of at least two plasma reactors. An offset ?? in tilt angle ? between the non-uniformity functions of the two plasma reactors is detected. The two plasma reactors are then matched by performing a hardware tilt in one of them through a tilt angle equal to the offset ??.Type: ApplicationFiled: October 28, 2013Publication date: April 9, 2015Applicant: APPLIED MATERIALS, INC.Inventors: Gaurav Saraf, Xiawan Yang, Farid Abooameri, Wen Teh Chang, Anisul H Khan, Bradley Scott Hersch
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Patent number: 8992792Abstract: Methods of fabricating ultra low-k dielectric self-aligned vias are described. In an example, a method of forming a self-aligned via (SAV) in a low-k dielectric film includes forming a trench pattern in a metal nitride hardmask layer formed above a low-k dielectric film formed above a substrate. A via pattern is formed in a masking layer formed above the metal nitride hardmask layer. The via pattern is etched at least partially into the low-k dielectric film, the etching comprising using a plasma etch using a chemistry based on CF4, H2, and a diluent inert gas composition.Type: GrantFiled: December 21, 2012Date of Patent: March 31, 2015Assignee: Applied Materials, Inc.Inventors: Chih-Yang Chang, Sean S. Kang, Chia-Ling Kao, Nikolaos Bekiaris
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Publication number: 20150060404Abstract: A plasma processing system and method includes a processing chamber, and a plasma processing volume included therein. The plasma processing volume having a volume less than the processing chamber. The plasma processing volume being defined by a top electrode, a substrate support surface opposing the surface of the top electrode and a plasma confinement structure including at least one outlet port. A conductance control structure is movably disposed proximate to the at least one outlet port and capable of controlling an outlet flow through the at least one outlet port between a first flow rate and a second flow rate, wherein the conductance control structure controls the outlet flow rate and an at least one RF source is modulated and at least one process gas flow rate is modulated corresponding to a selected processing state set by the controller during a plasma process.Type: ApplicationFiled: September 3, 2013Publication date: March 5, 2015Applicant: Lam Research CorporationInventors: Rajinder Dhindsa, Harmeet Singh
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Patent number: 8916055Abstract: A processing method and apparatus uses at least one electric field applicator (34) biased to produce a spatial-temporal electric field to affect a processing medium (26), suspended nano-objects (28) or the substrate (30) in processing, interacting with the dipole properties of the medium (26) or particles to construct structure on the substrate (30). The apparatus may include a magnetic field, an acoustic field, an optical force, or other generation device. The processing may affect selective localized layers on the substrate (30) or may control orientation of particles in the layers, control movement of dielectrophoretic particles or media, or cause suspended particles of different properties to follow different paths in the processing medium (26). Depositing or modifying a layer on the substrate (30) may be carried out.Type: GrantFiled: July 31, 2012Date of Patent: December 23, 2014Assignee: Tokyo Electron LimitedInventors: Jozef Brcka, Jacques Faguet, Eric M. Lee, Hongyu Yue
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Publication number: 20140363978Abstract: Beam-induced etching uses a work piece maintained at a temperature near the boiling point of a precursor material, but the temperature is sufficiently high to desorb reaction byproducts. In one embodiment, NF3 is used as a precursor gas for electron-beam induced etching of silicon at a temperature below room temperature.Type: ApplicationFiled: June 10, 2013Publication date: December 11, 2014Inventors: Aiden Martin, Milos Toth
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Patent number: 8900471Abstract: Methods and apparatus for in-situ plasma cleaning of a deposition chamber are provided. In one embodiment a method for plasma cleaning a deposition chamber without breaking vacuum is provided. The method comprises positioning a substrate on a susceptor disposed in the chamber and circumscribed by an electrically floating deposition ring, depositing a metal film on the substrate and the deposition ring in the chamber, grounding the metal film deposited on the deposition ring without breaking vacuum, and removing contaminants from the chamber with a plasma formed in the chamber without resputtering the metal film on the grounded deposition ring and without breaking vacuum.Type: GrantFiled: February 16, 2010Date of Patent: December 2, 2014Assignee: Applied Materials, Inc.Inventors: Richard J. Green, Cheng-hsiung Tsai, Shambhu N. Roy, Puneet Bajaj, David H. Loo
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Publication number: 20140339193Abstract: Method for carrying out plasma processing on a wafer under Run-to-Run control by using a plasma processing apparatus having a plasma processing chamber, a process monitor which monitors a condition in the plasma processing chamber, and an actuator which controls parameters which are constituent elements of a plasma processing condition. The method includes the steps of making one of the parameters a (N?1)th manipulated variable, calculating a first difference between a process monitor value in the plasma processing obtained by the process monitor and a desired value of the process monitor value in the plasma processing, calculating a correction amount of the (N?1)th manipulated variable on the basis of the first difference and a previously obtained correlation between the process monitor value in the plasma processing and the (N?1)th manipulated variable, wherein N is a natural number equal to or larger than 2.Type: ApplicationFiled: August 1, 2014Publication date: November 20, 2014Inventors: Akira Kagoshima, Daisuke Shiraishi, Yuji Nagatani
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Patent number: 8889021Abstract: A sensing device for measuring a plasma process parameter in a plasma chamber for processing workpieces may include a substrate with one or more sensor embedded in the substrate. The substrate can have a surface made of substantially the same material as workpieces that are plasma processed in the plasma chamber. Each sensor can include a collector portion made of substantially the same material as the substrate surface. The collector portion includes a surface that is level with the surface of the substrate. Sensor electronics are embedded into the substrate and coupled to the collector portion. When the substrate surface is exposed to a plasma one or more signals resulting from the plasma can be measured with the sensor(s).Type: GrantFiled: January 21, 2010Date of Patent: November 18, 2014Assignee: KLA-Tencor CorporationInventors: Earl Jensen, Mei Sun
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Patent number: 8845913Abstract: An ion radiation damage prediction method includes a parameter computation step of computing the incidence energy and incidence angle of an incident ion hitting a fabricated object, and a step of searching for data in databases created in advance on the basis of the computed incidence energy and angle, the databases storing distributions of quantities of crystalline defects having an effect on the fabricated object, ion reflection probabilities and ion penetration depths. The method also includes finding the penetration depth and location of the incident ion based on the data found in the searching step and based on the computed incidence energy and angle, and computing a quantity of defects in the fabricated object from the penetration depth and location. A distribution of defects may be computed by performing the aforementioned steps for many incident ions.Type: GrantFiled: August 28, 2013Date of Patent: September 30, 2014Assignee: Sony CorporationInventors: Nobuyuki Kuboi, Shoji Kobayashi
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Publication number: 20140263179Abstract: A system includes a tuning element comprising a shaft and a tuning stub. The tuning stub includes a surface with a center point. The shaft is connected to the surface of the tuning stub at a location that is offset from the center point. A waveguide includes an opening into an inner portion of the waveguide. The shaft passes through the opening and the tuning stub is arranged in the inner portion of the waveguide. A first actuator selectively rotates the shaft.Type: ApplicationFiled: March 15, 2013Publication date: September 18, 2014Applicant: Lam Research CorporationInventors: Carlo Waldfried, Orlando Escorcia, William Hansen
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Patent number: 8759227Abstract: A method for processing a target object includes arranging a first electrode and a second electrode for supporting the target object in parallel to each other in a processing chamber and processing the target object supported by the second electrode by using a plasma of a processing gas supplied into the processing chamber, the plasma being generated between the first electrode and the second electrode by applying a high frequency power between the first electrode and the second electrode. The target object includes an organic film and a photoresist layer formed on the organic film. The processing gas contains H2 gas, and the organic film is etched by a plasma containing H2 by using the photoresist layer as a mask while applying a negative DC voltage to the first electrode.Type: GrantFiled: September 7, 2010Date of Patent: June 24, 2014Assignee: Tokyo Electron LimitedInventors: Kazuki Narishige, Kazuo Shigeta
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Publication number: 20140131314Abstract: A plasma processing apparatus includes: a processing chamber in which plasma processing is performed; a gas feeding unit which supplied process gas into the processing chamber; a radio-frequency power source which supplies radio-frequency power that turns the process gas fed into the processing chamber to plasma; and a light detector which detects the light emitted from the plasma generated in the process chamber. The light detector includes a detecting unit which detects, during respective preset exposure times, the light emitted from the plasma that is generated due to pulse-modulated radio-frequency power, and a control unit which performs control such that the amount of the light emitted from the plasma during each of the preset exposure times becomes constant.Type: ApplicationFiled: February 7, 2013Publication date: May 15, 2014Applicant: HITACHI HIGH-TECHNOLOGIES CORPORATIONInventors: Yoji ANDO, Tetsuo ONO, Tatehito USUI
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Publication number: 20140061156Abstract: This disclosure describes systems, methods, and apparatus for operating a plasma processing chamber. In particular, a periodic voltage function combined with an ion current compensation can be provided as a bias to a substrate support as a modified periodic voltage function. This in turn effects a DC bias on the surface of the substrate that controls an ion energy of ions incident on a surface of the substrate. A peak-to-peak voltage of the periodic voltage function can control the ion energy, while the ion current compensation can control a width of an ion energy distribution function of the ions. Measuring the modified periodic voltage function can provide a means to calculate an ion current in the plasma and a sheath capacitance of the plasma sheath. The ion energy distribution function can be tailored and multiple ion energy peaks can be generated, both via control of the modified periodic voltage function.Type: ApplicationFiled: August 27, 2013Publication date: March 6, 2014Applicant: Advanced Energy Industries, Inc.Inventors: Victor Brouk, Daniel J. Hoffman, Daniel Carter, Dmitri Kovalevskii
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Patent number: 8652342Abstract: A semiconductor fabrication apparatus and a method of fabricating a semiconductor device using the same performs semiconductor etching and deposition processes at an edge of a semiconductor substrate after disposing the semiconductor substrate at a predetermined place in the semiconductor fabrication apparatus. The semiconductor fabrication apparatus has lower, middle and upper electrodes sequentially stacked. The semiconductor substrate is disposed on the middle electrode. Semiconductor etching and deposition processes are performed on the semiconductor substrate in the semiconductor fabrication apparatus. The semiconductor fabrication apparatus forms electrical fields along an edge of the middle electrode during performance of the semiconductor etching and deposition processes.Type: GrantFiled: May 10, 2012Date of Patent: February 18, 2014Assignee: Samsung Electronics Co., LtdInventors: Kyung-Woo Lee, Jin-Sung Kim, Joo-Byoung Yoon, Yeong-Cheol Lee, Sang-Jun Park, Hee-Kyeong Jeon
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Patent number: 8591755Abstract: A time-dependent substrate temperature to be applied during a plasma process is determined. The time-dependent substrate temperature at any given time is determined based on control of a sticking coefficient of a plasma constituent at the given time. A time-dependent temperature differential between an upper plasma boundary and a substrate to be applied during the plasma process is also determined. The time-dependent temperature differential at any given time is determined based on control of a flux of the plasma constituent directed toward the substrate at the given time. The time-dependent substrate temperature and time-dependent temperature differential are stored in a digital format suitable for use by a temperature control device defined and connected to direct temperature control of the upper plasma boundary and the substrate. A system is also provided for implementing upper plasma boundary and substrate temperature control during the plasma process.Type: GrantFiled: September 15, 2010Date of Patent: November 26, 2013Assignee: Lam Research CorporationInventor: Rajinder Dhindsa
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Patent number: 8592319Abstract: A substrate processing apparatus includes a chamber accommodating a wafer, a susceptor disposed inside the chamber and on which the wafer is held, an upper electrode facing the susceptor, and a second high frequency power source connected to the susceptor, wherein the upper electrode is electrically connected to a ground and is moveable with respect to the susceptor. The substrate processing apparatus divides a potential difference between plasma generated in a processing space and the ground into a potential difference between the plasma and a dielectric and a potential difference between the dielectric and the ground by burying the dielectric in the upper electrode, and changes a gap between the upper electrode and the susceptor. Accordingly, plasma density between the upper electrode and the susceptor is changed.Type: GrantFiled: June 23, 2011Date of Patent: November 26, 2013Assignee: Tokyo Electron LimitedInventors: Nobuhiro Wada, Makoto Kobayashi, Hiroshi Tsujimoto, Jun Tamura, Mamoru Naoi, Jun Oyabu
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Publication number: 20130277333Abstract: In a plasma reactor having a driven electrode and a counter electrode, an impedance controller connected between the counter electrode and ground includes both series sand parallel variable impedance elements that facilitate two-dimensional movement of a ground path input impedance in a complex impedance space to control spatial distribution of a plasma process parameter.Type: ApplicationFiled: March 15, 2013Publication date: October 24, 2013Inventors: Nipun Misra, Kartik Ramaswamy, Yang Yang, Douglas A. Buchberger, JR., James D. Carducci, Lawrence Wong, Shane C. Nevil, Shahid Rauf, Kenneth S. Collins
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Patent number: 8545710Abstract: An ion radiation damage prediction method includes a parameter computation step of computing the collision position and the incidence angle of an incident ion hitting a fabricated object by considering a transport path of the ion and by adopting the Monte Carlo method which takes distributions of flux quantities, incidence energies and angles of incident ions as input parameters; and a defect-distribution computation step of searching for data by referring to information found at the parameter computation step and databases created in advance, the databases storing distributions of quantities of crystalline defects having an effect on the fabricated object, ion reflection probabilities and ion penetration depths, finding the penetration depth and location of the incident ion based on the data found in the search operation, and the incidence energy and angle of the incident ion, and computing a distribution of defects in the fabricated object from the penetration depth and location.Type: GrantFiled: February 17, 2010Date of Patent: October 1, 2013Assignee: Sony CorporationInventors: Nobuyuki Kuboi, Shoji Kobayashi
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Publication number: 20130228550Abstract: There is provided dry etching apparatus including a stage on which a wafer is placed, an antenna electrode, a high frequency power supply, a shower plate, and an RF bias power supply. Further, a bias path controller is provided on the side of the antenna electrode. The bias path controller resonates in series with the static reactance formed by the shower plate with respect to the frequency of the RF bias. Then, the bias path controller changes and grounds the impedance by the variable inductive reactance. With this mechanism, highly uniform etching can be achieved even if a shower plate of quartz is used for corrosive gases.Type: ApplicationFiled: August 9, 2012Publication date: September 5, 2013Applicant: Hitachi High-Technologies CorporationInventors: Masahito MORI, Masaru Izawa, Katsushi Yagi
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Publication number: 20130213933Abstract: Apparatus and methods are disclosed for employing an accelerated neutral beam derived from an accelerated gas cluster ion beam as a physical etching beam for providing reduced material mixing at the etched surface, compared to previous techniques. This results in the ability to achieve improved depth profile resolution in measurements by analytical instruments such as SIMS and XPS (or ESCA) analytical instruments.Type: ApplicationFiled: August 21, 2012Publication date: August 22, 2013Applicant: Exogenesis CorporationInventors: Sean R. Kirkpatrick, Allen R. Kirkpatrick
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Patent number: 8491803Abstract: A method of hydrophobizing a frontside surface of an integrated circuit. The method includes the steps of: (a) depositing a hydrophobic polymeric layer onto the frontside surface; (b) depositing a protective metal film onto the hydrophobic polymeric layer; (c) depositing a sacrificial material onto the metal film; (d) patterning the sacrificial material; (e) etching through the metal film, the hydrophobic polymeric layer and the frontside surface; (f) performing MEMS processing steps on a backside of the integrated circuit; (g) subjecting the integrated circuit to an oxidizing plasma, wherein the metal film protects the hydrophobic polymeric layer from the oxidizing plasma; and (h) removing the protective metal film to provide an integrated circuit having a relatively hydrophobic patterned frontside surface.Type: GrantFiled: August 17, 2011Date of Patent: July 23, 2013Assignee: Zamtec LtdInventors: Gregory John McAvoy, Emma Rose Kerr, Kia Silverbrook
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Publication number: 20130126475Abstract: Methods, systems, and computer programs are presented for semiconductor manufacturing are provided. One wafer processing apparatus includes: a top electrode; a bottom electrode; a first radio frequency (RF) power source; a second RF power source; a third RF power source; a fourth RF power source; and a switch. The first, second, and third power sources are coupled to the bottom electrode. Further, the switch is operable to be in one of a first position or a second position, where the first position causes the top electrode to be connected to ground, and the second position causes the top electrode to be connected to the fourth RF power source.Type: ApplicationFiled: November 21, 2011Publication date: May 23, 2013Applicant: Lam Research CorporationInventors: Rajinder Dhindsa, Alexei Marakhtanov, Gerardo Delgadino, Eric Hudson, Bi Ming Yen, Andrew D. Bailey, III
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Publication number: 20130119017Abstract: A reactive correction to chamber impedance changes without the need to change the process recipe is disclosed. The reactive correction may be done automatically and repeatedly during processing. A control of RF power application to a plasma processing chamber is performed, so as to minimize reflected power and efficiently apply the RF power to the plasma. Autotuning of the RF power application is enabled without modifying a qualified process recipe. The autotuning can be applied using frequency matching and RF matching network tuning.Type: ApplicationFiled: December 26, 2011Publication date: May 16, 2013Inventors: James YANG, Stanley Liu, ZhaoHui Xi
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Patent number: 8425791Abstract: In a method of controlling the temperature of an in-chamber member used in a plasma processing apparatus that processes a target substrate with plasma, a plurality of power-feeding portions is provided in the in-chamber member and the in-chamber member is heated by supplying electric power thereto through the power-feeding portions. A resistance value or resistivity of the in-chamber member is measured and the electric power is controlled based on the temperature of the in-chamber member estimated from the resistance value or resistivity. The in-chamber member includes one or more annular members arranged around the target substrate. The in-chamber member is a member making contact with plasma within a chamber and existing near the target substrate.Type: GrantFiled: July 7, 2009Date of Patent: April 23, 2013Assignee: Tokyo Electron LimitedInventors: Chishio Koshimizu, Manabu Iwata, Tatsuo Matsudo
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Patent number: 8426318Abstract: Provided is a method of setting a thickness of a dielectric, which restrains the dielectric formed in an electrode from being consumed when etching a silicon dioxide film on a substrate by using plasma. In a substrate processing apparatus including an upper electrode facing a susceptor and the dielectric formed of silicon dioxide in the upper electrode, a silicon dioxide film formed on a wafer being etched by using plasma, an electric potential of the plasma facing the dielectric in a case where the dielectric is not formed in the upper electrode is estimated based on a bias power applied to the susceptor and an A/C ratio in a chamber, and the thickness of the dielectric is determined so that an electric potential of the plasma, which is obtained by multiplying the estimated electric potential of the plasma by a capacity reduction coefficient calculated when a capacity of the dielectric and a capacity of a sheath generated around a surface of the dielectric are combined, is 100 eV or less.Type: GrantFiled: June 29, 2011Date of Patent: April 23, 2013Assignee: Tokyo Electron LimitedInventors: Jun Oyabu, Takashi Kitazawa
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Patent number: 8419958Abstract: Apparatus, systems and methods for plasma etching substrates are provided that achieve dissipation of charge build-up on a substrate being plasma etched to avoid notching or twisting in high aspect ratio contents and similar features. Charge build-up on a substrate being etched by plasma etching can be dissipated by a method for etching a substrate, the method comprising: providing a plasma processing chamber comprising a chamber enclosure and a substrate support adapted to support a substrate within the chamber enclosure; supporting a substrate on the substrate support; forming a plasma within the chamber enclosure such that a surface of the substrate is in contact with the plasma; etching the substrate by generating a negative bias on the substrate surface relative to the plasma; and intermittently changing the bias on the substrate surface to positive relative to the plasma. The present method can be integrated into known plasma processing systems.Type: GrantFiled: May 11, 2010Date of Patent: April 16, 2013Assignee: Micron Technology, Inc.Inventor: Aaron R. Wilson
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Patent number: 8404137Abstract: A plasma processing apparatus includes a plurality of radio-frequency power supplies for supplying radio-frequency powers having frequencies different from each other, a common feeding line for superposing radio-frequency powers supplied respectively from the plurality of radio-frequency power supplies and feeding the superposed radio-frequency power to a same radio-frequency electrode, a radio-frequency power extracting device for extracting radio-frequency powers having predetermined frequencies from radio-frequency powers fed via the feeding line, and a radio-frequency voltage detector for measuring voltages of the radio-frequency powers having the predetermined frequencies extracted by the radio-frequency power extracting device.Type: GrantFiled: January 26, 2011Date of Patent: March 26, 2013Assignee: Tokyo Electron LimitedInventors: Chishio Koshimizu, Naoki Matsumoto
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Publication number: 20120312780Abstract: A method for processing a substrate in a capacitively-coupled plasma processing system having a plasma processing chamber and at least an upper electrode and a lower electrode. The substrate is disposed on the lower electrode during plasma processing. The method includes providing at least a first RF signal, which has a first RF frequency, to the lower electrode. The first RF signal couples with a plasma in the plasma processing chamber, thereby inducing an induced RF signal on the upper electrode. The method also includes providing a second RF signal to the upper electrode. The second RF signal also has the first RF frequency, A phase of the second RF signal is offset from a phase of the first RF signal by a value that is less than 10%, The method further includes processing the substrate while the second RF signal is provided to the upper electrode.Type: ApplicationFiled: August 22, 2012Publication date: December 13, 2012Inventors: Rajinder Dhindsa, Hudson Eric, Alexei Marakhtanov, Andreas Fischer
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Patent number: 8329054Abstract: A plasma processing apparatus includes a plasma-generation high-frequency power supply which generates plasma in a processing chamber, a biasing high-frequency power supply which applies high-frequency bias electric power to an electrode on which a sample is placed, a monitor which monitors a peak-to-peak value of the high-frequency bias electric power applied to the electrode, an electrostatic chuck power supply which makes the electrode electrostatically attract the sample, a self-bias voltage calculating unit which calculates self-bias voltage of the sample by monitoring the peak-to-peak value of the high-frequency bias electric power applied to the electrode, and an output voltage control unit which controls output voltage of the electrostatic chuck power supply based on the calculated self-bias voltage.Type: GrantFiled: August 18, 2008Date of Patent: December 11, 2012Assignee: Hitachi High-Technologies CorporationInventors: Takamasa Ichino, Ryoji Nishio, Shinji Obama