By Electrical Means Or Of An Electrical Property Patents (Class 216/61)
  • Patent number: 7413673
    Abstract: An apparatus and method for adjusting the voltage applied to a Faraday shield of an inductively coupled plasma etching apparatus is provided. An appropriate voltage is easily and variably applied to a Faraday shield such that sputtering of a plasma can be controlled to prevent and mitigate deposition of non-volatile reaction products that adversely affect an etching process. The appropriate voltage for a particular etching process or step is applied to the Faraday shield by simply adjusting a tuning capacitor. It is not necessary to mechanically reconfigure the etching apparatus to adjust the Faraday shield voltage.
    Type: Grant
    Filed: April 19, 2005
    Date of Patent: August 19, 2008
    Assignee: Lam Research Corporation
    Inventors: Shrikant P. Lohokare, Andras Kuthi, Andrew D. Bailey, III
  • Publication number: 20080190893
    Abstract: The invention provides a plasma processing apparatus and a dry etching method for etching a multilayered film structure having steps with high accuracy. The plasma processing apparatus comprises a vacuum reactor 107, a lower electrode 113 placed within a processing chamber of the vacuum reactor and having a wafer 112 to be etched mounted on the upper surface thereof, bias supplying units 118 and 120 for supplying high frequency power for forming a bias potential to the lower electrode 113, a gas supply means 111 for feeding reactive gas into the processing chamber, an electric field supplying means 101 through 103 for supplying a magnetic field for generating plasma in the processing chamber, and a control unit 127 for controlling the distribution of ion energy in the plasma being incident on the wafer 112 via the high frequency power.
    Type: Application
    Filed: February 13, 2008
    Publication date: August 14, 2008
    Inventors: Masahito Mori, Naoyuki Kofuji, Naoshi Itabashi
  • Publication number: 20080179284
    Abstract: Methods of operating an electromagnet of an ion source for generating an ion beam with a controllable ion current density distribution. The methods may include generating plasma in a discharge space of the ion source, generating and shaping a magnetic field in the discharge space by applying a current to an electromagnet that is effective to define a plasma density distribution, extracting an ion beam from the plasma, measuring a distribution profile for the ion beam density, and comparing the actual distribution profile with a desired distribution profile for the ion beam density. Based upon the comparison, the current applied to the electromagnet may be adjusted either manually or automatically to modify the magnetic field in the discharge space and, thereby, alter the plasma density distribution.
    Type: Application
    Filed: February 26, 2008
    Publication date: July 31, 2008
    Applicant: VEECO INSTRUMENTS INC.
    Inventors: Alan V. Hayes, Rustam Yevtukhov, Viktor Kanarov, Boris L. Druz
  • Patent number: 7402257
    Abstract: The present invention is generally directed to plasma state monitoring to control etching processes and across-wafer uniformity, and a system for performing same. In one illustrative embodiment, the method comprises generating a plasma within an etching tool, monitoring at least one characteristic of the generated plasma, and controlling at least one parameter of a plasma etching process performed in the tool based upon the monitored at least one characteristic of the plasma. In another illustrative embodiment, the method comprises generating a plasma within an etch tool, performing a plasma etching process within the etch tool, determining at least one characteristic of the plasma, and controlling at least one parameter of the etching process based upon a comparison of the determined at least one characteristic of the plasma and a target value for the determined at least one characteristic of the plasma.
    Type: Grant
    Filed: July 30, 2002
    Date of Patent: July 22, 2008
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Thomas J. Sonderman, Richard J. Markle
  • Publication number: 20080116876
    Abstract: A method and apparatus for monitoring the integrity of a ground member coupling a substrate support to a chamber body in a plasma processing system is provided. In one embodiment, a processing chamber is provided that includes a ground path member coupled between a substrate support and a chamber body. A sensor is positioned to sense a metric indicative of current passing through the ground member. In another embodiment, a method monitoring the integrity of a ground member coupling a substrate support to a chamber body in a plasma processing chamber includes monitoring a metric indicative of current passing through the ground member during processing, and setting a flag in response to the metric exceeding a predefined threshold.
    Type: Application
    Filed: November 20, 2006
    Publication date: May 22, 2008
    Inventors: John M. White, Carl Sorensen
  • Patent number: 7354778
    Abstract: A method is provided for determining the end point during cleaning etching of processing chambers by means of plasma etching, which is used for carrying out coating or etching processes during the manufacture of semiconductor components. The invention provides a method for effectively and reliably determining the end point during cleaning etching of processing chambers. The end point is determined by monitoring the DC bias voltage on the plasma generator which is used for the plasma cleaning etching in the processing chamber in an evaluation unit. The plasma cleaning etching process is terminated by stopping the supply of the process gases in the gas supply unit and by switching off the plasma generator upon reaching a predetermined DC bias voltage value which corresponds to completion of the cleaning etching process.
    Type: Grant
    Filed: September 5, 2003
    Date of Patent: April 8, 2008
    Assignee: Infineon Technologies AG
    Inventors: Percy Heger, Tobias Hoerning, Ralf Otto
  • Patent number: 7323116
    Abstract: A method for in-situ monitoring a process in a plasma processing system having a plasma processing chamber is disclosed. The method includes positioning a substrate in the plasma processing chamber. The method also includes striking a plasma within the plasma processing chamber while the substrate is disposed within the plasma processing chamber. The method further includes obtaining a measured self-bias voltage that exists after the plasma is struck, the measured self-bias voltage value having a first value when the plasma is absent and at least a second value different from the first value when the plasma is present. The method also includes correlating the measured self-bias voltage value with an attribute of the process, if the measured self-bias voltage value is outside of a predefined self-bias voltage value envelope.
    Type: Grant
    Filed: September 27, 2004
    Date of Patent: January 29, 2008
    Assignee: Lam Research Corporation
    Inventors: Timothy J. Guiney, Rao Annapragada, Subhash Deshmukh, Chia Cheng Cheng
  • Patent number: 7286948
    Abstract: Methods for determining characteristics of a plasma are provided. In one embodiment, a method for determining characteristics of a plasma includes obtaining metrics of current and voltage information for first and second waveforms coupled to a plasma at different frequencies, determining at least one characteristic of the plasma using the metrics obtained from each different frequency waveform. In another embodiment, the method includes providing a plasma impedance model of a plasma as a function of frequency, and determining at least one characteristic of a plasma using model. In yet another embodiment, the method includes providing a plasma impedance model of a plasma as a function of frequency, measuring current and voltage for waveforms coupled to the plasma and having at least two different frequencies, and determining ion mass of a plasma from model and the measured current and voltage of the waveforms.
    Type: Grant
    Filed: June 16, 2006
    Date of Patent: October 23, 2007
    Assignee: Applied Materials, Inc.
    Inventors: Steven C. Shannon, Daniel J. Hoffman, Jeremiah T. P. Pender, Tarreg Mawari
  • Publication number: 20070215574
    Abstract: A prediction method for a substrate processing apparatus is to predict processing results from operation data on the substrate processing apparatus during a procedure for processing a target processing substrate in a processing chamber of the substrate processing apparatus. The method includes the steps of: collecting operation data obtained; and obtaining a moving average of a preset number of sets of data using the processing result data collected at the data collection step. The method further includes the steps of: performing multivariate analysis using the operation data collected at the data collection step and the moving average processing result data obtained at the moving average processing step; and predicting processing results using operation data obtained when a target processing substrate, other than the target processing substrate used to obtain the correlation at the analysis step, is processed on a basis of the correlation.
    Type: Application
    Filed: March 9, 2007
    Publication date: September 20, 2007
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Hideki TANAKA
  • Publication number: 20070193976
    Abstract: The invention provides a plasma processing apparatus and a plasma processing method capable of controlling the voltage of the processing substrate with high accuracy, thereby enabling a highly accurate plasma processing. According to the invention, a voltage Vw of the processing substrate is measured using a processing substrate with a voltage probe prepared in advance, and based on a bias voltage Vesc applied to an electrostatic chuck mechanism 200 and a bias current Iesc flowing through the electrostatic chuck mechanism 200, a capacity component Cesc which is an impedance representing the electric property of the electrostatic chuck mechanism 200 is computed numerically. Then, based on a predetermined expression, the voltage Vw of the processing substrate 102 is estimated using the bias voltage Vesc of the processing substrate 102 to be measured, the bias current Iesc flowing through the electrostatic chuck mechanism 200 and the capacity component Cesc which is the impedance acquired in advance.
    Type: Application
    Filed: August 21, 2006
    Publication date: August 23, 2007
    Inventors: Hitoshi Tamura, Naoki Yasui, Seiichi Watanabe
  • Patent number: 7245133
    Abstract: An integrated FIB/PEM apparatus and method for performing failure analysis on integrated circuits. In-situ failure analysis is enabled by integrating Photon Emission Microscopy into a Focused Ion Beam system, thereby improving throughput and efficiency of Failure Analysis. An iterative method is described for identifying and localizing fault sites on the circuit.
    Type: Grant
    Filed: November 9, 2004
    Date of Patent: July 17, 2007
    Assignee: Credence Systems Corporation
    Inventors: Chun-Cheng Tsao, Eugene Delenia
  • Patent number: 7217371
    Abstract: The present invention relates to interfacing new sensors to incumbent controls. In particular, it relates to optically interfacing a new sensor, such as a spectrometer with plasma generator, to an incumbent electro-optical sensor. Logic and resources to control activation of the incumbent electro-optical sensor may be included. Particular aspects of the present invention are described in the claims, specification and drawings.
    Type: Grant
    Filed: July 26, 2004
    Date of Patent: May 15, 2007
    Assignee: Lightwind Corporation
    Inventor: Herbert E. Litvak
  • Patent number: 7153444
    Abstract: Provided is a method and apparatus for controlling a bias voltage over a wide range and for de-coupling dual radio frequency (RF) currents to allow for independent control of plasma density and ion energy of a plasma for processing a substrate. An exemplary apparatus provides a plasma processing chamber which includes a bottom electrode configured to hold a substrate and first and second RF power supplies being connected to the bottom electrode. Also included is a top electrode which is electrically isolated from a top ground extension. A filter array defining a set of filter settings is included. A switch is coupled to the top electrode and the switch is configured to interconnect the top electrode to one of the filter settings. The filter settings are configured to enable or disable RF current generated from one or both of the RF power supplies from passing through the top electrode.
    Type: Grant
    Filed: June 17, 2004
    Date of Patent: December 26, 2006
    Assignee: Lam Research Corporation
    Inventor: Andreas Fischer
  • Patent number: 7135412
    Abstract: In the control method in a management system of semiconductor manufacturing equipment to enhance a product yield through a control of etching process, information of a corresponding lot for the etching process is recognized. It is checked whether the information of corresponding lot is for an etching process after a predetermined RF time of etching apparatus. RF time of the etching apparatus is compared with the predetermined RF time, and it is decided whether the etching process of corresponding lot can be performed in the etching apparatus if the etching process for the corresponding lot should be performed after a lapse of the predetermined RF time.
    Type: Grant
    Filed: December 8, 2004
    Date of Patent: November 14, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Min-Jae Na
  • Patent number: 7115210
    Abstract: Disclosed is a method and system for detecting abnormal plasma discharge that is useful in, for example, detecting plasma leakage in a reactive ion etching (RIE) chamber. The system includes electrical contacts connected to the chamber that provide an input signal to the chamber. This input signal can be generated by a radio frequency (RF) generator that is connected to the electrical contacts. A variable power controller connected to the RF generator gradually increases (ramps) the power of the input signal being supplied to the chamber.
    Type: Grant
    Filed: February 2, 2004
    Date of Patent: October 3, 2006
    Assignee: International Business Machines Corporation
    Inventors: Robert A. Calderoni, June Cline, Kellie L. Dutra, Ronald G. Meunier, Joseph P. Walko, Justin Wai-chow Wong
  • Patent number: 7105080
    Abstract: Method for manufacturing a workpiece by a vacuum treatment process includes providing a vacuum treatment system with first second parts in a vacuum chamber. Either a sensor or an adjusting element with first signal connection is mounted on the second part. An electronic unit in the chamber has a reference potential and a second electric signal connection. The first part is connected to a system reference potential. A workpiece goes into the chamber and the method includes operating the second part at a further electric potential different from the system reference potential by at least 12 V. The method includes connecting the first electric signal connection to the second electric signal connection and maintaining the reference connection during operation on the further electric potential by metallically connecting the reference connection to the second part.
    Type: Grant
    Filed: December 31, 2002
    Date of Patent: September 12, 2006
    Assignee: OC Oerlikon Balzers AG
    Inventor: Felix Mullis
  • Patent number: 7029594
    Abstract: A plasma processing method for providing plasma processing to an object to be processed disposed within a vacuum processing chamber in which a process gas feeding device feeds process gas into the vacuum processing chamber, a wafer electrode is placed within the vacuum processing chamber for mounting the object to be processed, a wafer bias power generator applies self-bias voltage to the wafer electrode, and a plasma generator generates plasma within the vacuum processing chamber. The plasma processing method flattens either a positive side voltage or a negative side voltage of a voltage waveform of a high frequency voltage generated to the object at an arbitrary voltage.
    Type: Grant
    Filed: September 10, 2003
    Date of Patent: April 18, 2006
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Naoki Yasui, Masahiro Sumiya, Hitoshi Tamura, Seiichi Watanabe
  • Patent number: 7011762
    Abstract: One aspect of the present invention relates to a wafer containing a semiconductor substrate, at least one metal layer formed over the semiconductor substrate, and at least one electrical sensor embedded at least one of on and in the wafer to facilitate real time monitoring of the metal layer as it progresses through a subtractive metallization process. Another aspect of the present relates to a system and method for monitoring a subtractive metallization process in real time in order to effectuate an immediate response in the on-going process. The system contains a wafer comprising at least one metal layer formed on a semiconductor substrate, at least one electrical sensor in contact with the wafer and operable to detect and transmit electrical activity associated with the wafer, and an electrical measurement station operable to process electrical activity detected and received from the electrical sensor for monitoring a subtractive metallization process in real-time.
    Type: Grant
    Filed: April 21, 2003
    Date of Patent: March 14, 2006
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Christopher F. Lyons, Ramkumar Subramanian, Steven C. Avanzino
  • Patent number: 6974550
    Abstract: An apparatus for controlling the voltage applied to a shield interposed between an induction coil powered by a power supply via a matching network, and the plasma it generates, comprises a shield, a first feedback circuit, and a second feedback circuit. The power supply powers the shield. The first feedback circuit is connected to the induction coil for controlling the power supply. The second feedback circuit is connected to the shield for controlling the voltage of the shield. Both first and second feedback circuits operate at different frequency ranges. The first feedback circuit further comprises a first controller and a first sensor. The first sensor sends a first signal representing the power supplied to the inductive coil to the first controller. The first controller adjusts the power supply such that the power supplied to the inductor coil is controlled by a first set point. The second feedback circuit further comprises a second sensor, a second controller, and a variable impedance network.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: December 13, 2005
    Assignee: Lam Research Corporation
    Inventors: Neil Benjamin, Andras Kuthi
  • Patent number: 6952014
    Abstract: A Focused Ion Beam (FIB) milling end-point detection system uses a constant current power supply to energize an Integrated Circuit (IC) that is to be modified. The FIB is cycled over a conductive trace that is to be accessed during the milling process. The input power, or voltage to the IC is monitored during the milling process. The end-point can be detected when the FIB reaches the conductive trace. The FIB can inject charge onto the conductive trace when the FIB reaches the level of the conductive trace. An active device coupled to the conductive trace can amplify the charge injected by the FIB. The active device can operate as a current amplifier. The change in IC current can result in an amplified change in device input voltage. The end-point can be detected by monitoring the change in input voltage from the constant current power supply.
    Type: Grant
    Filed: June 9, 2004
    Date of Patent: October 4, 2005
    Assignee: Qualcomm Inc
    Inventor: Alan Glen Street
  • Patent number: 6930049
    Abstract: A method of detecting endpoint of a plasma etching system that measures the DC voltage drop across both the sheath and the film being etched. When the film is nearly removed, a drop in voltage indicates thinning of the film which detects endpoint for etching before optical emission techniques. The voltage drop is measured across resistors within the matching network.
    Type: Grant
    Filed: August 2, 2001
    Date of Patent: August 16, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Jiaming Huang, Ming Yang
  • Patent number: 6905623
    Abstract: A system and method for determining precisely in-situ the endpoint of halogen-assisted charged particle beam milling of a hole or trench in the backside of the substrate of a flipchip packaged IC. The backside of the IC is mechanically thinned. Optionally, a coarse trench is then milled in the thinned backside of the IC using either laser chemical etching or halogen-assisted charged particle beam milling. A further small trench is milled using a halogen-assisted charged-particle beam (electron or ion beam). The endpoint for milling this small trench is determined precisely by monitoring the power supply leakage current of the IC induced by electron-hole pairs created by the milling process. A precise in-situ endpoint detection signal is generated by modulating the beam at a reference frequency and then amplifying that frequency component in the power supply leakage current with an amplifier, narrow-band amplifier or lock-in amplifier.
    Type: Grant
    Filed: November 6, 2002
    Date of Patent: June 14, 2005
    Assignee: Credence Systems Corporation
    Inventors: Theodore R. Lundquist, Kenneth R. Wilsher
  • Patent number: 6858446
    Abstract: In certain embodiments a plasma is supplied from a plasma chamber 10 into a reaction chamber 18 of a plasma CVD apparatus. An electrode 22 is disposed in the reaction chamber 18. A semiconductor wafer on which a thin film is to be formed is placed on the electrode 22. A radio-frequency wave is generated by a radio-frequency wave generator 28 and supplied to the electrode 22 via a radio-frequency matching network 30, a blocking capacitor 32, and an RF probe 34 so as to control the plasma in the plasma chamber 10. A judgment device 38 is electrically connected to the RF probe 34. The voltage and current are be measured by the RF probe and the judgment device 38 is used to judge the state of the plasma in the plasma chamber 10.
    Type: Grant
    Filed: May 6, 2002
    Date of Patent: February 22, 2005
    Assignee: Seiko Epson Corporation
    Inventors: Atsushi Denda, Yoshinao Ito
  • Patent number: 6849191
    Abstract: According to the present invention, there is provided a sample surface treating apparatus for processing a fine pattern by plasma etching, including a stage provided in a chamber, on which a sample to be subjected to a surface treatment is placed; etching gas supply source for continuously supplying an etching gas for plasma generation into the chamber; a plasma generator for generating a high-density plasma in the chamber; a bias power supply for applying a bias voltage of 100 kHz or higher to the stage independently of the plasma generation; and a pulse modulator for modulating the bias power supply at a frequency of 100 Hz to 10 kHz, wherein a surface treatment in which the minimum feature size is 1 ?m or smaller is performed on the sample placed on the stage.
    Type: Grant
    Filed: February 12, 1999
    Date of Patent: February 1, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Tetsuo Ono, Tatsumi Mizutani, Ryouji Hamasaki, Tokuo Kure, Takafumi Tokunaga, Masayuki Kojima
  • Patent number: 6787048
    Abstract: A method for fabricating a resonator, and in particular, a thin film bulk acoustic resonator (FBAR), and a resonator embodying the method are disclosed. The resonator is fabricated on a substrate by fabricating a bottom electrode layer and a piezoelectric (PZ) layer over the bottom electrode layer. A selected portion of the PZ layer is partially etched. Then, a top electrode is fabricated over the selected portion of the PZ layer.
    Type: Grant
    Filed: March 5, 2001
    Date of Patent: September 7, 2004
    Assignee: Agilent Technologies, Inc.
    Inventors: Paul D. Bradley, Richard C. Ruby, John D. Larson, III
  • Patent number: 6750152
    Abstract: A semiconductor wafer is etched to create an array of MEMS devices and at the same time, test sites having geometry which represent critical geometry of the MEMS devices. Probe contacts are provided in the test sites to permit measurement of resistance and capacitance between test site geometry as a way of determining the effectiveness of the etch. One test site comprises a ladder of semiconductor structures separated by gaps of graded width. Another test site comprises finger structures formed over a cavity and the probe contacts are located so as to detect inter-finger capacitance and resistance (or continuity) as well as intra-finger resistance.
    Type: Grant
    Filed: October 1, 1999
    Date of Patent: June 15, 2004
    Assignee: Delphi Technologies, Inc.
    Inventors: John Carl Christenson, Steven Edward Staller, John Emmett Freeman, Troy Allan Chase, Robert Lawrence Healton
  • Patent number: 6703250
    Abstract: A method for automated monitoring and controlling of a semiconductor wafer plasma etching process including collecting data versus time during a plasma etching process the data including information representative of a concentration of at least one pair of reactant and product species present during the course of the plasma etching process; calculating a selected ratio of at least one reactant species and one product species at selected time intervals in the plasma etching process to create real-time concentration ratio data; retrieving model concentration ratio data for the at least one reactant species and one product species for comparison with the real-time concentration ratio data; comparing the model concentration ratio data with the real-time concentration ratio data to determine a difference; and, adjusting at least one plasma process operating parameter to minimize the difference.
    Type: Grant
    Filed: February 14, 2002
    Date of Patent: March 9, 2004
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Hsien-Kuang Chiu
  • Publication number: 20040040930
    Abstract: Conventionally, there is no method for quantitatively evaluating the three-dimensional shape of an etched pattern in a non-destructive manner and it takes much time and costs to determine etching conditions. With the conventional length measuring method only, it has been impossible to detect an abnormality in the three-dimensional shape and also difficult to control the etching process.
    Type: Application
    Filed: June 13, 2003
    Publication date: March 4, 2004
    Inventors: Maki Tanaka, Chie Shishido, Yuji Takagi
  • Publication number: 20040007560
    Abstract: There is not known a conventional method for predicting the consumed degree of consumable supplies and the thickness of deposited films without opening a processing chamber.
    Type: Application
    Filed: June 11, 2003
    Publication date: January 15, 2004
    Inventors: Shinji Sakano, Tsuyoshi Sendoda
  • Patent number: 6663791
    Abstract: A detection method of coating film thickness and an ion implantation equipment using the detection method. The detection method comprises providing on a surface of materials, such as disk (11) of a wafer support on which a coating film comprising a low conductive material, an electrical measurement sensor (18) having a coating film comprising the same material, and detecting thickness change of the coating film on the surface of the materials by irradiation with particle beams in the form of a signal from the sensor (18). The ion implantation equipment comprises an electrical measurement sensor provided on a disk and having a sample piece that forms a coating film of the same material as that of a surface coating of the disk, and means to monitor thickness change of the coating film by sensor signal from the measurement sensor.
    Type: Grant
    Filed: August 3, 2000
    Date of Patent: December 16, 2003
    Assignee: Sumitomo Eaton Nova Corporation
    Inventor: Hiroshi Kawaguchi
  • Patent number: 6660101
    Abstract: This cleaning method and cleaning apparatus for a film deposition apparatus includes a processing container 4 accommodating a mounting table 10 for mounting an object W to be processed, a gas-introduction unit 52 for introducing a designated gas into the processing container, a vacuum exhausting system 36 for exhausting an atmosphere in the processing container in vacuum, and an automatic pressure regulating valve 42 interposed in the vacuum exhausting system so that a pressure in the processing container can be maintained at a constant value by changing an opening degree of the automatic pressure regulating valve.
    Type: Grant
    Filed: March 11, 2002
    Date of Patent: December 9, 2003
    Assignee: Tokyo Electron Limited
    Inventor: Mitsuhiro Tachibana
  • Patent number: 6649075
    Abstract: A method and apparatus for performing in situ measurement of etch uniformity within a semiconductor wafer processing system. Specifically, the apparatus and concomitant method analyzes optical emission spectroscopy (OES) data produced by an OES system. The analysis computes the first derivative of the OES data as the data is acquired. When the data meets a particular trigger criterion, the value of the first derivative is correlated with a particular uniformity value. As such, the system produces a uniformity value for a semiconductor wafer using an in situ measurement technique.
    Type: Grant
    Filed: July 23, 1996
    Date of Patent: November 18, 2003
    Assignee: Applied Materials, Inc.
    Inventors: Melisa J. Buie, Leonid Poslavsky, Jennifer Lewis
  • Patent number: 6641747
    Abstract: An apparatus and method for detecting an endpoint for an etching process utilize a reaction chamber with an ion source and detector placed within the reaction chamber. The ion source directs a primary beam of ions towards a wafer so that the ion beam impacts the top layer of the wafer. A detector detects primary ions reflected from the wafer and secondary ions scattered from the wafer. A value is determined that corresponds to the amount of reflected and scattered ions. A change in the value indicates that the ion beam is impacting a layer beneath the top layer of the wafer, and signifies the reaching of the etch process endpoint.
    Type: Grant
    Filed: February 15, 2001
    Date of Patent: November 4, 2003
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Todd P. Lukanc, Ercan Adem
  • Patent number: 6596550
    Abstract: A processing system for processing a substrate with a plasma comprises a processing chamber configured for containing a plasma and a substrate support. Electrodes are coupled to the substrate support and an RF power source is coupled to each of the electrodes for biasing the electrodes to create a DC bias on a substrate positioned on the supporting surface. A first comparator having first and second inputs is electrically coupled to one of the electrodes with an isolating device being coupled between the first and second inputs to isolate the first input from the bias on the one electrode. The comparator has an output reflective of a voltage difference between the first and second inputs. A second comparator has a first input coupled to the first electrode and a second input coupled to the second electrode, and has an output reflective of a voltage difference between the first and second inputs resulting from the bias difference between the first and second electrodes.
    Type: Grant
    Filed: March 8, 2002
    Date of Patent: July 22, 2003
    Assignee: Tokyo Electron Limited
    Inventors: Edward L. Sill, William D. Jones, Craig T. Baldwin
  • Patent number: 6592771
    Abstract: A method in which etching or ashing is conducted by providing satisfactory kinetic energy of reaction seeds such as ions or radicals without damaging a substrate, and an apparatus used in this method are provided. A predetermined film of for example polycrystalline silicon on the substrate is etched in vapor phase using reaction seeds or precursors thereof generated by contacting a reaction gas such as CF4 with a heated catalyst of for example tungsten.
    Type: Grant
    Filed: April 7, 2000
    Date of Patent: July 15, 2003
    Assignee: Sony Corporation
    Inventors: Hideo Yamanaka, Kikuo Kaise
  • Patent number: 6585909
    Abstract: An oxide for use in a bolometer with an oxide thin-film formed is manufactured on an insulating substrate. Metal organic compound is dissolved in solvent to form solution during manufacturing the oxide thin-film. The solution is applied on the insulating substrate, and the applied solution is dried. A bond between carbon and oxygen is cut and decomposed by irradiating a laser ray with wavelength of 400 nm or less. A generated oxide is crystallized.
    Type: Grant
    Filed: October 31, 2001
    Date of Patent: July 1, 2003
    Assignees: National Institute of Advanced Industrial Science & Technology, NEC Corporation
    Inventors: Tetsuo Tsuchiya, Susumu Mizuta, Toshiya Kumagai, Tsutomu Yoshitake, Yuichi Shimakawa, Yoshimi Kubo
  • Publication number: 20030098290
    Abstract: An emission spectroscopic processing apparatus includes a spectroscope for spectrally separating input light emitted from a process unit into component spectra, a light receiving unit including a series of light receiving elements for detecting light quantities of the component spectra on a wavelength basis, a first signal hold unit for holding sequentially each of detection signals outputted from a subset of adjacent light receiving elements contained in series of light receiving elements during a first period, an adder unit for adding together the detection signals of adjacent light receiving elements of the light receiving unit inclusive of the held detection signals of the subset of adjacent light receiving elements, a second signal hold unit for holding sequentially sum outputs of the adder unit, and a signal processing unit for determining a state of the process unit on the basis of the output of the second signal hold unit.
    Type: Application
    Filed: March 6, 2002
    Publication date: May 29, 2003
    Inventors: Tetsunori Kaji, Shizuaki Kimura, Tatehito Usui, Takashi Fujii
  • Patent number: 6565759
    Abstract: A method for etching a pattern within a silicon containing dielectric layer upon a substrate employed within a microelectronics fabrication, employing a plasma activated reactive gas mixture, with layer material etch rate, etch rate ratio and pattern aspect ratio controlled by controlling the gas composition. There is provided a silicon substrate formed upon it a patterned microelectronics layer over which is formed a silicon containing dielectric layer. There is placed the silicon substrate within a reactor chamber equipped with electrodes which is evacuated. There is then filled the reactor chamber with a reactive gas mixture consisting of an oxidizing gas and two reactive gases. There may be optionally included in the reactive gas mixture nitrogen and inert gases for control purposes, but excluded from the reactive gas mixture are oxidizing gases containing carbon and oxygen.
    Type: Grant
    Filed: August 16, 1999
    Date of Patent: May 20, 2003
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Bi-Ling Chen, Erik S. Jeng, Hao-Chieh Liu
  • Publication number: 20030089679
    Abstract: A system detects the clearing of a dielectric at a plurality of contact sites by measuring the surface voltage of the dielectric and comparing the surface voltage to a reference voltage set to a value that relates to the cleared contact sites. Another system detects the clearing of a dielectric at a plurality of contact sites on a substrate by measuring the rate of change of a substrate current during an etch process and ending the etch process when the rate of change is approximately zero. Another system detects the clearing of a dielectric at a contact site by measuring a substrate current during an etch process and ends the etch process when the measured substrate current exceeds a predetermined value.
    Type: Application
    Filed: December 23, 2002
    Publication date: May 15, 2003
    Applicant: Micron Technology, Inc.
    Inventor: James Malden Chapman
  • Patent number: 6562187
    Abstract: Methods and apparatus for ascertaining the end of an etch process while etching through a target layer on a substrate in a plasma processing system which employs an electrostatic chuck. The end of the etch process is ascertained by monitoring the electric potential of the substrate to detect a pattern indicative of the end of the etch process. By the way of example, changes to this potential may be observed by monitoring the current flowing to the pole of the electrostatic chuck. Upon ascertaining the pattern indicative of the end of the etch process, for example by monitoring the current signal, a control signal is produced to terminate the etch.
    Type: Grant
    Filed: February 23, 2001
    Date of Patent: May 13, 2003
    Assignee: Lam Research Corporation
    Inventors: Jaroslaw W. Winniczek, M. J. Francois Chandrasekar Dassapa, Eric A. Hudson, Mark Wiepking
  • Publication number: 20030071017
    Abstract: There is provided an alarm apparatus for checking an amount of electric current supplied to each of the lamps of a wafer etching equipment and timely exchanging defective lamps if the amount of the current is less than a predetermined level, thereby minimizing process failures. The alarm apparatus includes a plurality of lamps provided above a dome cover of a reaction chamber to uniformly maintain a constant temperature of the dome cover, current quantity detecting devices provided on each of electric lines supplying electric power to each of the lamps, a controller for checking the amount of electric current through each of the current quantity detecting devices to compare the detected amount of electric current with a predetermined amount of electric current, and an alarm indicating a proper time to exchange lamps having an amount of electric current less than the predetermined amount of electric current in response to a comparison result from the controller.
    Type: Application
    Filed: March 18, 2002
    Publication date: April 17, 2003
    Inventor: Il Kwon Sin
  • Patent number: 6528429
    Abstract: In one aspect, the invention encompasses a method of etching insulative materials which comprise complexes of metal and oxygen. The insulative materials are exposed to physical etching conditions within a reaction chamber and in the presence of at least one oxygen-containing gas. In another aspect, the invention encompasses a method of forming a capacitor. An electrically conductive first layer is formed over a substrate, and a second layer is formed over the first layer. The second layer is a dielectric layer and comprises a complex of metal and oxygen. A conductive third layer is formed over the second layer. The first, second and third layers are patterned into a capacitor construction. The patterning of the second layer comprises exposing the second layer to at least one oxygen-containing gas while also exposing the second layer to physical etching conditions.
    Type: Grant
    Filed: October 15, 2001
    Date of Patent: March 4, 2003
    Assignee: Micron Technology, Inc.
    Inventor: Daryl C. New
  • Publication number: 20030000923
    Abstract: A method for enhancing the fabrication process of a self-aligned contact (SAC) structure is provided. The method includes forming a transistor structure on a surface of a substrate. The method also includes forming a dielectric layer directly over the surface of the substrate without forming an etch stop layer on the surface of the substrate. Also included in the method is plasma etching a contact hole through the dielectric layer in a plasma processing chamber. The method also includes monitoring a bias compensation voltage of the plasma processing chamber during the plasma etching process and discontinuing the plasma etching process upon detecting an endpoint signaling change in the bias compensation voltage.
    Type: Application
    Filed: June 29, 2001
    Publication date: January 2, 2003
    Inventors: Jun-Cheng Ko, Young-Tong Tsai
  • Publication number: 20020162822
    Abstract: A method for detecting end-point in a plasma etching process by monitoring plasma impedance changes on a time scale is disclosed. In the method, a plasma etching process is first conducted in a process chamber, while changes in a parameter of plasma impedance in the chamber occurring during the etching process is recorded in a curve on a time scale. An end-point of the plasma etching process is then defined for the etching of a specific material layer at a point where the direction of a slope of the curve changes.
    Type: Application
    Filed: May 2, 2001
    Publication date: November 7, 2002
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jen-Yuan Yang, Tsai-Yi Chen, Wen-Bin Lin
  • Patent number: 6447691
    Abstract: Certain embodiments provide a plasma etching apparatus and a method for detecting the end point of plasma etching, which can more accurately detect the end point of plasma etching. A radiofrequency wave generated in a radiofrequency generating system 5 propagates through a lead line 30 and is applied to a cathode 9 in a plasma chamber 1. Plasma 11 thereby is generated in the plasma chamber and selectively etches a semiconductor wafer 12. A RF probe 8 measures the voltage and current of the radiofrequency wave flowing in the lead line 30. A determination system 15 may determine the end point of the plasma etching on the basis of either the voltage or current, whichever changes first.
    Type: Grant
    Filed: April 7, 1999
    Date of Patent: September 10, 2002
    Assignee: Seiko Epson Corporation
    Inventors: Atsushi Denda, Yoshinao Ito
  • Publication number: 20020084253
    Abstract: A system detects the clearing of a dielectric at a plurality of contact sites by measuring the surface voltage of the dielectric and comparing the surface voltage to a reference voltage set to a value that relates to the cleared contact sites. Another system detects the clearing of a dielectric at a plurality of contact sites on a substrate by measuring the rate of change of a substrate current during an etch process and ending the etch process when the rate of change is approximately zero. Another system detects the clearing of a dielectric at a contact site by measuring a substrate current during an etch process and ends the etch process when the measured substrate current exceeds a predetermined value.
    Type: Application
    Filed: February 26, 1999
    Publication date: July 4, 2002
    Inventor: JAMES MALDEN CHAPMAN
  • Patent number: 6391789
    Abstract: A dry etching is carried out for a single semiconductor wafer electrostatically attracted to a static chuck in the presence of a plasma, wherein a controlling system applies a relatively large direct current voltage to the static chuck when a lapse of time from the previous dry etching is longer than a critical lapse of time and when a place occupied by the single semiconductor wafer in a lot is equal to or less than a critical place so that micro-contact holes formed over the semiconductor wafers in the lot are fallen within a target diameter range.
    Type: Grant
    Filed: April 17, 2001
    Date of Patent: May 21, 2002
    Assignee: NEC Corporation
    Inventor: Toshiaki Sango
  • Publication number: 20020027429
    Abstract: A method and apparatus are disclosed for electrically monitoring processing variations of a material deposited using a collimated process. In one embodiment, the method and apparatus are directed to monitoring variations in step coverage of a conductive material deposited using a collimated sputtering process. A substrate having a plurality of trenches is used to mimic features desired to be monitored, such as contact holes. The resistance of metal deposited into the trenches is monitored to determine the effectiveness of the collimated sputtering process.
    Type: Application
    Filed: August 17, 2001
    Publication date: March 7, 2002
    Inventor: Gurtej S. Sandhu
  • Patent number: 6348158
    Abstract: In a plasma processing method, a plasma is generated using a process gas, and an electron beam is injected into the plasma to control an electron energy distribution in the plasma. Then, a semiconductor substrate is processed using the plasma with controlled electron energy distribution.
    Type: Grant
    Filed: July 22, 1999
    Date of Patent: February 19, 2002
    Assignee: NEC Corporation
    Inventor: Seiji Samukawa
  • Patent number: 6332961
    Abstract: A system and method for detecting and preventing arcing in plasma processing systems. Arcing is detected and characterized by measuring and analyzing electrical signals from a circuit coupled to the plasma. After characterization, the electrical signals can then be correlated with arcing events occurring during a processing run. Information can be obtained regarding location, severity, and frequency of arcing events. The system and method better diagnose the causes of arcing and provide improved protection against undesirable arcing, which can cause damage to the system and the workpiece.
    Type: Grant
    Filed: June 2, 2000
    Date of Patent: December 25, 2001
    Assignee: Tokyo Electron Limited
    Inventors: Wayne L. Johnson, Richard Parsons