Abstract: Methods and devices for mechanical and/or chemical-mechanical planarization of semiconductor wafers, field emission displays and other microelectronic substrate assemblies. One method of planarizing a microelectronic substrate assembly in accordance with the invention includes pressing a substrate assembly against a planarizing surface of a polishing pad at a pad/substrate interface defined by a surface area of the substrate assembly contacting the planarizing surface. The method continues by moving the substrate assembly and/or the polishing pad with respect to the other to rub at least one of the substrate assembly and the planarizing surface against the other at a relative velocity. As the substrate assembly and polishing pad rub against each other, a parameter indicative of drag force between the substrate assembly and the polishing pad is measured or sensed at periodic intervals.

Abstract: Methods are provided for chemical mechanical planarization of a layer and for determining the endpoint of a CMP operation. In accordance with one embodiment the method for determining an endpoint comprises making a plurality of eddy current thickness measurement of the layer being planarized, each of the plurality of measurements spaced apart by a predetermined length of time. A difference is calculated between sequential ones of the plurality of eddy current measurements, and a predetermined minimum threshold for the difference is set. The endpoint is defined as a calculated difference less than the predetermined minimum threshold.

Abstract: A method for manufacturing a glass substrate having projections of the same height. The method includes forming a surface layer having a decreased chemical resistance on a glass plate, forming a texture including a plurality of projections having upper portions included in the surface layer, and selectively removing the surface layer.

Abstract: A polishing liquid composition is applicable as a means of forming embedded metal interconnections on a semiconductor substrate. In a surface to be polished comprising an insulating layer and a metal interconnection layer, the polishing liquid composition is capable of maintaining a polishing speed of the metal layer, of suppressing an etching speed, and of preventing dishing of the metal layer.

Abstract: A polishing slurry composition including an abrasive, a pH-adjusting agent, a water-soluble thickening agent, and a chelating agent, wherein the chelating agent includes at least one of an acetate chelating agent and a phosphate chelating agent, and a method of using the same.

Abstract: An arrangement and method for fabricating a semiconductor wafer which utilizes a nonaqueous solvent rinse is disclosed.

Abstract: The inventive method for processing a silicon wafer is a method comprising step 11 in which a single crystal ingot is sliced into thin disc-like wafers; step 13 in which the surface of each wafer is lapped to be planar; step 14 in which the wafer is subjected to alkaline cleaning to be removed of contaminants resulting from preceding machining; and step 16 in which the wafer is alternately transferred between two groups of etching tanks one of which contain acidic etching solutions and the other alkaline etching solutions, wherein an additional step 12 is introduced between step 11 and step 13 in which a wafer is immersed in an acidic solution containing hydrofluoric acid (HF) and nitric acid (HNO3) at a volume ratio of ? to ½ (HF/HNO3) so that degraded superficial layers occurring on the front and rear surfaces of the wafer as a result of machining can be removed and the edge surface of the wafer can be beveled.

Abstract: An improvement in a polishing apparatus for planarizing substrates comprises a tenacious coating of a low-adhesion material to the platen surface. An expendable polishing pad is adhesively attached to the low-adhesion material, and may be removed for periodic replacement at much reduced expenditure of force. Polishing pads joined to low-adhesion materials such as polytetrafluoroethylene (PTFE) by conventional adhesives resist distortion during polishing but are readily removed for replacement.

Abstract: The present invention provides a wafer manufacturing method and a wafer polishing apparatus which enable control of sags in a periphery of a wafer and improvement of nanotopology values thereof that is strongly required recently, and a wafer. In a polishing process for making a mirror surface of the wafer, a back surface of the wafer is polished to produce a reference plane thereof.

Abstract: A method for merging sensor field-mill and electronic lapping guide material placement for a partial mill process and sensor formed according to the method is disclosed. An electronic lapping guide is formed coplanar with a sensor. The coplanar electronic lapping guide and sensor are processed to provide the electronic lapping guide and sensor with predetermined dimensions. The merging of the sensor field-mill and placement of the electronic lapping guide material for partial mill CPP eliminates steps and therefore the cycle time. Moreover, the electronic lapping guide region is raised to the height of the sensor plane to allow the sensor and electronic lapping guide to be defined in the same focal plane of the optics.

Abstract: The invention provides a method of polishing a substrate comprising contacting a substrate comprising a noble metal on a surface of the substrate with a chemical-mechanical polishing system comprising (a) a polishing component selected from the group consisting of an abrasive, a polishing pad, and a combination thereof, (b) an oxidizing agent, (c) an ethylene-oxide containing polymer, and (d) a liquid carrier, and abrading at least a portion of the noble metal with the chemical-mechanical polishing system to polish the substrate.

Abstract: Aqueous polishing slurries for chemical-mechanical polishing are effective for polishing copper at high polish rates. The aqueous slurries according to the present invention may include soluble salts of molybdenum dissolved in an oxidizing agent and molybdic acid dissolved in an oxidizing agent. Methods for polishing copper by chemical-mechanical planarization include polishing copper with low pressures using a polishing pad and a aqueous slurries including soluble salts of molybdenum dissolved in an oxidizing agent and molybdic acid dissolved in an oxidizing agent, particles of MoO3 dissolved in an oxidizing agent, and particles of MoO2 dissolved in an oxidizing agent.

Abstract: A shallow trench isolation (STI) multistage chemical mechanical polishing (CMP) method for forming a shallow trench isolation structure is provided. The substrate comprising a dense region and an isolation region, a silicon nitride layer formed over the substrate, a plurality of trenches formed in the silicon nitride layer and the substrate, an oxide layer formed over the substrate, filling the trenches, wherein a width of the trenches in the dense region is smaller than that in the isolation region. A first polishing step is performed to remove a portion of the silicon oxide layer until a thickness of the remaining portion of the oxide layer reaches a predetermined thickness. A second polishing step is performed to remove a portion of the remaining portion of the silicon oxide layer until the silicon nitride layer is exposed.

Abstract: A metal polishing liquid which contains a compound represented by the following formula (1), an aromatic heterocyclic ring compound, and an oxidizing agent, and a chemical mechanical polishing method using the metal polishing liquid. In the formula (1), R1 denotes an alkylene group, and R2 and R3 each separately denote a hydrogen atom, a halogen atom, an acyl group, an alkyl group, an alkenyl group, an alkynyl group, or an aryl group.

Abstract: Described are methods and chemistries for preparing firepolished quartz parts for use in semiconductor processing. The quartz parts in need of preparation include newly manufactured parts as well as parts requiring refurbishment after previous use in semiconductor processing. The embodiments described avoid methods and chemistries that may damage the surfaces of the quartz parts and render the parts unfit for use in semiconductor processing. A method in accordance with one embodiment minimizes damage by limiting exposure of the quartz parts to hydrofluoric acid. A quartz part for use in semiconductor processing comprises a surface including a surface portion having a surface portion area to expose to a gas, wherein at least 95 percent of the surface portion area is free of defects and wherein the surface portion has less than E12 atoms per centimeter squared of aluminum.

Abstract: A substrate is maintained beneath a substrate mounting surface with a retaining ring that includes a generally annular lower portion having a bottom surface for contacting the polishing surface during polishing, and a generally annular upper portion having a bottom surface joined to the lower portion and a top surface fixed to and abutting the base. The lower portion is made of a plastic and the upper lower portion is made of a metal which is more rigid than the plastic.

Abstract: An apparatus and a method for etching insulating film prevents generation of spots by spraying etchant on a lower surface of the substrate as well as the upper surface.

Abstract: A carrier head for a chemical mechanical polishing apparatus includes a retaining ring having a flexible lower portion and a rigid upper portion.

Abstract: A chemical-mechanical nanogrinding process achieves near-zero pole tip recession (PTR) to minimize magnetic space loss of the head transducer to media spacing loss, alumina recession and trailing edge profile variation, and smooth surface finish with minimal smearing across multi-layers of thin films and the hard substrate to meet the requirements of high areal density thin film magnetic heads for hard disk drives (HDD). With a fine chemical mechanical nanogrinding process, PTR can be improved to a mean of about 0.5 nm.

Abstract: A CMP process is provided. A first polishing process on a wafer is performed using a first hard polishing pad with a first slurry. Then, a buffering process on the wafer is performed using a soft polishing pad with a cleaning agent to buffer the pH value in the first polishing process and to remove at least portion of the first slurry and the cleaning agent by the contact with the first soft polishing pad simultaneously. Thereafter, a second polishing process on the wafer is performed using a second hard polishing pad with a second slurry such that the pH value after the buffering process is between the pH value in the first polishing process and the pH value in the second polishing process. The method can avoid the scratch issue of wafer surface by particles resulting from pH shock and cross contamination.

Abstract: A method for contacting an electrically conductive layer overlying a magnetoelectronics element includes forming a memory element layer overlying a dielectric region. A first electrically conductive layer is deposited overlying the memory element layer. A first dielectric layer is deposited overlying the first electrically conductive layer and is patterned and etched to form a first masking layer. Using the first masking layer, the first electrically conductive layer is etched. A second dielectric layer is deposited overlying the first masking layer and the dielectric region. A portion of the second dielectric layer is removed to expose the first masking layer. The second dielectric layer and the first masking layer are subjected to an etching chemistry such that the first masking layer is etched at a faster rate than the second dielectric layer. The etching exposes the first electrically conductive layer.

Abstract: A method of fabricating a silicon carbide imprint stamp is disclosed. A mold layer has a cavity formed therein. A spacer is formed in the cavity to reduce a first feature size of the cavity. A casting process is used to form a feature and a foundation layer connected with the feature. The spacer operatively reduces the first feature size of the feature to a second feature size that is less than the lithography limit. The foundation layer and the feature are unitary whole made from a material comprising silicon carbide (SiC), a material that is harder than silicon (Si) alone. Consequently, the silicon carbide imprint stamp has a longer service lifetime because it can endure several imprinting cycles without wearing out or breaking. The longer service lifetime makes the silicon carbide imprint stamp economically feasible to manufacture as the manufacturing cost can be recouped over the service lifetime.

Abstract: Provided is a method for producing a silicon wafer whose surfaces exhibit precise flatness and minute surface roughness, and which allows one to visually discriminate between the front and rear surfaces, the method comprising a slicing step of slicing a single-crystal ingot into thin disc-like wafers, a chamfering step of chamfering the wafer, a lapping step for flattening the chamfered wafer, a mild lapping step for abrading away part of processing distortions on the rear surface of the wafer left after chamfering and lapping, a rear-surface mild polishing step for abrading away part of roughness on the rear surface of the wafer, an etching step for alkali-etching the remains of processing distortions on the front and rear surfaces of the wafer, a front-surface mirror-polishing step for mirror-polishing the front surface of the etched wafer, and a cleaning step for cleaning the mirror-polished wafer.

Abstract: An aqueous chemical mechanical polishing slurry is provided that comprises precipitated amorphous silica abrasive particles treated with acidic aluminum. Also provided is a method of polishing an electronic component substrate comprising the steps of: a) obtaining an electronic component substrate, the electronic component substrate having an insulating film deposited over it, an interconnection pattern formed in the insulating film, and interconnection material deposited on the insulated film and in the interconnection pattern; and b) polishing the interconnection material until a surface of said insulating film is exposed by using an aqueous chemical mechanical polishing slurry comprising: precipitated amorphous silica abrasive particles treated with acidic aluminum.

Abstract: A method and system is provided for improved polishing or planarizing of aluminum oxide and/or aluminum oxynitride substrates. Specifically, the composition comprises an abrasive, a liquid carrier, and a phosphorus-type mono-acid. Preferably, the phosphorus-type mono-acid is phosphoric acid, phosphonoacetic acid, phosphorous acid, methyl phosphonic acid, or mixtures thereof. The control of the pH of the composition further improves polishing rates.

Abstract: In a polishing method of a GaN substrate according to this invention, first, while supplying a polishing solution 27 containing abrasives 23 and a lubricant 25, onto a platen 101, the GaN substrate is polished using the platen 101 and the polishing solution 27 (first polishing step). Then the GaN substrate is polished using the platen 101 in which abrasives 29 are buried, while supplying a lubricant 31 onto the platen 101 in which the abrasives 29 are buried (second polishing step).

Abstract: A method for polishing a wafer comprising an aqueous solution having a pH in the range of 6 to 8, wherein the aqueous solution comprises at least one compound selected from the group consisting of a polymethacrylic acid, a polysulfonic acid, and combinations thereof, and wherein the compound is present in the range of 1.5 to 4 percent by weight of the aqueous solution. The wafer polishing solution can be adjusted to control cut rate and selectivity for modifying semiconductor wafers using a fixed abrasive CMP process.

Abstract: A method of forming a nozzle rim for a nozzle aperture is provided. The method is suitable for forming part of a printhead fabrication process. The method comprises the steps of: (a) depositing a roof material layer over a sacrificial layer; and (b) removing a first part of said roof material layer so as to form a nozzle rim.

Abstract: A composition comprising a solution of potassium monopersulfate having an active oxygen content of from about 3.4% to about 6.8% and a process for its preparation including neutralization with an alkaline material is disclosed.

Abstract: The invention is directed to a method for controlling a polishing process. The method comprises steps of providing a first wafer, wherein a thin film is located over the first wafer. A film average thickness distribution is obtained by measuring a plurality of thickness values of the thin film on a plurality regions over the wafer respectively. A removal rate recipe is determined according to the film average thickness distribution. A polishing process is performed according to the removal rate recipe.

Abstract: A composition and an associated method for chemical mechanical planarization (or other polishing) are described. The composition includes a surface-modified abrasive modified with at least one stabilizer and at least one catalyst differing from the at least one stabilizer. The composition can further include a medium containing the abrasive and an oxidizing agent (e.g., hydrogen peroxide), wherein the at least one catalyst is adapted to catalyze oxidation of a substrate by the oxidizing agent. Preferably, the abrasive is alumina, titania, zirconia, germania, silica, ceria and/or mixtures thereof, the stabilizer is B, W and/or Al, and the catalyst is Cu, Fe, Mn, Ti, W and/or V. Both the stabilizer and the catalyst are immobilized on the abrasive surface. The method includes applying the composition to a substrate to be polished, such as substrates containing W, Cu and/or dielectrics.

Abstract: Methods and apparatuses for using a semi-permeable membrane to deliver a reagent to a surface in a topographically selective manner are provided. The methods and apparatuses are particularly useful for removing sulfur-containing electrocatalysts from copper surfaces using a semi-permeable membrane to deliver an oxidizing agent to a catalyst-coated surface.

Abstract: A technique for fabricating the required surface shapes for micro optical elements, such as curved micro mirrors and lenses, starts with a simple, binary for example, approximation to the desired surface shape. Then polishing, e.g., chemical mechanical polishing (CMP), is used to form the smooth optical surface. Specifically, starting with a mesa or blind hole, with a mesa profile, a smooth mirror or lens structure is fabricated.

Abstract: A method for planarizing a semiconductor substrate is provided. The method initiates with tracking a signal corresponding to a thickness of a conductive film disposed on the semiconductor substrate. Then, a second derivative is calculated from data representing the tracked signal. Next, the onset of planarization is identified based upon a change in the second derivative. A CMP system configured to identify a transition between stages of the CMP operation is also provided.

Abstract: Methods of removing metal contaminants from a component for a plasma processing apparatus are provided. The method includes cleaning a surface of the component with a cleaning liquid that includes at least one acid selected from oxalic acid, formic acid, acetic acid, citric acid, and mixtures thereof.

Abstract: A method is disclosed for preparing carrier wafers for semiconductor device manufacture. The method includes the steps of sorting a plurality of standard carrier wafer blanks into batches by thickness to define a batch of starting carrier wafers that are within a predetermined tolerance of one another, reducing the thickness of the sorted carrier wafers to within 10 microns of a final target thickness, and polishing the sorted carrier wafers to the final target thickness. The polished carrier wafers are mounted to device precursor wafers having at least one semiconductor epitaxial layer on a substrate by joining one surface of a carrier wafer to the epitaxial layer on a substrate. The thickness of the device precursor wafer is then reduced by removing material from the device precursor substrate opposite the joined epitaxial layer.

Abstract: A composition and associated method for the chemical mechanical planarization (CMP) of metal substrates on semiconductor wafers are described. The composition contains a nonionic fluorocarbon surfactant and a per-type oxidizer (e.g., hydrogen peroxide). The composition and associated method are effective in controlling removal rates of low-k films during copper CMP and provide for tune-ability in removal rates of low-k films in relation to removal rates of copper, tantalum, and oxide films.

Abstract: A self-cleaning colloidal slurry and process for finishing a surface of a glass, ceramic, glass-ceramic, metal or alloy substrate for use in a data storage device, for example. The slurry comprises a carrying fluid, colloidal particles, etchant, and a surfactant adsorbed and/or precipitated onto a surface of the colloidal particles and/or substrate. The surfactant has a hydrophobic section that forms a steric hindrance barrier and substantially prevents contaminates, including colloidal particles, from bonding to the substrate surface. The slurry is applied to the surface of the substrate while a pad mechanically rubs the surface. Subsequent cleaning with standard soap solutions removes substantially all remaining contamination from the substrate surface. In an exemplary embodiment, the slurry is used to superfinish a glass disk substrate to a surface roughness of less than 2 ?, with substantially no surface contamination as seen by atomic force microscopy (AFM) after standard soap cleaning steps.

Abstract: A chemical mechanical polishing slurry comprising an oxidizing agent, a complexing agent, an abrasive, and an optional surfactant, as well as a method for using the chemical mechanical polishing slurry to remove copper alloy, titanium, titanium nitride, tantalum and tantalum nitride containing layers from a substrate. The slurry does not include a separate film-forming agent.

Abstract: Microelectronic devices including a layer of germanium and selenium, optionally including up to 10 atomic percent silver, show promise for select applications. Manufacturing microelectronic devices containing such layers using conventional CMP processes presents some significant challenges. Embodiments of the invention provide methods of planarizing workpieces with Ge—Se layers, many of which can be carried out using conventional CMP equipment. Other embodiments of the invention provide chemical-mechanical polishing systems adapted to produce planarized workpieces with Ge—Se layers or, in at least one embodiment, other alternative layers. Various approaches suggested herein facilitate production of such microelectronic devices by appropriate control of the down force of the Ge—Se layer against the planarizing medium and/or one or more aspects of the planarizing medium, which aspects include pH, abrasive particle size, abrasive particle hardness, weight percent of abrasive.

Abstract: Methods of refining using a plurality of refining elements are discussed. A refining apparatus having refining elements that can be smaller than the workpiece being refined are disclosed. New refining methods, refining apparatus, and refining elements disclosed. Methods of refining using frictional refining, chemical refining, tribochemical refining, and electrochemical refining and combinations thereof are disclosed. A refining apparatus having magnetically responsive refining elements that can be smaller than the workpiece being refined are disclosed. The refining apparatus can supply a parallel refining motion to the refining element(s) for example through magnetic coupling forces. The refining apparatus can supply multiple different parallel refining motions to multiple different refining elements for example solely through magnetic coupling forces to improve refining quality and versatility. A refining chamber can be used. New methods of control are refining disclosed.

Abstract: A polishing composition includes fumed alumina, alumina other than fumed alumina, colloidal silica, a first organic acid, a second organic acid, an oxidizing agent, and water. When the second organic acid is citric acid, the first organic acid is preferably malic acid, while when the second organic acid is malic acid, the first organic acid is preferably citric acid. When the second organic acid is succinic acid, iminodiacetic acid, itaconic acid, maleic acid, malonic acid, crotonic acid, gluconic acid, glycolic acid, lactic acid, or mandelic acid, the first organic acid is preferably either citric acid or malic acid. The polishing composition can be suitably used for polishing the surface of a substrate for a magnetic disk.

Abstract: A CMP slurry comprising polishing abrasives containing mixture abrasives of silica and alumina is used. In CMP using the slurry comprising mixture abrasives of silica and alumina as polishing abrasives, a down force-dependency of a polishing rate is high and an increase in dishing can be effectively suppressed.

Abstract: According to the present invention, a chemical and mechanical polishing apparatus (100) for a sample such as a wafer includes a built-in inspection apparatus (25) incorporated therein. The polishing apparatus (100) further comprises a load unit (21), a chemical and mechanical polishing unit (22), a cleaning unit (23), a drying unit (24) and an unload unit (26). The chemical and mechanical polishing apparatus (100) receives a sample from a preceding step (107), carries out respective processes for the sample by said respective units disposed within the polishing apparatus (100) and then transfers the processed sample to a subsequent step (109). Sample loading and unloading means and a sample transfer means are no more necessary for transferring the sample between respective units.

Abstract: A processing method for glass substrate of the present invention includes: applying heat and external force to a glass substrate and then cooling it down to thereby form a compression stressed part having a different etching rate from that of other parts with respect to an etching reagent to be used, on the surface of the glass substrate and in the vicinity thereof, and performing chemical etching using the etching reagent on the glass substrate having the compression stressed part formed thereon, so as to form a relief on the surface of the glass substrate.

Abstract: A chemical mechanical polishing pad which has a storage elastic modulus E?(30° C.) at 30° C. of 120 MPa or less and an (E?(30° C.)/E?(60° C.)) ratio of the storage elastic modulus E?(30° C.) at 30° C. to the storage elastic modulus E?(60° C.) at 60° C. of 2.5 or more when the storage elastic moduli of a polishing substrate at 30° C. and 60° C. are measured under the following conditions: initial load: 100 g maximum bias: 0.01 % frequency: 0.2 Hz. A chemical mechanical polishing process makes use of the above chemical mechanical polishing pad. The chemical mechanical polishing pad can suppress the production of a scratch on the polished surface in the chemical mechanical polishing step and can provide a high-quality polished surface, and the chemical mechanical polishing process provides a high-quality polished surface by using the chemical mechanical polishing pad.

Abstract: Alpha-amino acid containing chemical mechanical polishing compositions and slurries that are useful for polishing substrates including multiple layers of metals, or metals and dielectrics.

Abstract: A method of fabricating a semiconductor device includes a polishing process of a substrate, wherein the polishing process includes the steps of applying a chemical mechanical polishing process to the substrate on a polishing pad while using slurry, and conditions a surface of the polishing pad, the conditioning step including the step of grinding the surface of said polishing pad by at least first and second conditioning disks of respective, different surface states.

Abstract: There are provided methods of fabricating a semiconductor device using a sacrificial layer. The methods provide an approach to maintaining thickness distribution of the interlayer insulating layers below a sacrificial layer uniform on an overall surface of a semiconductor substrate during performing a chemical mechanical polishing (CMP) process in a damascene process. To this end, the method includes forming a pad layer, a pad interlayer insulating layer, an etch stop layer pattern, a planarized interlayer insulating layer and a sacrificial layer sequentially on a semiconductor substrate. At least one trench is formed in the sacrificial layer and the planarized interlayer insulating layer. A via contact hole is formed in the etch stop layer pattern, the pad interlayer insulating layer, and the pad layer to be disposed below the trench. A diffusion barrier layer and a conductive layer are sequentially formed to fill the trench and the via contact hole.

Abstract: There is provided a method for processing a semiconductor wafer subjected to a chamfering process, a lapping process, an etching process, and a mirror-polishing process, wherein acid etching is performed after alkaline etching as the etching process, and the acid etching is performed with an acid etchant composed of hydrofluoric acid, nitric acid, phosphoric acid, and water, a method for processing a semiconductor wafer subjected to a chamfering process, a surface grinding process, an etching process, and a mirror-polishing process, wherein the etching process is performed as described above, and a method for processing a semiconductor wafer subjected to a flattening process, an etching process, and a mirror-polishing process, wherein the etching process is performed as described above, a back surface polishing process is performed after the acid etching as the mirror-polishing process, and then a front surface polishing process is performed.