Using Film Of Etchant Between A Stationary Surface And A Moving Surface (e.g., Chemical Lapping, Etc.) Patents (Class 216/88)
  • Patent number: 8696924
    Abstract: A polishing apparatus is used for polishing and planarizing a substrate such as a semiconductor wafer on which a conductive film such as a copper (Cu) layer or a tungsten (W) layer is formed. The polishing apparatus includes a polishing table having a polishing surface, a motor for rotating the polishing table, a top ring for holding a substrate and pressing the substrate against the polishing surface, a film thickness measuring sensor disposed in the polishing table for scanning a surface of the substrate, and a computing device for processing signals of the film thickness measuring sensor to compute a film thickness of the substrate.
    Type: Grant
    Filed: April 4, 2007
    Date of Patent: April 15, 2014
    Assignees: Ebara Corporation, Kabushiki Kaisha Toshiba
    Inventors: Mitsuo Tada, Taro Takahashi, Motohiro Niijima, Shinro Ohta, Atsushi Shigeta
  • Patent number: 8691105
    Abstract: A method of examining a titanium alloy with an alpha phase and a beta phase is disclosed. The method includes: cutting a sample of a part made of the alloy; preparing a region of the cut surface of the sample situated in the vicinity of the edge of the sample, the edge being in common with the outside surface of the part; observing the alpha phase of the region at a magnification of greater than ×5000; deciding on whether granularity is present or absent in the alpha phase of a first zone contiguous with the edge of the sample; and concluding that the alloy has been contaminated with a gas if granularity is found to be absent in the alpha phase of the contiguous zone whereas granularity is present in the alpha phase outside the contiguous zone.
    Type: Grant
    Filed: July 27, 2010
    Date of Patent: April 8, 2014
    Assignee: SNECMA
    Inventor: Gilles Berthod
  • Patent number: 8691695
    Abstract: The present invention provides a chemical-mechanical polishing (CMP) composition suitable for polishing a silicon nitride-containing substrate while suppressing polysilicon removal from the substrate. The composition comprises abrasive particles suspended in an acidic aqueous carrier containing a surfactant comprising an alkyne-diol, an alkyne diol ethoxylate, or a combination thereof. Methods of polishing a semiconductor substrate therewith are also disclosed.
    Type: Grant
    Filed: June 18, 2010
    Date of Patent: April 8, 2014
    Assignee: Cabot Microelectronics Corporation
    Inventors: Kevin Moeggenborg, William Ward, Ming-Shih Tsai, Francesco De Rege Thesauro
  • Patent number: 8684793
    Abstract: A method for chemical mechanical planarization of ruthenium is provided. A semiconductor substrate comprising ruthenium is contacted with a chemical mechanical polishing system comprising an oxidizing particle, an abrasive, a polishing pad and a liquid carrier. The pH of the polishing composition is about 8 to 12. A high ruthenium removal rate for the inventive slurry was observed. The disclosed oxidizing particle advantageously improves the polishing speed of ruthenium under low polishing pressure and decreases the scratches generated on low-k material.
    Type: Grant
    Filed: May 6, 2010
    Date of Patent: April 1, 2014
    Assignee: BASF SE
    Inventors: Yuzhuo Li, Karpagavalli Ramji
  • Patent number: 8685857
    Abstract: There is disclosed a chemical mechanical polishing method of an organic film comprising forming the organic film above a semiconductor substrate, contacting the organic film formed above the semiconductor substrate with a polishing pad attached to a turntable, and dropping a slurry onto the polishing pad to polish the organic film, the slurry being selected from the group consisting of a first slurry and a second slurry, the first slurry comprising a resin particle having a functional group selected from the group consisting of an anionic functional group, a cationic functional group, an amphoteric functional group and a nonionic functional group, and having a primary particle diameter ranging from 0.05 to 5 ?m, the first slurry having a pH ranging from 2 to 8, and the second slurry comprising a resin particle having a primary particle diameter ranging from 0.05 to 5 ?m, and a surfactant having a hydrophilic moiety.
    Type: Grant
    Filed: October 24, 2008
    Date of Patent: April 1, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yukiteru Matsui, Gaku Minamihaba, Yoshikuni Tateyama, Hiroyuki Yano, Atsushi Shigeta
  • Patent number: 8685270
    Abstract: A method for producing a semiconductor wafer sliced from a single crystal includes rounding an edge using a grinding disk containing abrasives with an average grain size of 20.0-60.0 ?m. A first simultaneous double-side material-removing process is performed wherein the semiconductor wafers are processed between two rotating ring-shaped working disks, each working disk having a working layer containing abrasives having an average grain size of 5.0-20.0 ?m, wherein the semiconductor wafer is placed in a cutout in one of a plurality of carriers rotatable by a rolling apparatus such that the semiconductor wafer lies in a freely movable manner in the carrier and the wafer is movable on a cycloidal trajectory. A second simultaneous double-side material-removing process is performed including processing the semiconductor wafers between two rotating ring-shaped working disks, each working disk having a working layer containing abrasives having an average grain size of 0.5-15.0 ?m.
    Type: Grant
    Filed: October 12, 2010
    Date of Patent: April 1, 2014
    Assignee: Siltronic AG
    Inventors: Juergen Schwandner, Thomas Buschhardt, Diego Feijoo, Michael Kerstan, Georg Pietsch, Guenter Schwab
  • Patent number: 8679360
    Abstract: A base surface processing method includes forming a protective film on a base surface; thinning a part of a base by grinding a part of the base surface; and etching a ground surface ground by the thinning.
    Type: Grant
    Filed: March 28, 2012
    Date of Patent: March 25, 2014
    Assignee: Seiko Epson Corporation
    Inventors: Takeshi Sakamoto, Junichi Takeuchi
  • Patent number: 8673163
    Abstract: Fabrication of thin sheets of glass or other substrate material for use in devices such as touch sensor panels is disclosed. A pair of thick glass sheets, typically with thicknesses of 0.5 mm or greater each, may each be patterned with thin film on a surface, sealed together to form a sandwich with the patterned surfaces facing each other and spaced apart by removable spacers, either or both thinned on their outside surfaces to thicknesses of less than 0.5 mm each, and separated into two thin glass sheets. A single thick glass sheet, typically with a thickness of 0.5 mm or greater, may be patterned, covered with a protective layer over the pattern, thinned on its outside surface to a thickness of less than 0.5 mm, and the protective layer removed. This thinness of less than 0.5 mm may be accomplished using standard LCD equipment, despite the equipment having a sheet minimum thickness requirement of 0.5 mm.
    Type: Grant
    Filed: June 27, 2008
    Date of Patent: March 18, 2014
    Assignee: Apple Inc.
    Inventors: John Z. Zhong, Casey J. Feinstein, Steve Porter Hotelling, Shih Chang Chang
  • Patent number: 8652345
    Abstract: A method of forming a patterned substrate is provided. The method includes providing a substrate (300) having a structured surface region comprising one or more recessed features (310). The method includes disposing a first liquid (325) onto at least a portion of the structured surface region. The method includes contacting the first liquid with a second liquid (330). The method includes displacing the first liquid with the second liquid from at least a portion (315) of the structured surface region. The first liquid is selectively located in at least a portion of the one or more recessed features.
    Type: Grant
    Filed: May 26, 2009
    Date of Patent: February 18, 2014
    Assignee: 3M Innovative Properties Company
    Inventors: Cristin E. Moran, Matthew H. Frey, Matthew S. Stay, Mikhail L. Pekurovsky
  • Patent number: 8647985
    Abstract: Semiconductor material substrates are polished by a method including at least one polishing step A by means of which the substrate is polished on a polishing pad containing an abrasive material bonded in the polishing pad and a polishing agent solution is introduced between the substrate and the polishing pad during the polishing step; and at least one polishing step B by means of which the substrate is polished on a polishing pad containing an abrasive material-containing polishing pad and wherein a polishing agent slurry containing unbonded abrasive material is introduced between the substrate and the polishing pad during the polishing step.
    Type: Grant
    Filed: July 2, 2008
    Date of Patent: February 11, 2014
    Assignee: Siltronic AG
    Inventors: Juergen Schwandner, Thomas Buschhardt, Roland Koppert, Georg Pietsch
  • Patent number: 8637404
    Abstract: The invention provides methods for planarizing or polishing a metal surface. The method comprises a composition comprising an abrasive, cesium ions, and a liquid carrier comprising water.
    Type: Grant
    Filed: November 23, 2010
    Date of Patent: January 28, 2014
    Assignee: Cabot Microelectronics Corporation
    Inventors: Phillip W. Carter, Shoutian Li
  • Patent number: 8609441
    Abstract: A substrate comprises a first mark and a second mark. The first mark comprises a first pattern with at least one mark feature formed by a first material and at least one region formed by a second material. The first and second materials have different material characteristics with respect to a substrate treatment process such that a step height in a direction substantially perpendicular to the surface of the substrate may be created by applying the substrate treatment process. The second mark can be provided with a second step height by applying the substrate treatment process. The second step height is substantially different from the first step height.
    Type: Grant
    Filed: December 12, 2007
    Date of Patent: December 17, 2013
    Assignee: ASML Netherlands B.V.
    Inventors: Richard Johannes Franciscus Van Haren, Bartolomeus Petrus Rijpers, Harminder Singh, Gerald Arthur Finken
  • Patent number: 8603917
    Abstract: According to embodiments of the present invention, a method of processing a wafer is provided. The wafer includes a plurality of through-wafer interconnects extending from a frontside surface of the wafer to a backside surface of the wafer. The method includes removing a part of wafer material of the back-side such that a portion of the wafer material between the through-wafer interconnects is removed, thereby exposing a portion of the through-wafer interconnects, forming a layer of low-k dielectric material between the through-wafer interconnects, and planarizing the layer of low-k dielectric material such that a surface of the portion of the through-wafer interconnect is exposed.
    Type: Grant
    Filed: October 28, 2011
    Date of Patent: December 10, 2013
    Assignee: Agency for Science, Technology and Research
    Inventors: Woon Seong Kwon, Nagarajan Ranganathan
  • Patent number: 8597540
    Abstract: The invention provides chemical-mechanical polishing (CMP) compositions and methods for polishing a silicon-containing substrate. A method of the invention comprises the steps of contacting a silicon-containing substrate with a polishing pad and an aqueous CMP composition, and causing relative motion between the polishing pad and the substrate while maintaining a portion of the CMP composition in contact with the surface of the substrate to abrade at least a portion of the substrate. The CMP composition comprises a ceria abrasive, a polishing additive bearing a functional group with a pKa of about 4 to about 9, a nonionic surfactant with an hydrophilic portion and a lipophilic portion wherein the hydrophilic portion has a number average molecular weight of about 500 g/mol or higher, and an aqueous carrier, wherein the pH of the composition is 7 or less. The method reduces defects on the wafers, particularly local areas of high removal.
    Type: Grant
    Filed: July 20, 2012
    Date of Patent: December 3, 2013
    Assignee: Cabot Microelectronics Corporation
    Inventors: Francesco De Rege Thesauro, Zhan Chen
  • Patent number: 8597539
    Abstract: This invention relates to a chemical composition for chemical mechanical polishing (CMP) of substrates that are widely used in the semiconductor industry. The inventive chemical composition contains additives that are capable of improving consistency of the polishing performance and extending the lifetime of a polishing pad.
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: December 3, 2013
    Assignee: BASF SE
    Inventors: Yuzhuo Li, Harvey Wayne Pinder, Shyam S. Venkataraman
  • Patent number: 8597531
    Abstract: A method for manufacturing a device on a substrate includes forming a layer structure on the substrate, forming an auxiliary layer on the layer structure, forming a planarization layer on the auxiliary layer and on the substrate, exposing the auxiliary layer by a chemical mechanical polishing process and removing at least partly the auxiliary layer to form a planar surface of the remaining auxiliary layer or of the layer structure and the planarization layer. The chemical mechanical polishing process has a first removal rate with respect to the planarization layer and a second removal rate with respect to the auxiliary layer and the first removal rate is greater than the second removal rate.
    Type: Grant
    Filed: April 2, 2009
    Date of Patent: December 3, 2013
    Assignee: Infineon Technologies AG
    Inventors: Sandra Obernhuber, Christof Jalics, Joerg Adler, Uwe Hoeckele, Walter Preis, Reinhard Goellner, Tanja Schest, Patricia Nickut
  • Patent number: 8591763
    Abstract: The inventive chemical-mechanical polishing composition comprises a liquid carrier, hydrogen peroxide, benzotriazole, and a halogen anion. The inventive method comprises chemically-mechanically polishing a substrate with the polishing composition.
    Type: Grant
    Filed: December 19, 2007
    Date of Patent: November 26, 2013
    Assignee: Cabot Microelectronics Corporation
    Inventor: Shoutian Li
  • Patent number: 8563436
    Abstract: A method for chemical mechanical polishing of a semiconductor wafer containing a nonferrous metal is provided, comprising: providing a chemical mechanical polishing composition comprising 1 to 25 wt % of an oxidizer; 0.01 to 15 wt % of an inhibitor for the nonferrous metal; 0.005 to 5 wt % of a copolymer of poly(ethylene glycol) methyl ether(meth)acrylate and 1-vinylimidazole; and water; wherein the chemical mechanical polishing composition has an acidic pH; providing a chemical mechanical polishing pad; providing a semiconductor wafer containing the nonferrous metal; creating dynamic contact between the chemical mechanical polishing pad and the semiconductor wafer; and, dispensing the polishing solution at or near the interface between the chemical mechanical polishing pad and the semiconductor wafer.
    Type: Grant
    Filed: April 1, 2013
    Date of Patent: October 22, 2013
    Assignee: Rohm and Haas Electronic Materials CMP Holdings, Inc.
    Inventors: Tirthankar Ghosh, Terence M. Thomas, Hongyu Wang, Scott A. Ibbitson
  • Patent number: 8562849
    Abstract: Methods and apparatus for processing edge portions of a donor semiconductor wafer include controlling chemical mechanical polishing parameters to achieve chamfering of the edges of the donor semiconductor wafer; and alternatively or additionally flexing the donor semiconductor wafer to present a concave configuration, where edge portions thereof are pronounced as compared to a central surface area thereof, such that the pronounced edge portions of the donor semiconductor wafer are preferentially polished against a polishing surface in order to achieve the chamfering.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: October 22, 2013
    Assignee: Corning Incorporated
    Inventors: Jonas Bankaitis, Michael John Moore, Jeffery Scott Stone, Paul Jeffrey Williamson, Chunhe Zhang
  • Patent number: 8557132
    Abstract: A system of cleaning a CMP pad used for removing copper from a substrate, the system comprising an abrasive cleaning pad, a cleaning solution delivery system that delivers a cleaning solution, an analyzing system that monitors the characteristics of the cleaning solution optically and chemically, and a carriage that allows the analyzing system to monitor the cleaning solution at a plurality of locations on the CMP pad. The use of the abrasive cleaning pad and the cleaning solution removes contaminants from the CMP pad, and the contaminants are dissolved in the cleaning solution. By measuring the concentration of contaminants in the cleaning solution, the condition of the CMP pad can be monitored. To measure the concentration of the contaminants, changes in the refractive index and absorption of light in the cleaning solution are measured, wherein the refractive index and absorption depend on the concentration of the contaminants.
    Type: Grant
    Filed: May 10, 2004
    Date of Patent: October 15, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Dinesh Chopra, Scott Meikle
  • Patent number: 8557134
    Abstract: A method is provided for reformulating a chemical mechanical planarization (CMP) slurry for use in conjunction with a CMP tool having an active cycle during which the tool is being used to planarize a substrate, and a rinse cycle during which the tool is being rinsed. The method comprises (a) receiving a feed stream from the CMP tool, at least a portion of the feed stream comprising abrasive particles disposed in a liquid medium; (b) during at least a portion of the rinse cycle, sending the feedstream received from the CMP tool to a first location; and (c) during at least a portion of the active cycle, sending the feedstream received from the CMP tool to a second location where the feedstream undergoes processing to reformulate the slurry.
    Type: Grant
    Filed: January 20, 2011
    Date of Patent: October 15, 2013
    Assignee: Environmental Process Solutions, Inc.
    Inventors: Shaun C. Bosar, Martin Boehm, Robert Edward Johnston
  • Patent number: 8557133
    Abstract: Slurry compositions and chemically activated CMP methods for polishing a substrate having a silicon carbide surface using such slurries. In such methods, the silicon carbide surface is contacted with a CMP slurry composition that comprises i) a liquid carrier and ii) a plurality of particles having at least a soft surface portion, wherein the soft surface portion includes a transition metal compound that provides a Mohs hardness ?6, and optionally iii) an oxidizing agent. The oxidizing agent can include a transition metal. The slurry is moved relative to the silicon carbide comprising surface, wherein at least a portion of the silicon carbide surface is removed.
    Type: Grant
    Filed: November 28, 2011
    Date of Patent: October 15, 2013
    Assignees: Sinmat, Inc., University of Florida Research Foundation, Inc.
    Inventors: Rajiv K Singh, Arul C. Arjunan, Dibakar Das, Deepika Singh, Abhudaya Mishra, Tanjore V Jayaraman
  • Patent number: 8557137
    Abstract: The invention provides a chemical-mechanical polishing composition comprising alpha alumina, fumed alumina, silica, an oxidizing agent that oxidizes nickel-phosphorous, oxalic acid, optionally, tartaric acid, optionally, a nonionic surfactant, optionally, a biocide, and water. The invention also provides a method of chemically-mechanically polishing a substrate comprising contacting a substrate with a polishing pad and the chemical-mechanical polishing composition, moving the polishing pad and the polishing composition relative to the substrate, and abrading at least a portion of the substrate to polish the substrate.
    Type: Grant
    Filed: July 11, 2012
    Date of Patent: October 15, 2013
    Assignee: Cabot Microelectronics Corporation
    Inventors: Selvaraj Palanisamy Chinnathambi, Haresh Siriwardane
  • Patent number: 8551350
    Abstract: In one embodiment, a first substrate having a plurality of array regions is prepared. A seal material is formed in each of the array regions. A peripheral seal material is arranged outside the array regions extending in a first direction. The peripheral seal material has an exhaust opening provided at a portion of the peripheral seal material extending in a second direction. A dummy seal material is formed between the peripheral seal material extending in the first direction and the seal material formed in the array region. A second substrate is arranged on a surface of the first substrate in a jig. The inside of the jig is decompressed, and the atmosphere between the first and second substrates is exhausted while applying a pressure to the first and second substrates. Then, the first and second substrates are attached by curing the seal material, the peripheral seal material and the dummy seal material.
    Type: Grant
    Filed: June 8, 2011
    Date of Patent: October 8, 2013
    Assignee: Japan Display Central Inc.
    Inventor: Sumio Miyata
  • Patent number: 8545712
    Abstract: In a method of manufacturing semiconductor wafers, front and back surfaces of the semiconductor wafers are simultaneously polished with a double-side polishing machine that includes: a carrier for accommodating the semiconductor wafer; and an upper press platen and a lower press platen for sandwiching the carrier. The method includes: accommodating the semiconductor wafer in the carrier while a thickness of the semiconductor wafer is set to be larger than a thickness of the carrier by 0 ?m to 5 ?m; and polishing the semiconductor wafer while feeding a polishing slurry to between the surfaces of the semiconductor wafer and surfaces of the press platens. In the polishing, an allowance of both surfaces of the semiconductor wafer is set at 5 ?m or less in total.
    Type: Grant
    Filed: September 11, 2008
    Date of Patent: October 1, 2013
    Assignee: Sumco Techxiv Corporation
    Inventors: Hiroshi Takai, Kenji Satomura, Yuichi Nakayoshi, Katsutoshi Yamamoto, Kouji Mizowaki
  • Patent number: 8546261
    Abstract: A polishing slurry includes an abrasive, a dispersion agent, a polish accelerating agent and an adhesion inhibitor. The adhesion inhibitor includes a benzene compound combined with a carboxyl group. Methods of planarizing an insulating layer using the slurry are also provided.
    Type: Grant
    Filed: February 24, 2011
    Date of Patent: October 1, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sangkyun Kim, NamSoo Kim, JongWoo Kim, Yun-Jeong Kim
  • Patent number: 8540893
    Abstract: A chemical mechanical polishing composition useful for chemical mechanical polishing of a patterned semiconductor wafer containing a nonferrous metal. The chemical mechanical polishing composition comprises an inhibitor for the nonferrous metal; a copolymer of poly(ethylene glycol)methyl ether (meth)acrylate and 1-vinylimidazole; and water.
    Type: Grant
    Filed: August 4, 2008
    Date of Patent: September 24, 2013
    Assignee: Rohm and Haas Electronic Materials CMP Holdings, Inc.
    Inventors: Tirthankar Ghosh, Terence M. Thomas, Hongyu Wang, Scott A. Ibbitson
  • Patent number: 8540894
    Abstract: A polishing composition that can improve polishing property without foaming is provided. A polishing composition includes a pH regulator, a water-soluble polymer compound, and a compound containing an alkylene diamine structure having two nitrogens represented by the following general formula (1), and having at least one block type polyether bonded to the two nitrogens of the alkylene structure, the block type polyether having a bond of an oxyethylene group and an oxypropylene group: where R represents an alkylene group represented by CnH2n, in which n is an integer of 1 or more.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: September 24, 2013
    Assignee: Nitta Haas Incorporated
    Inventors: Takayuki Matsushita, Masashi Teramoto, Haruki Nojo
  • Patent number: 8530353
    Abstract: A method of manufacturing a SiC substrate which has a first principal surface and a second principal surface, includes the step of removing, by a vapor phase etching process, at least a portion of a work-affected layer which is formed by mechanical flattening or cutting on the first principal surface of the SiC substrate.
    Type: Grant
    Filed: June 3, 2011
    Date of Patent: September 10, 2013
    Assignee: Hitachi Metals, Ltd.
    Inventor: Taisuke Hirooka
  • Patent number: 8524096
    Abstract: In one embodiment, a first substrate including first and second array regions are prepared. The first and second array regions respectively include first and second active areas. A peripheral seal material having an air intake opening is arranged outside the first and second array regions. A second substrate is arranged on the surface of the first substrate in which the first and second seal materials and peripheral seal material are formed in a vacuum chamber under vacuum state. Atmosphere is introduced into the vacuum chamber and a space between the first and second seal materials from the air intake opening. Then, a pressure is applied to the first and second substrates by pressure difference between the atmospheric pressure of circumference which surrounds the first substrate and second substrate, and the atmospheric pressure of the space between the first substrate and second substrate.
    Type: Grant
    Filed: June 8, 2011
    Date of Patent: September 3, 2013
    Assignee: Japan Display Central Inc.
    Inventor: Sumio Miyata
  • Patent number: 8518297
    Abstract: The present invention provides a polishing composition that can be suitably used in polishing of polysilicon, and a polishing method using the polishing composition. The polishing composition contains abrasive grains and an anionic surfactant having a monooxyethylene group or a polyoxyethylene group and has a pH of 9 to 12. If the anionic surfactant contained in the polishing composition has a polyoxyethylene group, the number of repeating oxyethylene units in the polyoxyethylene group is preferably 2 to 8. The anionic surfactant contained in the polishing composition can be an anionic surfactant that has a phosphate group, a carboxy group, or a sulfo group as well as a monooxyethylene group or a polyoxyethylene group. The content of the anionic surfactant in the polishing composition is preferably 20 to 500 ppm.
    Type: Grant
    Filed: January 30, 2009
    Date of Patent: August 27, 2013
    Assignee: Fujimi Incorporated
    Inventors: Mikikazu Shimizu, Tomohiko Akatsuka, Kazuya Sumita
  • Patent number: 8513141
    Abstract: The present invention provides an etching solution for revealing defects in a germanium layer, a method for revealing defects in a germanium layer using such an etching solution and to a method for making such an etching solution. The etching solution according to embodiments of the present invention is able to exhibit an etch rate of between 4 nm·min?1 and 450 nm·min?1, which makes it suitable to be used for revealing defects in a thin layer of germanium, i.e. in a layer of germanium with a thickness of between 20 nm and 10 ?m, for example between 20 nm and 2 ?m, between 20 nm and 1 ?m or between 20 nm and 200 nm.
    Type: Grant
    Filed: October 18, 2011
    Date of Patent: August 20, 2013
    Assignee: IMEC
    Inventors: Laurent Souriau, Valentina Terzieva
  • Patent number: 8513128
    Abstract: A poly opening polish process includes the following steps. A semi-finished semiconductor component is provided. The semi-finished semiconductor component includes a substrate, a gate disposed on the substrate, and a dielectric layer disposed on the substrate and covering the gate. A first polishing process is applied onto the dielectric layer. A second polishing process is applied to the gate. The second polishing process utilizes a wetting solution including a water soluble polymer surfactant, an alkaline compound and water. The poly opening polish process can effectively remove an oxide residue formed in the chemical mechanical polish, thereby improving the performance of the integrated circuit and reducing the production cost of the integrated circuit.
    Type: Grant
    Filed: June 17, 2011
    Date of Patent: August 20, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Chun-Wei Hsu, Po-Cheng Huang, Teng-Chun Tsai, Chia-Lin Hsu, Chih-Hsun Lin, Chang-Hung Kung, Chia-His Chen, Yen-Ming Chen
  • Patent number: 8506359
    Abstract: A chemical mechanical polishing aqueous dispersion including (A) silica particles, and (B1) an organic acid, the sodium content, the potassium content, and the ammonium ion content of the silica particles (A) determined by ICP atomic emission spectrometry, ICP mass spectrometry, or ammonium ion quantitative analysis using ion chromatography having a relationship in which the sodium content is 5 to 500 ppm and at least one of the potassium content and the ammonium ion content is 100 to 20,000 ppm.
    Type: Grant
    Filed: January 16, 2009
    Date of Patent: August 13, 2013
    Assignee: JSR Corporation
    Inventors: Hirotaka Shida, Takafumi Shimizu, Masatoshi Ikeda, Shou Kubouchi, Yousuke Shibata, Kazuhito Uchikura, Akihiro Takemura
  • Patent number: 8507383
    Abstract: Methods for polishing multiple dielectric layers to form replacement metal gate structures include a first chemical mechanical polish step to remove overburden and planarize a top layer to leave a planarized thickness over a gate structure. A second chemical mechanical polish step includes removal of the thickness to expose an underlying covered surface of a dielectric of the gate structure with a slurry configured to polish the top layer and the underlying covered surface substantially equally to accomplish a planar topography. A third chemical mechanical polish step is employed to remove the dielectric of the gate structure and expose a gate conductor.
    Type: Grant
    Filed: January 25, 2011
    Date of Patent: August 13, 2013
    Assignees: International Business Machines Corporation, JRS Corporation
    Inventors: Takashi Ando, Leslie Charns, Jason E. Cummings, Lukasz J. Hupka, Dinesh R. Koli, Tomohisa Konno, Mahadevaiyer Krishnan, Michael F. Lofaro, Jakub W. Nalaskowski, Masahiro Noda, Dinesh K. Penigalapati, Tatsuya Yamanaka
  • Patent number: 8501027
    Abstract: A polishing composition includes more than 0.1% by mass of colloidal silica, and water, and has a pH of 6 or less. The polishing composition has the ability to polish a titanium material at a high stock removal rate. Thus, the polishing composition is suitable for use in applications for polishing a titanium-containing object.
    Type: Grant
    Filed: January 4, 2008
    Date of Patent: August 6, 2013
    Assignee: Fujimi Incorporated
    Inventors: Chiyo Horikawa, Koji Ohno, Kazusei Tamai
  • Patent number: 8500517
    Abstract: A synthetic quartz glass substrate is prepared by (1) polishing a synthetic quartz glass substrate with a polishing slurry comprising colloidal particles, an ionic organic compound having an electric charge of the same type as the colloidal particles, and water, and (2) immersing the polished substrate in an acidic or basic solution for etching the substrate surface to a depth of 0.001-1 nm. The method produces a synthetic quartz glass substrate while preventing formation of defects of a size that is detectable by the high-sensitivity defect inspection tool, and providing the substrate with a satisfactory surface roughness.
    Type: Grant
    Filed: December 13, 2010
    Date of Patent: August 6, 2013
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Daijitsu Harada, Masaki Takeuchi
  • Patent number: 8501028
    Abstract: A method for processing a semiconductor wafer includes bringing at least one grinding tool in contact with the semiconductor wafer; removing material from the semiconductor wafer using the grinding tool; disposing a liquid medium having a viscosity of at least 3×10?3 N/m2·s and at most 100×10?3 N/m2·s between the at least one grinding tool and the semiconductor wafer; and separating the at least one grinding tool and the semiconductor wafer so as to end the processing.
    Type: Grant
    Filed: September 30, 2010
    Date of Patent: August 6, 2013
    Assignee: Siltronic AG
    Inventor: Juergen Schwandner
  • Patent number: 8496843
    Abstract: A method for chemical mechanical polishing of a substrate is provided, comprising: providing a substrate, wherein the substrate comprises polysilicon and at least one of silicon oxide and silicon nitride; providing a chemical mechanical polishing composition, comprising, as initial components: water; an abrasive; and an alkyl aryl polyether sulfonate compound, wherein the alkyl aryl polyether sulfonate compound has a hydrophobic portion having an alkyl group bound to an aryl ring and a nonionic acyclic hydrophilic portion having 4 to 100 carbon atoms; providing a chemical mechanical polishing pad with a polishing surface; moving the polishing surface relative to the substrate; dispensing the chemical mechanical polishing composition onto the polishing surface; and, abrading at least a portion of the substrate to polish the substrate; wherein at least some of the polysilicon is removed from the substrate; and, wherein at least some of the at least one of silicon oxide and silicon nitride is removed from the su
    Type: Grant
    Filed: March 16, 2010
    Date of Patent: July 30, 2013
    Assignee: Rohm and Haas Electronic Materials CMP Holdings, Inc.
    Inventors: Yi Guo, Zhendong Liu, Kancharla-Arun Kumar Reddy, Guangyun Zhang
  • Patent number: 8492277
    Abstract: A method for chemical mechanical polishing of a substrate is provided, comprising: providing a substrate, wherein the substrate comprises polysilicon and at least one of silicon oxide and silicon nitride; providing a chemical mechanical polishing composition, comprising, as initial components: water; an abrasive; and an acyclic organosulfonic acid compound, wherein the acyclic organosulfonic acid compound has an acyclic hydrophobic portion having 6 to 30 carbon atoms and a nonionic acyclic hydrophilic portion having 10 to 300 carbon atoms; providing a chemical mechanical polishing pad with a polishing surface; moving the polishing surface relative to the substrate; dispensing the chemical mechanical polishing composition onto the polishing surface; and, abrading at least a portion of the substrate to polish the substrate; wherein at least some of the polysilicon is removed from the substrate; and, wherein at least some of the at least one of silicon oxide and silicon nitride is removed from the substrate.
    Type: Grant
    Filed: March 16, 2010
    Date of Patent: July 23, 2013
    Assignee: Rohm and Haas Electronic Materials CMP Holdings, Inc
    Inventors: Yi Guo, Zhendong Liu, Kancharla-Arun Kumar Reddy, Guangyun Zhang
  • Patent number: 8491806
    Abstract: The invention is directed to a chemical-mechanical polishing formulation that includes: an abrasive particulate component; iodic acid; and water. The invention is also directed to a method for polishing a metal-containing substrate, the method including the steps of polishing the metal-containing substrate with a polishing pad at a suitable polishing pressure while the metal-containing substrate is in contact with the above polishing formulation.
    Type: Grant
    Filed: January 12, 2010
    Date of Patent: July 23, 2013
    Assignee: International Business Machines Corporation
    Inventors: James A. Hagan, James Hannah
  • Patent number: 8491801
    Abstract: A method and system provides a near-field transducer (NFT) for an energy assisted magnetic recording (EAMR) transducer. The method and system include forming a sacrificial NFT structure having a shape a location corresponding to the NFT. A dielectric layer is deposited. A portion of the dielectric layer resides on the sacrificial NFT structure. At least this portion of the dielectric layer on the sacrificial structure is removed. The sacrificial NFT structure is removed, exposing an NFT trench in the dielectric layer. At least one conductive layer for the NFT is deposited. A first portion of the conductive layer(s) reside in the NFT trench. A second portion of the conductive layer(s) external to the NFT trench is removed to form the NFT.
    Type: Grant
    Filed: November 8, 2011
    Date of Patent: July 23, 2013
    Assignee: Western Digital (Fremont), LLC
    Inventors: Shawn M. Tanner, Yufeng Hu, Ut Tran, Zhongyan Wang
  • Patent number: 8492276
    Abstract: A chemical mechanical polishing aqueous dispersion is used to polish a polishing target that includes an interconnect layer that contains tungsten. The chemical mechanical polishing aqueous dispersion includes: (A) a cationic water-soluble polymer; (B) an iron (III) compound; and (C) colloidal silica particles. The content (MA) (mass %) of the cationic water-soluble polymer (A) and the content (MB) (mass %) of the iron (III) compound (B) satisfy the relationship “MA/MB=0.004 to 0.1”. The chemical mechanical polishing aqueous dispersion has a pH of 1 to 3.
    Type: Grant
    Filed: August 7, 2009
    Date of Patent: July 23, 2013
    Assignees: JSR Corporation, Kabushiki Kaisha Toshiba
    Inventors: Taichi Abe, Hirotaka Shida, Akihiro Takemura, Mitsuru Meno, Shinichi Hirasawa, Kenji Iwade, Takeshi Nishioka
  • Patent number: 8491808
    Abstract: A method for chemical mechanical polishing of a substrate is provided, comprising: providing a substrate, wherein the substrate comprises polysilicon, silicon oxide and silicon nitride; providing a chemical mechanical polishing composition, comprising, as initial components: water; an abrasive; an alkyl aryl polyether sulfonate compound, wherein the alkyl aryl polyether sulfonate compound has a hydrophobic portion having an alkyl group bound to an aryl ring and a nonionic acyclic hydrophilic portion having 4 to 100 carbon atoms; and a substance according to formula I wherein each of R1, R2, R3, R4, R5, R6 and R7 is a bridging group having a formula —(CH2)n—, wherein n is an integer selected from 1 to 10; providing a chemical mechanical polishing pad with a polishing surface; moving the polishing surface relative to the substrate; dispensing the chemical mechanical polishing composition onto the polishing surface; and, abrading at least a portion of the substrate to polish the substrate; wherein at least s
    Type: Grant
    Filed: March 16, 2010
    Date of Patent: July 23, 2013
    Assignee: Rohm and Haas Electronic Materials CMP Holdings, Inc.
    Inventors: Yi Guo, Zhendong Liu, Kancharla-Arun Kumar Reddy, Guangyun Zhang
  • Patent number: 8491807
    Abstract: An abrasive liquid for a metal comprising (1) an oxidizing agent for a metal, (2) a dissolving agent for an oxidized metal, (3) a first protecting film-forming agent such as an amino acid or an azole which adsorbs physically on the surface of the metal and/or forms a chemical bond, to thereby form a protecting film, (4) a second protecting film-forming agent such as polyacrylic acid, polyamido acid or a salt thereof which assists the first protecting film-forming agent in forming a protecting film and (5) water; and a method for polishing.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: July 23, 2013
    Assignees: Hitachi Chemical Company, Ltd., Hitachi, Ltd.
    Inventors: Takeshi Uchida, Jun Matsuzawa, Tetsuya Hoshino, Yasuo Kamigata, Hiroki Terazaki, Yoshio Honma, Seiichi Kondoh
  • Patent number: 8491799
    Abstract: A method for forming a magnetic tunnel junction cell includes forming a pinning layer, a pinned layer, a dielectric layer and a free layer over a first electrode, forming a second electrode on the free layer, etching the free layer and the dielectric layer using the second electrode as an etch barrier to form a first pattern, forming a prevention layer on a sidewall of the first pattern, and etching the pinned layer and the pinning layer using the second electrode and the prevention layer as an etch barrier to form a second pattern.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: July 23, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventor: Jin-Ki Jung
  • Patent number: 8481428
    Abstract: The present invention relates to polishing slurry and polishing method used for polishing in a process for forming wirings of a semiconductor device, and the like. There are provided polishing slurry giving a polished surface having high flatness even if the polished surface is made of two or more substances, and further, capable of suppressing metal residue and scratches after polishing, and a method of chemical mechanical polishing using this. The polishing slurry of the present invention is polishing slurry containing at least one of a surfactant and an organic solvent, and a metal oxide dissolving agent and water, or polishing slurry containing water and abrasive of which surface has been modified with an alkyl group, and preferably, it further contains a metal oxidizer, water-soluble polymer, and metal inhibitor.
    Type: Grant
    Filed: November 18, 2011
    Date of Patent: July 9, 2013
    Assignee: Hitachi Chemical Co., Ltd.
    Inventors: Jin Amanokura, Takafumi Sakurada, Sou Anzai, Masato Fukasawa, Shouichi Sasaki
  • Patent number: 8480920
    Abstract: A chemical mechanical polishing aqueous dispersion that is used to polish a polishing target that includes a wiring layer that contains tungsten, the chemical mechanical polishing aqueous dispersion including: (A) a cationic water-soluble polymer; (B) an iron (III) compound; and (C) colloidal silica having an average particle diameter calculated from a specific surface area determined by the BET method of 10 to 60 nm, the content (MA) (mass %) of the cationic water-soluble polymer (A) and the content (MC) (mass %) of the colloidal silica (C) satisfying the relationship “MA/MC=0.0001 to 0.003”, and the chemical mechanical polishing aqueous dispersion having a pH of 1 to 3.
    Type: Grant
    Filed: March 30, 2010
    Date of Patent: July 9, 2013
    Assignee: JSR Corporation
    Inventors: Hirotaka Shida, Akihiro Takemura, Taichi Abe
  • Patent number: 8454852
    Abstract: The invention is directed to a chamfering apparatus for a silicon wafer to chamfer outer edge of a silicon wafer by using a chamfering grindstone, the chamfering apparatus including at least: a holder holding and rotating a silicon wafer; a chamfering grindstone chamfering the outer edge of the silicon wafer held by the holder; and a control apparatus for controlling a chamfered shape by controlling a relative position of the outer edge of the silicon wafer and the chamfering grindstone by numerical control, wherein the control apparatus controls and changes the relative position of the outer edge of the silicon wafer and the chamfering grindstone at the time of chamfering depending on the circumferential position of the silicon wafer held by the holder, a production method, and an etched silicon wafer.
    Type: Grant
    Filed: January 17, 2008
    Date of Patent: June 4, 2013
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventor: Tadahiro Kato
  • Patent number: 8455367
    Abstract: In an independent GaN film manufactured by creating a GaN layer on a base heterosubstrate using vapor-phase deposition and then removing the base substrate, owing to layer-base discrepancy in thermal expansion coefficient and lattice constant, bow will be a large ±40 ?m to ±100 ?m. Since with that bow device fabrication by photolithography is challenging, reducing the bow to +30 ?m to ?20 ?m is the goal. The surface deflected concavely is ground to impart to it a damaged layer that has a stretching effect, making the surface become convex. The damaged layer on the surface having become convex is removed by etching, which curtails the bow. Alternatively, the convex surface on the side opposite the surface having become convex is ground to generate a damaged layer. With the concave surface having become convex due to the damaged layer, suitably etching off the damaged layer curtails the bow.
    Type: Grant
    Filed: July 28, 2011
    Date of Patent: June 4, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Naoki Matsumoto