Etchant Contains Solid Particle (e.g., Abrasive For Polishing, Etc.) Patents (Class 216/89)
  • Patent number: 8071479
    Abstract: A method for chemical mechanical polishing of a substrate comprising a barrier material in the presence of at least one of an interconnect metal and a low-k dielectric material using a chemical mechanical polishing composition comprising water; 1 to 40 wt % abrasive having an average particle size of ?100 nm; 0.001 to 5 wt % quaternary compound; a material having a formula (I): wherein R is selected from C2-C20 alkyl, C2-C20 aryl, C2-C20 aralkyl and C2-C20 alkaryl; wherein x is an integer from 0 to 20; wherein y is an integer from 0 to 20; wherein x+y?1; and, wherein the chemical mechanical polishing composition has a pH?5.
    Type: Grant
    Filed: December 11, 2008
    Date of Patent: December 6, 2011
    Assignee: Rohm and Haas Electronic Materials CMP Holdings, Inc.
    Inventor: Zhendong Liu
  • Patent number: 8066892
    Abstract: A method for manufacturing a write pole for a perpendicular magnetic write head. The method employs a damascene process to construct the write pole with a very accurately controlled track width. The method includes depositing a layer of material that can be readily removed by reactive ion etching. This material can be referred to as a RIEable material. A mask is formed over the RIEable material and a reactive ion etching is performed to form a tapered trench in the RIEAble material. A CMP stop layer can the be deposited, and a write pole plated into the trench. A CMP can then be performed to define the trailing edge of the write pole. Another masking, etching and plating step can be performed to form a trailing, wrap-around magnetic shield.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: November 29, 2011
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Hung-Chin Guthrie, Yimin Hsu, Ming Jiang, Sue Siyang Zhang
  • Patent number: 8057696
    Abstract: This invention relates to compositions and methods for removing overfilled substrates, preferably at a relatively high removal rates. Advantageously, a composition according to the invention can contain an oxidizer, preferably a per-type oxidizer such as a peroxide, periodic acid, and peracetic acid, and may also optionally contain an abrasive.
    Type: Grant
    Filed: August 29, 2008
    Date of Patent: November 15, 2011
    Assignee: DuPont Air Products NanoMaterials LLC
    Inventors: Philippe H. Chelle, Robert J. Small
  • Patent number: 8048330
    Abstract: By providing an interlayer dielectric material with different removal rates, a desired minimum material height above gate electrode structures of sophisticated transistor devices of the 65 nm technology or 45 nm technology may be obtained. The reduced removal rate above the gate electrode may thus provide enhanced process robustness during the planarization of the interlayer dielectric layer stack prior to the formation of contact elements.
    Type: Grant
    Filed: May 28, 2008
    Date of Patent: November 1, 2011
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Ralf Richter, Thomas Foltyn, Anthony Mowry
  • Patent number: 8029687
    Abstract: The present invention provides a low-cost polishing slurry having excellent effect with respect to defects and smoothness of the surface to be polished. The polishing slurry comprises a silica abrasive and a ceria abrasive, wherein the silica abrasive content is less than 3 mass % and the ceria abrasive content is less than 1 mass %, based on the entire polishing slurry. Further, the present invention provides a method for producing a crystallized glass substrate for an information recording medium, wherein the method use a polishing slurry of the present invention. Furthermore, the present invention provides a method for producing an information recording medium, comprising forming a recording layer on a crystallized glass substrate for an information recording medium obtained by the present method.
    Type: Grant
    Filed: August 29, 2005
    Date of Patent: October 4, 2011
    Assignee: Showa Denko K.K.
    Inventors: Katsuaki Aida, Hiroyuki Machida, Kazuyuki Haneda
  • Patent number: 8030209
    Abstract: During the formation of metallization layers of sophisticated semiconductor devices, the damaging of sensitive dielectric materials, such as ULK materials, may be significantly reduced during a CMP process by applying a compressive stress level. This may be accomplished, in some illustrative embodiments, by forming a compressively stressed cap layer on the ULK material, thereby suppressing the propagation of micro cracks into the ULK material.
    Type: Grant
    Filed: July 22, 2009
    Date of Patent: October 4, 2011
    Assignee: GLOBALFOUNDDRIES Inc.
    Inventors: Thomas Werner, Kai Frohberg, Frank Feustel
  • Patent number: 8025808
    Abstract: A method for machining a ceramic substrate containing Al, including providing a solution containing a phosphorus compound on the ceramic substrate; and machining the substrate with an abrasive.
    Type: Grant
    Filed: December 10, 2007
    Date of Patent: September 27, 2011
    Assignee: Saint-Gobain Ceramics & Plastics, Inc.
    Inventors: Ronald W. Laconto, Douglas E. Ward
  • Patent number: 8025759
    Abstract: A polishing apparatus has a polishing section (302) configured to polish a substrate and a measurement section (307) configured to measure a thickness of a film formed on the substrate. The polishing apparatus also has an interface (310) configured to input a desired thickness of a film formed on a substrate to be polished and a storage device (308a) configured to store polishing rate data on at least one past substrate therein. The polishing apparatus includes an arithmetic unit (308b) operable to calculate a polishing rate and an optimal polishing time based on the polishing rate data and the desired thickness by using a weighted average method which weights the polishing rate data on a lately polished substrate.
    Type: Grant
    Filed: July 1, 2004
    Date of Patent: September 27, 2011
    Assignee: Ebara Corporation
    Inventors: Tatsuya Sasaki, Naoshi Yamada, Yoshifumi Katsumata, Noburu Shimizu, Seiryo Tsuno, Takashi Mitsuya
  • Patent number: 8025809
    Abstract: A chemical-mechanical polishing (CMP) method includes applying a solid abrasive material to a substrate, polishing the substrate, flocculating at least a portion of the abrasive material, and removing at least a majority portion of the flocculated portion from the substrate. Applying solid abrasive material can include applying a CMP slurry or a polishing pad comprising abrasive material. Such a method can further include applying a surfactant comprising material to the substrate to assist in effectuating flocculation of the abrasive material to the surfactant comprising material may be cationic which includes, for example, a quaternary ammonium substituted salt. Also, for example, the surfactant comprising material may be applied during polishing, brush scrubbing, pressure spraying or buffing.
    Type: Grant
    Filed: July 21, 2008
    Date of Patent: September 27, 2011
    Assignee: Micron Technology, Inc.
    Inventor: Michael T. Andreas
  • Patent number: 7998358
    Abstract: A polishing system receives one or more target parameters for a selected peak in a spectrum of light, polishes a substrate, measures a current spectrum of light reflected from the substrate while the substrate is being polished, identifies the selected peak in the current spectrum, measures one or more current parameters of the selected peak in the current spectrum, compares the current parameters of the selected peak to the target parameters, and ceases to polish the substrate when the current parameters and the target parameters have a pre defined relationship.
    Type: Grant
    Filed: October 31, 2006
    Date of Patent: August 16, 2011
    Assignee: Applied Materials, Inc.
    Inventors: Dominic J. Benvegnu, Bogdan Swedek, David J. Lischka
  • Patent number: 7994058
    Abstract: The present invention relates to polishing slurry and polishing method used for polishing in a process for forming wirings of a semiconductor device, and the like. There are provided polishing slurry giving a polished surface having high flatness even if the polished surface is made of two or more substances, and further, capable of suppressing metal residue and scratches after polishing, and a method of chemical mechanical polishing using this. The polishing slurry of the present invention is polishing slurry containing at least one of a surfactant and an organic solvent, and a metal oxide dissolving agent and water, or polishing slurry containing water and abrasive, wherein the surface of the abrasive is modified with an alkyl group, and preferably, it further contains a metal oxidizer, water-soluble polymer, and metal inhibitor.
    Type: Grant
    Filed: May 25, 2007
    Date of Patent: August 9, 2011
    Assignee: Hitachi Chemical Co., Ltd.
    Inventors: Jin Amanokura, Takafumi Sakurada, Sou Anzai, Masato Fukasawa, Shouichi Sasaki
  • Patent number: 7989348
    Abstract: A polishing method that carries out a multi-step polishing process with improved polishing conditions (polishing recipe) while omitting measurement of the surface conditions of a substrate, as carried out between polishing steps thereby increasing the throughput.
    Type: Grant
    Filed: August 23, 2006
    Date of Patent: August 2, 2011
    Assignee: Ebara Corporation
    Inventors: Kuniaki Yamaguchi, Tsuneo Torikoshi
  • Patent number: 7955517
    Abstract: To provide a polishing composition capable of increasing polishing rate and reducing surface roughness, without causing surface defects on a surface of an object to be polished; and a polishing process for a substrate to be polished. [1] a polishing composition comprising water, an abrasive, an intermediate alumina, and a polycarboxylic acid having 4 or more carbon atoms with no OH groups or a salt thereof, wherein a content of the intermediate alumina is from 1 to 90 parts by weight, based on 100 parts by weight of the abrasive; and [2] a polishing process for a substrate to be polished, comprising polishing a substrate to be polished under conditions that a composition of a polishing liquid during polishing is the composition as defined in item [1] above.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: June 7, 2011
    Assignee: Kao Corporation
    Inventors: Shigeo Fujii, Yoshiaki Oshima, Koichi Naito
  • Patent number: 7947604
    Abstract: The present invention relates to the reduction or complete prevention of Cu corrosion during a planarization or polishing process. In one aspect of the invention, RF signal is used to establish a negative bias in front of the wafer surface following polishing to eliminate Cu+ or Cu2+ migrations. In another aspect of the invention, a DC Voltage power supply is used to establish the negative bias.
    Type: Grant
    Filed: January 25, 2008
    Date of Patent: May 24, 2011
    Assignee: Chartered Semiconductor Manufacturing, Ltd.
    Inventors: Fan Zhang, Lup San Leong, Yong Kong Siew, Bei Chao Zhang
  • Patent number: 7919006
    Abstract: A method for making a MEMS structure comprises patterning recesses in a dielectric layer overlying a substrate, each recess being disposed between adjacent mesas of dielectric material. A conformal layer of semiconductor material is formed overlying the recesses and mesas. The conformal layer is chemical mechanically polished to form a chemical mechanical polished surface, wherein the chemical mechanical polishing is sufficient to create dished portions of semiconductor material within the plurality of recesses. Each dished portion has a depth proximate a central portion thereof that is less than a thickness of the semiconductor material proximate an outer portion thereof. A semiconductor wafer is then bonded to the chemical mechanical polished surface. The bonded semiconductor wafer is patterned with openings according to the requirements of a desired MEMS transducer. Lastly, the MEMS transducer is released.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: April 5, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Woo Tae Park, Hemant D. Desai
  • Patent number: 7914694
    Abstract: A semiconductor wafer handler comprises a ring (70) attached to a hub (80) by a plurality of spokes (90). Vacuum is applied to the surface of the semiconductor wafer through orifices (100) containing in the ring (70). Water and/or nitrogen can be applied to the surface of the semiconductor wafer through orifices (110) contained in the spokes (90).
    Type: Grant
    Filed: October 26, 2007
    Date of Patent: March 29, 2011
    Assignee: Texas Instruments Incorporated
    Inventors: Christopher L. Schutte, George T. Wallace
  • Patent number: 7906038
    Abstract: An aqueous polishing liquid is provided that includes an oxidizing agent, a five-membered monocyclic compound having at least three nitrogen atoms or a compound in which a hetero ring is fused to said compound, and a compound having an imidazole skeleton or an isothiazolin-3-one skeleton. The five-membered monocyclic compound having at least three nitrogen atoms and/or the compound in which a hetero ring is fused to said compound is used at a total concentration of less than 300 mg/L, and the compound having an imidazole skeleton or an isothiazolin-3-one skeleton is used at a concentration of at least 10 mg/L but no greater than 500 mg/L. There is also provided a chemical mechanical polishing method that includes a step of polishing by making a surface to be polished and a polishing surface move relative to each other while being in contact with each other in the presence of the aqueous polishing liquid.
    Type: Grant
    Filed: September 25, 2006
    Date of Patent: March 15, 2011
    Assignee: FUJIFILM Corporation
    Inventor: Tomo Kato
  • Patent number: 7871931
    Abstract: The present invention provides a method for planarizing a metal layer, and a method for manufacturing a micro pixel array. The method for planarizing the metal layer, without limitation, may include the steps of forming a metal layer over a photoresist layer, and then planarizing the metal layer using a chemical mechanical planarization process.
    Type: Grant
    Filed: September 20, 2005
    Date of Patent: January 18, 2011
    Assignee: Texas Instruments Incorporated
    Inventors: Anthony DiCarlo, Jingqiu Chen, Yanghua He, James C. Baker, David A. Rothenbury
  • Patent number: 7857986
    Abstract: A chemical mechanical polishing (CMP) slurry and a chemical mechanical polishing (CMP) apparatus and method reduce defects, such as scratches, while maintaining a high polishing rate of a target film to be polished through a CMP process. The CMP slurry includes a ceria-based abrasive having a concentration of 0.001-10 percent by weight and a silica-based abrasive having a concentration of 1-24 percent by weight.
    Type: Grant
    Filed: June 7, 2007
    Date of Patent: December 28, 2010
    Assignee: Hynix Semiconductor Inc.
    Inventors: Suk Jung Ma, Ju Young Lee, Chang Gyu Kim
  • Patent number: 7857985
    Abstract: The invention provides a metal polishing liquid comprising an oxidizing agent and colloidal silica in which a part of a surface of the colloidal silica is covered with aluminum atoms, and a Chemical Mechanical Polishing method using the same. An amino acid, a compound having an isothiazoline-3-one skeleton, an organic acid, a passivated film forming agent, a cationic surfactant, a nonionic surfactant, and a water-soluble polymer may be contained. A metal polishing liquid which is used in Chemical Mechanical Polishing in manufacturing of a semiconductor device, attains low dishing of a subject to be polished, and can perform polishing excellent in in-plane uniformity of a surface to be polished.
    Type: Grant
    Filed: January 30, 2007
    Date of Patent: December 28, 2010
    Assignee: Fujifilm Corporation
    Inventors: Katsuhiro Yamashita, Kenji Takenouchi, Tomoo Kato, Yoshinori Nishiwaki, Mihoko Ishima
  • Publication number: 20100308016
    Abstract: The invention provides a chemical-mechanical polishing composition comprising alpha alumina, fumed alumina, silica, an oxidizing agent that oxidizes nickel-phosphorous, a complexing agent, and water. The invention also provides a method of chemically-mechanically polishing a substrate comprising contacting a substrate with a polishing pad and the chemical-mechanical polishing composition, moving the polishing pad and the polishing composition relative to the substrate, and abrading at least a portion of the substrate to polish the substrate.
    Type: Application
    Filed: June 4, 2009
    Publication date: December 9, 2010
    Inventors: Selvaraj Palanisamy Chinnathambi, Haresh Siriwardane
  • Patent number: 7846842
    Abstract: The invention provides a chemical-mechanical polishing composition comprising a cationic abrasive, a cationic polymer, a carboxylic acid, and water. The invention further provides a method of chemically-mechanically polishing a substrate with the aforementioned polishing composition. The polishing composition exhibits selectivity for removal of silicon nitride over removal of silicon oxide.
    Type: Grant
    Filed: February 2, 2009
    Date of Patent: December 7, 2010
    Assignee: Cabot Microelectronics Corporation
    Inventors: Phillip W. Carter, Timothy Johns
  • Patent number: 7842614
    Abstract: A method for manufacturing a semiconductor device, including depositing an interconnect material including Cu or Cu alloy over an insulating film, and polishing the interconnect material by CMP with a polishing liquid, wherein the oxidation-reduction potential (ORP) of the polishing liquid is controlled so as to be in the range of 400 mV to 700 mV vs. Ag/AgCl.
    Type: Grant
    Filed: January 3, 2008
    Date of Patent: November 30, 2010
    Assignee: Fujitsu Limited
    Inventors: Tsuyoshi Kanki, Takahiro Kimura, Tetsuya Shirasu
  • Patent number: 7841069
    Abstract: A method of manufacturing thin closure magnetic read/write heads, such as magnetic tape heads is provided. The method provides improved flexural strength of the closure so that the closure breakage during fabrication of the heads is mitigated and closure thickness is reduced. An array of chips is fabricated on a wafer. The array is closed, with a closure strip bonded to each row of the array. Closures span only the length of a row, so that the closures are not subjected to flexure during processing and breakage due to flexure is mitigated. Side bars are bonded to the array to form a column with dimensions similar to prior art columns. This allows columns manufactured by the invention to undergo additional processing using existing processes.
    Type: Grant
    Filed: August 30, 2007
    Date of Patent: November 30, 2010
    Assignee: International Business Machines Corporation
    Inventors: Robert G. Biskeborn, Calvin S. Lo
  • Patent number: 7837890
    Abstract: The present invention relates to a novel printable etching medium having non-Newtonian flow behavior for the etching of surfaces in the production of solar cells and to the use thereof. In particular, the invention relates to corresponding particle-containing compositions by means of which extremely fine structures can be etched very selectively without damaging or attacking adjacent areas.
    Type: Grant
    Filed: December 19, 2005
    Date of Patent: November 23, 2010
    Assignee: Merck Patent GmbH
    Inventors: Werner Stockum, Armin Kuebelbeck, Sylke Klein
  • Patent number: 7833431
    Abstract: An aqueous dispersion for chemical mechanical polishing is provided, which includes water and a resin particle. The resin particles accompany with a projection having a curvature radius ranging from 10 nm to 1.65 ?m on a surface. The maximum length of the resin particles is not more than 5 ?m and is 2.5 to 25 times as large as the curvature radius.
    Type: Grant
    Filed: November 17, 2006
    Date of Patent: November 16, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Gaku Minamihaba, Nobuyuki Kurashima, Dai Fukushima, Yukiteru Matsui, Susumu Yamamoto, Hiroyuki Yano
  • Patent number: 7833435
    Abstract: The invention relates to the use of gluconates in the production of semiconductor wafers, preferably in the polishing of the semiconductor wafers during the production process, and to a polishing agent based on an abrasive substance and/or colloid and a mixture of disuccinates or methylglycine diacetic acid (MGDA) and gluconates.
    Type: Grant
    Filed: February 23, 2007
    Date of Patent: November 16, 2010
    Assignee: Akzo Nobel Chemicals International B.V.
    Inventors: Gabriele Hey, Alessandro Aghina
  • Publication number: 20100270265
    Abstract: A method of adsorbing a nano-structure and an adsorption material using a solid thin film mask, including; depositing the mask over the entire surface of a tip of a probe microscope, grinding the end of the tip having the mask against a solid, thus removing the mask from the end of the tip, depositing a linker molecule layer over the entire surface of the tip the end of which has no mask, immersing the tip having the deposited linker molecule layer in a nano-structure solution, thus adsorbing the nano-structure on the linker molecule, and removing the mask from the tip. The mask is used to prevent deformation of the tip, and the nano-structure and the adsorption material can be deposited only on the end of the tip, regardless of the properties of the nano-structure and the adsorption material and regardless of the surface material of the tip and the properties thereof.
    Type: Application
    Filed: November 18, 2008
    Publication date: October 28, 2010
    Inventors: Seung-Hun Hong, Tae-Kyeong Kim
  • Patent number: 7807064
    Abstract: In one embodiment of the present invention, a halogen-free plasma etch processes is used to define a feature in a multi-layered masking stack including an amorphous carbon layer. In a particular embodiment, oxygen (O2), nitrogen (N2), and carbon monoxide (CO) are utilized to etch the amorphous carbon layer to form a mask capable of producing sub-100 nm features in a substrate film having a reduced line edge roughness value. In another embodiment, the present invention employs an O2 plasma pretreatment preceding the halogen-free amorphous carbon etch to first form an oxidized silicon region in a patterned photoresist layer to increase the selectivity of the amorphous carbon etch relative to a patterned photoresist layer containing unoxidized silicon.
    Type: Grant
    Filed: March 21, 2007
    Date of Patent: October 5, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Jong Mun Kim, Judy Wang, Ajey M. Joshi, Jingbao Liu, Bryan Y. Pu
  • Patent number: 7807580
    Abstract: A method of replacing a top oxide around a storage element of a memory device is provided. The method can involve removing a core first poly and core first top oxide in a core region while not removing a periphery first poly in a periphery region on a semiconductor substrate; forming a second top oxide around a storage element in the core region and on the periphery first poly in the periphery region; forming a second poly over the semiconductor substrate in both the core and periphery regions; removing the second poly and second top oxide in the periphery region; and forming a third poly on the semiconductor substrate in both the core and periphery regions.
    Type: Grant
    Filed: April 30, 2007
    Date of Patent: October 5, 2010
    Assignee: Spansion LLC
    Inventors: Chungho Lee, Huaqiang Wu, Wai Lo, Hiroyuki Kinoshita
  • Patent number: 7799688
    Abstract: A polishing slurry comprises a metal-oxidizing agent, a metal anticorrosive agent, an oxidized metal dissolving agent and water. The oxidized metal dissolving agent is at least one kind selected from the group consisting of an acid in which the negative value of the logarithm of the dissociation constant Ka (pKa) of a first dissociable acid group is 3.5 or more, an ammonium salt of the acid and an organic acid ester of the acid. The pH of the polishing slurry is within the range of 3 to 4. The concentration of the metal-oxidizing agent is within the range of 0.01 to 3 percent by weight. In the wiring-formation process of the semiconductor device, the conductor used for the barrier layer can be polished at a high polishing rate by using the polishing slurry having the low polishing particle concentration and the low metal anticorrosive agent concentration.
    Type: Grant
    Filed: May 29, 2003
    Date of Patent: September 21, 2010
    Assignee: Hitachi Chemical Co., Ltd.
    Inventors: Yasushi Kurata, Yasuo Kamigata, Sou Anzai, Hiroki Terazaki
  • Patent number: 7790046
    Abstract: A method of texturing a surface of a magnetic hard disk substrate includes the steps of rotating the magnetic hard disk substrate, supplying polishing slurry on the surface of the substrate, and pressing a polishing tape on the substrate surface and running the polishing tape. The polishing slurry includes abrading particles of monocrystalline diamond that are cluster particles with corners having diameters in the range of 1-10 nm, dispersed in a dispersant such as water and a water-based aqueous solution. The cluster particles are tasseled assemblies of crystalline particles with no directionality.
    Type: Grant
    Filed: May 31, 2007
    Date of Patent: September 7, 2010
    Assignee: NIHON Micro Coating Co., Ltd.
    Inventors: Yuji Horie, Hiromitsu Okuyama, Tatsuya Tanifuji
  • Patent number: 7785487
    Abstract: The aqueous slurry is useful for chemical mechanical polishing semiconductor substrates having copper interconnects. The aqueous slurry includes by weight percent, 0.01 to 25 oxidizing agent, 0.1 to 50 abrasive particles, 0.001 to 3 polyvinyl pyrrolidone, 0.01 to 10 inhibitor for decreasing static etch of the copper interconnects, 0.001 to 5 phosphorus-containing compound for increasing removal rate of the copper interconnects, 0.001 to 10 complexing agent formed during polishing and balance water; and the aqueous slurry has a pH of at least 8.
    Type: Grant
    Filed: August 15, 2006
    Date of Patent: August 31, 2010
    Assignee: Rohm and Haas Electronic Materials CMP Holdings, Inc.
    Inventors: Terence M. Thomas, Qianqiu Ye
  • Patent number: 7776228
    Abstract: A catalyst-aided chemical processing method is a novel processing method having a high processing efficiency and suited for processing in a space wavelength range of not less than several tens of ?m. The catalyst-aided chemical processing method comprises: immersing a workpiece in a processing solution in which a halogen-containing molecule is dissolved, said workpiece normally being insoluble in said processing solution; and bringing a platinum, gold or ceramic solid catalyst close to or into contact with a processing surface of the workpiece, thereby processing the workpiece through dissolution in the processing solution of a halogenide produced by chemical reaction between a halogen radical generated at the surface of the catalyst and a surface atom of the workpiece.
    Type: Grant
    Filed: April 11, 2006
    Date of Patent: August 17, 2010
    Assignee: Ebara Corporation
    Inventors: Kazuto Yamauchi, Yasuhisa Sano
  • Patent number: 7776230
    Abstract: The invention provides a chemical-mechanical polishing system for polishing a substrate comprising (a) a polishing component selected from an abrasive, a polishing pad, or both an abrasive and a polishing pad, (b) an aqueous carrier, and (c) the halogen adduct resulting from the reaction of (1) an oxidizing agent selected from the group consisting of iodine, bromine, and a combination thereof, and (2) a carbon acid having a pKa of about 3 to about 14, wherein the halogen adduct is present in a concentration of about 0.01 mM or more in the aqueous carrier. The invention also provides a method of polishing a substrate comprising (i) providing the aforementioned chemical-mechanical polishing system, (ii) contacting the substrate with the polishing system, and (iii) abrading at least a portion of the surface of the substrate with the polishing system to polish the substrate.
    Type: Grant
    Filed: February 9, 2007
    Date of Patent: August 17, 2010
    Assignee: Cabot Microelectronics Corporation
    Inventors: Steven Grumbine, Francesco De Rege Thesauro
  • Patent number: 7754611
    Abstract: A chemical mechanical polishing method is disclosed. The method includes forming a film on a wafer having at least one trench structure thereon; polishing the surface of the film by providing a polishing composition to provide a first polished surface; rinsing the first polished surface with a rinse composition to provide a rinsed surface; and polishing the rinsed surface by providing a second polishing composition to provide a second polished surface.
    Type: Grant
    Filed: February 28, 2006
    Date of Patent: July 13, 2010
    Assignee: Macronix International Co., Ltd.
    Inventors: Chun Fu Chen, Yung Tal Hung, Yun Chi Yang
  • Patent number: 7723234
    Abstract: A method of removing polysilicon in preference to silicon dioxide and/or silicon nitride by chemical mechanical polishing. The method removes polysilicon from a surface at a high removal rate while maintaining a high selectivity of polysilicon to silicon dioxide and/or a polysilicon to silicon nitride. The method is particularly suitable for use in the fabrication of MEMS devices.
    Type: Grant
    Filed: November 22, 2006
    Date of Patent: May 25, 2010
    Assignees: Clarkson University, Infotonics Technology Center Inc.
    Inventors: Suryadevara V. Babu, Anita Natarajan, Sharath Hegde
  • Patent number: 7713879
    Abstract: In an embodiment, a chemical mechanical polishing method for a substrate having a first layer and a stepped portion. A surface of the first layer is positioned above an upper face of the stepped portion. A polishing process for selectively removing the stepped portion is performed on the first layer by using a first slurry composition that has a self-stopping characteristic so that the first layer is changed into a second layer having a substantially flat surface. A second polishing process is performed using a second slurry composition that does not have the self-stopping characteristic, until the upper face of the stepped portion is exposed.
    Type: Grant
    Filed: December 28, 2005
    Date of Patent: May 11, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Keun Kim, Chung-Ki Min, Yong-Sun Ko, Kyung-Hyun Kim
  • Patent number: 7708904
    Abstract: The disclosure is directed to a processing fluid including an aliphatic hydrocarbon component having an average chain length of 8 to 16 carbons and about 0.0001 wt % to about 50.0 wt % of a Lewis active component.
    Type: Grant
    Filed: October 3, 2005
    Date of Patent: May 4, 2010
    Assignee: Saint-Gobain Ceramics & Plastics, Inc.
    Inventors: Douglas E. Ward, Jason A. Sherlock
  • Patent number: 7700489
    Abstract: A method of manufacturing a semiconductor device includes depositing a SiO2 film on the substrate having formed thereon a wiring pattern; coating a SOG film on the SiO2 film; and polishing the SOG film using a slurry containing cerium oxide and cationic surfactant with a chemical-mechanical polishing process.
    Type: Grant
    Filed: September 8, 2004
    Date of Patent: April 20, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yukiteru Matsui, Gaku Minamihaba, Hiroyuki Yano, Atsushi Shigeta
  • Patent number: 7691279
    Abstract: A method of producing a glass substrate for a mask blank has the steps of measuring a convex/concave profile of a surface of the glass substrate, controlling a flatness of the surface of the glass substrate to a value not greater than a predetermined reference value by specifying the degree of convexity of a convex portion present on the surface of the glass substrate with reference to a result of measurement obtained in the profile measuring step and executing local machining upon the convex portion under a machining condition depending upon the degree of convexity, and polishing, after the flatness control step, the surface of the glass substrate subjected to the local machining. The surface of the glass substrate subjected to the local machining is subjected to acid treatment after the flatness control step and before the polishing step.
    Type: Grant
    Filed: March 26, 2004
    Date of Patent: April 6, 2010
    Assignee: Hoya Corporation
    Inventor: Kesahiro Koike
  • Patent number: 7676905
    Abstract: A magnetoresistive sensor having a pinned layer that extends beyond the stripe height defined by the free layer of the sensor. The extended pinned layer has a strong shape induced anisotropy that maintains pinning of the pinned layer moment. The extended portion of the pinned layer has sides beyond the stripe height that are perfectly aligned with the sides of the sensor within the stripe height. This perfect alignment is made possible by a manufacturing method that uses a mask structure for more than one manufacturing phase, eliminating the need for multiple mask alignments.
    Type: Grant
    Filed: August 15, 2005
    Date of Patent: March 16, 2010
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventor: Mustafa Michael Pinarbasi
  • Patent number: 7674716
    Abstract: Disclosed is an adjuvant for use in simultaneous polishing of a cationically charged material and an anionically charged material, which forms a adsorption layer on the cationically charged material in order to increase the polishing selectivity of the anionically charged material to cationically charged material, wherein the adjuvant comprises a polyelectrolyte salt containing: (a) a graft type polyelectrolyte that has a weight average molecular weight of 1,000˜20,000 and comprises a backbone and a side chain; and (b) a basic material. CMP (chemical mechanical polishing) slurry comprising the above adjuvant and abrasive particles is also disclosed.
    Type: Grant
    Filed: December 28, 2005
    Date of Patent: March 9, 2010
    Assignee: LG Chem. Ltd.
    Inventors: Gi Ra Yi, Jong Pil Kim, Jung Hee Lee, Jeong Jin Hong, Young Jun Hong, No Ma Kim, An Na Lee
  • Patent number: 7666238
    Abstract: A polishing composition comprising an abrasive and water, wherein the polishing composition has an index of degree of sedimentation of 80 or more and 100 or less; a process for producing a substrate comprising polishing a substrate to be polished using the above-mentioned composition; a process for preventing clogging of a polishing pad comprising applying the above-mentioned composition; a process for preventing clogging of a polishing pad comprising applying the above-mentioned composition to polishing with a polishing pad for a nickel-containing object to be polished; and a process for preventing clogging of a polishing pad comprising applying a composition comprising a hydrophilic polymer having two or more hydrophilic groups in its molecule and a molecular weight of 300 or more, or a compound capable of dissolving nickel hydroxide at a pH of 8.0, and water to polishing with a polishing pad for a nickel-containing object to be polished.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: February 23, 2010
    Assignee: Kao Corporation
    Inventors: Shigeo Fujii, Hiroyuki Yoshida, Toshiya Hagihara, Hiroaki Kitayama
  • Patent number: 7662719
    Abstract: A method for substantially simultaneously polishing a copper conductive structure of a semiconductor device structure and an adjacent barrier layer. The method includes use of a polishing pad with a slurry solution in which copper and a material, such as tungsten, of the barrier layer are removed at substantially the same rate. The slurry is formulated so as to oxidize copper and a material of the barrier layer at substantially the same rates. Thus, copper and the barrier layer material have substantially the same oxidation energies in the slurry. Systems for substantially polishing copper conductive structures and adjacent barrier structures on semiconductor device structures are also disclosed.
    Type: Grant
    Filed: July 12, 2006
    Date of Patent: February 16, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Nishant Sinha, Dinesh Chopra
  • Patent number: 7651625
    Abstract: A catalyst-aided chemical processing method can process hard-to-process materials, especially SiC, GaN, etc. whose importance as electronic device materials is increasing these days, with high processing efficiency and high precision even for a space wavelength range of not less than several tens of ?m. The catalyst-aided chemical processing method comprises: putting a workpiece in a processing liquid in which halogen-containing molecules are dissolved; and moving the workpiece and a catalyst composed of molybdenum or a molybdenum compound relative to each other while keeping the catalyst in contact with or close proximity to a surface to be processed of the workpiece, thereby processing the surface of the workpiece.
    Type: Grant
    Filed: August 27, 2007
    Date of Patent: January 26, 2010
    Assignees: Osaka University, Ebara Corporation
    Inventors: Kazuto Yamauchi, Yasuhisa Sano, Hideyuki Hara, Junji Murata, Keita Yagi
  • Patent number: 7645702
    Abstract: The manufacturing method of the present invention provides a silicon wafer, both sides of the wafer having a highly accurate flatness and small surface roughness, which is a single surface mirror-polished wafer with the front and rear surfaces of the wafer identifiable by visual observation, and excellent in flatness when held by a stepper chuck and the like. The manufacturing method of the present invention includes an etching process, a lapping process, and a double surface polishing process to simultaneously polish the front and rear surfaces of a wafer after the etching process. The polishing removal depth (A) of the wafer front surface is 5 to 10 ?m in the double surface simultaneous polishing process, and the polishing removal depth (B) in the rear surface is 2 to 6 ?m, and a difference between the polishing removal depth A and the polishing removal depth B is 3 to 4 ?m.
    Type: Grant
    Filed: October 28, 2004
    Date of Patent: January 12, 2010
    Assignee: SUMCO Corporation
    Inventors: Sakae Koyata, Kazushige Takaishi
  • Patent number: 7638105
    Abstract: The present invention provides ?-alumina powders comprising ?-alumina particles of which at least 80% of the ?-alumina particles have a particle size of less than 100 nm. The invention also provides slurries, particularly aqueous slurries, which comprise ?-alumina powders of the invention. The invention further provides methods of manufacturing ?-alumina powders and ?-alumina slurries of the invention and methods of polishing using same.
    Type: Grant
    Filed: August 13, 2008
    Date of Patent: December 29, 2009
    Assignee: Saint-Gobain Ceramics & Plastics, Inc.
    Inventor: Yuhu Wang
  • Patent number: 7629257
    Abstract: The invention concerns etching and doping substances free of hydrochloric/fluoride acid used for etching inorganic layers as well as for doping subjacent layers. The invention also concerns a method wherein said substances are used.
    Type: Grant
    Filed: September 13, 2002
    Date of Patent: December 8, 2009
    Assignee: Merck Patentgesellschaft
    Inventors: Sylke Klein, Armin Kübelbeck, Werner Stockum, Wilfried Schmidt, Berthold Schum
  • Patent number: 7625776
    Abstract: A method of forming at least one undercut structure in a semiconductor substrate. The method comprises providing a semiconductor substrate, forming at least one doped region in the semiconductor substrate, and removing the at least one doped region to form at least one undercut structure in the semiconductor substrate. The at least one undercut structure may include at least one substantially vertical shelf, at least one substantially horizontal shelf, and at least one faceted surface. The at least one doped region may be formed by implanting an impurity in the semiconductor substrate, which is, optionally, annealed. The at least one doped region may be removed selective to the undoped portion of the semiconductor substrate by at least one of wet etching or dry etching. An intermediate semiconductor structure that comprises a single crystalline silicon substrate and at least one undercut structure formed in the single crystalline silicon substrate is also disclosed.
    Type: Grant
    Filed: June 2, 2006
    Date of Patent: December 1, 2009
    Assignee: Micron Technology, Inc.
    Inventors: David H. Wells, H. Montgomery Manning