Adherent Solid Layer Or Coating (e.g., Pretinned) Patents (Class 228/254)
  • Patent number: 5639014
    Abstract: A method of making an integral solder and plated cover for an electronic package is described which involves applying a corrosion resistant material onto a metal strip and a solderable material on the corrosion resistant material. A solder material is then roll clad over the solderable material after which it is stamped to covers which are then coated with gold.
    Type: Grant
    Filed: July 5, 1995
    Date of Patent: June 17, 1997
    Assignee: Johnson Matthey Electronics, Inc.
    Inventors: David M. Damiano, Mark Fery, Terry J. Oldham
  • Patent number: 5620131
    Abstract: During formation of solder bumps on the bonding pads of a component, a two-layer dam structure is utilized to block solder from flowing from the pads to adjacent portions of a metallization pattern. After the solder bumps are formed, the top dam layer is dissolved, whereby any solder debris present on the top dam layer is also removed from the structure. The bottom dam layer, which remains intact during the removal step, serves to confine solder movement during a subsequent bonding operation in which the solder bumps are reflowed to cause them to adhere to aligned pads on another component.
    Type: Grant
    Filed: June 15, 1995
    Date of Patent: April 15, 1997
    Assignee: Lucent Technologies Inc.
    Inventors: Casey F. Kane, Joseph Shmulovich
  • Patent number: 5617989
    Abstract: Embodiments of a new apparatus for leveling solder contacts on printed circuit board panels are disclosed. A fluid is received by a platen and dispersed against a belt that engages the panel. A surface of the platen causes the pressure of the fluid to automatically adjust to the area of the panel by providing a series of parallel channels or holes in the surface.
    Type: Grant
    Filed: July 25, 1995
    Date of Patent: April 8, 1997
    Inventor: Robert A. Kelzer
  • Patent number: 5616206
    Abstract: A method for arranging conductive particles on electrodes of a substrate, which electrically connect with electrodes of an electric part via the conductive particles. An adhesive layer is formed on the electrodes. Conductive particles are arranged on the adhesive layer in a predetermined pattern. Then, the conductive particles on said electrodes of a substrate are affixed thereon.
    Type: Grant
    Filed: June 16, 1994
    Date of Patent: April 1, 1997
    Assignee: Ricoh Company, Ltd.
    Inventors: Tsutomu Sakatsu, Yoshihiro Yoshida
  • Patent number: 5601229
    Abstract: In a solder ball attaching apparatus, a pickup head is lowered and raised just above a solder ball feed section so as to pick up a large number of solder balls. The pickup head then moves to a position just above a flux feed section where the pickup head is lowered and raised so as to flux the solder balls. Further, the pickup head moves to a position just above a workpiece where the pickup head is lowered and raised so as to attach the solder balls onto electrodes of the workpiece. Alongside a transfer path of the pickup head are arranged first and second line light sources, a light-emitting element and a light-receiving element for monitoring presence or absence of a solder ball pickup error, dislodging of the solder ball and a solder ball attaching error.
    Type: Grant
    Filed: November 27, 1995
    Date of Patent: February 11, 1997
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Siniti Nakazato, Teruaki Kasai
  • Patent number: 5598967
    Abstract: A method of interconnecting circuit modules (30) to mother boards (50) each having a plurality of mating solder pads (32, 52) is available. The solder pads (32, 52) have respective pairs of arms (40, 42) and (54, 56) with a venting channel (36, 58) formed between each pair of arms to vent solder medium when the solder pads are reflowed to interconnect the circuit modules and mother boards.
    Type: Grant
    Filed: April 4, 1995
    Date of Patent: February 4, 1997
    Assignee: Motorola, Inc.
    Inventors: Jonathon G. Greenwood, Douglas W. Hendricks, Frank Juskey
  • Patent number: 5597110
    Abstract: The present invention provides a method for forming a solder bump (24) on a substrate (20). The substrate (20) includes a bond pad (18) having a faying surface (19) composed of solder-wettable metal. The method includes coating the faying surface (19) with a plate (16) formed of a first metal having a first melting temperature, and projecting a discrete microdroplet (14) onto the plate (16). The microdroplet (14) is formed of a molten second metal and has a second melting temperature greater than the first melting temperature. The microdroplet (14) fuses to the plate (16) to form the solder bump (24).
    Type: Grant
    Filed: August 25, 1995
    Date of Patent: January 28, 1997
    Assignee: Motorola, Inc.
    Inventors: Cynthia M. Melton, Robert Pfahl
  • Patent number: 5579573
    Abstract: Method for fabricating an undercoated chip electrically interconnected to a substrate. The method includes the initial step of depositing a predetermined quantity of a liquid undercoat material onto the chip or the substrate. The method continues with the step of interconnecting the chip to the substrate so as to form an electrical interconnection bond therebetween. Finally, the method concludes with the step of heating, reflowing and curing the undercoat material during or after the step of electrically interconnecting the chip to the substrate.
    Type: Grant
    Filed: October 11, 1994
    Date of Patent: December 3, 1996
    Assignee: Ford Motor Company
    Inventors: Jay D. Baker, Cuong V. Pham, Robert E. Belke, Jr.
  • Patent number: 5573171
    Abstract: A method of thin film patterning by reflow. A first metal trace is deposited onto a surface of a substrate in a predetermined pattern. A second metal trace is then deposited onto the deposited first metal trace. Next, a thin film of a third metal is deposited onto the entire surface of the substrate and onto the deposited first and second metal traces. The substrate and the associated deposited metals are then heated to cause the deposited thin film of the third metal to flow and bead onto the second metal trace.
    Type: Grant
    Filed: February 16, 1995
    Date of Patent: November 12, 1996
    Assignee: TRW Inc.
    Inventors: Alvin M. W. Kong, Chan A. Tu
  • Patent number: 5551628
    Abstract: A method of solder-coating a metallic pad provided on a substrate, whereby at least the surface of the pad is provided with a deposit of solder paste, which paste comprises a suspension of metallic solder particles which, when molten, have a surface energy lower than the critical surface energy of the metallic pad but higher than the critical surface energy of the substrate surface outside the borders of the pad, whereby application of heat causes metallic solder particles within the paste lying upon the pad to melt and fuse together into an essentially continuous metallic solder layer, whereas the metallic solder particles within any paste lying upon the substrate surface outside the borders of the pad do not thus fuse together into a layer but are instead deposited as mutually-isolated solder beads, which beads can be subsequently removed from the substrate surface after completion of the heating process.
    Type: Grant
    Filed: October 31, 1994
    Date of Patent: September 3, 1996
    Assignee: U.S. Philips Corporation
    Inventors: Johannes A. H. Van Gerven, Michael T. W. De Langen
  • Patent number: 5549239
    Abstract: A prefluxed, flux retaining aluminum-based component is provided comprising a solidified coating layer having flux particles embedded into the coating layer. A method for producing such components comprises steps of applying a molten metallic coating to an aluminum-based component, maintaining the coating in a molten state, driving flux particles against the coating, and cooling the component to solidify the coating and thereby fix the particles firmly in the solidified coating.
    Type: Grant
    Filed: November 1, 1994
    Date of Patent: August 27, 1996
    Assignee: Norsk Hydro a.s
    Inventors: Edward J. Morley, Morten Syslak
  • Patent number: 5542601
    Abstract: A new rework process for semiconductor chips mounted in a flip chip configuration, via solder balls, on an organic substrate is disclosed.
    Type: Grant
    Filed: February 24, 1995
    Date of Patent: August 6, 1996
    Assignee: International Business Machines Corporation
    Inventors: Kenneth M. Fallon, Miguel A. Jimarez, Joseph E. Zdimal
  • Patent number: 5533664
    Abstract: In bonding the connecting electrodes of adjacent semiconductor chips to each other, a solder layer shaped like a bump is formed on that portion of the connecting electrode which is positioned on the upper surface of the semiconductor chip. The semiconductor chips are positioned close to each other such that the connecting electrodes of these chips are aligned with each other. Then, the solder layer is melted to cause the molten solder to flow along the entire region of the connecting electrode and, thus, to achieve mutual bonding of the connecting electrodes in the entire regions including the upper surface region and the side surface region. The method permits stably bonding semiconductor chips to each other with a high bonding strength, leading to an improved reliability of electric connection in the bonded portion.
    Type: Grant
    Filed: September 6, 1994
    Date of Patent: July 9, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mamoru Sasaki, Chiaki Takubo, Yoichi Hiruta
  • Patent number: 5526977
    Abstract: A method for attaching a metal wheel disc to a wheel rim formed from a metal which is dissimilar to the wheel disc metal. A layer of metal which is compatible for welding to the metal forming the wheel disc is thermally sprayed onto an outboard portion of the wheel rim to form a weld anchor. The wheel disc is positioned adjacent to the sprayed metal layer and welded thereto. The wheel disc also can be cast or forged over the sprayed metal layer with the wheel disc bonding to the sprayed metal layer to form a secure air-tight seal between the wheel disc and the wheel rim. Alternately, a metal filler compatible with both the metals forming the wheel disc and wheel rim is thermally sprayed onto the wheel rim and the wheel disc brazed thereto.
    Type: Grant
    Filed: December 15, 1994
    Date of Patent: June 18, 1996
    Assignee: Hayes Wheels International, Inc.
    Inventor: Daniel C. Wei
  • Patent number: 5520323
    Abstract: Contacts such as contact points, contact strips, or contact sections are usually provided with hard solder on a copper-silver basis in the form of a flat solder layer. The contact is then connected over this solder layer with a contact carrier. The solder layer is melted, whereupon the free surface of the solder layer (13, 130) is covered during melting with a material (1, 5, 15) that has no solubility with silver or copper. The material can, during melting of the solder, form a covering (1, 15) beneath the contact (10, 12, 100) provided on its solder side with the solder layer (13, 130) or can also form a covering over the contact (10, 12, 100) provided on its solder side with the solder layer (13, 130). As materials for covering the solder layer (13, 130), high-melting metals, preferably tantalum, or a ceramic are used.
    Type: Grant
    Filed: June 20, 1994
    Date of Patent: May 28, 1996
    Assignee: Siemens Aktiengesellschaft
    Inventors: Franz Hauner, Manfred Schneider
  • Patent number: 5516032
    Abstract: The invention relates to a method for forming bump electrodes on an electronic part such as a chip or a substrate. Conventional methods for forming bump electrode had a factor causing high cost, but with the invention, instead of solder balls, low cost solder wires are used, that is, solder wires are cut in a predetermined length, the cut solder wires are vacuum-attracted to the lower face of a pick up head and transferred onto a chip, then the solder pieces transferred are heated to melt, then cooled to solidify and results in forming bump electrodes of hemisphere shape.
    Type: Grant
    Filed: November 16, 1994
    Date of Patent: May 14, 1996
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shoji Sakemi, Tadahiko Sakai
  • Patent number: 5509599
    Abstract: Hybrid circuits are usually secured with contact pins (combs) on printed circuit boards by undergoing a flow solder bath. Further, surface-mountable components are soldered on the printed circuit board in a furnace. Two soldering processes are necessary for this purpose. The method of the invention avoids one of the soldering processes by applying through-contacted bores on the carrier substrate of the hybrid circuit. These through-contacted bores are put in place onto solder surfaces of the printed circuit board having a paste solder and the overall arrangement is soldered in a furnace.
    Type: Grant
    Filed: February 9, 1994
    Date of Patent: April 23, 1996
    Assignee: Siemens Aktiengesellschaft
    Inventor: Hans-Bodo Laue
  • Patent number: 5506385
    Abstract: A solder-film forming apparatus for automatically forming a solder-film on a conductive pad of a printed-wiring board. The solder-film forming apparatus includes a mechanism for receiving a solder ball, a suction head provided on a distal end thereof with a holding surface for holding the solder ball and a suction port opening to the holding surface, a suction mechanism for generating a negative pressure in the suction port of the suction head, and a mechanism for moving the suction head. The solder-film forming apparatus further includes a controller having printed-wiring board information in which data including a positional information of the pad on the printed-wiring board is preset and controlling a movement of the suction head by the head moving mechanism and an operation of the suction mechanism in accordance with the printed-wiring board information.
    Type: Grant
    Filed: September 28, 1994
    Date of Patent: April 9, 1996
    Assignee: Fujitsu Limited
    Inventors: Hajime Murakami, Takashi Fukuda
  • Patent number: 5505364
    Abstract: Disclosed are an ink jet printhead and method of manufacturing the same.
    Type: Grant
    Filed: December 30, 1993
    Date of Patent: April 9, 1996
    Assignee: Compaq Computer Corporation
    Inventor: Boris Plesinger
  • Patent number: 5505367
    Abstract: The bonding pads (18) of a semiconductor chip (12) each may be provided with a solder bump (36) by first screen printing a pattern of solder paste (36) on a heat-resistant, non-wettable surface (24). The chip (12) is then placed on the surface (24) so each bonding pad (18) contacts a portion of the solder paste pattern (36). The solder paste is then reflowed, yielding molten solder that bonds to the bonding pads (18) of the chip, but not to the surface (24). After reflow, the chip, with its now-bumped pads, is removed from the surface for subsequent soldering to a wettable substrate.
    Type: Grant
    Filed: November 2, 1994
    Date of Patent: April 9, 1996
    Assignee: AT&T Corp.
    Inventors: Yinon Degani, Thomas D. Dudderar, John G. Spadafora
  • Patent number: 5497546
    Abstract: Load terminals are mounted to a circuit board by providing a solder layer on each lead terminal and on each conductive inner wall surface of respective holes formed in the circuit board. The lead terminals are thrust into respective holes, and contacting portions of the solder layers are irradiated with an energy beam, to produce sufficient heat for welding in a fluxless manner each lead terminal to the inner wall surface of its respective hole.
    Type: Grant
    Filed: September 14, 1993
    Date of Patent: March 12, 1996
    Assignee: Matsushita Electric Works, Ltd.
    Inventors: Masao Kubo, Kazuo Kamada, Masanobu Ogasawara, Yoshimitsu Nakamura
  • Patent number: 5497545
    Abstract: A multi-layer wiring assembly including a stack of insulating layers, e.g. of polyimide, alternating with wiring patterns, typically of copper. To establish the circuit pattern, successive wiring patterns are connected to one another through the intervening insulating layers at predetermined locations, by metal stud connections. The studs are formed during assembly of the stack by wire-bonding a stud onto an underlying wiring pattern through a through-hole of the insulating layer above, and then stamping the exposed end of the wire-bonded stud to spread it into contact with the uppermost wiring pattern. The wire-bonded studs e.g. of Au, form strong bonds with the underlying conductor and are quick to apply in an automated process using a wire-bonding machine.
    Type: Grant
    Filed: March 18, 1993
    Date of Patent: March 12, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Ryuji Watanabe, Osamu Miura, Kunio Miyazaki, Yukio Ookoshi, Akio Takahashi
  • Patent number: 5495656
    Abstract: A composite blank is formed from an aluminum base blank and an aluminum brazing alloy clad material which is affixed to the base blank. Alternately, a multielement blank is formed by at least one base preform and at least one separate clad preform. The composite and multielement blanks are forged into required parts such that as the required parts are formed, the clad material forms an integral coating on the finished part in one or more positions which are to be clad. The composite blank may be formed by initially forming a base blank having one or more recesses on its surface into which clad material is inserted. Recesses can be formed in base blanks as slots during extrusion of the base blanks in a continuous form or otherwise. Clad material is then inserted into each slot on the continuous form with composite blanks being formed by cutting the resulting continuous form.
    Type: Grant
    Filed: March 1, 1995
    Date of Patent: March 5, 1996
    Assignee: Amcast Industrial Corporation
    Inventor: John P. Waggoner
  • Patent number: 5490628
    Abstract: A method of producing a microchip having at least a portion of an electrical circuit element contained within a hermetically sealed enclosure comprises the steps of: forming a cavity in a first substrate assembly which has a cavity opening at a first surface portion of the first substrate assembly; forming an electrical circuit element and sealing ring from a film applied to a first surface portion of a second substrate assembly with the sealing ring arranged in circumscribing relationship with at least a portion of the circuit element; positioning the first surface portion of the first substrate assembly opposite the first surface portion of the second substrate assembly with the sealing ring located in circumscribing relationship with the cavity opening; sealingly bonding the sealing ring to the first surface portion of the first substrate assembly.
    Type: Grant
    Filed: February 21, 1995
    Date of Patent: February 13, 1996
    Assignee: Hewlett-Packard Company
    Inventor: Christopher C. Beatty
  • Patent number: 5482200
    Abstract: A method is provided for applying solder to a flip chip pattern on a circuit board. The method involves forming solder bumps on a chip, and then transferring the solder bumps to the flip chip pattern by soldering the chip to the flip chip pattern, and then gradually heating the solder bumps while applying a force to separate the chip from the circuit board, such that the solder bumps substantially remain adhered to the flip chip pattern. The solder is transferred to the flip chip pattern in order to allow a flexible circuit interconnect to be soldered to the flip chip pattern for the purpose of establishing electronic communications between the circuit board's electronic circuit components and a microprocessor emulator. The electronic circuit can then be evaluated and tested without a microprocessor chip being present on the substrate.
    Type: Grant
    Filed: February 22, 1994
    Date of Patent: January 9, 1996
    Assignee: Delco Electronics Corporation
    Inventors: Bruce A. Myers, Ronnie J. Runyon
  • Patent number: 5477419
    Abstract: A method of mounting an electronic part having a terminal portion on a board on which a circuit including a connection portion is formed. It includes a process of forming a conductive layer on the surface of the terminal portion; a process of forming, on the surface of the connection portion, a conductive layer having a melting point different from that of the conductive layer formed on the surface of the terminal portion; and a process of melting the conductive layer having a low melting point in such a state that the conductive layer of the terminal portion is contacted with the conductive layer of the connection portion, thereby fusing the conductive layer having a low melting point onto the conductive layer having a high melting point.
    Type: Grant
    Filed: April 11, 1994
    Date of Patent: December 19, 1995
    Assignee: Sony Corporation
    Inventors: Thomas W. Goodman, Hiroyuki Fujita, Yoshikazu Murakami, Arthur T. Murphy
  • Patent number: 5472135
    Abstract: The present invention provides a reflow apparatus and method effective to make constant the internal gas flow direction in a heating section within a reflow furnace. A circulating gas path is formed in a heating unit which collects and causes the gas to flow from a sirocco fan, up the rear side of the heating unit and then down towards a circuit board moving along a transfer path at the front side of the heating unit. Moreover, a plurality of straightening plates are arranged above the transfer path of the heating unit so as to guide the hot gas, which is flowing forwardly downwardly toward the circuit board moving along the transfer path. A blow-down nozzle is provided and includes a plurality of plates aligned in rows in the transferring direction of the circuit boards. The plates have an inverse U-shaped cross section. The blow-down nozzle is arranged below the straightening plates to cause the vertical hot gas flows to flow uniformly over the whole surface of the circuit board.
    Type: Grant
    Filed: November 16, 1993
    Date of Patent: December 5, 1995
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masahiro Taniguchi, Youichi Nakamura, Kazumi Ishimoto, Kimihito Kuwabara, Toshinori Mimura, Kurayasu Hamasaki, Kenichi Nakano, Manabu Ando
  • Patent number: 5464146
    Abstract: An improved method of brazing of two unclad aluminum shapes, particularly for automotive heat exchangers, which brazing joint does not leave a physically apparent layer of brazing material and which effects a stronger, sounder autogenous joint. A thin film of aluminum eutectic forming material (Si, Al-Si or Al-Zn) is deposited onto a zone of at least one of the shapes to be brazed or joined. The shapes are placed in joining relationship to form an assembly with a joint at the zone. The assembly is heated to a temperature to diffuse the eutectic forming material into the aluminum members to form a sacrificial bond between the shapes at the joining zone. It is desirable that at least one of the unclad aluminum shapes to be joined is extruded tubing having a precise diametrical configuration and said film is deposited as a physically vapor deposited layer in a thickness range of 1-50 microns.
    Type: Grant
    Filed: September 29, 1994
    Date of Patent: November 7, 1995
    Assignee: Ford Motor Company
    Inventors: Matthew J. Zaluzec, Gerald A. Grab, Warren A. Smith
  • Patent number: 5449108
    Abstract: A method for forming a bump on a semiconductor device takes advantage of the solderability difference of the solder paste applied to a solder pad in order to form a bump, so that it does not require an etching process. In addition, a pre-test of the semiconductor device can be carried out in a state that the solder pad is united with a BLM layer, so as to prove out semiconductor devices of good quality in advance of finishing the formation of the bump and the semiconductor devices of good quality can be applied with a subsequent process.
    Type: Grant
    Filed: March 15, 1994
    Date of Patent: September 12, 1995
    Assignee: Goldstar Electron Co., Ltd.
    Inventor: Joon S. Park
  • Patent number: 5445311
    Abstract: An electrical interconnection substrate (20) is prepared to receive both wire bonded and soldered connections (60,64,66) by forming a dielectric solder mask (30) over the substrate (20), with openings (36) in the mask (30) to expose the contact pads (22) for which soldered connections are desired. The substrate (20) is exposed to a molten solder alloy (44) in a wave soldering process that dissolves the wire bonding material (28) (preferably gold) from the exposed pads (22) and deposits solder bonding pads (52) in its place. Excess solder is then removed from the substrate, and openings (54) are formed through the solder mask (30) to expose the wire bond contact pads (22'). The selective dissolving of gold bonding layers (28) and their replacement by solder pads (52) prevents the establishment of brittle gold-solder intermetallics, and the deposited solder (52) requires no further heat treatment for correct alloy formation.
    Type: Grant
    Filed: October 13, 1994
    Date of Patent: August 29, 1995
    Assignee: Hughes Aircraft Company
    Inventors: Philip A. Trask, Vincent A. Pillai, Thomas J. Gierhart
  • Patent number: 5441195
    Abstract: A method of stretching solder joints between the input/output pads of an electrical component and corresponding input/output pads on a substrate includes the steps of: melting the solder joints; confining the component while the solder joints are melted such that the component can only move substantially perpendicular to the substrate; pulling the component, while the component is confined, by an external force in a direction away from the substrate to thereby stretch the melted solder joints; compelling the movement of the component to stop when the component has moved a predetermined distance; and, solidifying the solder joints while the component is compelled to stop. By stretching the solder joints with the above method, the solder joint shape can be changed from convex to concave; and thermally induced stress/strain in the joint is substantially reduced.
    Type: Grant
    Filed: January 13, 1994
    Date of Patent: August 15, 1995
    Assignee: Unisys Corporation
    Inventors: Jerry I. Tustaniwskyj, Maria D. Alvarez, Steve J. Bezuk, Robert E. Rackerby, Patrick A. Weber
  • Patent number: 5440800
    Abstract: A method of adhering in advance a soldering material to a location on each of a plurality of claw-shaped portions of a commutator at which a winding for the armature of an electric motor is to be electrically connected thereto, for ensuring a strong and reliable electrical connection between the windings and the claw-shaped portions.A plurality of narrow grooves are defined in the claw-shaped portions and the narrow grooves are charged with molten soldering material, which solidifies therein. The thus-solidified soldering material is thereafter re-melted by heat produced at the time of resistance welding of the windings to the claw-shaped portions to thereby reinforce the electrical connection between the claw-shaped portions and the windings and to prevent an increase in the electric resistance between the windings and the claw-shaped portions.
    Type: Grant
    Filed: January 27, 1993
    Date of Patent: August 15, 1995
    Assignee: ASMO Co. Ltd.
    Inventors: Yuichi Terada, Satoru Hamano, Kazunobu Kanno
  • Patent number: 5439162
    Abstract: An integrated circuit (70) is soldered to a printed circuit board (200) by first depositing flux (116) on bumps (75) of the integrated circuit. Solder (214) is deposited upon the bumps (75), and the integrated circuits is (70) placed in contact with pads (210) on the printed circuit board (200). After reflow, a solder joint (230) electrically and mechanically attaches the integrated circuit (70) to the printed circuit board (200).Alternatively, the solder tipped (214) bumps (75) may be placed in contact with a non-adhering flat plane (300) such as glass during the heating process. After reflow, each bump has a flat portion (350), and the flat portions of all the bumps form a plane (400) which further facilitates attaching the integrated circuit (70) to the printed circuit board (200).
    Type: Grant
    Filed: June 28, 1993
    Date of Patent: August 8, 1995
    Assignee: Motorola, Inc.
    Inventors: Reed A. George, John P. Cheraso, Douglas W. Hendricks
  • Patent number: 5435482
    Abstract: An integrated circuit includes a plurality of solder balls arrayed on the bottom surface of a package of the integrated circuit. These solder balls provide for surface mounting of the integrated circuit to a circuit board by solder reflow. The array of solder balls can be planarized so that each of the plural solder balls participate in defining a truly planar solder ball contact array for the integrated circuit package. Methods of manufacturing the integrated circuit with a package having planarized solder balls in an array dependent from a bottom surface thereof are set forth. The truly planarized solder ball contact array of the integrated circuit package affords nearly absolute reliability in forming of surface-mount electrical connections between the integrated circuit package and the circuit board on which the package is to mount.
    Type: Grant
    Filed: February 4, 1994
    Date of Patent: July 25, 1995
    Assignee: LSI Logic Corporation
    Inventors: Patrick Variot, Chok J. Chia, Robert T. Trabucco
  • Patent number: 5431332
    Abstract: A station (10) in a manufacturing line (12) for the accurate placement of solder balls (30) on a ball grid array package and for the removal of excess solder balls comprises a substrate (4) having an array of solder pads (7), and an adhesion layer (8) on the solder pads.
    Type: Grant
    Filed: February 7, 1994
    Date of Patent: July 11, 1995
    Assignee: Motorola, Inc.
    Inventors: Thomas P. Kirby, Jonathon G. Greenwood, Edward Juchniewicz, Ovidiu Neiconi
  • Patent number: 5431328
    Abstract: A bonded structure comprising the physical and electrical connections between an integrated circuit element and substrate using a composite bump comprised of a single polymer body of low Young's Modulus, a conductive barrier metal coating covering the polymer body and a soldering metal coating covering the conductive barrier metal coating. When the bonded structure is formed the composite bump is deformed and the low Young's Modulus of the polymer body allows a very reliable bonded structure with very low bonding force. Due to the low Young's Modulus there is little stress tending to break the solder joint after the bonded structure is formed. The bond is formed using a soldering process so that the soldering metal forms a conductive adhesive between the composite bumps and either the substrate input/output pads or the integrated circuit element input/output pads.
    Type: Grant
    Filed: May 6, 1994
    Date of Patent: July 11, 1995
    Assignee: Industrial Technology Research Institute
    Inventors: Shyh-Ming Chang, Chih-Chiang Chu, Yu-Chi Lee
  • Patent number: 5429293
    Abstract: A soldering process uses two or more different solder alloys. A first solder alloy (115) that undergoes a solid-to-liquid transition at a first temperature is coated (20) onto the solderable surfaces (105) of a printed circuit board (100). A solder paste (120) that undergoes this solid-to-liquid transition at a temperature greater than the first temperature is deposited on the coated solderable potions, and is heated to a temperature that is above the first temperature but below the second temperature. During this time, the first solder alloy liquifies, while the solder paste does not. The first solder alloy wets to the individual particles in the solder paste, and alloys to the solderable surfaces and the solder particles in the solder paste. The soldering composition is subsequently cooled (40) to solidify the first solder material, forming a solid and substantially planar coating on the solderable potions of the printed circuit board.
    Type: Grant
    Filed: December 19, 1994
    Date of Patent: July 4, 1995
    Assignee: Motorola, Inc.
    Inventors: Edwin L. Bradley, III, Kingshuk Banerji, Vahid Kazem-Goudarzi
  • Patent number: 5425493
    Abstract: A specially designed tip containing an electron discharge milled cone of specific dimensions is used to transfer a critical solder volume from a solder ball carrier to a specific solder ball site on the base line metal on a high density chip, substrate terminal connection, solder ball connection, or any solder ball array. The critical tip/cone dimensions have a height of the cone and a circumference at the base which generate a specific volume of solder to be transferred.
    Type: Grant
    Filed: August 10, 1994
    Date of Patent: June 20, 1995
    Assignee: International Business Machines Corporation
    Inventors: Mario J. Interrante, Laertis Economikos
  • Patent number: 5417362
    Abstract: An electrical connecting method connects a first contact of a first object to a second contact of a second object. The electrical connecting method includes the steps of coating a Ga system liquid metal on at least one of the first and second contacts, where the Ga system liquid metal includes a predetermined weight percent of Bi, and contacting the first contact to the second contact via the Ga system liquid metal. The predetermined weight percent of Bi is selected such that the liquid state of the Ga system liquid metal is maintained when the first and second contacts make contact via the Ga system liquid metal.
    Type: Grant
    Filed: March 4, 1994
    Date of Patent: May 23, 1995
    Assignee: Fujitsu Limited
    Inventors: Tatsuo Chiyonobu, Kaoru Hashimoto
  • Patent number: 5411199
    Abstract: A method for attaching a shield (102) to a an electronic assembly (116) having a heat sink (110) includes applying solder on the inner walls (104) of the shield (102). Next, the shield (102) is placed over the electronic assembly (116) such that the electronic assembly (116) is covered by the shield (102) and the shield (102) is in mechanical contact with the heat sink (110). Then, the shield (102) and heat sink (110) are heated so that the solder on the inner walls (104) of shield (102) flows and solders the shield (102) to the heat sink (110).
    Type: Grant
    Filed: March 7, 1994
    Date of Patent: May 2, 1995
    Assignee: Motorola, Inc.
    Inventors: Anthony J. Suppelsa, Robert F. Darveaux, Thomas A. Goodwin, Julio Abdala, Henry F. Liebman
  • Patent number: 5407121
    Abstract: A method of soldering a copper layer without the use of fluxing agents by exposing the copper layer to a fluorine-containing plasma. Solder is then placed onto the surface of the copper layer and reflowed. Reflow can take place at low temperatures, atmospheric pressure and in an inert or oxidizing atmosphere using standard solder reflow equipment.
    Type: Grant
    Filed: November 19, 1993
    Date of Patent: April 18, 1995
    Assignee: MCNC
    Inventors: Nicholas G. Koopman, Sundeep Nangalia
  • Patent number: 5402926
    Abstract: A method of brazing a plurality of components by heating the components superposed on each other with a brazing material interposed between adjacent bonding surfaces of the components, wherein the brazing material has a relatively low degree of wettability with respect to the material of the components to be brazed, and is applied to a patterned film of a high-wettability metal having a relatively high degree of wettability with respect to the brazing material, which film is formed on at least one of bonding surfaces of the components, so as to cover predetermined areas of the bonding surface while leaving adjacent non-bonding areas of the bonding surface uncovered so as to restrict the flow of brazing material.
    Type: Grant
    Filed: September 28, 1993
    Date of Patent: April 4, 1995
    Assignee: NGK Insulators, Ltd.
    Inventors: Yukihisa Takeuchi, Natsumi Shimogawa, Nobuo Takahashi
  • Patent number: 5400948
    Abstract: A method for fabricating a printed circuit board for high pin count surface mount pin grid arrays is provided where surface mount pads for soldering a surface mount pin grid array package are isolated by solder mask layers. The printed circuit board is laminated with one or more solder mask layers containing apertures therein to expose the surface mount pad locations.
    Type: Grant
    Filed: February 2, 1994
    Date of Patent: March 28, 1995
    Assignee: Aptix Corporation
    Inventors: Vijay M. Sajja, Siamak Jonaidi
  • Patent number: 5395040
    Abstract: The object of this invention was to construct an apparatus for forming solder deposits on a Surface Mount Device (SMD) pad on a printed circuit or hybrid board. This formed solder deposit is in a defined three-dimensional well having the proper profile and a defined solder gap. The solder before forming can be solid solder or a solder paste. By the placement of a mesh on the surface of the circuit board and the application of a slight positive pressure and tension on the mesh with vibration thereof and subjecting this system to a temperature just low enough to reflow the solder by means of a heat transfer fluid either liquid or gaseous, then cooling the board to solidify the solder, a product results having the desirable properties even when block printed. The use of this apparatus eliminates most of the problems of prior art approaches by providing uniform heating at a very short dwell time at temperature in the presence of the mesh.
    Type: Grant
    Filed: January 26, 1994
    Date of Patent: March 7, 1995
    Assignee: Mask Technology, Inc.
    Inventor: Damian J. Holzmann
  • Patent number: 5381946
    Abstract: An integrated circuit chip having solder bumps thereon may be tested using a temporary substrate having substrate pads corresponding to locations of the input/output pads on the chip and having a sacrificial conductor layer on the temporary substrate pads. The solder bumps are placed adjacent the corresponding sacrificial metal layer and heated to form an electrical and mechanical connection between the chip and the temporary substrate. The chip is then tested and/or burned-in on the temporary substrate. After testing/burn-in, the sacrificial metal layer is dissolved into the solder bumps by heating. The integrated circuit chip, including a solder bump having the dissolved sacrificial metal layer therein, may be easily removed from the temporary substrate. Solder bumps may also be formed on the temporary substrate and transferred to unbumped chips.
    Type: Grant
    Filed: September 27, 1993
    Date of Patent: January 17, 1995
    Assignee: MCNC
    Inventors: Nicholas G. Koopman, Glenn A. Rinne, Iwona Turlik, Edward K. Yung
  • Patent number: 5381848
    Abstract: A technique for simultaneously forming large numbers of solder ball (or bump) contacts on a surface of a substrate is described. A mold is provided for receiving a substrate. Recesses in the mold are shaped to form contacts of a desired size, and are arranged to align with contact pads on the surface of the substrate. When the substrate is inserted into the mold and the mold is closed, the contact pads align with the recesses. Molten solder is introduced into the recesses and, upon cooling, forms conductive raised bump contacts on the contact pads. The substrate is then removed from the mold. Various features of the invention are directed to forming "tall" contacts with an aspect ratio (height to width ratio) of greater than 1:1, processing more than one substrate at a time, processing substrates of different sizes, and processing substrates with different contact patterns.
    Type: Grant
    Filed: September 15, 1993
    Date of Patent: January 17, 1995
    Assignee: LSI Logic Corporation
    Inventor: Robert T. Trabucco
  • Patent number: 5377902
    Abstract: Solder interconnection arrays for joining a plurality of metallic surfaces located on a first surface to a plurality of metallic surfaces located on a second surface are provided which reduce the amount of stress on particular areas of the interconnect array caused by shear forces between the surfaces.
    Type: Grant
    Filed: January 14, 1994
    Date of Patent: January 3, 1995
    Assignee: MicroFab Technologies, Inc.
    Inventor: Donald J. Hayes
  • Patent number: 5364014
    Abstract: A component body is held by a holder while projecting both end portions thereof respectively, and two applicators are simultaneously approached toward related end portions of the component body. The applicators are provided with paste films respectively, so that the respective end portions of the component body are located in the paste films as the result of the aforementioned approaching. Then, the applicators are separated from the component body, so that the component body coated with paste materials on the both end portions can be obtained. Conductor paste materials can be efficiently applied to the both end portions of the component body, while the widths of the conductor paste materials which are applied onto the both end portions can be made equal to each other.
    Type: Grant
    Filed: November 29, 1993
    Date of Patent: November 15, 1994
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Mitsuro Hamuro, Shigeyoshi Matsuda, Shoichi Kawabata
  • Patent number: 5361967
    Abstract: A monolithic circuit, such as a piezoelectric device, semiconductor, or the like, may be fabricated by forming an operational metallization layer (12) on a substrate (10). A subsequent layer (40), such as a sealing ring pattern (42) may then be applied using a thin film deposition technique. A thin film material is applied through a mask assembly (28). The mask assembly (28) includes a mask material (30) that has been applied to a screen (24) and patterned as desired. The mask material (30) extends beyond the screen (24) so that only the mask material contacts the substrate (10) during thin film deposition. Preferably, the screen (24) is woven from individual wires (26) having circular cross-sectional shapes. The subsequent layer (40) is applied both through perforations (18) in the screen (24) and under the screen's wires (26).
    Type: Grant
    Filed: November 10, 1993
    Date of Patent: November 8, 1994
    Assignee: Motorola, Inc.
    Inventors: Michael J. Anderson, Howard D. Knuth, Wayne D. Pasco
  • Patent number: 5346857
    Abstract: A method for flip-chip bonding an integrated circuit die to a substrate. A substrate (21) having conductive bonding areas (22) coated with tin (23) is secured to a bottom end effector of a flip-chip bonding apparatus. An integrated circuit die (26) having gold bumps (28) is secured to a die tool of the flip-chip bonding apparatus. A gold-tin eutectic bond is formed between the integrated circuit die (26) and the conductive bonding areas (22) of the substrate (21).
    Type: Grant
    Filed: September 28, 1992
    Date of Patent: September 13, 1994
    Assignee: Motorola, Inc.
    Inventors: Thomas A. Scharr, Russell T. Lee, Ravichandran Subrahmanyan