Adherent Solid Layer Or Coating (e.g., Pretinned) Patents (Class 228/254)
  • Patent number: 6234383
    Abstract: A method and apparatus for circumferential application of materials to an interior surface of a curved pipe includes providing a pipe support with a rotational axis. A curved section of pipe is mounted to the pipe support. An arm supporting an applicator head is positioned within the curved section of pipe. The pipe support is rotated about the rotational axis, while coordinating movement of the arm to maintain the applicator head in a working position within the curved section of pipe.
    Type: Grant
    Filed: October 6, 1999
    Date of Patent: May 22, 2001
    Assignee: Almac Machine Works Ltd.
    Inventors: Fred Harmat, Graeme Van Dongen
  • Patent number: 6227435
    Abstract: A method of providing a smooth paintable surface after aluminum joining. Two aluminum pieces are welded together to form a joint, and a weld bead is formed at the joint. An aluminum spray filler is applied by thermal spraying on an area around the weld bead, and the area around the weld bead and aluminum spray filler is ground to produce a smooth paintable surface at the joint. The area around the weld bead is preferably roughened prior to spray brazing. The roughening is preferably produced by a process selected from grit blasting, rough sanding, and depositing a flux.
    Type: Grant
    Filed: February 2, 2000
    Date of Patent: May 8, 2001
    Assignee: Ford Global Technologies, Inc.
    Inventors: Kimberly Ann Lazarz, Matthew John Zaluzec
  • Patent number: 6227437
    Abstract: An apparatus and method for high speed, reliable and repeatable delivery and reflow of solder material onto a substrate are disclosed. The apparatus has a repositionable capillary to direct individual solder material to a specific location on the substrate. An energy source is directed through the capillary onto the solder to reflow the solder to the substrate. The apparatus provides for individual introduction of the solder material into the capillary and urging of the solder material from a reservoir to the capillary while preventing unintended jams and blockage of the solder material.
    Type: Grant
    Filed: August 24, 1999
    Date of Patent: May 8, 2001
    Assignee: Kulicke & Soffa Industries Inc.
    Inventors: Eli Razon, Vaughn Svendsen, Krishnan Suresh, Robert Kowtko, Kyle Dury
  • Patent number: 6199259
    Abstract: Fabrication techniques for an integrated sputtering target assembly include pressure assisted bonding of soldered layers of material, in particular, soldering of the target material to its backing plate; pressure assisted curing of structural adhesives used to join a finned cover plate to a backing plate which between them form passages for fluid cooling; and bonding an electrical insulating layer to the back surface of the backing plate. The pressure to assist in bonding is typically applied by an autoclave. The cooling fluid passages disposed between a cover and a finned backing plate can be sealed by using laser welding or electron beam welding rather than closing the cooling passages with structural adhesives.
    Type: Grant
    Filed: September 25, 1996
    Date of Patent: March 13, 2001
    Assignee: Applied Komatsu Technology, Inc.
    Inventors: Richard E. Demaray, Manuel Herrera
  • Patent number: 6199741
    Abstract: A ball grid array electronic package is attached to a substrate by means of solder balls and solder paste. Connection is made between a contact on the ball grid array and a solder ball by means of a first joining medium, such as a solder paste. Connection is made between a solder ball and a contact arranged on the substrate by means of a second joining medium. The contact arranged on the substrate is substantially quadrilateral in shape, and preferably substantially square in shape. Connection to the substrate, e.g., using round solder balls, is much more easily detected, e.g., by x-ray, than when using round pads, especially those having a smaller diameter than the balls.
    Type: Grant
    Filed: December 1, 1999
    Date of Patent: March 13, 2001
    Assignee: International Business Machines Corporation
    Inventors: John Joseph Garrity, John James Hannah McMorran
  • Patent number: 6196443
    Abstract: A solder column structure particularly useful for joining electronic components by C-4 interconnection is provided comprising a solder column attached at one end to one of the substrates being joined and having a layer of indium at the other end. During reflow, to join the other substrate, the indium melts with part of the solder column forming a Pb—Sn—In ternary alloy joint having enhanced fatigue resistance. A method for using the solder column to make electronic component assemblies and electronic component assemblies made using the method and solder column are also provided.
    Type: Grant
    Filed: July 16, 1998
    Date of Patent: March 6, 2001
    Assignee: International Business Machines Corporation
    Inventor: Giulio DiGiacomo
  • Patent number: 6193139
    Abstract: The invention relates to a method for joining coated metallic conductors and the application of the method to production of very high density microjoints as well as to the fabrication of macrojoints. It is characteristic for the invention that the surfaces to be connected are coated with solder metal or solder alloy layers, one on the top of the other. The mating contact areas are heated for a short period of time over the temperature where the base coatings and the top coatings fuse transiently. It is essential that the base coating and the top coating cannot produce intermetallic compounds with each other and that the contact interface between them is as metallic as possible. This kind of contact can be obtained for example by chemical or electrochemical deposition. Moreover, when the topcoat is capable of protecting the base coating, for example bismuth, the joining can be performed under normal atmosphere and without any flux.
    Type: Grant
    Filed: August 21, 1998
    Date of Patent: February 27, 2001
    Inventor: Jorma Kivilahti
  • Patent number: 6189772
    Abstract: The present invention is drawn to a method of making solder bump interconnections or BGAs ranging from chip-level connections to either single chip or multichip modules, flip-chip packages and printed circuit boards connections. According to the method of the present invention, a die wafer or a substrate with a conductive contact location is positioned in close proximity and aligned with a mold wafer having a pocket corresponding to the contact location of the die wafer. A source of a molten solder is also provided which interconnects with the mold wafer. The molten solder from the source is introduced into the pocket of the mold wafer such that the molten solder wets the contact location aligned with the pocket. Before the molten solder inside the pocket is allowed to solidify, the die wafer and the mold wafer are separated from each other.
    Type: Grant
    Filed: August 31, 1998
    Date of Patent: February 20, 2001
    Assignee: Micron Technology, Inc.
    Inventor: David R. Hembree
  • Patent number: 6186216
    Abstract: An apparatus for removing a casting comprising an electronic package substrate and an array of cast solder columns having a column pitch of less than 2 mm extending therefrom from the corresponding openings of a mold. The apparatus includes a removable mold containing a plurality of openings for casting a corresponding array of solder columns and bonding the columns to the underside of an electronic package substrate. A stripper plate for receiving the mold contains openings through a thickness thereof corresponding to at least some of the openings in the mold. An ejector assembly including ejector pins having a length at least as long as the sum of the thickness of the stripper plate at the stripper plate openings and the thickness of the mold at the column casting openings, and corresponding to openings in the mold and the stripper plate.
    Type: Grant
    Filed: December 10, 1998
    Date of Patent: February 13, 2001
    Assignee: International Business Machines Corporation
    Inventors: Lannie R. Bolde, James H. Covell II
  • Patent number: 6179200
    Abstract: A method for forming solder balls that have improved height on an electronic substrate such as a silicon wafer and devices formed are disclosed. In the method, after solder bumps are deposited by a conventional method such as evaporation, electroplating, electroless plating or solder paste screen printing, the solder bumps are reflown on the substrate in an upside down position such that the gravity of the solder material pulls down the solder ball and thereby increasing its height after the reflow process is completed. It has been found that a minimum of 5%, and preferably about 10% height increase has been achieved. Another benefit achieved by the present invention novel method which is associated with the increase in the solder ball height is a corresponding increase in the pitch distance between the solder balls by at least 5%.
    Type: Grant
    Filed: February 3, 1999
    Date of Patent: January 30, 2001
    Assignee: Industrial Technology Research Institute
    Inventors: Ling-Chen Kung, Hsu-Tien Hu, Ruoh-Huey Uang, Szu-Wei Lu, Chun-Yi Kuo
  • Patent number: 6170302
    Abstract: A method and apparatus for continuously cleaning a yarn moving through the device. A first secouring body has a yarn entrance and a yarn exit connecting by a centeral cavity. Pressurized fluid is introduced through the yarn while the yarn is positioned within and moving through the central cavity.
    Type: Grant
    Filed: September 30, 1998
    Date of Patent: January 9, 2001
    Assignee: Ethicon, Inc.
    Inventors: Richard T. Entrekin, Samsel K. Labrecque, Harvey Gordon Anderson
  • Patent number: 6158650
    Abstract: Methods by which low melting point solder for reflow connection of components is formed on select fine and coarse pitch contacts of a printed circuit board simultaneously. A template with openings to select fine pitch circuit board contacts is placed in contact with fine pitch contacts. The fine and coarse pitch contacts of the board are exposed through holes in a stencil characterized in its ability to withstand solder reflow temperatures, not be wettable by solder, and have a coefficient of thermal expansion relatively matching the printed circuit board. Low temperature solder paste is screen deposited into the stencil openings. The solder paste retained by the template and stencil pattern is shaped during reflow to selectively form on the underlying contacts of the printed circuit board. Thereafter the board is subjected to previously practiced depositions of flux in preparation for fine and coarse pitch component placement and ensuing solder reflow.
    Type: Grant
    Filed: September 30, 1999
    Date of Patent: December 12, 2000
    Assignee: Mask Technology, Inc.
    Inventor: Andrew Vincent Holzmann
  • Patent number: 6153505
    Abstract: Disclosed is a solder injection mold apparatus and method for providing solder balls to a printed circuit board substrate using the solder injection mold apparatus in the plastic ball grid array (PBGA). The solder mold through holes are chamfered at entry and at exit ends to assist in receipt of molten solder and the formation and transfer of solder balls to lands on the substrate. A blind recess is provided in the second major surface of the mold, i.e. the side facing the substrate, in order to accommodate electronic components mounted thereon. Solder balls are delivered and metallurgically affixed to the lands in a process that requires only one reflow, leaving the through holes clean of solder and the mold ready for reuse. The material of which the substrate, mold and base plate are comprised is selected to be non-wettable by solder and mutually compatible with respect to CTE when exposed to temperatures of molten solder.
    Type: Grant
    Filed: September 1, 1999
    Date of Patent: November 28, 2000
    Assignee: International Business Machines Corporation
    Inventors: Lannie R. Bolde, Peter Alfred Gruber, Chon Cheong Lei
  • Patent number: 6149048
    Abstract: An apparatus for use in manufacturing a semiconductor device includes an input-output (IO) face having a plurality of IO lands, and is situated in an operating position in abutting relation with a depositor. The apparatus includes a first holding member holding the depositor in a first position; a second holding member holding the semiconductor device in the operating position. The depositor and the semiconductor device cooperate in the operating position to deposit solder ball connection structures to the IO lands. The apparatus further includes a separating member for moving at least one of the depositor and the semiconductor device from the operating position to an interim orientation. The interim orientation establishes a separation distance intermediate the depositor and the semiconductor device appropriate to disengage the solder ball connecting structures from the depositor.
    Type: Grant
    Filed: April 8, 1998
    Date of Patent: November 21, 2000
    Assignee: International Business Machines Corporation
    Inventors: William Brearley, Laertis Economikos, Paul F. Findeis, Kimberley A. Kelly, Bouwe W. Leenstra, Arthur Gilman Merryman, Eric Daniel Perfecto, Chandrika Prasad, James Patrick Wood, Roy Yu
  • Patent number: 6145735
    Abstract: Solder is deposited on chip elements or other potentially irregular surfaces by applying solder paste to a thin porous sheet such as cotton twill cloth so that the solder paste fills open areas therein. The solder volume is thus regulated by the texture and structure of the porous sheet. The porous sheet is then placed in compression against the surface to which solder is to be applied and the solder in the solder paste reflowed in an oven, preferably including a nitrogen atmosphere. At the same time, excess flux is absorbed by the porous sheet to facilitate subsequent cleaning while the reflow of solder is accurately and repeatably controlled. The process and resulting structure are particularly appropriate to the manufacture of discrete electronic devices which include an array of chip components such as capacitor chips sandwiched between plate structures. The process and structure also provides highly repeatable, high quality solder connections between curved surfaces.
    Type: Grant
    Filed: September 10, 1998
    Date of Patent: November 14, 2000
    Assignee: Lockheed Martin Corporation
    Inventors: Michael T. Mallery, James K. Lake
  • Patent number: 6119927
    Abstract: A method and apparatus for placing and attaching solder balls to a substrate having conductive pads in a predetermined pattern is disclosed. The substrate is placed on a carrier plate. An alignment plate having holes corresponding to the predetermined pattern is mated to the carrier plate with its holes aligned with the predetermine pattern on the substrate. Solder balls are loaded into each hole of the alignment plate. The solder balls may be loaded with a vacuum plate which uses vacuum to pick up solder balls in the predetermined pattern and place them over the holes on the alignment plate. The vacuum is released for dropping the balls in the holes of the alignment plate. Alternatively a shutter plate having holes corresponding to the holes on the alignment plate is fitted on the alignment plate and afforded slidable movement between an offset position and an aligned position. A ball is loaded in each hole in the shutter plate when it is in its offset position.
    Type: Grant
    Filed: February 18, 1998
    Date of Patent: September 19, 2000
    Assignee: EDM Supplies, Inc.
    Inventors: Richard Ramos, Paul W. Barnes
  • Patent number: 6119924
    Abstract: An electronic device such as a chip coil including an electric wire firmly connected to electrodes in a highly reliable fashion is constructed to be mounted on a printed circuit board or substrate in a stable and reliable manner. At both ends of a core of the chip coil, there are provided electrodes having a multilayer structure including a high-conductivity layer made of Ag, Ag--Pd, or a similar material; a solder barrier layer made of Ni; and an easy-soldering layer made of Sn or solder. End portions of the electric wire are embedded in the easy-soldering layer so that the resultant electrode structure has a substantially flat surface. A thermo-compression process is performed so that the end portions of the electric wire are connected to the solder barrier layer via solid welding and to the easy-soldering layer via brazing.
    Type: Grant
    Filed: November 3, 1999
    Date of Patent: September 19, 2000
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Takaomi Toi, Tetsuya Morinaga, Masahiro Bando, Tetsuo Hatakenaka, Kazuo Kasahara, Koki Sasaki, Takayuki Hirotsuji
  • Patent number: 6112976
    Abstract: The disclosed invention provides for a method of manufacturing solder columns for particular use in attaching substrates to a printed circuit board. The method results in columns of homogeneous composition and thus overcomes problems associated with the phenomena of segregation. The method includes the steps of forming particles of the metal composition to be used for the columns from a molten source of the composition. The solid particles are then formed into segments of homogeneous composition by drawing ingots of the composition into wire and severing the wire into segments.
    Type: Grant
    Filed: May 27, 1998
    Date of Patent: September 5, 2000
    Assignee: International Business Machines Corporation
    Inventors: Louis-Marie Achard, Claude Blais, David Hirsch Danovitch, Jean-Francois Garneau, Michel Robert
  • Patent number: 6109507
    Abstract: A method of forming solder bumps on pads provided on a board, wherein a plurality of solder bump layer forming cycles are repeatedly implemented. Each of the solder bump layer forming cycles includes the steps of printing solder paste on the board using a mask having mask openings and heating the solder paste so as to fuse the solder paste for forming solder bumps.
    Type: Grant
    Filed: May 15, 1998
    Date of Patent: August 29, 2000
    Assignee: Fujitsu Limited
    Inventors: Harumi Yagi, Noritsugu Ozaki, Tsuyoshi Yamamoto, Toshiyuki Nakada, Takeshi Komiyama, Yoshihito Okuwaki
  • Patent number: 6105852
    Abstract: A precise volume, precisely registerable carrier is provided for use with injection molding for producing integrated circuit bump contacts in the "flip chip" technology. A hemispherical cavity is produced by etching through and undercutting a registered opening into a transparent carrier. The hemispherical cavity has related specific volume and visible peripheral shape that permits simple optical quality control when the injection molding operation has filled the cavity and simple optical registration for fusing to the pads on the integrated circuit.
    Type: Grant
    Filed: February 5, 1998
    Date of Patent: August 22, 2000
    Assignee: International Business Machines Corporation
    Inventors: Steven A. Cordes, Peter Alfred Gruber, Egon Max Kummer, Stephen Roux, Carlos Juan Sambucetti, James Louis Speidell
  • Patent number: 6095397
    Abstract: Solder deposit carrier for the selective soldering of terminal areas of a substrate, comprising on an electrically conductive, non-wettable or wetting-inhibiting coating (12) a transfer mask (13) of an electrically isolating, non-solderable material which exposes the coating in the area of mask openings (14), in which the mask openings (14) serve to accommodate solder deposits (16) electroplated to the coating (12), and the coating (12) comprises two superimposed metal layers (15, 17) of different materials, such that the layer (17) facing towards the mask openings (14) is non-wettable or has a wetting-inhibiting effect, and the layer (15) arranged facing away from the mask openings (14) acts as a current-carrying layer during the electroplating.
    Type: Grant
    Filed: June 29, 1998
    Date of Patent: August 1, 2000
    Assignee: Fraunhofer-Gesellschaft zur Forderung der angewandten Forschung e.V.
    Inventors: Jurgen Wolf, Gerhard Chmiel
  • Patent number: 6085968
    Abstract: A method of forming solder bumps on a wafer. The wafer includes at least one substrate, a plurality of solder-wettable pads and a solder wettable retention ring about the periphery of the wafer. The method of forming solder bumps includes forming a non-solder-wettable mask on the wafer which includes a plurality of apertures which align with the solder-wettable pads, and the solder wettable retention ring surrounds the mask. The mask and wafer are positioned within an aperture of a stencil so that the solder wettable retention ring aligns with a gap between the periphery edge of the mask and an inside edge of the aperture of the stencil. Solder paste is applied to the mask so that the solder paste fills the apertures of the mask and the gap. The solder paste is reflowed forming solder bumps on the pads and a solder ring on the solder wettable retention ring. The mask is removed after formation of the solder bumps.
    Type: Grant
    Filed: January 22, 1999
    Date of Patent: July 11, 2000
    Assignee: Hewlett-Packard Company
    Inventors: Susan J. Swindlehurst, Hubert A. Vander Plas, Jacques Leibovitz
  • Patent number: 6087596
    Abstract: A printed circuit board 50 with reinforced solder joints and having a substrate 11 having mounting pads 14 arranged thereon and a surface mount component 13 having terminations 12, wherein the component 13 is disposed on the substrate 11 with each termination 12 being registered atop a respective mounting pad 14. A solder joint 10 connects each termination 12 with its respective mounting pad 14, and a thin metallic member 30 is disposed within each solder joint 10 between each termination 12 and its respective mounting pad 14. Metallic member 30 is space from both the mounting pad ant the termination and is the same size as the mounting pad or smaller.
    Type: Grant
    Filed: December 4, 1997
    Date of Patent: July 11, 2000
    Assignee: Ford Motor Company
    Inventor: Dangrong Ronald Liu
  • Patent number: 6073829
    Abstract: The invention is related to a method of fabricating an attachment bump of a component (11). In accordance with the invention, a flexible preform (13a) is fabricated, which is plated with materials (13b) appropriate for metallurgical bonding. The invention is also related to a method of attaching a component (11) to the surface of a circuit card (15) using bumps. In accordance with the invention, bumps are formed from preforms (13a) made from a flexible material, which preforms (13a) are metallized (13b) over their entire surface. The bump (13a, 13b) is attached to the attachment pads (12a, 16a) of the component (11) and the circuit card (15) by means of metallizations (12b, 13b, 16b) between the attachment pads and the bump. The bond is formed metallurgically by transfusion. The surface of the bonding side of the component (11) is coated with an insulating material (14) before the mentioned bonding elsewhere than at the attachment pads (12).
    Type: Grant
    Filed: February 26, 1998
    Date of Patent: June 13, 2000
    Assignee: Nokia Mobile Phones Limited
    Inventor: Seppo Pienimaa
  • Patent number: 6059172
    Abstract: A method for establishing electrical communication between a first and second object, comprising the steps of 1) obtaining a first object in electrical communication with at least one BLM, each at least one BLM in contact with a high melting point solder ball coated with a low melting point solder, the low melting point solder contacting each solder ball over at least the portion of the solder ball not in contact with the BLM; 2) interacting a second object having at least one attachment point, each at least one attachment point corresponding to at least one solder ball on the first object where electrical communication is desirable, each solder ball and corresponding attachment point are proximally situated such that each solder ball is capable of forming an electrical communication with the corresponding attachment point; and 3) reflowing the first object and the second object while the first object and the second object are interacted, such that the first object and the second object are in electrical comm
    Type: Grant
    Filed: June 25, 1997
    Date of Patent: May 9, 2000
    Assignee: International Business Machines Corporation
    Inventors: Brian D. Chapman, James J. Petrone, Wai Mon Ma
  • Patent number: 6059176
    Abstract: A method for applying a plurality of solder globules to a substrate has a solder-globule fixing method, a plurality of glass fibers and a fibre holder. The solder-globule fixing method has provided therein a plurality of passages whose cross-sectional areas are smaller than the cross-sectional areas ofthe solder globules to be applied. The fibre holder is arranged relative to the solder-globule fixing device in such a way that between the fibre holder and the solder-globule fixing device a cavity is formed, which is adapted to be acted upon when submitted to pressure via a pressure-transmitting conduit. The fibre holder holds the glass fibres in alignment with the passages.
    Type: Grant
    Filed: April 7, 1998
    Date of Patent: May 9, 2000
    Assignee: Pac Tech Packaging Technologies G.m.b.H.
    Inventors: Ghassem Azdasht, Ramin Azadeh, Clemens Ruthnick, Martin Lange
  • Patent number: 6056191
    Abstract: The present invention discloses a method and apparatus for forming solder bumps by a molten solder screening technique in which a flexible die head constructed of a metal sheet is utilized for maintaining an intimate contact between the die head and a solder receiving mold surface. The flexible die head, when used in combination with a pressure means, is capable of conforming to any curved mold surface as long as the curvature is not more than 2.5 .mu.m per inch of die length. The present invention further provides a method and apparatus for filling a multiplicity of cavities in a mold surface by providing a stream of molten solder and then intimately contacting the surface of the molten solder with a multiplicity of cavities such that the molten solder readily fills the cavities. The apparatus further provides means for removing excess molten solder from the surface of the mold without disturbing the molten solder already filled in the cavities.
    Type: Grant
    Filed: April 30, 1998
    Date of Patent: May 2, 2000
    Assignee: International Business Machines Corporation
    Inventors: Guy Paul Brouillette, Peter Alfred Gruber, Frederic Maurer
  • Patent number: 6054171
    Abstract: Disclosed is a method for forming a protruding electrode which has the steps of: forming a first film of an organic or polymeric material on the top portion of a protruding electrode formed on a protruding-electrode-forming plane; then forming a second film of a polymeric material on the protruding-electrode-forming plane to bury the base portion of the protruding electrode; and removing the first film after the second film is cured; wherein the first film is of the organic or polymeric material which has no affinity with the polymeric material of the second film.
    Type: Grant
    Filed: September 19, 1997
    Date of Patent: April 25, 2000
    Assignee: NEC Corporation
    Inventor: Kazutaka Shoji
  • Patent number: 6053397
    Abstract: Method for the manufacture of micro solder bumps, in which holes are structured by means of laser ablation in a mask, in order to produce solder bumps higher than the mask thickness. Through the additional use of a wobble plate in the production of trough-like stepped holes, micro solder bumps with an even larger volume can be produced.
    Type: Grant
    Filed: September 24, 1997
    Date of Patent: April 25, 2000
    Assignee: Hewlett-Packard Company
    Inventor: Janusz Kaminski
  • Patent number: 6053398
    Abstract: A solder bump forming method includes a step of causing one end surface of a punch inserted into a through hole provided in a die to be retracted by a desired distance from an end surface of the die to thereby provide a recess of a desired volume in the end surface of the die, a step of embedding solder in the recess of the die, a step of moving the punch toward the end surface of the die to thereby extrude the solder, and a step of fusing the solder extruded by the movement of the punch.
    Type: Grant
    Filed: December 2, 1997
    Date of Patent: April 25, 2000
    Assignee: The Furukawa Electric Co., Ltd.
    Inventors: Shinichiro Iizuka, Satoshi Fukuoka, Kenji Suzuki
  • Patent number: 6050481
    Abstract: A method of forming a solder ball structure comprising the steps of 1) obtaining a first object having at least one high melting point solder ball, each solder ball having a corresponding BLM containing a low melting point solder, each solder ball having an outer surface, top and bottom, each BLM having a top and bottom, the bottom of each solder ball in contact with the top of the corresponding BLM over a portion of the outer surface, the bottom of each BLM in electrical communication with the first object; 2) obtaining a template having a first surface; 3) applying a disjoint area of low melting point solder paste to the first surface of the template; 4) interacting the top of each solder ball and the solder paste; and 5) reflowing each solder ball and disjoint area of solder paste while each solder ball and disjoint area of solder paste are interacted.
    Type: Grant
    Filed: June 25, 1997
    Date of Patent: April 18, 2000
    Assignee: International Business Machines Corporation
    Inventors: Brian D. Chapman, James J. Petrone, Wai Mon Ma
  • Patent number: 6047637
    Abstract: A method for depositing a solder paste or other conductive or non-conductive material on a contact pad or other designated region of a substrate. A layer of resist is applied over the boundary of a region in which a bump of a deposited material is to be formed. The resist layer is applied by a screen printing process in which the portion of the screen overlying the region is blocked so that no resist is deposited where the bump is to be formed. The screen is open in the areas surrounding the blocked portion, permitting resist to be deposited over any non-planar surfaces surrounding the intended bump location. This provides a substantially planar surface which may be used as a mask for direct paste deposition into the region where the bump is to be formed, or the planar surface may be used as a flat surface upon which a stencil may be supported. After formation of the bump of conductive or non-conductive paste, the sacrificial resist layer is removed.
    Type: Grant
    Filed: June 17, 1999
    Date of Patent: April 11, 2000
    Assignee: Fujitsu Limited
    Inventors: Albert W. Chan, Michael G. Lee
  • Patent number: 6029882
    Abstract: Disclosed is a solder injection mold apparatus and method for providing solder balls to a printed circuit board substrate using the solder injection mold apparatus in the plastic ball grid array (PBGA). The solder mold through holes are chamfered at entry and at exit ends to assist in receipt of molten solder and the formation and transfer of solder balls to lands on the substrate. A blind recess is provided in the second major surface of the mold, i.e. the side facing the substrate, in order to accommodate electronic components mounted thereon. Solder balls are delivered and metallurgically affixed to the lands in a process that requires only one reflow, leaving the through holes clean of solder and the mold ready for reuse. The material of which the substrate, mold and base plate are comprised is selected to be non-wettable by solder and mutually compatible with respect to CTE when exposed to temperatures of molten solder.
    Type: Grant
    Filed: April 27, 1998
    Date of Patent: February 29, 2000
    Assignee: International Business Machines Corporation
    Inventors: Lannie R. Bolde, Peter Alfred Gruber, Chon Cheong Lei
  • Patent number: 6024275
    Abstract: A method of producing an array of interconnecting contacts for an integrated circuit package, such as a flip chip integrated circuit, and connecting the array of interconnecting contacts to the package utilizes a mold to form the array and attach the array to the package. The method may also be used to interconnect two integrated circuit die. The mold defines a desired shape and relative position for a plurality of interconnecting contacts which make up the array of interconnecting contacts. The array of interconnecting contacts are molded by filling the mold with a desired contact forming material such as solder paste. The mold containing the molded array of interconnecting contacts is positioned adjacent to the integrated circuit package such that each interconnecting contact is positioned adjacent to a corresponding contact pad of the integrated circuit package. And finally, the molded interconnecting contacts are attached to their corresponding contact pads of the integrated circuit package.
    Type: Grant
    Filed: June 16, 1998
    Date of Patent: February 15, 2000
    Assignee: National Semiconductor Corporation
    Inventor: Hem P. Takiar
  • Patent number: 6019272
    Abstract: There is disclosed herein a method for attaching a terminal to a metallic mating surface on a workpiece by friction joining, comprising the steps of: (1) providing the terminal and the workpiece, wherein the terminal comprises an electrically conductive body having a top end to which an electrical connector may be attached, a bottom end having a bottom surface generally conforming to the mating surface of the workpiece, a rotational axis substantially orthogonal to the bottom surface about which the terminal may be rotated, and a layer of solder attached to the bottom surface wherein the layer has an outer perimeter and defines a central solder-free region about the axis; (2) rotating the terminal about its rotational axis at a predetermined rotational speed while holding the workpiece stationary; (3) pressing together the rotating terminal and the stationary workpiece using a predetermined forging force for a predetermined length of time, so as to promote a galling bond between the mating surfaces; and (4) a
    Type: Grant
    Filed: November 12, 1997
    Date of Patent: February 1, 2000
    Assignee: Ford Global Technologies, Inc.
    Inventors: John Scott Badgley, Dawn Roberta White, Richard Lawrence Allor, Samir Samir
  • Patent number: 6015083
    Abstract: A method has been formed for direct solder "bumping" of wafers, chips and interconnection pads or traces on hard to solder surfaces such as aluminum and indium tin oxide. It has been discovered that conventional solders modified by the addition of a light reactive metal can be jetted in the form of microdroplets onto a hard to solder substrate and that the modified droplets will wet and bond to the surface of the hard to solder substrate. This makes it possible for the first time to create solder bumps on bare uncoated hard to solder substrates such as aluminum and indium tin oxide without the need for first applying a different surface which conventional solder will wet.
    Type: Grant
    Filed: January 27, 1997
    Date of Patent: January 18, 2000
    Assignee: MicroFab Technologies, Inc.
    Inventors: Donald J. Hayes, Michael T. Boldman, Virang G. Shah
  • Patent number: 6012626
    Abstract: The invention is to a method for forming solder contact balls (12) for a ball grid array semiconductor device. A solder sheet (15) is formed having solder elements (18) extending out at least one side of the solder sheet (15). The solder sheet is placed over and aligned on a semiconductor package (50) on which solder balls (12) are to be electrically connected to contact areas (51). The solder sheet (15) is aligned with one solder element (18) over each contact area (51). The package (50) and solder sheet (15) is heated to cause the solder elements (18) on the solder sheet (15) to separate and reflow such that the surface tension of the reflowed solder of each solder element (18) forms a solder ball (12) over a contact area (51).
    Type: Grant
    Filed: November 5, 1997
    Date of Patent: January 11, 2000
    Assignee: Texas Instruments Incorporated
    Inventor: Joseph S. Antao
  • Patent number: 6012625
    Abstract: Process and device is available for forming a raised contact metallization 18) on a connection surface (11) of a substrate (10) with the use of a wire bonding device with a bonding tool (26). First of all, a wire end section of a contact material wire (13), drawn from a nose-piece (27), is connected to the connection surface (11) with the application of pressure and temperature, and subsequently a separation of the wire end section (29), connected to the connection surface (11), from the remaining contact material wire (13) takes place.
    Type: Grant
    Filed: November 12, 1997
    Date of Patent: January 11, 2000
    Assignee: Fraunhofer-Gesellschaft zur Forderungder angewandten Forschung e.V.
    Inventors: Elke Zakel, Jens Nave, Joachim Eldring
  • Patent number: 6010059
    Abstract: A method of mechanically joining electrically conductive parts to form an electrically conductive joint by providing first and second electrically conductive parts that are to be joined to establish electric conductivity between them wherein the first part comprises non-alloying material and the second part comprises non-ferrous material. Brazing material is disposed between the parts at a location where they are to be joined. Ultrasonic energy is then applied. The brazing material is selected to comprise at least two materials, one of the two materials being elemental copper, and the elemental copper being the largest single constituent of the brazing material. The invention also provides a novel construction for parts that form a portion of an interruptable current path through a circuit protection device such as an electric circuit breaker.
    Type: Grant
    Filed: September 30, 1997
    Date of Patent: January 4, 2000
    Assignee: Siemens Energy & Automation, Inc.
    Inventor: Charles A. Newland
  • Patent number: 6000603
    Abstract: The present invention relates to a method for making an array of metal balls. The method includes the step of generating a first pattern on a metal foil which includes a plurality of foil projections. The method also includes the step of generating a second pattern on a carrier substrate. The second pattern includes a plurality of carrier recesses that are arranged and configured to correspond with the foil projections of the first pattern. The method further includes the steps of placing the metal foil and the carrier substrate together such that the foil projections of the metal foil fit within the carrier recesses of the carrier substrate, and melting the metal foil such that the foil projections form metal balls positioned within the carrier recesses of the carrier substrate. The invention also relates to metal ball arrays constructed via the above method.
    Type: Grant
    Filed: May 23, 1997
    Date of Patent: December 14, 1999
    Assignee: 3M Innovative Properties Company
    Inventors: David C. Koskenmaki, Randolph D. Schueller, Robert P. McCollam
  • Patent number: 5988487
    Abstract: Methods for forming solder bumps on integrated circuit chips (and other similar circuitized units). A screening stencil is laid over the surface of the substrate and solder paste material is deposited into the stencil's apertures with a screening blade. The stencil is placed in such a manner that each of its apertures is positioned over a substrate pad, upon which a solder bump is to be formed. Next, a flat pressure plate is laid over the exposed top surface of the stencil, which creates a fully enclosed or "captured", cell of solder paste within each stencil aperture. Then, with the stencil and plate remaining in place on top of the substrate, the substrate is heated to a temperature sufficient to reflow the solder paste material. After reflow, the substrate is cooled, and the pressure plate and stencil are thereafter removed, leaving solder bumps on the substrate. The use of the pressure plate ensures the proper formation of the solder bumps at high densities of solder bumps (i.e.
    Type: Grant
    Filed: May 27, 1997
    Date of Patent: November 23, 1999
    Assignees: Fujitsu Limited, Semi-Pac
    Inventors: John T. MacKay, Thomas E. Molinaro, David G. Love, Patricia R. Boucher
  • Patent number: 5984166
    Abstract: A method by which low melting point solder for reflow connection of components is formed on select fine and coarse pitch contacts of a printed circuit board simultaneously. A template with openings to select fine pitch circuit board contacts is placed in contact with fine pitch contacts. The fine and coarse pitch contacts of the board are exposed through holes in a stencil characterized in its ability to withstand solder reflow temperatures, not be wettable by solder, and have a coefficient of thermal expansion relatively matching the printed circuit board. Low temperature solder paste is screen deposited into the stencil openings. The stencil is removed and a mesh is fixedly positioned on the board, the solder paste retained by the stencil pattern is reflowed to selectively form on the underlying contacts of the printed circuit board.
    Type: Grant
    Filed: July 9, 1997
    Date of Patent: November 16, 1999
    Assignee: Mask Technology, Inc.
    Inventor: Andrew Vincent Holzmann
  • Patent number: 5984164
    Abstract: The present invention relates to a solder ball shaping tool and a method for using the tool. In a substrate there is formed a series of depressions. The tool is pressed onto a ball grid array and the ball grid array is realigned either with simple pressure or pressure assisted by heating. Where a solder ball may have been deposited upon a die or a chip package in a diameter that exceeds that of the designed diameter, a corral tool is used to substantially conform the solder ball to design dimensions and a design location. As the corral tool is pressed against the solder ball, portions of the solder ball will reflow both into the substrate depression and into the corral. Where the total volume of the solder ball does not exceed that of both the corral and the substrate depression, the corral tool is adequate to achieve a designed solder ball height.
    Type: Grant
    Filed: October 31, 1997
    Date of Patent: November 16, 1999
    Assignee: Micron Technology, Inc.
    Inventor: James M. Wark
  • Patent number: 5964395
    Abstract: A method of attaching an electronic component to a substrate comprising the steps of depositing a spray metal coating atop a substrate. An electronic component is placed atop a coating. A liquid metal is dispensed on or near the component. The liquid metal wets the component and the coating. The metal is reacted with the coating to form an electrically conductive bond with the substrate and adheres the component to the substrate. The reactive metal may be heated to a temperature which makes it liquid and facilitates wetting the coating and component. Suitable materials for the spray metal coating include copper, nickel, tin, bismuth, lead and silver and mixtures thereof. Suitable liquid metals generally include low melting temperature metals such as gallium and indium and mixtures thereof.
    Type: Grant
    Filed: June 9, 1997
    Date of Patent: October 12, 1999
    Assignee: Ford Motor Company
    Inventors: Andrew Z. Glovatsky, Mohan R. Paruchuri
  • Patent number: 5962151
    Abstract: A conductor (112), a method for forming the conductor (112), and a method for attaching a discrete circuit device, such as a bond pad, chip capacitor, chip resistor, etc., to the conductor (112) with solder connections (16). Solder connections (16) formed by the method are characterized as being accurately located on the conductor (112) and having a shape and location that achieves an adequate and uniform stand-off height for the device, and improves thermal cycle fatigue life. Such benefits are achieved by forming a nonsolderable layer (114) on a substrate (10), and then forming a solderable conductor (112) on the substrate (10) such that a first portion of the conductor (112) overlies the nonsolderable layer (114) and a second portion of the conductor (112) does not overlie the nonsolderable layer (114).
    Type: Grant
    Filed: December 5, 1997
    Date of Patent: October 5, 1999
    Assignee: Delco Electronics Corp.
    Inventors: Christine Ann Paszkiet, Carl William Berlin, Stephanie Yolanda Oden
  • Patent number: 5961032
    Abstract: A method is described for forming solder mounds for attachment to electronic devices. The solder mounds are preferably in the form of columns and comprise a first solder portion and a second solder portion with the two solder portions having different melting points. The solder columns are preferably formed using an injection molding device. The method is directed to the use of a single column mold to form the multi-solder column. In one embodiment, deformable material is used to partially block a portion of the through opening of the mold during a first solder injection process. The deformable material is then removed and the remainder of the through openings of the mold filled with a second molten solder. The multi-solder column is then electrically connected to a substrate by reflowing.
    Type: Grant
    Filed: June 30, 1997
    Date of Patent: October 5, 1999
    Assignee: International Business Machines Corporation
    Inventors: James H. Covell, II, Shaji Farooq, Peter A. Gruber, Sudipta K. Ray
  • Patent number: 5957370
    Abstract: Apertures in a tape formed on a substrate allow straight plating of solder bumps to heights above 4 mils. The solder bumps are combined with a lower density material to form an hourglass-shaped structure which allows interconnections to bonding pads of electronic components with pitches less than 9 mils.
    Type: Grant
    Filed: January 10, 1997
    Date of Patent: September 28, 1999
    Assignee: Integrated Device Technology, Inc.
    Inventor: Terry R. Galloway
  • Patent number: 5950908
    Abstract: A method of depositing solder paste includes the steps of: superimposing a masking member having a plurality of through-holes and a supporting member on each other so that the supporting member covers the plurality of through-holes; filling cavity portions formed by the plurality of through-holes and the supporting member with solder paste; disposing an LSI chip and the masking member so that electrodes and the cavity portions are superimposed on each other respectively; and heating the solder paste so as to make the solder paste deposit on the electrodes.
    Type: Grant
    Filed: December 18, 1996
    Date of Patent: September 14, 1999
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Junji Fujino, Jitsuho Hirota, Goro Izuta, Akira Adachi
  • Patent number: 5950907
    Abstract: An enhanced fatigue life solder comprising, by weight, about 1-3% tin, about 1-3% silver and the balance essentially lead is provided. The solder is particularly useful for joining electronic components and in particular for making C-4 interconnections. A method for using the solder to make electronic components and electric components made using the method are also provided.
    Type: Grant
    Filed: March 26, 1997
    Date of Patent: September 14, 1999
    Assignee: International Business Machines Corporation
    Inventor: Giulio DiGiacomo
  • Patent number: 5941449
    Abstract: A method of precisely positioning a quantity of conductive spacers (e.g., spherically shaped solder balls) on respective conductive pads (e.g., copper pads) of an underlying substrate (e.g., an FR4 printed circuit board or flexible circuit member) wherein the spacers are forcibly retained within a suitable holder and, when engaged with the respective pads, reflowed to effect a plurality of positive electrical connections between the spacers and pads. Such forcible retention allows for partial extension of the spacers from the invention's carrier, which is also disclosed.
    Type: Grant
    Filed: February 9, 1998
    Date of Patent: August 24, 1999
    Assignee: International Business Machines Corporation
    Inventors: Christian Robert Le Coz, Donald Ivan Mead, Roger James Stockholm