With Particular Dopant Concentration Or Concentration Profile (e.g., Graded Junction) Patents (Class 257/101)
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Patent number: 12119425Abstract: A multi-junction light-emitting diode (LED) includes a first epitaxial structure, a second epitaxial structure and a tunnel junction structure disposed therebetween. The tunnel junction structure includes a InzAlX1Ga1?X1As highly doped p-type semiconductor layer wherein z ranges from 0 to 0.05, a AlX2Ga1?X2As first composition graded layer wherein X2 is greater than 0 and less than X1, a GaYIn1?YP highly doped n-type semiconductor layer and a AlX3Ga1?X3As second composition graded layer that are sequentially disposed on the first epitaxial structure in such order. A method for making the abovementioned multi-junction LED is also disclosed.Type: GrantFiled: March 16, 2022Date of Patent: October 15, 2024Assignee: TIANJIN SANAN OPTOELECTRONICS CO., LTD.Inventors: Chihhung Hsiao, Yu-Ren Peng, Kunhuang Cai, Duxiang Wang, Chia-Hung Chang
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Patent number: 12009454Abstract: A light-emitting device includes an n-side semiconductor layer comprising an n-type contact layer and an intermediate layer located on the n-type contact layer; an active layer located on the intermediate layer; and a p-side semiconductor layer located on the active layer. The intermediate layer includes at least one stacked portion comprising a first layer and a second layer. The first layer is an n-type nitride semiconductor layer comprising an n-type impurity, Al, and Ga. The second layer is a nitride semiconductor layer that includes Al and Ga, has a lower n-type impurity concentration than the first layer, and has a larger thickness than the first layer. An Al composition ratio of the first layer is higher than an Al composition ratio of the second layer.Type: GrantFiled: October 21, 2021Date of Patent: June 11, 2024Assignee: NICHIA CORPORATIONInventor: Takuya Okada
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Patent number: 11984528Abstract: A method of manufacturing a nitride semiconductor device includes: forming, on or above a p-type nitride semiconductor tunnel junction layer, a first n-type nitride semiconductor layer that forms a tunnel junction with the p-type nitride semiconductor tunnel junction layer, the first n-type nitride semiconductor layer having a first impurity concentration and a first thickness; forming, on or above the first n-type nitride semiconductor layer, in a nitrogen atmosphere, a second n-type nitride semiconductor layer having a second n-type impurity concentration less than the first n-type impurity concentration and a second thickness; and forming, on or above the second n-type nitride semiconductor layer, in a hydrogen atmosphere, a third n-type nitride semiconductor layer having a third n-type impurity concentration less than the first n-type impurity concentration and a third thickness.Type: GrantFiled: March 23, 2021Date of Patent: May 14, 2024Assignee: NICHIA CORPORATIONInventor: Toshihiko Kishino
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Patent number: 11910643Abstract: A method of manufacturing a display system includes forming a display element having a display active area over a silicon backplane, forming a display driver integrated circuit (DDIC), and bonding the display element to the display driver integrated circuit (DDIC). The display active area may include a light emitting diode such as an organic light emitting diode (OLED). Separately forming the display and the display circuitry may simplify formation of the OLED and allow for a higher density control interface between the display and the DDIC.Type: GrantFiled: September 24, 2021Date of Patent: February 20, 2024Assignee: Meta Platforms Technologies, LLCInventors: Min Hyuk Choi, Cheonhong Kim, Zhiming Zhuang
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Patent number: 11898269Abstract: A gallium-containing nitride crystals are disclosed, comprising: a top surface having a crystallographic orientation within about 5 degrees of a plane selected from a (0001)+c-plane and a (000-1)?c-plane; a substantially wurtzite structure; n-type electronic properties; an impurity concentration of hydrogen greater than about 5×1017 cm?3, an impurity concentration of oxygen between about 2×1017 cm?3 and about 1×1020 cm?3, an [H]/[O] ratio of at least 0.3; an impurity concentration of at least one of Li, Na, K, Rb, Cs, Ca, F, and Cl greater than about 1×1016 cm?3, a compensation ratio between about 1.0 and about 4.0; an absorbance per unit thickness of at least 0.Type: GrantFiled: May 6, 2020Date of Patent: February 13, 2024Assignee: SLT Technologies, Inc.Inventors: Wenkan Jiang, Dirk Ehrentraut, Mark P. D'Evelyn
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Patent number: 11869817Abstract: The invention comprises a light emitting diode chip and a package substrate. The light emitting diode chip is provided with a semiconductor epitaxial structure, a lateral extending interface structure, a chip conductive structure, an N-type electrode located above the semiconductor epitaxial structure and a P-type bypass detection electrode located on the lateral extending interface structure. The chip conductive structure is provided with a P-type main electrode located on a lower side. The package substrate comprises a plurality of electrode contacts through which the N-type electrode, the P-type bypass detection electrode and the P-type main electrode are connected, and a process quality of a alternative substrate adhesive layer in one of the semiconductor epitaxial structure and the chip conductive structure and a chip-substrate bonding adhesive layer between the P-type main electrode and the package substrate is evaluated by detecting electrical characteristics.Type: GrantFiled: July 26, 2021Date of Patent: January 9, 2024Assignee: EXCELLENCE OPTO. INC.Inventors: Fu-Bang Chen, Chih-Chiang Chang, Chang-Ching Huang, Chun-Ming Lai, Wen-Hsing Huang, Tzeng-Guang Tsai, Kuo-Hsin Huang
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Patent number: 11843042Abstract: Structures and methods for controlling dopant diffusion and activation are disclosed. In one example, a semiconductor structure is disclosed. The semiconductor structure includes: a channel layer; a barrier layer over the channel layer; a gate electrode over the barrier layer; and a doped layer formed between the barrier layer and the gate electrode. The doped layer includes (a) an interface layer in contact with the barrier layer and (b) a main layer between the interface layer and the gate electrode. The doped layer comprises a dopant whose doping concentration in the interface layer is lower than that in the main layer.Type: GrantFiled: August 18, 2021Date of Patent: December 12, 2023Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ching-Yu Chen, Wei-Ting Chang, Yu-Shine Lin, Jiang-He Xie
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Patent number: 11758812Abstract: A power generation element includes a first crystal region including Alx1Ga1-x1N (0<x1?1), and a second crystal region including a first element and Alx2Ga1-x2N (0?x2<x1). The first element includes at least one selected from the group consisting of Si, Ge, Te, and Sn. The first crystal region includes a first surface and a second surface. The second surface is between the second crystal region and the first surface. The second crystal region includes a third surface and a fourth surface. The third surface is between the fourth surface and the first crystal region. An orientation from the fourth surface toward the third surface is along a <0001> direction of the second crystal region. An orientation from the second surface toward the first surface is along a <000-1> direction of the first crystal region.Type: GrantFiled: January 7, 2021Date of Patent: September 12, 2023Assignee: KABUSHIKI KAISHA TOSHIBAInventors: Hisashi Yoshida, Shigeya Kimura
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Patent number: 11726258Abstract: Photonic devices having a photonic waveguiding layer, and a cladding layer, disposed on the photonic waveguiding layer, and where the cladding section is a material comprising Scandium. The cladding layer may include a material comprising Al1-xScxN material where 0<x?0.45.Type: GrantFiled: January 20, 2022Date of Patent: August 15, 2023Assignees: Raytheon BBN Technologies Corp., Raytheon CompanyInventors: Mohammad Soltani, Eduardo M. Chumbes
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Patent number: 11552216Abstract: A light emitting apparatus includes an electrode and a laminated structure. The laminated structure includes an n-type first semiconductor layer, a light emitting layer, a p-type second semiconductor layer, a tunnel junction layer, and an n-type third semiconductor layer. The electrode is electrically connected to the first semiconductor layer. The first semiconductor layer, the light emitting layer, the second semiconductor layer, the tunnel junction layer, and the third semiconductor layer are arranged in a presented order. The light emitting layer and the first semiconductor layer form a columnar section.Type: GrantFiled: March 8, 2021Date of Patent: January 10, 2023Inventors: Yasuto Akatsuka, Hiroyuki Shimada, Koichiro Akasaka, Katsumi Kishino
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Patent number: 11538962Abstract: A light-emitting element includes: a first n-type nitride semiconductor layer; a first light-emitting layer located on the first n-type nitride semiconductor layer; a p-type GaN layer located on the first light-emitting layer; an n-type GaN layer located on the p-type GaN layer and doped with an n-type impurity at an impurity concentration higher than that of the first n-type nitride semiconductor layer; a non-doped GaN layer located between the p-type GaN layer and the n-type GaN layer, a thickness of the non-doped GaN layer being not more than a width of a depletion layer formed by the n-type and p-type GaN layers; a second n-type nitride semiconductor layer located on the n-type GaN layer and doped with an n-type impurity; a second light-emitting layer located on the second n-type nitride semiconductor layer; and a p-type nitride semiconductor layer located on the second light-emitting layer and doped with a p-type impurity.Type: GrantFiled: April 9, 2020Date of Patent: December 27, 2022Assignee: NICHIA CORPORATIONInventor: Seiichi Hayashi
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Patent number: 11251587Abstract: A laser diode and a method for manufacturing a laser diode are disclosed. In an embodiment a laser diode includes a surface emitting semiconductor laser configured to emit electromagnetic radiation and an optical element arranged downstream of the semiconductor laser in a radiation direction, wherein the optical element includes a diffractive structure or a meta-optical structure or a lens structure, and wherein the optical element and the semiconductor laser are cohesively connected to each other.Type: GrantFiled: May 30, 2018Date of Patent: February 15, 2022Assignee: OSRAM OLED GMBHInventors: Frank Singer, Hubert Halbritter
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Patent number: 11236438Abstract: The present invention relates to a silicon carbide (SiC) substrate with improved mechanical and electrical characteristics. Furthermore, the invention relates to a method for producing a bulk SiC crystal in a physical vapor transport growth system. The silicon carbide substrate comprises an inner region (102) which constitutes at least 30% of a total surface area of said substrate (100), a ring shaped peripheral region (104) radially surrounding the inner region (102), wherein a mean concentration of a dopant in the inner region (102) differs by at maximum 5·1018 cm?3, preferably 1·1018 cm?3, from the mean concentration of this dopant in the peripheral region (104).Type: GrantFiled: March 7, 2018Date of Patent: February 1, 2022Assignee: SICRYSTAL GMBHInventors: Michael Vogel, Bernhard Ecker, Ralf Müller, Matthias Stockmeier, Arnd-Dietrich Weber
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Patent number: 11227974Abstract: A nitride semiconductor light-emitting element includes an n-type cladding layer including n-type AlGaN having a first Al composition ratio, a barrier layer including AlGaN that is located on the n-type cladding layer side in a multiple quantum well layer and has a second Al composition ratio greater than the first Al composition ratio, and a graded layer that is located between the n-type cladding layer and the barrier layer and has a third Al composition ratio that is between the first Al composition ratio and the second Al composition ratio, wherein the third Al composition ratio of the graded layer increases at a predetermined increase rate from the first Al composition ratio toward the second Al composition ratio.Type: GrantFiled: July 31, 2018Date of Patent: January 18, 2022Assignee: NIKKISO CO., LTD.Inventors: Yuta Furusawa, Mitsugu Wada, Yusuke Matsukura, Cyril Pernot
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Patent number: 11158690Abstract: A method of manufacturing a display system includes forming a display element having a display active area over a silicon backplane, forming a display driver integrated circuit (DDIC), and bonding the display element to the display driver integrated circuit (DDIC). The display active area may include a light emitting diode such as an organic light emitting diode (OLED). Separately forming the display and the display circuitry may simplify formation of the OLED and allow for a higher density control interface between the display and the DDIC.Type: GrantFiled: July 31, 2019Date of Patent: October 26, 2021Assignee: Facebook Technologies, LLCInventors: Min Hyuk Choi, Cheonghong Kim, Zhiming Zhuang
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Patent number: 11152463Abstract: A semiconductor nanocrystal structure may include a core, an inner absorption shell surrounding the core, at least one emission shell surrounding the inner absorption shell, and an outer absorption shell surrounding the emission shell(s). The core may include a different material than the optional inner absorption shell and/or the outer absorption shell. The core may be less absorbent to electromagnetic radiation as compared to the optional inner absorption shell and/or the outer absorption shell. An optoelectronic device may include the semiconductor nanocrystal structure.Type: GrantFiled: March 18, 2020Date of Patent: October 19, 2021Assignee: OSRAM Opto Semiconductors GmbHInventors: Joseph A. Treadway, Benjamin Daniel Mangum, David O'Brien
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Patent number: 11081861Abstract: This invention opens up the chip thickness for increasing VCSEL power. It describes a method by using multiple gain layers 10, separated by insulating layers 11, powered in parallel electrically through embedded electrodes 13, 14 connected through via holes. The gain layers, as a whole, are bounded on top and bottom by DBR mirrors 12. The structure, compared to a standard VCSEL, leads to higher power, lower resistive loss, higher device speed, higher beam quality, and fewer number of DBR layers.Type: GrantFiled: April 10, 2020Date of Patent: August 3, 2021Inventor: Mieng Pai
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Patent number: 11064590Abstract: An optoelectronic component, a method for manufacturing an optoelectronic component and a method for operating an optoelectronic component are disclosed. In an embodiment, the component includes a carrier comprising a molded body and a light-emitting semiconductor body with a first segment and a second segment, wherein the first segment and the second segment are spatially separated from one another, and wherein each segment has an emission side facing away from the carrier. The component further includes a first electrical conductor path arranged on the first segment and on the second segment on a side of the light-emitting semiconductor body facing towards the carrier and a first electrical connecting structure and a second electrical connecting structure, each electrically connecting the first segment and the second segment to one another, wherein the first and second electrical connecting structure are electrically connected to one another by the first electrical conductor path.Type: GrantFiled: August 22, 2016Date of Patent: July 13, 2021Assignee: OSRAM OLED GMBHInventor: Korbinian Perzlmaier
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Patent number: 10930818Abstract: A light emitting device includes: a plurality of light emitting stacked layers, including a first surface and a second surface, wherein the second surface is electrically opposite to the first surface; a mesa structure; and a current blocking (CB) layer disposed on the first surface; a transparent conductive layer disposed on or above the first surface; and a first pad electrode, disposed on the transparent conductive layer and on the first surface; wherein a sidewall of the CB layer comprises a first surface section and a second surface section having different slopes.Type: GrantFiled: July 6, 2018Date of Patent: February 23, 2021Assignee: EPISTAR CORPORATIONInventors: Chien Cheng Huang, Kuo-Wei Yen, Yu-Wei Kuo, Yao-Wei Yang, Pei-Hsiang Tseng
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Patent number: 10865469Abstract: A compound semiconductor has a high electron concentration of 5×1019 cm?3 or higher, exhibits an electron mobility of 46 cm2/V·s or higher, and exhibits a low electric resistance, and thus is usable to produce a high performance semiconductor device. The present invention provides a group 13 nitride semiconductor of n-type conductivity that may be formed as a film on a substrate having a large area size at a temperature of room temperature to 700° C.Type: GrantFiled: June 1, 2017Date of Patent: December 15, 2020Assignee: JAPAN SCIENCE AND TECHNOLOGY POLICYInventors: Hiroshi Fujioka, Kohei Ueno
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Patent number: 10861942Abstract: Techniques are disclosed for forming tunable capacitors including multiple two-dimensional electron gas (2DEG) and three-dimensional electron gas (3DEG) structures for use in tunable radio frequency (RF) filters. In some cases, the tunable capacitors include a stack of group III material-nitride (III-N) compound layers that utilize polarization doping to form the 2DEG and 3DEG structures. In some instances, the structures may be capable of achieving at least three capacitance values, enabling the devices to be tunable. In some cases, the tunable capacitor devices employing the multi-2DEG and 3DEG structures may be a metal-oxide-semiconductor capacitor (MOSCAP) or a Schottky diode, for example. In some cases, the use of tunable RF filters employing the multi-2DEG and 3DEG III-N tunable capacitor devices described herein can significantly reduce the number of filters in an RF front end, resulting in a smaller physical footprint and reduced bill of materials cost.Type: GrantFiled: December 9, 2015Date of Patent: December 8, 2020Assignee: Intel CorporationInventors: Han Wui Then, Sansaptak Dasgupta, Marko Radosavljevic
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Patent number: 10840411Abstract: A semiconductor layer sequence is disclosed. In an embodiment the semiconductor layer sequence includes an n-conducting n-region, a p-conducting p-region and an active zone having at least one quantum well located between the n-region and the p-region, wherein the semiconductor layer sequence includes AlInGaN, wherein the n-region comprises a superlattice, wherein the superlattice has a structural unit which repeats at least three times, wherein the structural unit comprises at least one AlGaN layer, at least one GaN layer and at least one InGaN layer, wherein an intermediate layer is disposed between the active zone and the superlattice, wherein the intermediate layer comprises either n-doped GaN or n-doped GaN together with n-doped InGaN so that the intermediate layer is free of aluminum, and wherein the intermediate layer directly adjoins the active zone and the superlattice.Type: GrantFiled: July 5, 2017Date of Patent: November 17, 2020Assignee: OSRAM OLED GmbHInventor: Werner Bergbauer
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Patent number: 10622206Abstract: Described herein are methods for using remote plasma chemical vapor deposition (RP-CVD) and sputtering deposition to grow layers for light emitting devices. A method includes growing a light emitting device structure on a growth substrate, and growing a tunnel junction on the light emitting device structure using at least one of RP-CVD and sputtering deposition. The tunnel junction includes a p++ layer in direct contact with a p-type region, where the p++ layer is grown by using at least one of RP-CVD and sputtering deposition. Another method for growing a device includes growing a p-type region over a growth substrate using at least one of RP-CVD and sputtering deposition, and growing further layers over the p-type region. Another method for growing a device includes growing a light emitting region and an n-type region using at least one of RP-CVD and sputtering deposition over a p-type region.Type: GrantFiled: February 13, 2019Date of Patent: April 14, 2020Assignee: Lumileds LLCInventors: Isaac Wildeson, Parijat Deb, Erik Charles Nelson, Junko Kobayashi
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Patent number: 10622508Abstract: A method for manufacturing an optoelectronic component includes providing a growth substrate; applying a succession of semiconductor layers; structuring the succession of semiconductor layers; applying a sacrificial layer; depositing a metal layer; optionally planarizing using a dielectric material; forming a second terminal contact through the active region; applying a permanent support; and detaching the growth substrate and exposing the metal layer.Type: GrantFiled: February 24, 2017Date of Patent: April 14, 2020Assignee: OSRAM OLED GmbHInventors: Dominik Scholz, Alexander F. Pfeuffer, Isabel Otto
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Patent number: 10553756Abstract: An embodiment of the present invention includes: a gallium nitride substrate; and a light-emitting structure disposed on the other surface of the substrate, wherein the substrate includes a plurality of light extraction structures formed on one surface thereof, the thickness of the substrate is 80 ?m or more, and the average height of the plurality of light extraction structures is 10 ?m or more.Type: GrantFiled: September 30, 2016Date of Patent: February 4, 2020Assignee: LG INNOTEK CO., LTD.Inventors: Jong Sub Lee, Hyun Don Song, Ki Man Kang, Seung Hwan Kim, Sung Dal Jung
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Patent number: 10541352Abstract: Described herein are methods for growing light emitting devices under ultra-violet (UV) illumination. A method includes growing a III-nitride n-type layer over a III-nitride p-type layer under UV illumination. Another method includes growing a light emitting device structure on a growth substrate and growing a tunnel junction on the light emitting device structure, where certain layers are grown under UV illumination. Another method includes forming a III-nitride tunnel junction n-type layer over the III-nitride p-type layer to form a tunnel junction light emitting diode. A surface of the III-nitride tunnel junction n-type layer is done under illumination during an initial period and a remainder of the formation is completed absent illumination. The UV light has photon energy higher than the III-nitride p-type layer's band gap energy. The UV illumination inhibits formation of Mg—H complexes within the III-nitride p-type layer resulting from hydrogen present in a deposition chamber.Type: GrantFiled: October 25, 2017Date of Patent: January 21, 2020Inventors: Tsutomu Ishikawa, Isaac Wildeson, Erik Charles Nelson, Parijat Deb
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Patent number: 10535493Abstract: A photocathode can include a body fabricated of a wide bandgap semiconductor material, a metal layer, and an alkali halide photocathode emitter. The body may have a thickness of less than 100 nm and the alkali halide photocathode may have a thickness less than 10 nm. The photocathode can be illuminated with a dual wavelength scheme.Type: GrantFiled: October 3, 2018Date of Patent: January 14, 2020Assignee: KLA-Tencor CorporationInventors: Katerina Ioakeimidi, Gildardo R. Delgado, Michael E. Romero, Frances Hill, Rudy F. Garcia
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Patent number: 10446715Abstract: Disclosed herein is a semiconductor device. The semiconductor device includes a substrate, a first conductive type semiconductor layer disposed over the substrate, an active layer disposed over the first conductive type semiconductor layer, and a second conductive type semiconductor layer disposed over the active layer. The first conductive type semiconductor layer includes a first layer, a second layer and a third layer having different composition ratios of indium (In). The first semiconductor layer is disposed close to the active layer. The second semiconductor layer is disposed under the first semiconductor layer. The third semiconductor layer is disposed under the second semiconductor layer. In content is reduced from the active layer to the third semiconductor layer, and In content of the third semiconductor layer may be 5% or more to 10% or less of that of the active layer.Type: GrantFiled: November 2, 2017Date of Patent: October 15, 2019Assignee: LG INNOTEK CO., LTD.Inventors: Kwang Sun Baek, Jong Ho Na, Dae Seob Han, Jung Hyun Hwang
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Patent number: 10418573Abstract: According to an aspect, an organic light-emitting device includes: a first electrode; a second electrode facing the first electrode; and an emission layer disposed between the first electrode and the second electrode and including a host and a dopant, wherein the host is an exciplex host, which is a combination of a hole transporting host and an electron transporting host which form an exciplex, or a delayed fluorescent organic compound, and the dopant includes both a phosphorescent dopant and a fluorescent dopant.Type: GrantFiled: July 27, 2015Date of Patent: September 17, 2019Assignee: SEOUL NATIONAL UNIVERSITY R&DB FOUNDATIONInventors: Jang-Joo Kim, Hyun-Gu Kim, Kwon-Hyeon Kim, Jin-Won Sun
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Patent number: 10416496Abstract: A backlight module and liquid crystal display device are disclosed. The backlight module includes: at least one first light-emitting unit having a first blue light-emitting chip; at least one second light-emitting unit having a second blue light-emitting chip, wherein, an emission peak wavelength of the second blue light-emitting chip is greater than an emission peak wavelength of the first blue light-emitting chip; and a control circuit used for dynamic adjusting a brightness of the first light-emitting unit and the second light-emitting unit according to the blue saturation. The present invention can dynamically adjust the output amount of the blue light according to the blue saturation so that the present invention can selectively decrease the blue light when maintaining the display brightness and chroma.Type: GrantFiled: June 26, 2017Date of Patent: September 17, 2019Assignee: Wuhan China Star Optoelectronics Technology Co., LtdInventors: Yong Yang, Yingbao Yang
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Patent number: 10418239Abstract: Provided is an epitaxial substrate for semiconductor elements which suppresses an occurrence of current collapse. The epitaxial substrate for the semiconductor elements includes: a semi-insulating free-standing substrate formed of GaN being doped with Zn; a buffer layer being adjacent to the free-standing substrate; a channel layer being adjacent to the buffer layer; and a barrier layer being provided on an opposite side of the buffer layer with the channel layer therebetween, wherein the buffer layer is a diffusion suppressing layer formed of Al-doped GaN and suppresses diffusion of Zn from the free-standing substrate into the channel layer.Type: GrantFiled: April 27, 2018Date of Patent: September 17, 2019Assignee: NGK INSULATORS, LTD.Inventors: Mikiya Ichimura, Sota Maehara, Yoshitaka Kuraoka
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Patent number: 10411438Abstract: Provided is a semiconductor multilayer film reflecting mirror formed by alternately repeating a first nitride film containing In (indium) and a second nitride film not containing In. The reflecting mirror includes an inter-film transition layer between the first and second nitride films, the composition of which is varied from the composition of the first nitride film to the composition of the second nitride film. The inter-film transition layer has a first transition layer formed on the first nitride film and containing In and Al (aluminum), and a second transition layer formed on the first transition layer and containing Al but not containing In. In the first transition layer, the percentages of In and Al are decreased from the first nitride film to the second transition layer, and the percentage of In in the first transition layer starts to decrease at a same or closer position to the first nitride film than the percentage of Al.Type: GrantFiled: December 8, 2017Date of Patent: September 10, 2019Assignees: STANLEY ELECTRIC CO., LTD., MEIJO UNIVERSITYInventors: Tetsuya Takeuchi, Isamu Akasaki, Takanobu Akagi
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Patent number: 10411165Abstract: An invisible-light light-emitting diode includes an N-type ohmic contact semiconductor layer, an N-type current spreading layer, an N—GaAs visible-light absorption layer, an N-type cladding layer, a light-emitting layer, a P-type cladding layer and a P-type ohmic contact semiconductor layer. In the invisible-light light-emitting diode, the absorption layer is GaAs, which can effectively remove all visible light when current density is >1 A/mm2, and essentially all visible light when current density is below 3 A/mm2. This effectively solves the red dot effect of invisible-light light-emitting diodes.Type: GrantFiled: January 12, 2018Date of Patent: September 10, 2019Assignee: XIAMEN SAN'AN OPTOELECTRONICS CO., LTD.Inventors: Chaoyu Wu, Chun-Yi Wu, Chun Kai Huang, Duxiang Wang
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Patent number: 10403840Abstract: The invention describes a device for emitting or detecting electromagnetic radiation. The device has a first and a second electrode which are connected to each other via an electrically conductive nanostructure. The electrically conductive nanostructure is configured to receive electrons and holes from the first and second electrode or transport same to the first and second electrode. In addition, the device has a radiation molecule arranged at a circumferential surface of the electrically conductive nanostructure. The radiation molecule is configured to absorb electrons and holes or electromagnetic radiation and emit the electromagnetic radiation with recombination of electrons absorbed and holes absorbed, or emit electrons and holes based on the electromagnetic radiation absorbed.Type: GrantFiled: April 25, 2016Date of Patent: September 3, 2019Assignees: Technische Universitaet Chemnitz, Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.Inventors: Thomas Gessner, Thomas Otto, Stefan Schulz, Sascha Hermann, Thomas Blaudeck, Christian Spudat
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Patent number: 10388828Abstract: A semiconductor chip includes a semiconductor body with a semiconductor layer sequence. An active region intended for generating radiation is arranged between an n-conductive multilayer structure and a p-conductive semiconductor layer. A doping profile is formed in the n-conductive multilayer structure which includes at least one doping peak.Type: GrantFiled: July 21, 2017Date of Patent: August 20, 2019Assignee: OSRAM OPTO SEMICONDUCTORS GMBHInventors: Matthias Peter, Tobias Meyer, Alexander Walter, Tetsuya Taki, Juergen Off, Rainer Butendeich, Joachim Hertkorn
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Patent number: 10381513Abstract: There is herein described light generating electronic components with improved light extraction and a method of manufacturing said electronic components. More particularly, there is described LEDs having improved light extraction and a method of manufacturing said LEDs.Type: GrantFiled: December 19, 2017Date of Patent: August 13, 2019Assignee: Facebook Technologies, LLCInventors: James Ronald Bonar, Zheng Gong, James Small, Gareth John Valentine, Richard I. Laming
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Patent number: 10374057Abstract: Metal contact openings are etched in the barrier layer of a group III-N HEMT with a first gas combination that etches down into the barrier layer, and a second gas combination that etches further down into the barrier layer to a depth that lies above the top surface of a channel layer that touches and lies below the barrier layer.Type: GrantFiled: October 12, 2017Date of Patent: August 6, 2019Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Yoshikazu Kondo, Shoji Wada, Hiroshi Yamasaki, Masahiro Iwamoto
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Patent number: 10340375Abstract: The present invention provides an epitaxial substrate for field effect transistor. In the epitaxial substrate for field effect transistor, a nitride-based Group III-V semiconductor epitaxial crystal containing Ga is interposed between the ground layer and the operating layer, and the nitride-based Group III-V semiconductor epitaxial crystal includes the following (i), (ii) and (iii). (i) a first buffer layer containing Ga or Al and containing a high resistivity crystal layer having added thereto compensation impurity element present in the same period as Ga in the periodic table and having small atomic number; (ii) a second buffer layer containing Ga or Al, laminated on the operating layer side of the first buffer layer; and (iii) a high purity epitaxial crystal layer containing acceptor impurities in a slight amount such that non-addition or depletion state can be maintained, provided between the high resistivity layer and the operating layer.Type: GrantFiled: February 12, 2008Date of Patent: July 2, 2019Assignee: SUMITOMO CHEMICAL COMPANY, LIMITEDInventors: Masahiko Hata, Hiroyuki Sazawa, Naohiro Nishikawa
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Patent number: 10340307Abstract: A light-emitting diode includes semiconductor layers and electrodes. A first type semiconductor layer includes first and second low resistance portions and a high resistance portion therebetween. The high resistance portion encloses the first low resistance portion and is configured to confine charge carriers substantially within the first low resistance portion. A resistivity of the first type semiconductor layer increases from the first low resistance portion toward the high resistance portion and decreases from the high resistance portion toward the second low resistance portion. A first electrode is electrically connected to the first low resistance portion and substantially no current flows between the first electrode and the second low resistance portion. A portion of the first type semiconductor layer is between the first electrode and a second type semiconductor layer. A second electrode is electrically connected to the second type semiconductor layer.Type: GrantFiled: December 20, 2017Date of Patent: July 2, 2019Assignee: MIKRO MESA TECHNOLOGY CO., LTD.Inventor: Li-Yi Chen
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Patent number: 10319882Abstract: Exemplary embodiments provide a UV light emitting diode and a method of fabricating the same. The method of fabricating a UV light emitting diode includes growing a first n-type semiconductor layer including AlGaN, wherein growth of the first n-type semiconductor layer includes changing a growth pressure within a growth chamber and changing a flow rate of an n-type dopant source introduced into the growth chamber. A pressure change during growth of the first n-type semiconductor layer includes at least one cycle of a pressure increasing period and a pressure decreasing period over time, and change in flow rate of the n-type dopant source includes increasing the flow rate of the n-type dopant source in the form of at least one pulse. The UV light emitting diode fabricated by the method has excellent crystallinity.Type: GrantFiled: January 30, 2018Date of Patent: June 11, 2019Assignee: SEOUL VIOSYS CO., LTD.Inventors: Ki Yon Park, Jeong Hun Heo, Hwa Mok Kim, Gun Woo Han
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Patent number: 10304678Abstract: The present invention provides a method for fabricating an InGaP epitaxial layer by metal organic chemical vapor deposition (MOCVD). The method comprises: placing a silicon substrate in a reaction chamber; arranging the reaction chamber to have a first chamber temperature, and growing a first GaP layer with a first thickness on the Si substrate at the first chamber temperature; arranging the reaction chamber to have a second chamber temperature, and growing a second GaP layer with a second thickness on the first GaP layer at the second chamber temperature; arranging the reaction chamber to have a third chamber temperature for a first time interval, and then arranging the reaction chamber to have a fourth chamber temperature for a second time interval; and growing a multi-layered InGaP layer on the second GaP layer.Type: GrantFiled: March 19, 2018Date of Patent: May 28, 2019Assignee: INSTITUTE OF NUCLEAR ENERGY RESEARCH, ATOMIC ENERGY COUNCIL, EXECUTIVE YUAN, R.O.CInventors: Wen-Hsiang Huang, Chih-Hung Wu, Hwen-Fen Hong
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Patent number: 10246325Abstract: A method for producing a MEMS device comprises forming a semiconductor layer stack, the semiconductor layer stack comprising at least a first monocrystalline semiconductor layer, a second monocrystalline semiconductor layer and a third monocrystalline semiconductor layer, the second monocrystalline semiconductor layer formed between the first and third monocrystalline semiconductor layers. A semiconductor material of the second monocrystalline semiconductor layer is different from semiconductor materials of the first and third monocrystalline semiconductor layers. After forming the semiconductor layer stack, at least a portion of each of the first and third monocrystalline semiconductor layers is concurrently etched.Type: GrantFiled: August 21, 2015Date of Patent: April 2, 2019Assignee: Infineon Technologies AGInventors: Stefan Kolb, Andreas Meiser, Till Schloesser, Wolfgang Werner
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Patent number: 10249786Abstract: A method of thinning a bulk aluminum nitride substrate includes providing a bulk aluminum nitride (AlN) substrate with at least one epitaxially grown group-III-nitride layer on a first side of the substrate, applying a slurry having a high pH to a second side of the substrate opposite the first side, chemical mechanically polishing the second side of the substrate using the slurry to remove at least a portion of the substrate, resulting in a thinned layer with a thickness less than 50 microns, and bonding the epitaxial layer to a non-native substrate. A device has at least one active zone in a layer of epitaxial Group-III-nitride material, the epitaxial Group-III-nitride layer having a defect density of less than or equal to 108/cm2.Type: GrantFiled: November 29, 2016Date of Patent: April 2, 2019Assignee: PALO ALTO RESEARCH CENTER INCORPORATEDInventors: Max Batres, Zhihong Yang, Thomas Wunderer
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Patent number: 10236067Abstract: A controller adapts the read voltage thresholds of a memory unit in a non-volatile memory. In one embodiment, the controller determines, based on statistics for a memory unit of the non-volatile memory, an operating state of the memory unit from among a plurality of possible operating states and adapts at least one read voltage threshold for a memory cell in the memory unit based on the determined operating state.Type: GrantFiled: August 2, 2017Date of Patent: March 19, 2019Assignee: International Business Machines CorporationInventors: Timothy J. Fisher, Thomas Mittelholzer, Nikolaos Papandreou, Thomas Parnell, Charalampos Pozidis
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Patent number: 10217967Abstract: An organic electroluminescent device includes at least two light-emissive units provided between a cathode electrode and an anode electrode opposed to the cathode electrode, each of the light-emissive units including at least one light-emissive layer. The light-emissive units are partitioned from each other by at least one charge generation layer, the charge generation layer being an electrically insulating layer having a resistivity of not less than 1.0×102 ?cm.Type: GrantFiled: May 30, 2018Date of Patent: February 26, 2019Assignees: Rohm Co., Ltd., Mitsubishi Heavy Industries, Ltd.Inventors: Junji Kido, Toshio Matsumoto
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Patent number: 10211369Abstract: In various embodiments, light-emitting devices incorporate graded layers with compositional offsets at one or both end points of the graded layer to promote formation of two-dimensional carrier gases and polarization doping, thereby enhancing device performance.Type: GrantFiled: May 11, 2017Date of Patent: February 19, 2019Assignee: CRYSTAL IS, INC.Inventors: Craig Moe, James R. Grandusky, Shawn R. Gibb, Leo J. Schowalter, Kosuke Sato, Tomohiro Morishita
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Patent number: 10211368Abstract: In various embodiments, light-emitting devices incorporate graded layers with compositional offsets at one or both end points of the graded layer to promote formation of two-dimensional carrier gases and polarization doping, thereby enhancing device performance.Type: GrantFiled: May 5, 2017Date of Patent: February 19, 2019Assignee: CRYSTAL IS, INC.Inventors: Craig Moe, James R. Grandusky, Shawn R. Gibb, Leo J. Schowalter, Kosuke Sato, Tomohiro Morishita
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Patent number: 10199802Abstract: In an example, the present invention provides a gallium and nitrogen containing laser diode device. The device has a gallium and nitrogen containing substrate material comprising a surface region, which is configured on either a ({10-10}) crystal orientation or a {10-10} crystal orientation configured with an offcut at an angle toward or away from the [0001] direction. The device also has a GaN region formed overlying the surface region, an active region formed overlying the surface region, and a gettering region comprising a magnesium species overlying the surface region. The device has a p-type cladding region comprising an (InAl)GaN material doped with a plurality of magnesium species formed overlying the active region.Type: GrantFiled: October 9, 2017Date of Patent: February 5, 2019Assignee: Soraa Laser Diode, Inc.Inventors: Melvin McLaurin, James W. Raring, Christiane Elsass
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Patent number: 10193013Abstract: LED structures are disclosed to reduce non-radiative sidewall recombination along sidewalls of vertical LEDs including p-n diode sidewalls that span a top current spreading layer, bottom current spreading layer, and active layer between the top current spreading layer and bottom current spreading layer.Type: GrantFiled: November 30, 2017Date of Patent: January 29, 2019Assignee: Apple Inc.Inventors: David P. Bour, Kelly McGroddy, Daniel Arthur Haeger, James Michael Perkins, Arpan Chakraborty, Jean-Jacques P. Drolet, Dmitry S. Sizov
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Patent number: 10181699Abstract: A semiconductor optical device includes: a first conductive type semiconductor layer; an active layer; a second conductive type semiconductor layer including a ridge portion; a pair of first grooves, formed on bottom surfaces of both sides of the ridge portion and dividing the active layer; an optical functioning part including the first and second conductive type semiconductor layers, converting a state of light, and having a height higher than a height of the bottom surface of the ridge portion; and a second groove, at least a part thereof being formed on the optical functioning part, an end portion thereof being connected to the first groove, the second conductive type semiconductor layer being divided, and the maximum height of an inner wall surface thereof being higher than the maximum height of an inner wall surface of the first groove.Type: GrantFiled: August 8, 2017Date of Patent: January 15, 2019Assignee: Oclaro Japan, Inc.Inventors: Koichiro Adachi, Kouji Nakahara, Akira Nakanishi