With Particular Dopant Concentration Or Concentration Profile (e.g., Graded Junction) Patents (Class 257/101)
  • Patent number: 10930818
    Abstract: A light emitting device includes: a plurality of light emitting stacked layers, including a first surface and a second surface, wherein the second surface is electrically opposite to the first surface; a mesa structure; and a current blocking (CB) layer disposed on the first surface; a transparent conductive layer disposed on or above the first surface; and a first pad electrode, disposed on the transparent conductive layer and on the first surface; wherein a sidewall of the CB layer comprises a first surface section and a second surface section having different slopes.
    Type: Grant
    Filed: July 6, 2018
    Date of Patent: February 23, 2021
    Assignee: EPISTAR CORPORATION
    Inventors: Chien Cheng Huang, Kuo-Wei Yen, Yu-Wei Kuo, Yao-Wei Yang, Pei-Hsiang Tseng
  • Patent number: 10865469
    Abstract: A compound semiconductor has a high electron concentration of 5×1019 cm?3 or higher, exhibits an electron mobility of 46 cm2/V·s or higher, and exhibits a low electric resistance, and thus is usable to produce a high performance semiconductor device. The present invention provides a group 13 nitride semiconductor of n-type conductivity that may be formed as a film on a substrate having a large area size at a temperature of room temperature to 700° C.
    Type: Grant
    Filed: June 1, 2017
    Date of Patent: December 15, 2020
    Assignee: JAPAN SCIENCE AND TECHNOLOGY POLICY
    Inventors: Hiroshi Fujioka, Kohei Ueno
  • Patent number: 10861942
    Abstract: Techniques are disclosed for forming tunable capacitors including multiple two-dimensional electron gas (2DEG) and three-dimensional electron gas (3DEG) structures for use in tunable radio frequency (RF) filters. In some cases, the tunable capacitors include a stack of group III material-nitride (III-N) compound layers that utilize polarization doping to form the 2DEG and 3DEG structures. In some instances, the structures may be capable of achieving at least three capacitance values, enabling the devices to be tunable. In some cases, the tunable capacitor devices employing the multi-2DEG and 3DEG structures may be a metal-oxide-semiconductor capacitor (MOSCAP) or a Schottky diode, for example. In some cases, the use of tunable RF filters employing the multi-2DEG and 3DEG III-N tunable capacitor devices described herein can significantly reduce the number of filters in an RF front end, resulting in a smaller physical footprint and reduced bill of materials cost.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: December 8, 2020
    Assignee: Intel Corporation
    Inventors: Han Wui Then, Sansaptak Dasgupta, Marko Radosavljevic
  • Patent number: 10840411
    Abstract: A semiconductor layer sequence is disclosed. In an embodiment the semiconductor layer sequence includes an n-conducting n-region, a p-conducting p-region and an active zone having at least one quantum well located between the n-region and the p-region, wherein the semiconductor layer sequence includes AlInGaN, wherein the n-region comprises a superlattice, wherein the superlattice has a structural unit which repeats at least three times, wherein the structural unit comprises at least one AlGaN layer, at least one GaN layer and at least one InGaN layer, wherein an intermediate layer is disposed between the active zone and the superlattice, wherein the intermediate layer comprises either n-doped GaN or n-doped GaN together with n-doped InGaN so that the intermediate layer is free of aluminum, and wherein the intermediate layer directly adjoins the active zone and the superlattice.
    Type: Grant
    Filed: July 5, 2017
    Date of Patent: November 17, 2020
    Assignee: OSRAM OLED GmbH
    Inventor: Werner Bergbauer
  • Patent number: 10622508
    Abstract: A method for manufacturing an optoelectronic component includes providing a growth substrate; applying a succession of semiconductor layers; structuring the succession of semiconductor layers; applying a sacrificial layer; depositing a metal layer; optionally planarizing using a dielectric material; forming a second terminal contact through the active region; applying a permanent support; and detaching the growth substrate and exposing the metal layer.
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: April 14, 2020
    Assignee: OSRAM OLED GmbH
    Inventors: Dominik Scholz, Alexander F. Pfeuffer, Isabel Otto
  • Patent number: 10622206
    Abstract: Described herein are methods for using remote plasma chemical vapor deposition (RP-CVD) and sputtering deposition to grow layers for light emitting devices. A method includes growing a light emitting device structure on a growth substrate, and growing a tunnel junction on the light emitting device structure using at least one of RP-CVD and sputtering deposition. The tunnel junction includes a p++ layer in direct contact with a p-type region, where the p++ layer is grown by using at least one of RP-CVD and sputtering deposition. Another method for growing a device includes growing a p-type region over a growth substrate using at least one of RP-CVD and sputtering deposition, and growing further layers over the p-type region. Another method for growing a device includes growing a light emitting region and an n-type region using at least one of RP-CVD and sputtering deposition over a p-type region.
    Type: Grant
    Filed: February 13, 2019
    Date of Patent: April 14, 2020
    Assignee: Lumileds LLC
    Inventors: Isaac Wildeson, Parijat Deb, Erik Charles Nelson, Junko Kobayashi
  • Patent number: 10553756
    Abstract: An embodiment of the present invention includes: a gallium nitride substrate; and a light-emitting structure disposed on the other surface of the substrate, wherein the substrate includes a plurality of light extraction structures formed on one surface thereof, the thickness of the substrate is 80 ?m or more, and the average height of the plurality of light extraction structures is 10 ?m or more.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: February 4, 2020
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Jong Sub Lee, Hyun Don Song, Ki Man Kang, Seung Hwan Kim, Sung Dal Jung
  • Patent number: 10541352
    Abstract: Described herein are methods for growing light emitting devices under ultra-violet (UV) illumination. A method includes growing a III-nitride n-type layer over a III-nitride p-type layer under UV illumination. Another method includes growing a light emitting device structure on a growth substrate and growing a tunnel junction on the light emitting device structure, where certain layers are grown under UV illumination. Another method includes forming a III-nitride tunnel junction n-type layer over the III-nitride p-type layer to form a tunnel junction light emitting diode. A surface of the III-nitride tunnel junction n-type layer is done under illumination during an initial period and a remainder of the formation is completed absent illumination. The UV light has photon energy higher than the III-nitride p-type layer's band gap energy. The UV illumination inhibits formation of Mg—H complexes within the III-nitride p-type layer resulting from hydrogen present in a deposition chamber.
    Type: Grant
    Filed: October 25, 2017
    Date of Patent: January 21, 2020
    Inventors: Tsutomu Ishikawa, Isaac Wildeson, Erik Charles Nelson, Parijat Deb
  • Patent number: 10535493
    Abstract: A photocathode can include a body fabricated of a wide bandgap semiconductor material, a metal layer, and an alkali halide photocathode emitter. The body may have a thickness of less than 100 nm and the alkali halide photocathode may have a thickness less than 10 nm. The photocathode can be illuminated with a dual wavelength scheme.
    Type: Grant
    Filed: October 3, 2018
    Date of Patent: January 14, 2020
    Assignee: KLA-Tencor Corporation
    Inventors: Katerina Ioakeimidi, Gildardo R. Delgado, Michael E. Romero, Frances Hill, Rudy F. Garcia
  • Patent number: 10446715
    Abstract: Disclosed herein is a semiconductor device. The semiconductor device includes a substrate, a first conductive type semiconductor layer disposed over the substrate, an active layer disposed over the first conductive type semiconductor layer, and a second conductive type semiconductor layer disposed over the active layer. The first conductive type semiconductor layer includes a first layer, a second layer and a third layer having different composition ratios of indium (In). The first semiconductor layer is disposed close to the active layer. The second semiconductor layer is disposed under the first semiconductor layer. The third semiconductor layer is disposed under the second semiconductor layer. In content is reduced from the active layer to the third semiconductor layer, and In content of the third semiconductor layer may be 5% or more to 10% or less of that of the active layer.
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: October 15, 2019
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Kwang Sun Baek, Jong Ho Na, Dae Seob Han, Jung Hyun Hwang
  • Patent number: 10418239
    Abstract: Provided is an epitaxial substrate for semiconductor elements which suppresses an occurrence of current collapse. The epitaxial substrate for the semiconductor elements includes: a semi-insulating free-standing substrate formed of GaN being doped with Zn; a buffer layer being adjacent to the free-standing substrate; a channel layer being adjacent to the buffer layer; and a barrier layer being provided on an opposite side of the buffer layer with the channel layer therebetween, wherein the buffer layer is a diffusion suppressing layer formed of Al-doped GaN and suppresses diffusion of Zn from the free-standing substrate into the channel layer.
    Type: Grant
    Filed: April 27, 2018
    Date of Patent: September 17, 2019
    Assignee: NGK INSULATORS, LTD.
    Inventors: Mikiya Ichimura, Sota Maehara, Yoshitaka Kuraoka
  • Patent number: 10418573
    Abstract: According to an aspect, an organic light-emitting device includes: a first electrode; a second electrode facing the first electrode; and an emission layer disposed between the first electrode and the second electrode and including a host and a dopant, wherein the host is an exciplex host, which is a combination of a hole transporting host and an electron transporting host which form an exciplex, or a delayed fluorescent organic compound, and the dopant includes both a phosphorescent dopant and a fluorescent dopant.
    Type: Grant
    Filed: July 27, 2015
    Date of Patent: September 17, 2019
    Assignee: SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
    Inventors: Jang-Joo Kim, Hyun-Gu Kim, Kwon-Hyeon Kim, Jin-Won Sun
  • Patent number: 10416496
    Abstract: A backlight module and liquid crystal display device are disclosed. The backlight module includes: at least one first light-emitting unit having a first blue light-emitting chip; at least one second light-emitting unit having a second blue light-emitting chip, wherein, an emission peak wavelength of the second blue light-emitting chip is greater than an emission peak wavelength of the first blue light-emitting chip; and a control circuit used for dynamic adjusting a brightness of the first light-emitting unit and the second light-emitting unit according to the blue saturation. The present invention can dynamically adjust the output amount of the blue light according to the blue saturation so that the present invention can selectively decrease the blue light when maintaining the display brightness and chroma.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: September 17, 2019
    Assignee: Wuhan China Star Optoelectronics Technology Co., Ltd
    Inventors: Yong Yang, Yingbao Yang
  • Patent number: 10411438
    Abstract: Provided is a semiconductor multilayer film reflecting mirror formed by alternately repeating a first nitride film containing In (indium) and a second nitride film not containing In. The reflecting mirror includes an inter-film transition layer between the first and second nitride films, the composition of which is varied from the composition of the first nitride film to the composition of the second nitride film. The inter-film transition layer has a first transition layer formed on the first nitride film and containing In and Al (aluminum), and a second transition layer formed on the first transition layer and containing Al but not containing In. In the first transition layer, the percentages of In and Al are decreased from the first nitride film to the second transition layer, and the percentage of In in the first transition layer starts to decrease at a same or closer position to the first nitride film than the percentage of Al.
    Type: Grant
    Filed: December 8, 2017
    Date of Patent: September 10, 2019
    Assignees: STANLEY ELECTRIC CO., LTD., MEIJO UNIVERSITY
    Inventors: Tetsuya Takeuchi, Isamu Akasaki, Takanobu Akagi
  • Patent number: 10411165
    Abstract: An invisible-light light-emitting diode includes an N-type ohmic contact semiconductor layer, an N-type current spreading layer, an N—GaAs visible-light absorption layer, an N-type cladding layer, a light-emitting layer, a P-type cladding layer and a P-type ohmic contact semiconductor layer. In the invisible-light light-emitting diode, the absorption layer is GaAs, which can effectively remove all visible light when current density is >1 A/mm2, and essentially all visible light when current density is below 3 A/mm2. This effectively solves the red dot effect of invisible-light light-emitting diodes.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: September 10, 2019
    Assignee: XIAMEN SAN'AN OPTOELECTRONICS CO., LTD.
    Inventors: Chaoyu Wu, Chun-Yi Wu, Chun Kai Huang, Duxiang Wang
  • Patent number: 10403840
    Abstract: The invention describes a device for emitting or detecting electromagnetic radiation. The device has a first and a second electrode which are connected to each other via an electrically conductive nanostructure. The electrically conductive nanostructure is configured to receive electrons and holes from the first and second electrode or transport same to the first and second electrode. In addition, the device has a radiation molecule arranged at a circumferential surface of the electrically conductive nanostructure. The radiation molecule is configured to absorb electrons and holes or electromagnetic radiation and emit the electromagnetic radiation with recombination of electrons absorbed and holes absorbed, or emit electrons and holes based on the electromagnetic radiation absorbed.
    Type: Grant
    Filed: April 25, 2016
    Date of Patent: September 3, 2019
    Assignees: Technische Universitaet Chemnitz, Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.
    Inventors: Thomas Gessner, Thomas Otto, Stefan Schulz, Sascha Hermann, Thomas Blaudeck, Christian Spudat
  • Patent number: 10388828
    Abstract: A semiconductor chip includes a semiconductor body with a semiconductor layer sequence. An active region intended for generating radiation is arranged between an n-conductive multilayer structure and a p-conductive semiconductor layer. A doping profile is formed in the n-conductive multilayer structure which includes at least one doping peak.
    Type: Grant
    Filed: July 21, 2017
    Date of Patent: August 20, 2019
    Assignee: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Matthias Peter, Tobias Meyer, Alexander Walter, Tetsuya Taki, Juergen Off, Rainer Butendeich, Joachim Hertkorn
  • Patent number: 10381513
    Abstract: There is herein described light generating electronic components with improved light extraction and a method of manufacturing said electronic components. More particularly, there is described LEDs having improved light extraction and a method of manufacturing said LEDs.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: August 13, 2019
    Assignee: Facebook Technologies, LLC
    Inventors: James Ronald Bonar, Zheng Gong, James Small, Gareth John Valentine, Richard I. Laming
  • Patent number: 10374057
    Abstract: Metal contact openings are etched in the barrier layer of a group III-N HEMT with a first gas combination that etches down into the barrier layer, and a second gas combination that etches further down into the barrier layer to a depth that lies above the top surface of a channel layer that touches and lies below the barrier layer.
    Type: Grant
    Filed: October 12, 2017
    Date of Patent: August 6, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Yoshikazu Kondo, Shoji Wada, Hiroshi Yamasaki, Masahiro Iwamoto
  • Patent number: 10340307
    Abstract: A light-emitting diode includes semiconductor layers and electrodes. A first type semiconductor layer includes first and second low resistance portions and a high resistance portion therebetween. The high resistance portion encloses the first low resistance portion and is configured to confine charge carriers substantially within the first low resistance portion. A resistivity of the first type semiconductor layer increases from the first low resistance portion toward the high resistance portion and decreases from the high resistance portion toward the second low resistance portion. A first electrode is electrically connected to the first low resistance portion and substantially no current flows between the first electrode and the second low resistance portion. A portion of the first type semiconductor layer is between the first electrode and a second type semiconductor layer. A second electrode is electrically connected to the second type semiconductor layer.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: July 2, 2019
    Assignee: MIKRO MESA TECHNOLOGY CO., LTD.
    Inventor: Li-Yi Chen
  • Patent number: 10340375
    Abstract: The present invention provides an epitaxial substrate for field effect transistor. In the epitaxial substrate for field effect transistor, a nitride-based Group III-V semiconductor epitaxial crystal containing Ga is interposed between the ground layer and the operating layer, and the nitride-based Group III-V semiconductor epitaxial crystal includes the following (i), (ii) and (iii). (i) a first buffer layer containing Ga or Al and containing a high resistivity crystal layer having added thereto compensation impurity element present in the same period as Ga in the periodic table and having small atomic number; (ii) a second buffer layer containing Ga or Al, laminated on the operating layer side of the first buffer layer; and (iii) a high purity epitaxial crystal layer containing acceptor impurities in a slight amount such that non-addition or depletion state can be maintained, provided between the high resistivity layer and the operating layer.
    Type: Grant
    Filed: February 12, 2008
    Date of Patent: July 2, 2019
    Assignee: SUMITOMO CHEMICAL COMPANY, LIMITED
    Inventors: Masahiko Hata, Hiroyuki Sazawa, Naohiro Nishikawa
  • Patent number: 10319882
    Abstract: Exemplary embodiments provide a UV light emitting diode and a method of fabricating the same. The method of fabricating a UV light emitting diode includes growing a first n-type semiconductor layer including AlGaN, wherein growth of the first n-type semiconductor layer includes changing a growth pressure within a growth chamber and changing a flow rate of an n-type dopant source introduced into the growth chamber. A pressure change during growth of the first n-type semiconductor layer includes at least one cycle of a pressure increasing period and a pressure decreasing period over time, and change in flow rate of the n-type dopant source includes increasing the flow rate of the n-type dopant source in the form of at least one pulse. The UV light emitting diode fabricated by the method has excellent crystallinity.
    Type: Grant
    Filed: January 30, 2018
    Date of Patent: June 11, 2019
    Assignee: SEOUL VIOSYS CO., LTD.
    Inventors: Ki Yon Park, Jeong Hun Heo, Hwa Mok Kim, Gun Woo Han
  • Patent number: 10304678
    Abstract: The present invention provides a method for fabricating an InGaP epitaxial layer by metal organic chemical vapor deposition (MOCVD). The method comprises: placing a silicon substrate in a reaction chamber; arranging the reaction chamber to have a first chamber temperature, and growing a first GaP layer with a first thickness on the Si substrate at the first chamber temperature; arranging the reaction chamber to have a second chamber temperature, and growing a second GaP layer with a second thickness on the first GaP layer at the second chamber temperature; arranging the reaction chamber to have a third chamber temperature for a first time interval, and then arranging the reaction chamber to have a fourth chamber temperature for a second time interval; and growing a multi-layered InGaP layer on the second GaP layer.
    Type: Grant
    Filed: March 19, 2018
    Date of Patent: May 28, 2019
    Assignee: INSTITUTE OF NUCLEAR ENERGY RESEARCH, ATOMIC ENERGY COUNCIL, EXECUTIVE YUAN, R.O.C
    Inventors: Wen-Hsiang Huang, Chih-Hung Wu, Hwen-Fen Hong
  • Patent number: 10249786
    Abstract: A method of thinning a bulk aluminum nitride substrate includes providing a bulk aluminum nitride (AlN) substrate with at least one epitaxially grown group-III-nitride layer on a first side of the substrate, applying a slurry having a high pH to a second side of the substrate opposite the first side, chemical mechanically polishing the second side of the substrate using the slurry to remove at least a portion of the substrate, resulting in a thinned layer with a thickness less than 50 microns, and bonding the epitaxial layer to a non-native substrate. A device has at least one active zone in a layer of epitaxial Group-III-nitride material, the epitaxial Group-III-nitride layer having a defect density of less than or equal to 108/cm2.
    Type: Grant
    Filed: November 29, 2016
    Date of Patent: April 2, 2019
    Assignee: PALO ALTO RESEARCH CENTER INCORPORATED
    Inventors: Max Batres, Zhihong Yang, Thomas Wunderer
  • Patent number: 10246325
    Abstract: A method for producing a MEMS device comprises forming a semiconductor layer stack, the semiconductor layer stack comprising at least a first monocrystalline semiconductor layer, a second monocrystalline semiconductor layer and a third monocrystalline semiconductor layer, the second monocrystalline semiconductor layer formed between the first and third monocrystalline semiconductor layers. A semiconductor material of the second monocrystalline semiconductor layer is different from semiconductor materials of the first and third monocrystalline semiconductor layers. After forming the semiconductor layer stack, at least a portion of each of the first and third monocrystalline semiconductor layers is concurrently etched.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: April 2, 2019
    Assignee: Infineon Technologies AG
    Inventors: Stefan Kolb, Andreas Meiser, Till Schloesser, Wolfgang Werner
  • Patent number: 10236067
    Abstract: A controller adapts the read voltage thresholds of a memory unit in a non-volatile memory. In one embodiment, the controller determines, based on statistics for a memory unit of the non-volatile memory, an operating state of the memory unit from among a plurality of possible operating states and adapts at least one read voltage threshold for a memory cell in the memory unit based on the determined operating state.
    Type: Grant
    Filed: August 2, 2017
    Date of Patent: March 19, 2019
    Assignee: International Business Machines Corporation
    Inventors: Timothy J. Fisher, Thomas Mittelholzer, Nikolaos Papandreou, Thomas Parnell, Charalampos Pozidis
  • Patent number: 10217967
    Abstract: An organic electroluminescent device includes at least two light-emissive units provided between a cathode electrode and an anode electrode opposed to the cathode electrode, each of the light-emissive units including at least one light-emissive layer. The light-emissive units are partitioned from each other by at least one charge generation layer, the charge generation layer being an electrically insulating layer having a resistivity of not less than 1.0×102 ?cm.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: February 26, 2019
    Assignees: Rohm Co., Ltd., Mitsubishi Heavy Industries, Ltd.
    Inventors: Junji Kido, Toshio Matsumoto
  • Patent number: 10211368
    Abstract: In various embodiments, light-emitting devices incorporate graded layers with compositional offsets at one or both end points of the graded layer to promote formation of two-dimensional carrier gases and polarization doping, thereby enhancing device performance.
    Type: Grant
    Filed: May 5, 2017
    Date of Patent: February 19, 2019
    Assignee: CRYSTAL IS, INC.
    Inventors: Craig Moe, James R. Grandusky, Shawn R. Gibb, Leo J. Schowalter, Kosuke Sato, Tomohiro Morishita
  • Patent number: 10211369
    Abstract: In various embodiments, light-emitting devices incorporate graded layers with compositional offsets at one or both end points of the graded layer to promote formation of two-dimensional carrier gases and polarization doping, thereby enhancing device performance.
    Type: Grant
    Filed: May 11, 2017
    Date of Patent: February 19, 2019
    Assignee: CRYSTAL IS, INC.
    Inventors: Craig Moe, James R. Grandusky, Shawn R. Gibb, Leo J. Schowalter, Kosuke Sato, Tomohiro Morishita
  • Patent number: 10199802
    Abstract: In an example, the present invention provides a gallium and nitrogen containing laser diode device. The device has a gallium and nitrogen containing substrate material comprising a surface region, which is configured on either a ({10-10}) crystal orientation or a {10-10} crystal orientation configured with an offcut at an angle toward or away from the [0001] direction. The device also has a GaN region formed overlying the surface region, an active region formed overlying the surface region, and a gettering region comprising a magnesium species overlying the surface region. The device has a p-type cladding region comprising an (InAl)GaN material doped with a plurality of magnesium species formed overlying the active region.
    Type: Grant
    Filed: October 9, 2017
    Date of Patent: February 5, 2019
    Assignee: Soraa Laser Diode, Inc.
    Inventors: Melvin McLaurin, James W. Raring, Christiane Elsass
  • Patent number: 10193013
    Abstract: LED structures are disclosed to reduce non-radiative sidewall recombination along sidewalls of vertical LEDs including p-n diode sidewalls that span a top current spreading layer, bottom current spreading layer, and active layer between the top current spreading layer and bottom current spreading layer.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: January 29, 2019
    Assignee: Apple Inc.
    Inventors: David P. Bour, Kelly McGroddy, Daniel Arthur Haeger, James Michael Perkins, Arpan Chakraborty, Jean-Jacques P. Drolet, Dmitry S. Sizov
  • Patent number: 10181699
    Abstract: A semiconductor optical device includes: a first conductive type semiconductor layer; an active layer; a second conductive type semiconductor layer including a ridge portion; a pair of first grooves, formed on bottom surfaces of both sides of the ridge portion and dividing the active layer; an optical functioning part including the first and second conductive type semiconductor layers, converting a state of light, and having a height higher than a height of the bottom surface of the ridge portion; and a second groove, at least a part thereof being formed on the optical functioning part, an end portion thereof being connected to the first groove, the second conductive type semiconductor layer being divided, and the maximum height of an inner wall surface thereof being higher than the maximum height of an inner wall surface of the first groove.
    Type: Grant
    Filed: August 8, 2017
    Date of Patent: January 15, 2019
    Assignee: Oclaro Japan, Inc.
    Inventors: Koichiro Adachi, Kouji Nakahara, Akira Nakanishi
  • Patent number: 10170643
    Abstract: A barrier film and a method of manufacturing the barrier film are provided. The method includes performing high-pressure thermal treatment under certain conditions on an oxide thin film deposited by sputtering deposition or atomic layer deposition (ALD) to manufacture a barrier film with improved moisture resistance. According to the method, moisture resistance of the barrier film can be improved at a low process temperature by using both thermal energy and pressure energy. The barrier film provided herein can be useful as a barrier film for solar cells.
    Type: Grant
    Filed: January 3, 2017
    Date of Patent: January 1, 2019
    Assignees: Hyundai Motor Company, Industry-Academic Cooperation Foundation, Yonsei University
    Inventors: Ji Yong Lee, Jeong Woo Park, Hyun Jae Kim
  • Patent number: 10170653
    Abstract: Embodiments of the present disclosure are directed to infrared detector devices incorporating a tunneling structure. In one embodiment, an infrared detector device includes a first contact layer, an absorber layer adjacent to the first contact layer, and a tunneling structure including a barrier layer adjacent to the absorber layer and a second contact layer adjacent to the barrier layer. The barrier layer has a tailored valence band offset such that a valence band offset of the barrier layer at the interface between the absorber layer and the barrier layer is substantially aligned with the valence band offset of the absorber layer, and the valence band offset of the barrier layer at the interface between the barrier layer and the second contact layer is above a conduction band offset of the second contact layer.
    Type: Grant
    Filed: November 9, 2017
    Date of Patent: January 1, 2019
    Assignee: L3 CINCINNATI ELECTRONICS CORPORATION
    Inventor: Yajun Wei
  • Patent number: 10115909
    Abstract: The embodiments of the present invention provide an organic electroluminescent device, a manufacturing method thereof and an electronic equipment. The organic electroluminescent device comprises: an anode layer, a hole transport layer, a first light emitting layer, a second light emitting layer, an electron transport layer, and a cathode layer stacked in sequence; wherein the first light emitting layer and the second light emitting layer comprise a same substrate material; the first light emitting layer and/or the second light emitting layer are doped such that a hole mobility of the first light emitting layer is equal to an electron mobility of the second light emitting layer. In the embodiments of the present invention, two light emitting layers with the same substrate material are applied, which can realize a balanced injection for electrons and holes, thereby improving the efficiency and lifetime of the organic electroluminescent device.
    Type: Grant
    Filed: August 21, 2015
    Date of Patent: October 30, 2018
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Haidong Wu, Yun Qiu, Weilin Lai
  • Patent number: 10033157
    Abstract: A surface-emitting semiconductor laser includes a first semiconductor multilayer film reflector, an active region, a second semiconductor multilayer film reflector, and a current confinement layer including an oxidized region formed by selective oxidation. The current confinement layer includes a first semiconductor layer having a relatively high Al content, a second semiconductor layer that is adjacent to the first semiconductor layer on an active-region side of the first semiconductor layer and has a lower Al content than the first semiconductor layer, and a composition-gradient layer adjacent to the first semiconductor layer on a side of the first semiconductor layer which is opposite to the active-region side. A portion of the composition-gradient layer which faces the first semiconductor layer has a lower Al content than the first semiconductor layer.
    Type: Grant
    Filed: July 28, 2015
    Date of Patent: July 24, 2018
    Assignee: FUJI XEROX CO., LTD.
    Inventors: Kazutaka Takeda, Junichiro Hayakawa, Akemi Murakami, Naoki Jogan, Takashi Kondo, Jun Sakurai
  • Patent number: 10003041
    Abstract: An organic light emitting diode, including a first electrode and a second electrode facing each other; an emission layer between the first electrode and the second electrode; and an electron injection layer between the second electrode and the emission layer, the electron injection layer including a metal having a work function of 4.0 eV or less and a dipole material including a first component and a second component having different polarities.
    Type: Grant
    Filed: June 10, 2015
    Date of Patent: June 19, 2018
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Dong Chan Kim, Won Jong Kim, Eung Do Kim, Dong Kyu Seo, Da Hea Im, Sang Hoon Yim, Chang Woong Chu
  • Patent number: 10003040
    Abstract: An organic light emitting element, includes a first electrode and a second electrode facing each other; an emission layer between the first electrode and the second electrode; and an electron injection layer between the second electrode and the emission layer, the electron injection layer including an oxide having a relative dielectric constant of 10 or more and a metal having a work function of 4.0 eV or less.
    Type: Grant
    Filed: June 5, 2015
    Date of Patent: June 19, 2018
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Dong Chan Kim, Won Jong Kim, Eung Do Kim, Dong Kyu Seo, Jong Hyuk Lee, Sang Hoon Yim, Chang Woong Chu
  • Patent number: 9991416
    Abstract: A light emitting diode and a method of manufacturing the light emitting diode are provided. The light emitting diode includes an n-type semiconductor layer, an inclined type superlattice thin film layer, an active layer, and a p-type semiconductor layer. The n-type semiconductor layer is disposed on a substrate. The inclined type superlattice thin film layer is disposed on the n-type semiconductor layer and includes a plurality of thin film pairs in which InGaN thin films and GaN thin films are sequentially stacked. The active layer having a quantum well structure is disposed on the inclined type superlattice thin film layer. The p-type semiconductor layer is disposed on the active layer. Composition ratio of Indium (In) included in the InGaN thin film is increased as getting closer to the active layer. Thus, internal residual strain is reduced, and quantum confinement effect is enhanced, and internal quantum efficiency is increased.
    Type: Grant
    Filed: June 23, 2017
    Date of Patent: June 5, 2018
    Assignee: INDUSTRY FOUNDATION OF CHONNAM NATIONAL UNIVERSITY
    Inventors: Taeksoo Ji, Jinyoung Park, Jinhong Lee, Wangki Kim, Jaesam Shim, Kwangjae Lee
  • Patent number: 9985136
    Abstract: According to one embodiment, a semiconductor device includes first to third semiconductor regions and first to third conductors. The second semiconductor region is separated from the first semiconductor region in a first direction. The third semiconductor region is provided between the first and the second semiconductor regions. The third conductor is separated from the third semiconductor region in a second direction intersecting the first direction. The third semiconductor region includes first and second partial regions. The first partial region includes a first metal element, and is amorphous. The second partial region is stacked with the first partial region in the second direction, and is polycrystalline. A first concentration of the first metal element in the first partial region is higher than a second concentration of the first metal element in the second partial region, or the second partial region does not include the first metal element.
    Type: Grant
    Filed: September 9, 2016
    Date of Patent: May 29, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Minoru Oda, Kiwamu Sakuma, Masumi Saitoh
  • Patent number: 9985074
    Abstract: A light-emitting device is introduced herein. The light-emitting device comprises a first light-generating active layer and a second light-generating active layer stacked in a vertical direction on a substrate wherein the first light-generating active layer and the second light-generating active layer emit light having substantially the same wavelength, and wherein the substrate, the first light-generating active layer, and the second light-generating active layer are formed together in a chip.
    Type: Grant
    Filed: November 7, 2016
    Date of Patent: May 29, 2018
    Assignee: EPISTAR CORPORATION
    Inventors: Wen-Yung Yeh, Yu-Chen Yu, Hsi-Hsuan Yen, Jui-Ying Lin
  • Patent number: 9978908
    Abstract: A non-polar blue light LED epitaxial wafer based on an LAO substrate comprises the LAO substrate, and a buffer layer, a first non-doped layer, a first doped layer, a quantum well layer, an electron barrier layer and a second doped layer that are sequentially arranged on the LAO substrate. A preparation method of the non-polar blue light LED epitaxial wafer includes: a) adopting the LAO substrate, selecting a crystal orientation, and cleaning a surface of the LAO substrate; b) annealing the LAO substrate, and forming an AlN seed crystal layer on the surface of the LAO substrate; and c) sequentially forming a non-polar m face GaN buffer layer, a non-polar non-doped u-GaN layer, a non-polar n-type doped GaN film, a non-polar InGaN/GaN quantum well, a non-polar m face AlGaN electron barrier layer and a non-polar p-type doped GaN film on the LAO substrate by adopting metal organic chemical vapor deposition.
    Type: Grant
    Filed: March 23, 2015
    Date of Patent: May 22, 2018
    Assignee: SHANGHAI CHIPTEK SEMICONDUCTOR TECHNOLOGY CO., LTD.
    Inventors: Zhuoran Cai, Hai Gao, Zhi Liu, Xianglin Yin, Zhengwei Liu
  • Patent number: 9917156
    Abstract: Nucleation layers for growth of III-nitride structures, and methods for growing the nucleation layers, are described herein. A semiconductor can include a silicon substrate and a nucleation layer over the silicon substrate. The nucleation layer can include silicon and deep-level dopants. The semiconductor can include a III-nitride layer formed over the nucleation layer. At least one of the silicon substrate and the nucleation layer can include ionized contaminants. In addition, a concentration of the deep-level dopants is at least as high as a concentration of the ionized contaminants.
    Type: Grant
    Filed: September 2, 2016
    Date of Patent: March 13, 2018
    Assignee: IQE, plc
    Inventors: Oleg Laboutin, Chen-Kai Kao, Chien-Fong Lo, Wayne Johnson, Hugues Marchand
  • Patent number: 9911721
    Abstract: A semiconductor device includes a light emitting element comprising a substrate having a first and a second surface and an outer edge connecting the first and second surfaces. A light emitting layer is on a central portion of the first surface but not on a peripheral portion between the central portion and the outer edge of the substrate. A first insulating layer is disposed on the peripheral portion of the first surface, a side surface of the light emitting layer, and a third surface of the light emitting layer that is spaced from the first surface of the substrate. A first electrode is electrically contacting the third surface of the light emitting layer. A light receiving element is provided in a propagation path of light emitted from the light emitting element.
    Type: Grant
    Filed: August 2, 2016
    Date of Patent: March 6, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tatsuo Tonedachi
  • Patent number: 9905725
    Abstract: A light emitting diode, including a semiconductor epitaxial structure, a first electrode and a second electrode is provided. The semiconductor epitaxial structure includes a plurality stacked light-emitting layers, and each of the light-emitting layers respectively emits different range of wavelength of light. The first electrode is electrically connected to the semiconductor epitaxial structure. The second electrode is electrically connected to the semiconductor epitaxial structure. Furthermore, a data transmission and reception apparatus is provided.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: February 27, 2018
    Assignee: Southern Taiwan University of Science and Technology
    Inventor: Ming-Lun Lee
  • Patent number: 9876143
    Abstract: In an example, the present invention provides a light-emitting device configured to emit electromagnetic radiation in a range of 210 to 360 nanometers. The device has a substrate member comprising a surface region. The device has a thickness of AlGaN material formed overlying the surface region and an aluminum concentration characterizing the AlGaN material having a range of 0 to 100%. The device has a boron doping concentration characterizing the AlGaN material having a range between 1e15 to 1e20 atoms/centimeter3.
    Type: Grant
    Filed: October 1, 2014
    Date of Patent: January 23, 2018
    Assignee: RayVio Corporation
    Inventors: Yitao Liao, Douglas A. Collins, Wei Zhang
  • Patent number: 9865772
    Abstract: LED structures are disclosed to reduce non-radiative sidewall recombination along sidewalls of vertical LEDs including p-n diode sidewalls that span a top current spreading layer, bottom current spreading layer, and active layer between the top current spreading layer and bottom current spreading layer.
    Type: Grant
    Filed: February 27, 2017
    Date of Patent: January 9, 2018
    Assignee: APPLE INC.
    Inventors: David P. Bour, Kelly McGroddy, Daniel Arthur Haeger, James Michael Perkins, Arpan Chakraborty, Jean-Jacques P. Drolet, Dmitry S. Sizov
  • Patent number: 9847446
    Abstract: An electroluminescent device comprises a structure comprising a set of nanowires on the surface of a substrate, comprising: a first series of primary so-called emission nanowires (NTie) comprising nanowires connected to first electrical contacts and capable of emitting light under the action of a forward first voltage from a forward voltage or current source; a second series of secondary detection nanowires (NTid) adjacent to the primary nanowires, connected to second electrical contacts and capable of generating a photocurrent under the action of an ambient light and/or of a portion of the light emitted by some of the primary nanowires, under the control of a second reverse voltage, from a voltage or current source; means for controlling the forward voltage as a function of the photocurrent. A method for controlling the luminance of an electroluminescent device is provided.
    Type: Grant
    Filed: March 25, 2014
    Date of Patent: December 19, 2017
    Assignee: ALEDIA
    Inventors: Carlo Cagli, Giorgio Anania
  • Patent number: 9831378
    Abstract: A method of manufacturing a semiconductor light emitting device is provided. The method includes forming a first region of a lower semiconductor layer on a substrate, etching an upper surface of the first region using at least one gas used in forming the first region, in-situ in a chamber in which a process of forming the first region has been performed, forming a second region of the lower semiconductor layer on the first region, forming an active layer on the lower semiconductor layer, and forming an upper semiconductor layer on the active layer.
    Type: Grant
    Filed: June 3, 2016
    Date of Patent: November 28, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jin Sub Lee, Jung Sub Kim
  • Patent number: RE46588
    Abstract: The present invention is a semiconductor structure for light emitting devices that can emit in the red to ultraviolet portion of the electromagnetic spectrum. The semiconductor structure includes a Group III nitride active layer positioned between a first n-type Group III nitride cladding layer and a second n-type Group III nitride cladding layer, the respective bandgaps of the first and second n-type cladding layers being greater than the bandgap of the active layer. The semiconductor structure further includes a p-type Group III nitride layer, which is positioned in the semiconductor structure such that the second n-type cladding layer is between the p-type layer and the active layer.
    Type: Grant
    Filed: June 18, 2015
    Date of Patent: October 24, 2017
    Assignee: Cree, Inc.
    Inventors: John Adam Edmond, Kathleen Marie Doverspike, Hua-shuang Kong, Michael John Bergmann