With Particular Dopant Concentration Or Concentration Profile (e.g., Graded Junction) Patents (Class 257/101)
  • Patent number: 10033157
    Abstract: A surface-emitting semiconductor laser includes a first semiconductor multilayer film reflector, an active region, a second semiconductor multilayer film reflector, and a current confinement layer including an oxidized region formed by selective oxidation. The current confinement layer includes a first semiconductor layer having a relatively high Al content, a second semiconductor layer that is adjacent to the first semiconductor layer on an active-region side of the first semiconductor layer and has a lower Al content than the first semiconductor layer, and a composition-gradient layer adjacent to the first semiconductor layer on a side of the first semiconductor layer which is opposite to the active-region side. A portion of the composition-gradient layer which faces the first semiconductor layer has a lower Al content than the first semiconductor layer.
    Type: Grant
    Filed: July 28, 2015
    Date of Patent: July 24, 2018
    Assignee: FUJI XEROX CO., LTD.
    Inventors: Kazutaka Takeda, Junichiro Hayakawa, Akemi Murakami, Naoki Jogan, Takashi Kondo, Jun Sakurai
  • Patent number: 10003041
    Abstract: An organic light emitting diode, including a first electrode and a second electrode facing each other; an emission layer between the first electrode and the second electrode; and an electron injection layer between the second electrode and the emission layer, the electron injection layer including a metal having a work function of 4.0 eV or less and a dipole material including a first component and a second component having different polarities.
    Type: Grant
    Filed: June 10, 2015
    Date of Patent: June 19, 2018
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Dong Chan Kim, Won Jong Kim, Eung Do Kim, Dong Kyu Seo, Da Hea Im, Sang Hoon Yim, Chang Woong Chu
  • Patent number: 10003040
    Abstract: An organic light emitting element, includes a first electrode and a second electrode facing each other; an emission layer between the first electrode and the second electrode; and an electron injection layer between the second electrode and the emission layer, the electron injection layer including an oxide having a relative dielectric constant of 10 or more and a metal having a work function of 4.0 eV or less.
    Type: Grant
    Filed: June 5, 2015
    Date of Patent: June 19, 2018
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Dong Chan Kim, Won Jong Kim, Eung Do Kim, Dong Kyu Seo, Jong Hyuk Lee, Sang Hoon Yim, Chang Woong Chu
  • Patent number: 9991416
    Abstract: A light emitting diode and a method of manufacturing the light emitting diode are provided. The light emitting diode includes an n-type semiconductor layer, an inclined type superlattice thin film layer, an active layer, and a p-type semiconductor layer. The n-type semiconductor layer is disposed on a substrate. The inclined type superlattice thin film layer is disposed on the n-type semiconductor layer and includes a plurality of thin film pairs in which InGaN thin films and GaN thin films are sequentially stacked. The active layer having a quantum well structure is disposed on the inclined type superlattice thin film layer. The p-type semiconductor layer is disposed on the active layer. Composition ratio of Indium (In) included in the InGaN thin film is increased as getting closer to the active layer. Thus, internal residual strain is reduced, and quantum confinement effect is enhanced, and internal quantum efficiency is increased.
    Type: Grant
    Filed: June 23, 2017
    Date of Patent: June 5, 2018
    Assignee: INDUSTRY FOUNDATION OF CHONNAM NATIONAL UNIVERSITY
    Inventors: Taeksoo Ji, Jinyoung Park, Jinhong Lee, Wangki Kim, Jaesam Shim, Kwangjae Lee
  • Patent number: 9985074
    Abstract: A light-emitting device is introduced herein. The light-emitting device comprises a first light-generating active layer and a second light-generating active layer stacked in a vertical direction on a substrate wherein the first light-generating active layer and the second light-generating active layer emit light having substantially the same wavelength, and wherein the substrate, the first light-generating active layer, and the second light-generating active layer are formed together in a chip.
    Type: Grant
    Filed: November 7, 2016
    Date of Patent: May 29, 2018
    Assignee: EPISTAR CORPORATION
    Inventors: Wen-Yung Yeh, Yu-Chen Yu, Hsi-Hsuan Yen, Jui-Ying Lin
  • Patent number: 9985136
    Abstract: According to one embodiment, a semiconductor device includes first to third semiconductor regions and first to third conductors. The second semiconductor region is separated from the first semiconductor region in a first direction. The third semiconductor region is provided between the first and the second semiconductor regions. The third conductor is separated from the third semiconductor region in a second direction intersecting the first direction. The third semiconductor region includes first and second partial regions. The first partial region includes a first metal element, and is amorphous. The second partial region is stacked with the first partial region in the second direction, and is polycrystalline. A first concentration of the first metal element in the first partial region is higher than a second concentration of the first metal element in the second partial region, or the second partial region does not include the first metal element.
    Type: Grant
    Filed: September 9, 2016
    Date of Patent: May 29, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Minoru Oda, Kiwamu Sakuma, Masumi Saitoh
  • Patent number: 9978908
    Abstract: A non-polar blue light LED epitaxial wafer based on an LAO substrate comprises the LAO substrate, and a buffer layer, a first non-doped layer, a first doped layer, a quantum well layer, an electron barrier layer and a second doped layer that are sequentially arranged on the LAO substrate. A preparation method of the non-polar blue light LED epitaxial wafer includes: a) adopting the LAO substrate, selecting a crystal orientation, and cleaning a surface of the LAO substrate; b) annealing the LAO substrate, and forming an AlN seed crystal layer on the surface of the LAO substrate; and c) sequentially forming a non-polar m face GaN buffer layer, a non-polar non-doped u-GaN layer, a non-polar n-type doped GaN film, a non-polar InGaN/GaN quantum well, a non-polar m face AlGaN electron barrier layer and a non-polar p-type doped GaN film on the LAO substrate by adopting metal organic chemical vapor deposition.
    Type: Grant
    Filed: March 23, 2015
    Date of Patent: May 22, 2018
    Assignee: SHANGHAI CHIPTEK SEMICONDUCTOR TECHNOLOGY CO., LTD.
    Inventors: Zhuoran Cai, Hai Gao, Zhi Liu, Xianglin Yin, Zhengwei Liu
  • Patent number: 9917156
    Abstract: Nucleation layers for growth of III-nitride structures, and methods for growing the nucleation layers, are described herein. A semiconductor can include a silicon substrate and a nucleation layer over the silicon substrate. The nucleation layer can include silicon and deep-level dopants. The semiconductor can include a III-nitride layer formed over the nucleation layer. At least one of the silicon substrate and the nucleation layer can include ionized contaminants. In addition, a concentration of the deep-level dopants is at least as high as a concentration of the ionized contaminants.
    Type: Grant
    Filed: September 2, 2016
    Date of Patent: March 13, 2018
    Assignee: IQE, plc
    Inventors: Oleg Laboutin, Chen-Kai Kao, Chien-Fong Lo, Wayne Johnson, Hugues Marchand
  • Patent number: 9911721
    Abstract: A semiconductor device includes a light emitting element comprising a substrate having a first and a second surface and an outer edge connecting the first and second surfaces. A light emitting layer is on a central portion of the first surface but not on a peripheral portion between the central portion and the outer edge of the substrate. A first insulating layer is disposed on the peripheral portion of the first surface, a side surface of the light emitting layer, and a third surface of the light emitting layer that is spaced from the first surface of the substrate. A first electrode is electrically contacting the third surface of the light emitting layer. A light receiving element is provided in a propagation path of light emitted from the light emitting element.
    Type: Grant
    Filed: August 2, 2016
    Date of Patent: March 6, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tatsuo Tonedachi
  • Patent number: 9905725
    Abstract: A light emitting diode, including a semiconductor epitaxial structure, a first electrode and a second electrode is provided. The semiconductor epitaxial structure includes a plurality stacked light-emitting layers, and each of the light-emitting layers respectively emits different range of wavelength of light. The first electrode is electrically connected to the semiconductor epitaxial structure. The second electrode is electrically connected to the semiconductor epitaxial structure. Furthermore, a data transmission and reception apparatus is provided.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: February 27, 2018
    Assignee: Southern Taiwan University of Science and Technology
    Inventor: Ming-Lun Lee
  • Patent number: 9876143
    Abstract: In an example, the present invention provides a light-emitting device configured to emit electromagnetic radiation in a range of 210 to 360 nanometers. The device has a substrate member comprising a surface region. The device has a thickness of AlGaN material formed overlying the surface region and an aluminum concentration characterizing the AlGaN material having a range of 0 to 100%. The device has a boron doping concentration characterizing the AlGaN material having a range between 1e15 to 1e20 atoms/centimeter3.
    Type: Grant
    Filed: October 1, 2014
    Date of Patent: January 23, 2018
    Assignee: RayVio Corporation
    Inventors: Yitao Liao, Douglas A. Collins, Wei Zhang
  • Patent number: 9865772
    Abstract: LED structures are disclosed to reduce non-radiative sidewall recombination along sidewalls of vertical LEDs including p-n diode sidewalls that span a top current spreading layer, bottom current spreading layer, and active layer between the top current spreading layer and bottom current spreading layer.
    Type: Grant
    Filed: February 27, 2017
    Date of Patent: January 9, 2018
    Assignee: APPLE INC.
    Inventors: David P. Bour, Kelly McGroddy, Daniel Arthur Haeger, James Michael Perkins, Arpan Chakraborty, Jean-Jacques P. Drolet, Dmitry S. Sizov
  • Patent number: 9847446
    Abstract: An electroluminescent device comprises a structure comprising a set of nanowires on the surface of a substrate, comprising: a first series of primary so-called emission nanowires (NTie) comprising nanowires connected to first electrical contacts and capable of emitting light under the action of a forward first voltage from a forward voltage or current source; a second series of secondary detection nanowires (NTid) adjacent to the primary nanowires, connected to second electrical contacts and capable of generating a photocurrent under the action of an ambient light and/or of a portion of the light emitted by some of the primary nanowires, under the control of a second reverse voltage, from a voltage or current source; means for controlling the forward voltage as a function of the photocurrent. A method for controlling the luminance of an electroluminescent device is provided.
    Type: Grant
    Filed: March 25, 2014
    Date of Patent: December 19, 2017
    Assignee: ALEDIA
    Inventors: Carlo Cagli, Giorgio Anania
  • Patent number: 9831378
    Abstract: A method of manufacturing a semiconductor light emitting device is provided. The method includes forming a first region of a lower semiconductor layer on a substrate, etching an upper surface of the first region using at least one gas used in forming the first region, in-situ in a chamber in which a process of forming the first region has been performed, forming a second region of the lower semiconductor layer on the first region, forming an active layer on the lower semiconductor layer, and forming an upper semiconductor layer on the active layer.
    Type: Grant
    Filed: June 3, 2016
    Date of Patent: November 28, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jin Sub Lee, Jung Sub Kim
  • Patent number: 9800016
    Abstract: Laser diode technology incorporating etched facet mirror formation and optical coating techniques for reflectivity modification to enable ultra-high catastrophic optical mirror damage thresholds for high power laser diodes.
    Type: Grant
    Filed: May 12, 2016
    Date of Patent: October 24, 2017
    Assignee: Soraa Laser Diode, Inc.
    Inventors: James W. Raring, Hua Huang
  • Patent number: 9787060
    Abstract: In an example, the present invention provides a gallium and nitrogen containing laser diode device. The device has a gallium and nitrogen containing substrate material comprising a surface region, which is configured on either a ({10-10}) crystal orientation or a {10-10} crystal orientation configured with an offcut at an angle toward or away from the [0001] direction. The device also has a GaN region formed overlying the surface region, an active region formed overlying the surface region, and a gettering region comprising a magnesium species overlying the surface region. The device has a p-type cladding region comprising an (InAl)GaN material doped with a plurality of magnesium species formed overlying the active region.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: October 10, 2017
    Assignee: Soraa Laser Diode, Inc.
    Inventors: Melvin McLaurin, James W. Raring, Christiane Elsass
  • Patent number: 9768312
    Abstract: Embodiments of the present invention disclose a manufacturing method of a thin film transistor, a thin film transistor, an array substrate and a display device. The manufacturing method of a thin film transistor includes a step of forming an active layer, and the step of forming an active layer includes: forming a first poly-silicon layer and a second poly-silicon layer on the first poly-silicon layer separately, and adding dopant ions into the second poly-silicon layer and an upper surface layer of the first poly-silicon layer. By using the manufacturing method of a thin film transistor, defect states and unstable factors of interface in the thin film transistor can be reduced, thereby improving stability of the LTPS thin film transistor and obtaining an array substrate and a display device having more stable performance.
    Type: Grant
    Filed: July 20, 2015
    Date of Patent: September 19, 2017
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Hongwei Tian, Yanan Niu, Zuqiang Wang, Liang Sun
  • Patent number: 9748437
    Abstract: A device includes a support including at least a first area and a second area, and a plurality of first light emitting devices located over the first area of the support, each first light emitting device containing a first growth template including a first nanostructure, and each first light emitting device has a first peak emission wavelength. The device also includes a plurality of second light emitting devices located over the second area of the support, each second light emitting device containing a second growth template including a second nanostructure, and each second light emitting device has a second peak emission wavelength different from the first peak emission wavelength. Each first growth template differs from each second growth template.
    Type: Grant
    Filed: April 16, 2015
    Date of Patent: August 29, 2017
    Assignee: GLO AB
    Inventors: Jonas Ohlsson, Carl Patrik Theodor Svensson
  • Patent number: 9705032
    Abstract: A carbon doped short period superlattice is provided. A heterostructure includes a short period superlattice comprising a plurality of quantum wells alternating with a plurality of barriers. One or more of the quantum wells and/or the barriers includes a carbon doped layer (e.g., a non-percolated or percolated carbon atomic plane).
    Type: Grant
    Filed: March 14, 2016
    Date of Patent: July 11, 2017
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Michael Shur, Remigijus Gaska, Jinwei Yang, Alexander Dobrinsky
  • Patent number: 9704833
    Abstract: A full-color display panel includes a plurality of sub-pixel units. The sub-pixel unit includes an LED unit and a filter layer transmitting light of a specific color. The LED unit includes an LED semiconductor chip emitting light of a specific color. The LED semiconductor chips of the plurality of sub-pixel units are homochromatic LED semiconductor chips emitting light of a same color. In each sub-pixel unit, a position of the filter layer corresponds to a position of the LED semiconductor chip, and the filter layer is located on a side of the LED semiconductor chip that emits light.
    Type: Grant
    Filed: March 20, 2014
    Date of Patent: July 11, 2017
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xiangchun Kong, Zhanfeng Cao, Qi Yao, Luke Ding
  • Patent number: 9679974
    Abstract: According to one embodiment, a nitride semiconductor element includes: a stacked body; and a functional layer. The stacked body includes a first GaN layer, a first layer, and a second GaN layer. The first GaN layer includes a first protrusion. The first layer is provided on the first GaN layer and contains at least one of Si and Mg. The second GaN layer is provided on the first layer and includes a second protrusion. Length of bottom of the second protrusion is shorter than length of bottom of the first protrusion. A functional layer is provided on the stacked body and includes a nitride semiconductor.
    Type: Grant
    Filed: June 24, 2014
    Date of Patent: June 13, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Toshiki Hikosaka, Hisashi Yoshida, Hajime Nago, Naoharu Sugiyama, Shinya Nunoue
  • Patent number: 9640781
    Abstract: Embodiments disclosed herein provide an organic light emitting diode (OLED) device is provided, including a high index substrate having an index of refraction of 1.5 or greater, a reflective electrode, an organic emissive layer configured to emit light having a wavelength of ?; and where an optical distance between the organic emissive layer and the reflective electrode of the OLED is between ?/4 and 3?/4.
    Type: Grant
    Filed: February 26, 2015
    Date of Patent: May 2, 2017
    Assignee: Universal Display Corporation
    Inventors: Chaoyu Xiang, Ruiqing Ma
  • Patent number: 9640650
    Abstract: Embodiments include high electron mobility transistors (HEMTs) comprising a substrate and a barrier layer including a doped component. The doped component may be a germanium doped layer or a germanium doped pulse. Other embodiments may include methods for fabricating such a HEMT.
    Type: Grant
    Filed: January 16, 2014
    Date of Patent: May 2, 2017
    Assignee: Qorvo US, Inc.
    Inventors: Edward A. Beam, III, Jinqiao Xie
  • Patent number: 9620598
    Abstract: An electronic device can transistor having a channel layer that includes a compound semiconductor material. In an embodiment, the channel layer overlies a semiconductor layer that includes a carrier barrier region and a carrier accumulation region. The charge barrier region can help to reduce the likelihood that de-trapped carriers from the channel layer will enter the charge barrier region, and the charge accumulation region can help to repel carriers in the channel layer away from the charge barrier layer. In another embodiment, a barrier layer overlies the channel layer. Embodiments described herein may help to produce lower dynamic on-resistance, lower leakage current, another beneficial effect, or any combination thereof.
    Type: Grant
    Filed: June 17, 2015
    Date of Patent: April 11, 2017
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Chun-Li Liu, Ali Salih
  • Patent number: 9612345
    Abstract: A photodetector device, including: a scintillator material operable for receiving incident radiation and emitting photons in response; a photodetector material coupled to the scintillator material operable for receiving the photons emitted by the scintillator material and generating a current in response, wherein the photodetector material includes a chalcopyrite semiconductor crystal; and a circuit coupled to the photodetector material operable for characterizing the incident radiation based on the current generated by the photodetector material. Optionally, the scintillator material includes a gamma scintillator material and the incident radiation received includes gamma rays. Optionally, the photodetector material is further operable for receiving thermal neutrons and generating a current in response. The circuit is further operable for characterizing the thermal neutrons based on the current generated by the photodetector material.
    Type: Grant
    Filed: September 2, 2015
    Date of Patent: April 4, 2017
    Assignees: Cosolidated Nuclear Security, LLC, Fisk University
    Inventors: Ashley C. Stowe, Arnold Burger
  • Patent number: 9601658
    Abstract: Solid state lighting devices that can produce white light without a phosphor are disclosed herein. In one embodiment, a solid state lighting device includes a first semiconductor material, a second semiconductor material spaced apart from the first semiconductor material, and an active region between the first and second semiconductor materials. The active region includes a first sub-region having a first center wavelength and a second sub-region having a second center wavelength different from the first center wavelength.
    Type: Grant
    Filed: July 27, 2015
    Date of Patent: March 21, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Zaiyuan Ren, Thomas Gehrke
  • Patent number: 9590141
    Abstract: According to one embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer, a light emitting part, and a p-side electrode. The light emitting part is provided between the n-type and the p-type semiconductor layers, and includes a plurality of barrier layers and a plurality of well layers. The p-side electrode contacts the p-type semiconductor layer. The p-type semiconductor layer includes first, second, third, and fourth p-type layers. The first p-type layer contacts the p-side electrode. The second p-type layer contacts the light emitting part. The third p-type layer is provided between the first p-type layer and the second p-type layer. The fourth p-type layer is provided between the second p-type layer and the third p-type layer. The second p-type layer contains Al and contains a p-type impurity in a lower concentration lower than that in the first concentration.
    Type: Grant
    Filed: June 8, 2015
    Date of Patent: March 7, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Tachibana, Hajime Nago, Toshiki Hikosaka, Shigeya Kimura, Shinya Nunoue
  • Patent number: 9543467
    Abstract: Disclosed is a light emitting device. The light emitting device includes a first conductive semiconductor layer, an active layer over the first conductive semiconductor layer, a second conductive semiconductor layer over the active layer, a superlattice structure layer over the second conductive semiconductor layer, and a first current spreading layer including a transmissive conductive thin film over the superlattice structure layer.
    Type: Grant
    Filed: April 13, 2009
    Date of Patent: January 10, 2017
    Assignee: LG INNOTEK CO., LTD.
    Inventor: June O Song
  • Patent number: 9537054
    Abstract: A heterostructure for use in fabricating an optoelectronic device is provided. The heterostructure includes a layer, such as an n-type contact or cladding layer, that includes thin sub-layers inserted therein. The thin sub-layers can be spaced throughout the layer and separated by intervening sub-layers fabricated of the material for the layer. The thin sub-layers can have a distinct composition from the intervening sub-layers, which alters stresses present during growth of the heterostructure.
    Type: Grant
    Filed: April 15, 2015
    Date of Patent: January 3, 2017
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Daniel D. Billingsley, Robert M. Kennedy, Wenhong Sun, Rakesh Jain, Maxim S. Shatalov, Alexander Dobrinsky, Michael Shur, Remigijus Gaska
  • Patent number: 9535157
    Abstract: A proximity sensor includes a radiation source configured to emit a primary radiation beam and a primary detector configured to pick up a reflected primary radiation beam. The radiation source is further configured to emit stray radiation. The sensor further includes a reference detector arranged to receive the stray radiation. The stray radiation may, for example, be emitted from either a side of the radiation source or a bottom of the radiation source.
    Type: Grant
    Filed: September 23, 2014
    Date of Patent: January 3, 2017
    Assignees: STMicroelectronics (Research & Development) Limited, STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Crolles 2) SAS
    Inventors: Adam Caley, Pierre-Jean Parodi-Keravec, Olivier Le Briz, Sandrine Lhostis
  • Patent number: 9530931
    Abstract: A semiconductor chip includes a semiconductor body with a semiconductor layer sequence. An active region intended for generating radiation is arranged between an n-conductive multilayer structure and a p-conductive semiconductor layer. A doping profile is formed in the n-conductive multilayer structure which includes at least one doping peak.
    Type: Grant
    Filed: March 18, 2015
    Date of Patent: December 27, 2016
    Assignee: OSRAM OPTO SEMICONDUCTORS GMBH
    Inventors: Matthias Peter, Tobias Meyer, Alexander Walter, Tetsuya Taki, Juergen Off, Rainer Butendeich, Joachim Hertkorn
  • Patent number: 9520535
    Abstract: A light emitting device includes a first electrode, a first semiconductor layer disposed on the first electrode and including a first conductive dopant, a second semiconductor layer disposed on the first semiconductor layer and including the first conductive dopant having a doping concentration lower than a doping concentration of the first semiconductor layer, a third semiconductor layer disposed on the second semiconductor layer to adjust stress, a first conductive semiconductor layer on the third semiconductor layer, an active layer on the first conductive semiconductor layer, a second conductive semiconductor layer on the active layer; and a second electrode on the second conductive semiconductor layer, the third semiconductor layer has a doping concentration in a range between the doping concentration of the second semiconductor layer and a doping concentration of the first conductive semiconductor layer, and the doping concentration of the third semiconductor layer is increased toward the first conducti
    Type: Grant
    Filed: August 19, 2015
    Date of Patent: December 13, 2016
    Assignee: LG INNOTEK., LTD.
    Inventors: Chan Keun Park, Hyeong Jun Kim, Myung Hoon Jung, Jae Woong Han
  • Patent number: 9520538
    Abstract: An LED epitaxial structure includes a substrate; a GaN nucleating layer; a superlattice buffer layer comprising a plurality pairs of alternately stacked AlGaN/n-GaN structures; an n-GaN layer; a MQW light-emitting layer, a p-GaN layer and a p-type contact layer. Al(n) represents Al composition value of the nth AlGaN/n-GaN superlattice buffer layer pair; N(n) represents n-type impurity concentration value of the nth AlGaN/n-GaN superlattice buffer layer pair; variation trend of Al(n) is from gradual increase to gradual decrease, and for N(n) is from gradual increase to gradual decrease.
    Type: Grant
    Filed: June 23, 2015
    Date of Patent: December 13, 2016
    Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Qi Nan, Hsiang-Pin Hsieh, Nan Qiao, Wenyan Zhang, Hongmin Zhou, Lan Li, Wei Cheng, Zhijun Xu, Honghao Wu
  • Patent number: 9484494
    Abstract: Provided are a semiconductor light emitting device. The semiconductor light emitting device comprises a first semiconductor layer; a second semiconductor layer disposed on the first semiconductor layer; an active layer disposed between the first semiconductor layer and the second semiconductor layer; a third semiconductor layer disposed on the second semiconductor layer; and a fourth semiconductor layer disposed on the third semiconductor layer. The second semiconductor layer is formed of an InAlGaN semiconductor layer, the third semiconductor layer is formed of an AlGaN semiconductor layer, and the fourth semiconductor layer is formed of a GaN semiconductor layer.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: November 1, 2016
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Dae Sung Kang, Hyo Kun Son
  • Patent number: 9466766
    Abstract: The present invention relates to a high-efficiency AlGaInP light-emitting diode directly grown on a transparent substrate and a method of manufacturing the same, and, more particularly, to a high-efficiency AlGaInP light-emitting diode grown on a sapphire substrate and a method of manufacturing the same. According to the present invention, an AlGaInP light-emitting diode is manufactured using an inexpensive sapphire substrate having high transmittance to ultraviolet rays, infrared rays and visible rays. The AlGaInP light-emitting diode according to the present invention can emit light with high efficiency because a lower substrate does not absorb light, and can be effectively manufactured because a process of removing a GaAs or a process of bonding a sapphire substrate is not conducted.
    Type: Grant
    Filed: July 18, 2014
    Date of Patent: October 11, 2016
    Assignee: AUK CORP.
    Inventor: Hyung Joo Lee
  • Patent number: 9449868
    Abstract: A method of forming a photonic device that comprises a substrate and a dielectric material including two or more openings that expose a portion of the substrate, the two or more openings each having an aspect ratio of at least 1. A bottom diode material comprising a compound semiconductor material that is lattice mismatched to the substrate occupies the two or more openings and is coalesced above the two or more openings to form the bottom diode region. The method may further include forming a top diode material and an active diode region between the top and bottom diode materials.
    Type: Grant
    Filed: April 13, 2015
    Date of Patent: September 20, 2016
    Assignee: Taiwan Semiconductor Manufacutring Company, Ltd.
    Inventor: Anthony J. Lochtefeld
  • Patent number: 9373687
    Abstract: In a semiconductor device, a YAG substrate is formed as a single-crystal substrate of any of surface orientations (100), (110), and (111). In the fabrication of the semiconductor device, a TMAl gas is first fed onto the YAG substrate so as to form a nucleation layer made of aluminum, which is a group-III element. Then, an NH3 gas is fed onto the nucleation layer. This turns the surface of the nucleation layer into a group-V element and then forms a group-III-V compound layer of AlN. Then, a mixed gas of TMAl gas and NH3 gas is fed onto the group-III-V compound layer so as to form another group-III-V compound layer. Finally, a group-III nitride semiconductor layer is crystal-grown on the group-III compound layer.
    Type: Grant
    Filed: November 19, 2012
    Date of Patent: June 21, 2016
    Assignees: KOITO MANUFACTURING CO., LTD., TOKYO UNIVERSITY OF SCIENCE
    Inventors: Akihiro Nomura, Kazuhiro Ohkawa, Akira Hirako
  • Patent number: 9343616
    Abstract: A method for forming a light emitting device includes forming a monocrystalline III-V emissive layer on a monocrystalline substrate and forming a first doped layer on the emissive layer. A first contact is deposited on the first doped layer. The monocrystalline substrate is removed from the emissive layer by a mechanical process. A second doped layer is formed on the emissive layer on a side from which the substrate has been removed. The second doped layer has a dopant conductivity opposite that of the first doped layer. A second contact is deposited on the second doped layer.
    Type: Grant
    Filed: May 13, 2015
    Date of Patent: May 17, 2016
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Tze-Chiang Chen, Bahman Hekmatshoartabari, Devendra K. Sadana, Ghavam G. Shahidi, Davood Shahrjerdi
  • Patent number: 9343622
    Abstract: Provided is a nitride semiconductor light emitting device including: a substrate; a first buffer layer formed above the substrate; an indium-containing second buffer layer formed above the first buffer layer; an indium-containing third buffer layer formed above the second buffer layer; a first nitride semiconductor layer formed above the third buffer layer; an active layer formed above the first nitride semiconductor layer; and a second nitride semiconductor layer formed above the active layer. According to the present invention, the crystal defects are further suppressed, so that the crystallinity of the active layer is enhanced, and the optical power and the operation reliability are enhanced.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: May 17, 2016
    Assignee: LG INNOTEK CO., LTD.
    Inventor: Suk Hun Lee
  • Patent number: 9318637
    Abstract: Solar cells exhibiting improved conversion efficiency are disclosed. Particularly, multi-pn junction solar cells that contain a current spreading layer as well as concentrating photovoltaic modules that include such a solar cell and light concentrating optics are disclosed. The multi-pn junctions in question may generally be made up of III-V semiconductor materials, while the current spreading layer may generally be made up of II-VI semiconductor materials.
    Type: Grant
    Filed: June 12, 2012
    Date of Patent: April 19, 2016
    Assignee: 3M Innovative Properties Company
    Inventor: Michael A. Haase
  • Patent number: 9252340
    Abstract: Embodiments provide a phosphor including a silicate-based first phosphor emitting light having a yellow wavelength, a nitride-based second phosphor emitting light having a green wavelength, and a nitride-based third phosphor emitting light having a red wavelength. A full width at half maximum of the spectrum of mixed light emitted from the first phosphor to the third phosphor as the phosphors are excited by light having a blue wavelength is 110 nm or more.
    Type: Grant
    Filed: April 17, 2014
    Date of Patent: February 2, 2016
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Tae Hun Kim, Ji Na Lee, Mi Jung Han
  • Patent number: 9147799
    Abstract: An LED epitaxial structure includes a substrate, a buffer layer and an epitaxial layer. The buffer layer is grown on a top surface of the substrate, and the epitaxial layer is formed on a surface of the buffer layer. The epitaxial layer has a first n-type epitaxial layer and a second n-type epitaxial layer. The first n-type epitaxial layer is formed between the buffer layer and the second n-type epitaxial layer. The first n-type epitaxial layer has a plurality of irregular holes therein. The first n-type epitaxial layer has a doping concentration which varies along a thickness direction of the first n-type epitaxial layer.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: September 29, 2015
    Assignee: ShenZhen Treasure City Technology Co., LTD.
    Inventors: Po-Min Tu, Shih-Cheng Huang
  • Patent number: 9130122
    Abstract: A light emitting diode (LED) including a first-type doped GaN substrate, a first-type doped semiconductor layer, an active layer, a second-type semiconductor layer, a first electrode, and a second electrode is provided. The first-type doped GaN substrate has a first doped element. The first-type semiconductor layer is disposed on the first-type doped GaN substrate. The first-type semiconductor layer has a second doped element different from the first doped element, and the doped concentration of the second doped element—may have a peak from 3E18/cm3 to 1E20/cm3 at an interface between the first-type doped GaN substrate and the first-type semiconductor layer. The active layer is disposed on the first-type semiconductor layer, and the second-type semiconductor layer is disposed on the active layer. The first electrode and the second electrode are respectively disposed on the first-type doped GaN substrate and the second-type semiconductor layer. Other LEDs are also provided.
    Type: Grant
    Filed: February 17, 2014
    Date of Patent: September 8, 2015
    Assignees: Industrial Technology Research Institute, WALSIN LIHWA Corp
    Inventors: Yi-Keng Fu, Chia-Lung Tsai, Hung-Tse Chen, Chih-Hsuen Chou
  • Patent number: 9041048
    Abstract: The semiconductor light emitting device according to embodiments has a first conductive type semiconductor layer, an un-doped semiconductor layer under the first conductive type semiconductor layer, and a plurality of semiconductor structures in the un-doped semiconductor layer.
    Type: Grant
    Filed: September 2, 2009
    Date of Patent: May 26, 2015
    Assignee: LG INNOTEK CO., LTD.
    Inventor: Ho Sang Yoon
  • Publication number: 20150137173
    Abstract: A nitride semiconductor light-emitting element including a high concentration silicon-doped layer doped with silicon at a high concentration of 2×1019 atoms/cm3, and a dislocation reduction layer for laterally bending a threading dislocation on the high concentration silicon-doped layer.
    Type: Application
    Filed: September 5, 2013
    Publication date: May 21, 2015
    Inventor: Satoshi Komada
  • Patent number: 9029901
    Abstract: An electronic component has a housing body which comprises a semiconductor chip in a recess. The semiconductor chip in the recess is embedded in a casting compound made of a first plastic material having a first glass transition temperature. A cover element made of a second plastic material having a second glass transition temperature is arranged above the recess. The second glass transition temperature is lower than the first glass transition temperature.
    Type: Grant
    Filed: August 19, 2011
    Date of Patent: May 12, 2015
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Johann Ramchen, Christina Keith, Bert Braune
  • Publication number: 20150115312
    Abstract: In a group III nitride semiconductor device according to one aspect of the present invention, in a p-type group III nitride semiconductor region formed on a semi-polar plane substrate, the concentration of hydrogen (H) contained in the p-type group III nitride semiconductor region is 25% or less of the concentration of a p-type dopant therein, and the concentration of oxygen contained in the p-type group III nitride semiconductor region is 5×1017 atoms/cm3 or lower, and an angle between a normal axis of a primary surface of the semi-polar plane substrate and a c-axis of the semi-polar plane substrate is not lower than 45 degrees and not higher than 80 degrees or not lower than 100 degrees and not higher than 135 degrees in a waveguide axis direction of the group III nitride semiconductor device.
    Type: Application
    Filed: October 22, 2014
    Publication date: April 30, 2015
    Inventors: Nobuhiro Saga, Shinji Tokuyama, Kazuhide Sumiyoshi, Takashi Kyono, Koji Katayama, Tatsushi Hamaguchi, Katsunori Yanashima
  • Patent number: 9012953
    Abstract: A light emitting device and method for making the same is disclosed. The light-emitting device includes an active layer sandwiched between a p-type semiconductor layer and an n-type semiconductor layer. The active layer emits light when holes from the p-type semiconductor layer combine with electrons from the n-type semiconductor layer therein. The active layer includes a number of sub-layers and has a plurality of pits in which the side surfaces of a plurality of the sub-layers are in contact with the p-type semiconductor material such that holes from the p-type semiconductor material are injected into those sub-layers through the exposed side surfaces without passing through another sub-layer. The pits can be formed by utilizing dislocations in the n-type semiconductor layer and etching the active layer using an etching atmosphere in the same chamber used to deposit the semiconductor layers without removing the partially fabricated device.
    Type: Grant
    Filed: February 7, 2014
    Date of Patent: April 21, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Steven Lester, Jeff Ramer, Jun Wu, Ling Zhang
  • Patent number: RE46588
    Abstract: The present invention is a semiconductor structure for light emitting devices that can emit in the red to ultraviolet portion of the electromagnetic spectrum. The semiconductor structure includes a Group III nitride active layer positioned between a first n-type Group III nitride cladding layer and a second n-type Group III nitride cladding layer, the respective bandgaps of the first and second n-type cladding layers being greater than the bandgap of the active layer. The semiconductor structure further includes a p-type Group III nitride layer, which is positioned in the semiconductor structure such that the second n-type cladding layer is between the p-type layer and the active layer.
    Type: Grant
    Filed: June 18, 2015
    Date of Patent: October 24, 2017
    Assignee: Cree, Inc.
    Inventors: John Adam Edmond, Kathleen Marie Doverspike, Hua-shuang Kong, Michael John Bergmann
  • Patent number: RE46589
    Abstract: The present invention is a semiconductor structure for light emitting devices that can emit in the red to ultraviolet portion of the electromagnetic spectrum. The structure includes a first n-type cladding layer of AlxInyGa1?x?yN, where 0?x?1 and 0?y<1 and (x+y)?1; a second n-type cladding layer of AlxInyGa1?x?yN, where 0?x?1 and 0?y<1 and (x+y)?1, wherein the second n-type cladding layer is further characterized by the substantial absence of magnesium; an active portion between the first and second cladding layers in the form of a multiple quantum well having a plurality of InxGa1?xN well layers where 0<x<1 separated by a corresponding plurality of AlxInyGa1?x?yN barrier layers where 0?x?1 and 0?y?1; a p-type layer of a Group III nitride, wherein the second n-type cladding layer is positioned between the p-type layer and the multiple quantum well; and wherein the first and second n-type cladding layers have respective bandgaps that are each larger than the bandgap of the well layers.
    Type: Grant
    Filed: July 13, 2015
    Date of Patent: October 24, 2017
    Assignee: Cree, Inc.
    Inventors: John Adam Edmond, Kathleen Marie Doverspike, Hua-shuang Kong, Michael John Bergmann, David Todd Emerson