With Particular Dopant Concentration Or Concentration Profile (e.g., Graded Junction) Patents (Class 257/101)
  • Patent number: 6853664
    Abstract: The semiconductor laser element comprises, from bottom to top, the p-AlxGa1?xAs upper clad layer, p-AlyGa1?yAs resistance control layer, and p-GaAs cap layer (where x>y>0.2). A portion of only the resistance control layer and cap layer is selectively etched. The etchant used for this etching is a mixture of organic acid and hydrogen peroxide based mixture, has such a composition such that the ratio of dissolution rate of the upper clad layer to the cap layer is between 10 and 20, and pH is between 7.4 and 7.6.
    Type: Grant
    Filed: February 25, 2003
    Date of Patent: February 8, 2005
    Assignee: The Furukawa Electric Co., Ltd.
    Inventors: Takeshi Shiojima, Keiichi Yabusaki, Michio Ohkubo
  • Patent number: 6853012
    Abstract: An AlGaInP light emitting diode with improved illumination is provided. The AlGaInP light emitting diode includes a semiconductor substrate, a light re-emitting layer, an AlGaInP layer with a first doping concentration, an AlGaInP lower cladding layer with a second doping concentration less than the first doping concentration, an undoped AlGaInP active layer, an AlGaInP upper cladding layer, a window layer, an annular-shaped top electrode on the window layer and a layered electrode on a bottom of the semiconductor substrate. The light re-emitting layer includes at least a first region formed of the light re-emitting layer and a second region formed of Al2O3 enclosing the first region. Since AlGaInP layer between the AlGaInP lower cladding layer and the light re-emitting layer has the first doping concentration larger than that of the AlGaInP lower cladding layer, the AlGaInP layer provides a transverse current spreading.
    Type: Grant
    Filed: October 21, 2002
    Date of Patent: February 8, 2005
    Assignee: Uni Light Technology Inc.
    Inventors: Nai-Chuan Chen, Yi-Lun Chou, Nae-Guann Yih
  • Patent number: 6849878
    Abstract: A method for fabricating a radiation-emitting semiconductor chip having a thin-film element based on III-V nitride semiconductor material includes the steps of depositing a layer sequence of a thin-film element on an epitaxy substrate. The thin-film element is joined to a carrier, and the epitaxy substrate is removed from the thin-film element. The epitaxy substrate has a substrate body made from PolySiC or PolyGaN or from SiC, GaN or sapphire, which is joined to a grown-on layer by a bonding layer, and on which the layer sequence of the thin-film element is deposited by epitaxy.
    Type: Grant
    Filed: February 28, 2003
    Date of Patent: February 1, 2005
    Assignee: OSRAM Opto Semiconductors GmbH
    Inventors: Stefan Bader, Michael Fehrer, Berthold Hahn, Volker Härle, Hans-Jürgen Lugauer
  • Patent number: 6841800
    Abstract: In the light-emitting gallium-nitride-group compound semiconductor devices using a substrate, the operating voltage is lowered and at the same time the occurrence of crack during crystal growth is suppressed, resulting in an improved manufacturing yield rate. The device includes a stacked structure of an n-type layer, a light-emitting layer and a p-type layer formed in the foregoing order on a substrate, and an n-side electrode formed on the surface of the n-type layer. The n-type layer is a laminate layer composed of, in the order from the substrate, first n-type layer and a second n-type layer having a carrier concentration higher than that of the first n-type layer. As the contact resistance between the n-type layer and the n-side electrode formed thereon is reduced, the operating voltage of a light-emitting device is lowered, and the power consumption decreased.
    Type: Grant
    Filed: November 19, 2002
    Date of Patent: January 11, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasunari Oku, Hidenori Kamei
  • Patent number: 6838701
    Abstract: A nitride semiconductor laser device of high reliability such that the width of contact between a p-side ohmic electrode and a p-type contact layer is precisely controlled. The device comprises a substrate, an n-type nitride semiconductor layer, an active layer, and a p-type nitride semiconductor layer. All the layers are formed in order on the substrate. A ridge part including the uppermost layer of the p-type nitride semiconductor layer of the p-type nitride semiconductor layer i.e., a p-type contact layer is formed in the p-type nitride semiconductor layer. A p-side ohmic electrode is formed on the p-type contact layer of the top of the ridge part. A first insulating film having an opening over the top of the ridge part covers the side of the ridge part and the portion near the side of the ridge part. The p-side ohmic electrode is in contact with the p-type contact layer through the opening. A second insulating film is formed on the first insulating film.
    Type: Grant
    Filed: February 15, 2001
    Date of Patent: January 4, 2005
    Assignee: Nichia Corporation
    Inventor: Masahiko Sano
  • Patent number: 6838705
    Abstract: The present invention provides a nitride semiconductor light emitting device with an active layer of the multiple quantum well structure, in which the device has an improved luminous intensity and a good electrostatic withstanding voltage, thereby allowing the expanded application to various products. The active layer 7 is formed of a multiple quantum well structure containing InaGa1?aN (0?a<1). The p-cladding layer 8 is formed on said active layer containing the p-type impurity. The p-cladding layer 8 is made of a multi-film layer including a first nitride semiconductor film containing Al and a second nitride semiconductor film having a composition different from that of said first nitride semiconductor film. Alternatively, the p-cladding layer 8 is made of single-layered layer made of AlbGa1?bN (0?b?1). A low-doped layer 9 is grown on the p-cladding layer 8 having a p-type impurity concentration lower than that of the p-cladding layer 8.
    Type: Grant
    Filed: March 24, 2000
    Date of Patent: January 4, 2005
    Assignee: Nichia Corporation
    Inventor: Koji Tanizawa
  • Patent number: 6838706
    Abstract: In a group III nitride compound semiconductor light-emitting device, a light-emitting layer having a portion where an InGaN layer is interposed between AlGaN layers on both sides thereof is employed. By controlling the thickness, growth rate and growth temperature of InGaN layer which is a well layer and the thickness of AlGaN layer which is a barrier layer so that they are optimized, the output of the light-emitting device is enhanced.
    Type: Grant
    Filed: July 3, 2001
    Date of Patent: January 4, 2005
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Hiroshi Watanabe, Jun Ito, Shinya Asami, Naoki Shibata
  • Patent number: 6835956
    Abstract: A nitride semiconductor device includes a GaN substrate having a single-crystal GaN layer at least on its surface and plurality of device-forming layers made of nitride semiconductor. The device-forming layer contacting the GaN substrate has a coefficient of thermal expansion smaller than that of GaN, so that a compressive strain is applied to the device-forming layer. This result in prevention of crack forming in the device-forming layers, and a lifetime characteristics of the nitride semiconductor device is improved.
    Type: Grant
    Filed: February 8, 2000
    Date of Patent: December 28, 2004
    Assignee: Nichia Corporation
    Inventors: Shinichi Nagahama, Shuji Nakamura
  • Publication number: 20040238839
    Abstract: The present invention relates to a GaN-based composition semiconductor light-emitting element and its window layer structure. This light-emitting element comprises a substrate, where several epitaxy layers are sequentially form, and a window layer formed on the epitaxy layers so as to construct a light-emitting element. Each of the epitaxy layers and the window layer is composed of GaN-based composition. Borons are doped in the window layer so as to increase the band gap of the window layer and decrease the refractive index. By appropriately doping the borons, the activity rate of the P-type will be increased so as to increase the electric conductivity. Furthermore, by increasing the thickness of the window layer, the probability of defect generation can be reduced.
    Type: Application
    Filed: May 28, 2003
    Publication date: December 2, 2004
    Inventors: Mu-Jen Lai, Chiung-Yu Chang
  • Patent number: 6822258
    Abstract: A self-organized nanometer interface structure is disclosed. During the reactive sputtering process, the chemical dynamics difference among reactants induces self-organization to form a special nanometer interface structure. The nanometer interface structure naturally form an interface potential difference so that it has a rectifying effect in a particular range of potential variation range. Therefore, it functions like a diode. Such a self-organized nanometer interface structure can be used in the manufacturing of diodes, transistors, light-emitting devices, and sonic devices. The invention has the advantages of a wide variety of material selections, highly compatible processes, easy operations, and low-cost fabrications.
    Type: Grant
    Filed: March 4, 2003
    Date of Patent: November 23, 2004
    Assignee: Industrial Technology Research Institute/Material Research
    Inventors: Jong-Hong Lu, Huai-Luh Chang, Chiung-Hsiung Chen, Yi-Ping Huang, Sheng-Ju Liao, Yuh-Fwu Chou, Ho-Yin Pun
  • Patent number: 6815730
    Abstract: A nitride-based semiconductor light-emitting device includes a GaN-based substrate and a semiconductor stacked-layer structure including a plurality of nitride-based semiconductor layers grown on the GaN-based substrate by vapor deposition. The GaN-based substrate has an interface region contacting the semiconductor stacked-layer structure and the interface region contains oxygen atoms of concentration n in the range of 2×1016≦n≦1022 cm−3.
    Type: Grant
    Filed: January 28, 2002
    Date of Patent: November 9, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Eiji Yamada
  • Patent number: 6809344
    Abstract: An optical semiconductor device includes a laminated layer structure, an intermediate film formed on an end surface of the laminated layer structure, and a passivation film formed on the intermediate film. The passivation film has a quantity of ion projection than that of the intermediate film.
    Type: Grant
    Filed: March 26, 2003
    Date of Patent: October 26, 2004
    Assignee: Fujitsu Quantum Devices Limited
    Inventor: Shigeo Osaka
  • Patent number: 6806507
    Abstract: A semiconductor light emitting device comprises: a substrate; an n-type layer provided on the substrate and made of a nitride semiconductor material; a multiple quantum well structure active layer including a plurality of well layers each made of InxGa(1−x−y)AlyN (0≦x, 0≦y, x+y<1) and a plurality of barrier layers each made of InsGa(1−s−t)AltN (0≦s, 0≦t, s+t<1), the multiple quantum well structure active layer being provided on the n-type layer; and a p-type layer provided on the multiple quantum well structure active layer and made of a nitride semiconductor material. The p-type layer contains hydrogen, and the hydrogen concentration of the p-type layer is greater than or equal to about 1×1016 atoms/cm3 and less than or equal to about 1×1019 atoms/cm3.
    Type: Grant
    Filed: February 9, 2001
    Date of Patent: October 19, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Masaya Ishida
  • Patent number: 6806502
    Abstract: Provide is a 3-5 group compound semiconductor having a concentration of a p-type dopant of 1×1017 cm− or more and 1×1021 cm−3 or less, which can be laminated to control the carrier concentration of an InGaAlN-type mixed crystal in a low range with high reproducibility. Also provided is a 3-5 group compound semiconductor in which the carrier concentration of an InGaAlN-type mixed crystal is controlled in a low range with high reproducibility, and a light emitting device having high light emitting efficiency.
    Type: Grant
    Filed: November 15, 2001
    Date of Patent: October 19, 2004
    Assignee: Sumitomo Chemical Company, Limted
    Inventors: Yasushi Iyechika, Yoshihiko Tsuchida, Yasuyuki Kurita
  • Patent number: 6806505
    Abstract: There is provided a light emitting device and a process for producing the same in that the light emission efficiency is high, the range of selection of the material is broad, and a device array of a large area can be formed. On a substrate 11 comprising quartz glass, an n-type clad layer 12 comprising a non-single crystal body of n-type AlGaN, a light emitting layer 13 containing plural microcrystals 13a comprising ZnO, and a p-type clad layer 14 comprising a non-single crystal body of p-type BN are laminated in this order. Between the n-type clad layer 12 and the p-type clad layer 14, an insulating layer 15 is formed to fill the gap among the microcrystals 13a to prevent a leaking electric current. The insulating layer 15 is formed by oxidizing the surface of the n-type clad layer 12.
    Type: Grant
    Filed: June 26, 2002
    Date of Patent: October 19, 2004
    Assignee: Sony Corporation
    Inventors: Shigeru Kojima, Katsuya Shirai, Yoshifumi Mori, Atsushi Toda
  • Patent number: 6803596
    Abstract: An n-type layer of the opposite conduction type composed of n-GaN is formed between a light emitting layer and a p-type cladding layer composed of p-AlGaN. The bandgap of the n-type layer of the opposite conduction type is larger than the bandgap of the light emitting layer and is smaller than the bandgap of the p-type cladding layer.
    Type: Grant
    Filed: December 26, 2000
    Date of Patent: October 12, 2004
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Masayuki Hata
  • Patent number: 6791257
    Abstract: An electro luminescence device comprises a compound semiconductor crystal substrate comprising a Group 12 (2B) element and a Group 16 (6B) element in a periodic table. It is produced by providing a substrate having a low dislocation density or a low inclusion density; forming a pn junction by thermally diffusing an element converting the substrate of a first conduction type into the one of a second conduction type from a front surface of the substrate; and forming electrodes on front and rear of the substrate. A diffusion source including an element converting the substrate of a first conduction type into the one of a second conduction type is disposed on the front surface of the substrate, preventing forming of a defect compensating an impurity level which is formed in the substrate by the element during a diffusion process, and gettering impurity on the front surface of the substrate by the diffusion source.
    Type: Grant
    Filed: August 3, 2001
    Date of Patent: September 14, 2004
    Assignee: Japan Energy Corporation
    Inventors: Kenji Sato, Atsutoshi Arakawa, Mikio Hanafusa, Akira Noda
  • Patent number: 6787814
    Abstract: A high emission intensity group-III nitride semiconductor light-emitting device obtained by eliminating crystal lattice mismatch with substrate crystal and using a gallium nitride phosphide-based light emitting structure having excellent crystallinity. A gallium nitride phosphide-based multilayer light-emitting structure is formed on a substrate via a boron phosphide (BP)-based buffer layer. The boron phosphide-based buffer layer is preferably grown at a low temperature and rendered amorphous so as to eliminate the lattice mismatch with the substrate crystal. After the amorphous buffer layer is formed, it is gradually converted into a crystalline layer to fabricate a light-emitting device while keeping the lattice match with the gallium nitride phosphide-based light-emitting part.
    Type: Grant
    Filed: June 22, 2001
    Date of Patent: September 7, 2004
    Assignee: Showa Denko Kabushiki Kaisha
    Inventor: Takashi Udagawa
  • Patent number: 6781158
    Abstract: A GaAsP-base light emitting element capable of sustaining an excellent light emission property for a long period, and a method for manufacturing thereof are provided. The light emitting element 1 has a p-n junction interface responsible for light emission formed between a p-type GaAs1-aPa layer 9 and an n-type GaAs1-aPa layer 8, and has a nitrogen-doped zone 8c formed in a portion including the p-n junction interface between such p-type GaAs1-aPa layer 9 and n-type GaAs1-aPa layer 8. Such element can be manufactured by fabricating a plurality of light emitting elements by varying nitrogen concentration Y of the nitrogen-doped zone 8c while keeping a mixed crystal ratio a of the p-type GaAs1- aPa layer 9 and n-type GaAs1-aPa layer 8 constant; finding an emission luminance/nitrogen concentration relationship by measuring emission luminance of the individual light emitting elements; and adjusting the nitrogen concentration of the nitrogen-doped zone 8c so as to fall within a range from 1.05Yp to 1.
    Type: Grant
    Filed: April 25, 2002
    Date of Patent: August 24, 2004
    Assignee: Shin-Etsu Handotai Co., Ltd.
    Inventors: Akio Nakamura, Masayuki Shinohara, Masahisa Endo
  • Publication number: 20040159852
    Abstract: A semiconductor light-emitting device has first and second semiconductor layers each of a first conductivity type, a third semiconductor layer of a second conductivity type provided between the first and second semiconductor layers, and an active layer provided between the second and third semiconductor layers to emit light with charge injected therein from the second and third semiconductor layers. A graded composition layer is provided between the active layer and the third semiconductor layer to have a varying composition which is nearly equal to the composition of the active layer at the interface with the active layer and to the composition of the third semiconductor layer at the interface with the third semiconductor layer.
    Type: Application
    Filed: January 9, 2004
    Publication date: August 19, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Shigeo Yoshii, Kiyoshi Ohnaka
  • Patent number: 6774389
    Abstract: A semiconductor optical device with improved optical gain and enhanced switching characteristics. The semiconductor optical device includes positive and negative electrodes for providing holes and electrons, respectively. The semiconductor optical device also includes an active layer between the positive and negative electrodes. The active layer includes a multiple quantum well structure having p-type quantum well layers and barrier layers. The quantum well layers are doped with an impurity that diffuses less than zinc so that trapping holes are produced and excessive electrons contributing no light emission are quenched by the trapping holes. The impurity can be beryllium, magnesium, or carbon.
    Type: Grant
    Filed: November 8, 2002
    Date of Patent: August 10, 2004
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Yoshihiko Hanamaki
  • Patent number: 6768137
    Abstract: A low-cost high-property optical semiconductor element for a long wavelength is provided, using a GaAs substrate. The optical semiconductor element comprises a substrate of GaAs having a first surface and a second surface opposite to each other, a buffer layer of InjGa1-jAs1-kNk (0≦j≦1, 0.002≦k≦0.05) formed on the first surface of the substrate, a first conductive type clad layer formed on the buffer layer, an active layer formed on the first conductive type clad layer and comprising a well layer of InzGa1-zAs (0≦z≦1), the well layer having a smaller bandgap than the first conductive type clad layer, the active layer having a thickness of more than its critical thickness for the substrate based upon equilibrium theories, and a second conductive type clad layer formed on the active layer and having a larger bandgap than the well layer.
    Type: Grant
    Filed: March 28, 2003
    Date of Patent: July 27, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Mitsuhiro Kushibe, Yasuo Ohba, Rei Hashimoto, Keiji Takaoka
  • Publication number: 20040140477
    Abstract: A semiconductor light emitting device includes a semiconductor substrate; a stacked semiconductor structure formed on the semiconductor substrate; a striped ridge structure; and a semiconductor current confinement layer provided on a side surface of the striped ridge structure. The stacked semiconductor structure includes a first semiconductor clad layer, a semiconductor active layer, a second semiconductor clad layer, and a semiconductor etching stop layer. The striped ridge structure includes a third semiconductor clad layer, a semiconductor intermediate layer, and a semiconductor cap layer. The striped ridge structure is provided on the semiconductor etching stop layer. An interface between the semiconductor current confinement layer and the semiconductor etching stop layer and an interface between the semiconductor current confinement layer and the striped ridge structure each have a content of impurities of less than 1×1017/cm3.
    Type: Application
    Filed: July 22, 2003
    Publication date: July 22, 2004
    Inventor: Kentaro Tani
  • Patent number: 6765232
    Abstract: A semiconductor light-emitting device has a semiconductor layer containing Al between a substrate and an active layer containing nitrogen, wherein Al and oxygen are removed from a growth chamber before growing said active layer and a concentration of oxygen incorporated into said active layer together with Al is set to a level such that said semiconductor light-emitting device can perform a continuous laser oscillation at room temperature.
    Type: Grant
    Filed: March 26, 2002
    Date of Patent: July 20, 2004
    Assignee: Ricoh Company, Ltd.
    Inventors: Takashi Takahashi, Morimasa Kaminishi, Shunichi Sato, Akihiro Itoh, Naoto Jikutani
  • Patent number: 6762437
    Abstract: A light emitting semiconductor device comprises an upper cladding layer (106) consisting of a first upper cladding layer (106a) provided on an active layer (105) and a second upper cladding layer (106b) provided on the first upper cladding layer (106a) to increase the light emitting efficiency and reduce the defective ratio in formation of a patterned layer. The energy band gap (Eg(106a)) of the first upper cladding layer (106a) is larger than the energy band gap (Eg(106b)) of the second upper cladding layer (106b), which is larger than the energy band gap (Eg(105)) of the active layer (105). One of a patterned layer, an dielectric interlayer (109) has an etched region at a predetermined area thereof so that at least a part of the upper cladding layer (106) or a second conductive type semiconductor region (108) is exposed.
    Type: Grant
    Filed: December 19, 2002
    Date of Patent: July 13, 2004
    Assignee: Oki Data Corporation
    Inventors: Mitsuhiko Ogihara, Hiroshi Hamano, Masumi Taninaka
  • Publication number: 20040124500
    Abstract: In a gallium nitride semiconductor device comprising an active layer made of an n-type gallium nitride semiconductor that includes In and is doped with n-type impurity and a p-type cladding layer made of a p-type gallium nitride semiconductor that includes Al and is doped with p-type impurity,
    Type: Application
    Filed: October 14, 2003
    Publication date: July 1, 2004
    Inventor: Kimihiro Kawagoe
  • Publication number: 20040075097
    Abstract: P-type layers of a GaN based light-emitting device are optimized for formation of Ohmic contact with metal. In a first embodiment, a p-type GaN transition layer with a resistivity greater than or equal to about 7 &OHgr;cm is formed between a p-type conductivity layer and a metal contact. In a second embodiment, the p-type transition layer is any III-V semiconductor. In a third embodiment, the p-type transition layer is a superlattice. In a fourth embodiment, a single p-type layer of varying composition and varying concentration of dopant is formed.
    Type: Application
    Filed: November 24, 2003
    Publication date: April 22, 2004
    Inventors: Werner K. Goetz, Michael D. Camras, Changhua Chen, Gina L. Christenson, R. Scott Kern, Chihping Kuo, Paul Scott Martin, Daniel A. Steigerwald
  • Publication number: 20040075102
    Abstract: An AlGaInP light emitting diode with improved illumination is provided. The AlGaInP light emitting diode includes a semiconductor substrate, a light re-emitting layer, an AlGaInP layer with a first doping concentration, an AlGaInP lower cladding layer with a second doping concentration less than the first doping concentration, an undoped AlGaInP active layer, an AlGaInP upper cladding layer, a window layer, an annular-shaped top electrode on the window layer and a layered electrode on a bottom of the semiconductor substrate. The light re-emitting layer includes at least a first region formed of the light re-emitting layer and a second region formed of Al2O3 enclosing the first region. Since AlGaInP layer between the AlGaInP lower cladding layer and the light re-emitting layer has the first doping concentration larger than that of the AlGaInP lower cladding layer, the AlGaInP layer provides a transverse current spreading.
    Type: Application
    Filed: October 21, 2002
    Publication date: April 22, 2004
    Inventors: Nai-Chuan Chen, Yi-Lun Chou, Nae-Guann Yih
  • Patent number: 6724068
    Abstract: An optical semiconductor device having a low threshold current and easiness of a single transverse mode oscillation is provided. The optical semiconductor device has a low device parasitic capacitance that allows a direct modulation at high speed. The optical semiconductor device comprises a first conduction type substrate, a stripe shaped active layer formed on the first conduction type substrate, a mesa shaped burying layer formed around the active layer and having a larger band gap than that of the active layer, and a groove that electrically isolates the burying layer, wherein the section of the burying layer is in an inverse trapezoid shape of which the upper base side is longer than the lower base side.
    Type: Grant
    Filed: March 21, 2002
    Date of Patent: April 20, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Takayuki Matsuyama
  • Patent number: 6720583
    Abstract: The present invention provides an optical device and a surface emitting type device which have high efficiency and a stable operation and are manufactured at high manufacturing yield. The optical device and the surface emitting type device are characterized in that they have a distributed Bragg reflector (DBR) including a plurality of semiconductor layers made of a nitride semiconductor with substantially same gaps therbetween. Further, the optical device and the surface emitting type device are characterized in that they have a distributed Bragg reflector (DBR) in which a plurality of semiconductor layers made of nitride semiconductor and a plurality of organic layers made of organic material are alternately laminated.
    Type: Grant
    Filed: September 20, 2001
    Date of Patent: April 13, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shin-Ya Nunoue, Masayuki Ishikawa
  • Patent number: 6707074
    Abstract: A semiconductor light-emitting device has first and second semiconductor layers each of a first conductivity type, a third semiconductor layer of a second conductivity type provided between the first and second semiconductor layers, and an active layer provided between the second and third semiconductor layers to emit light with charge injected therein from the second and third semiconductor layers. A graded composition layer is provided between the active layer and the third semiconductor layer to have a varying composition which is nearly equal to the composition of the active layer at the interface with the active layer and to the composition of the third semiconductor layer at the interface with the third semiconductor layer.
    Type: Grant
    Filed: July 2, 2001
    Date of Patent: March 16, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shigeo Yoshii, Kiyoshi Ohnaka
  • Patent number: 6686611
    Abstract: In a nitride semiconductor of BpAlqGarInsN (0≦p≦1, 0≦q≦1, 0≦r≦1, 0≦s≦1, p+q+r+s=1), in particular a p-type nitride compound semiconductor, a point defect concentration of the p-type semiconductors is set to 1×1019 cm−3 or more. This makes it possible to obtain a high carrier concentration at room temperature.
    Type: Grant
    Filed: March 8, 2002
    Date of Patent: February 3, 2004
    Assignee: Sony Corporation
    Inventors: Hiroyuki Okuyama, Hiroshi Nakajima, Fumihiko Nakamura
  • Patent number: 6686608
    Abstract: A nitride semiconductor light emitting device of the present invention includes; a GaN substrate into which a group VII element is doped; an intermediate layer section provided on the GaN substrate; and a light emitting layer provided on the intermediate layer section. The intermediate layer section has a sufficient thickness to prevent the group VII element diffused from the GaN substrate from being detected in the light emitting layer.
    Type: Grant
    Filed: September 7, 2000
    Date of Patent: February 3, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Yoshiyuki Takahira
  • Patent number: 6683327
    Abstract: A light emitting device including a nucleation layer containing aluminum is disclosed. The thickness and aluminum composition of the nucleation layer are selected to match the index of refraction of the substrate and device layers, such that 90% of light from the device layers incident on the nucleation layer is extracted into the substrate. In some embodiments, the nucleation layer is AlGaN with a thickness between about 1000 and about 1200 angstroms and an aluminum composition between about 2% and about 8%. In some embodiments, the nucleation layer is formed over a surface of a wurtzite substrate that is miscut from the c-plane of the substrate. In some embodiments, the nucleation layer is formed at high temperature, for example between 900° and 1200° C. In some embodiments, the nucleation layer is doped with Si to a concentration between about 3e18 cm−3 and about 5e19 cm−3.
    Type: Grant
    Filed: November 13, 2001
    Date of Patent: January 27, 2004
    Assignee: Lumileds Lighting U.S., LLC
    Inventors: Michael R. Krames, Tetsuya Takeuchi, Junko Kobayashi
  • Patent number: 6673643
    Abstract: To decrease the number of layers while keeping or improving the performance of an EL element, so that the production cost is reduced. Cathodes (106, 107), a light emitting layer (108), an anode (109), and a passivation film (110) are formed on pixel electrodes (104, 105). Thereafter, the vicinity of the interface between the light emitting layer (108) and the anode (109) are doped with a halogen element through the passivation film (110) and the anode (109). This leads to formation of a hole conveying region (111) that functions as a hole conveying layer, thereby enhancing the light emission efficiency.
    Type: Grant
    Filed: July 1, 2002
    Date of Patent: January 6, 2004
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 6670647
    Abstract: A semiconductor light emitting element includes: a first conductive type layer made of a nitride semiconductor which is deposited on a substrate; a quantum well active layer made of AlPGaQIn1−P−QN (O≦P, O≦Q, P+Q<1) which is deposited on the first conductive type layer, the quantum well active layer including a pair of barrier layers and a well layer interposed therebetween; and a second conductive type layer made of a nitride semiconductor which is deposited on the quantum well active layer, wherein light spontaneously emitted from end faces of the quantum well active layer to polarized in a direction parallel to the substrate.
    Type: Grant
    Filed: August 30, 2000
    Date of Patent: December 30, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yukio Yamasaki, Shigetoshi Ito
  • Patent number: 6664566
    Abstract: A photoelectric conversion device has a non-single-crystal semiconductor laminate member formed on a substrate having a conductive surface, and a conductive layer formed on the non-single-crystal semiconductor laminate member. The non-single-crystal semiconductor laminate member has such a structure that a first non-single-crystal semiconductor layer having a P or N first conductivity type, an I-type second non-single-crystal semiconductor layer and a third non-single-crystal semiconductor layer having a second conductivity type opposite the first conductivity type are laminated in this order. The first (or third) non-single-crystal semiconductor layer is disposed on the side on which light is incident, and is P-type. The I-type non-single-crystal semiconductor layer has introduced thereinto a P-type impurity, such as boron which is distributed so that its concentration decreases towards the third (or first) non-single-crystal semiconductor layer in the thickwise direction of the I-type layer.
    Type: Grant
    Filed: January 30, 2001
    Date of Patent: December 16, 2003
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 6645785
    Abstract: An emission layer (5) for a light source device is formed to have a multi-layer structure, doped with an acceptor and a donor impurity. The multi-layer structure may include a quantum well (QW) structure or a multi quantum well (MQW) structure (50). With such a structure, a peak wavelength of the light source can be controlled, because the distances between atoms of the acceptor and the donor impurities are widened. Several arrangements can be made by, e.g., altering the thickness of each composite layer of the multi-layer structure, altering their composition ratio, forming undoped layer 5 between the impurity doped layers, and so forth. Further, luminous intensity of ultra violet color can be improved, because doping the donor impurity and the acceptor impurity realizes a donor-acceptor emission mechanism and abundant carriers. Several arrangements can be made by, e.g.
    Type: Grant
    Filed: July 23, 2001
    Date of Patent: November 11, 2003
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Masayoshi Koike, Shinya Asami
  • Patent number: 6646291
    Abstract: The optical module 10 of the present invention comprises a semiconductor optical device 14, a package 12 containing the semiconductor device, and lead terminals 22. The package 12 comprises a bottom member 34 and a side member 36. The bottom member contains a device mounting surface S2, the side member mounting surface S3, and a lead terminal joining surface S1. The optical semiconductor device 14 is mounted on the device mounting surface S2 and lead terminals are joined to the lead terminal joining surface S1.
    Type: Grant
    Filed: August 13, 2002
    Date of Patent: November 11, 2003
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventor: Toshio Takagi
  • Patent number: 6639241
    Abstract: In a ridge type semiconductor optical device in which both sides of the mesa stripe are recessed each into a rectangular shape by a depth reaching an active layer, a semiconductor optical device having a structure in which a structure that obstructs conductivity is disposed at a portion on the bottom of a rectangular shape. The structure that obstructs conductivity is attained, for example, by a structure in which impurities are ion implanted into a semiconductor.
    Type: Grant
    Filed: February 12, 2002
    Date of Patent: October 28, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Kouji Nakahara, Tsurugi Sudo
  • Patent number: 6639258
    Abstract: Aluminum gallium nitride (AlxGa1−xN, 0<x<1) is employed as a substrate of a Group III nitride compound semiconductor device. In light-emitting diodes and laser diodes employing the substrate, crack generation is prevented, even when a thick cladding layer formed of aluminum gallium nitride (AlxGa1−xN, 0<x<1) is stacked on the substrate. The smaller the difference in Al compositional proportion between the substrate and an aluminum gallium nitride (AlxGa1−xN, 0<x<1) layer, the less likely the occurrence of crack generation.
    Type: Grant
    Filed: July 3, 2002
    Date of Patent: October 28, 2003
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Masayoshi Koike, Shiro Yamasaki
  • Patent number: 6635904
    Abstract: A smoothing structure containing indium is formed between the substrate and the active region of a III-nitride light emitting device to improve the surface characteristics of the device layers. In some embodiments, the smoothing structure is a single layer, separated from the active region by a spacer layer which typically does not contain indium. The smoothing layer contains a composition of indium lower than the active region, and is typically deposited at a higher temperature than the active region. The spacer layer is typically deposited while reducing the temperature in the reactor from the smoothing layer deposition temperature to the active region deposition temperature. In other embodiments, a graded smoothing region is used to improve the surface characteristics. The smoothing region may have a graded composition, graded dopant concentration, or both.
    Type: Grant
    Filed: March 29, 2001
    Date of Patent: October 21, 2003
    Assignee: Lumileds Lighting U.S., LLC
    Inventors: Werner K. Goetz, Michael D. Camras, Nathan F. Gardner, R. Scott Kern, Andrew Y. Kim, Stephen A. Stockman
  • Patent number: 6630692
    Abstract: III-Nitride light emitting diodes having improved performance are provided. In one embodiment, a light emitting device includes a substrate, a nucleation layer disposed on the substrate, a defect reduction structure disposed above the nucleation layer, and an n-type III-Nitride semiconductor layer disposed above the defect reduction structure. The n-type layer has, for example, a thickness greater than about one micron and a silicon dopant concentration greater than or equal to about 1019 cm−3. In another embodiment, a light emitting device includes a III-Nitride semiconductor active region that includes at least one barrier layer either uniformly doped with an impurity or doped with an impurity having a concentration graded in a direction substantially perpendicular to the active region.
    Type: Grant
    Filed: May 29, 2001
    Date of Patent: October 7, 2003
    Assignee: Lumileds Lighting U.S., LLC
    Inventors: Werner Goetz, Nathan Fredrick Gardner, Richard Scott Kern, Andrew Youngkyu Kim, Anneli Munkholm, Stephen A. Stockman, Christopher P. Kocot, Richard P. Schneider, Jr.
  • Publication number: 20030183837
    Abstract: A low-cost high-property optical semiconductor element for a long wavelength is provided, using a GaAs substrate. The optical semiconductor element comprises a substrate of GaAs having a first surface and a second surface opposite to each other, a buffer layer of InjGa1−jAs1−kNk (0≦j≦1, 0.002≦k≦0.05) formed on the first surface of the substrate, a first conductive type clad layer formed on the buffer layer, an active layer formed on the first conductive type clad layer and comprising a well layer of InzGa1−zAs (0≦z≦1), the well layer having a smaller bandgap than the first conductive type clad layer, the active layer having a thickness of more than its critical thickness for the substrate based upon equilibrium theories, and a second conductive type clad layer formed on the active layer and having a larger bandgap than the well layer.
    Type: Application
    Filed: March 28, 2003
    Publication date: October 2, 2003
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Mitsuhiro Kushibe, Yasuo Ohba, Rei Hashimoto, Keiji Takaoka
  • Patent number: 6627922
    Abstract: On a rectangle-shaped insulation substrate (1) on which a pair of electrodes (2) and (3) are provided, a light emitting element chip (4) having an n-side electrode (41) and a p-side electrode (42) connected to the pair of electrodes respectively is provided. Then, the periphery of the light emitting element chip is covered with the light transmitting member (6), and a light reflection member (7) covering at least a portion of the light transmitting member is provided so that light is radiated from a portion of the light transmitting member which is not covered and exposed. A light reflection member is provided in such a manner that the portion of the light transmitting member is not covered is exposed over from a one side (A) to at least a part of the side portions (B) and (C) on both sides connected to the side portion (A).
    Type: Grant
    Filed: April 27, 2000
    Date of Patent: September 30, 2003
    Assignee: Rohm Co., Ltd
    Inventor: Hiroki Ishinaga
  • Publication number: 20030178633
    Abstract: A Group III-V nitride microelectronic device structure including a delta doped layer and/or a doped superlattice. A delta doping method is described, including the steps of: depositing semiconductor material on a substrate by a first epitaxial film growth process; terminating the deposition of semiconductor material on the substrate to present an epitaxial film surface; delta doping the semiconductor material at the epitaxial film surface, to form a delta doping layer thereon; terminating the delta doping; resuming deposition of semiconductor material to deposit semiconductor material on the delta doping layer, in a second epitaxial film growth process; and continuing the semiconductor material second epitaxial film growth process to a predetermined extent, to form a doped microelectronic device structure, wherein the delta doping layer is internalized in semiconductor material deposited in the first and second epitaxial film growth processes.
    Type: Application
    Filed: March 25, 2002
    Publication date: September 25, 2003
    Inventors: Jeffrey S. Flynn, George R. Brandes
  • Patent number: 6620643
    Abstract: A group III nitride compound semiconductor light-emitting device provides a multiple quantum well (MQW) active layer formed on an intermediate layer. The MQW active layer may include, for example, five semiconductor layers having a thickness of approximately 500 Å. The five layers of the MQW active layer may comprise two gallium nitride (GaN) barrier layers each having a thickness of approximately 100 Å and three well layers having different emission wavelengths. The barrier layers and the well layers are stacked alternately. The three well layers may include, for example, an Al0.1In0.9N red-light-emitting well layer having a thickness of approximately 20 Å and doped with impurities (zinc (Zn) and silicon (Si)), a non-doped In0.2Ga0.8N green-light-emitting well layer having a thickness of approximately 50 Å and a non-doped In0.05Ga0.95N blue-light-emitting well layer having a thickness of approximately 30 Å, wherein the three well layers are stacked in the order given.
    Type: Grant
    Filed: August 3, 2000
    Date of Patent: September 16, 2003
    Assignee: Toyoda Gosei Co., Ltd.
    Inventor: Masayoshi Koike
  • Patent number: 6620528
    Abstract: To provide an inexpensive EL display device of high definition. An anode, a light emitting layer, and a cathode are formed on a substrate, and selective doping using at least one selected from the group consisting of an alkali metal element, an alkaline earth metal element and a halogen element is then performed to form at least ones of electron transmitting regions and hole transmitting regions. In such a structure, only a part of the light emitting layer, where at least ones of the electron transmitting regions and the hole transmitting regions are formed, emits light when a given voltage is applied to the light emitting layer, whereby images are displayed as desired.
    Type: Grant
    Filed: July 19, 2000
    Date of Patent: September 16, 2003
    Assignee: Semiconductor Energy Laboratory Co., Ltd
    Inventors: Shunpei Yamazaki, Tetsuo Tsutsui, Mayumi Mizukami
  • Patent number: 6617607
    Abstract: A nitride semiconductor laser device includes a nitride semiconductor substrate, and a layered portion corresponding to a nitride semiconductor film grown on the nitride semiconductor substrate, the layered portion including an n-type layer and a p-type layer and a light emitting layer posed between the n- and p-type layers, of the n- and p-type layers a layer opposite to the nitride semiconductor substrate with the light emitting layer opposed therebetween serving as an upper layer having a stripe of 1.9 &mgr;m to 3.0 &mgr;m in width, the light emitting layer and the upper layer having an interface distant from a bottom of the stripe by 0 &mgr;m to 0.2 &mgr;m.
    Type: Grant
    Filed: April 26, 2001
    Date of Patent: September 9, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Shigetoshi Ito, Yuhzoh Tsuda
  • Patent number: 6617606
    Abstract: A light-emitting diode having an excellent high-speed response characteristic and capable of giving a large light output with a small variation of the light output during the operation is provided. In the light-emitting diode, an active layer comprising a single quantum well layer of p-type Ga0.51In0.49P, a lower barrier layer of p-type (Al0.5Ga0.5)0.51In0.49P and an upper barrier layer of p-type (Al0.5Ga0.5)0.51In0.49P is highly doped with p-type dopant (Zn, Mg, Be, C) or n-type dopant (Si, Se, Te) to produce non-radiative recombination level in the upper and lower barrier layers. Carriers injected into the quantum well layer not only recombine radiatively therein and also recombine nonradiatively at boundaries of the upper barrier layer and the lower barrier layer, remarkably increasing recombination velocity of carriers and dramatically improving the response characteristic.
    Type: Grant
    Filed: September 10, 2001
    Date of Patent: September 9, 2003
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hiroshi Nakatsu, Takahisa Kurahashi, Tetsurou Murakami, Shouichi Ohyama