With Particular Dopant Concentration Or Concentration Profile (e.g., Graded Junction) Patents (Class 257/101)
  • Publication number: 20080283864
    Abstract: Solid state light emitting devices include a solid state light emitting die and a light conversion structure. The light conversion structure may include a single crystal phosphor and may be on a light emitting surface of the solid state light emitting die. The light conversion structure may be attached to the light emitting surface of the solid state light emitting die via an adhesive layer. The light conversion structure may also be directly on a light emitting surface of the solid state light emitting die. Related methods are also disclosed.
    Type: Application
    Filed: May 16, 2007
    Publication date: November 20, 2008
    Inventors: Ronan P. LeToquin, Nicholas W. Medendorp, JR., Bernd P. Keller, Arpan Chakraborty
  • Patent number: 7453096
    Abstract: A semiconductor light-emitting device has a semiconductor layer containing Al between a substrate and an active layer containing nitrogen, wherein Al and oxygen are removed from a growth chamber before growing said active layer and a concentration of oxygen incorporated into said active layer together with Al is set to a level such that said semiconductor light-emitting device can perform a continuous laser oscillation at room temperature.
    Type: Grant
    Filed: April 17, 2006
    Date of Patent: November 18, 2008
    Assignee: Ricoh Company, Ltd.
    Inventors: Takashi Takahashi, Morimasa Kaminishi, Shunichi Sato, Akihiro Itoh, Naoto Jikutani
  • Patent number: 7449722
    Abstract: A semiconductor light emitting element has a first conductive-type cladding layer, an undoped active layer, a second conductive-type cladding layer, and a second conductive-type current spreading layer that are formed on a first conductive-type semiconductor substrate. The second conductive-type cladding layer has a first dopant suppressing layer formed at a portion in the second conductive-type cladding layer, the portion being not in contact with the active layer. The first dopant suppressing layer has a dopant concentration lower than a region in the vicinity of the first dopant suppressing layer.
    Type: Grant
    Filed: November 23, 2005
    Date of Patent: November 11, 2008
    Assignee: Hitachi Cable, Ltd.
    Inventors: Taichiroo Konno, Kazuyuki Iizuka, Masahiro Arai, Takashi Furuya
  • Patent number: 7446346
    Abstract: In a semiconductor substrate (1), impurity material, for example a metal, is distributed in a layer-like zone (3) in such a way that said zone reflects radiation (6), which is generated or detected by an optoelectronic component, for example. Said layer-like zone (3) is fabricated by implantation of the impurity material into the substrate (1) and subsequent heat treatment for crystallization of the impurity material. Such a substrate is suitable in particular for avoiding the penetration of radiation (6), which is generated for example by radiation-emitting structures (5) applied to the substrate, by reflection in a region of the substrate (1) near the surface and thus for reducing the absorption losses.
    Type: Grant
    Filed: February 2, 2004
    Date of Patent: November 4, 2008
    Assignee: Osram Opto Semiconductor GmbH
    Inventor: Volker Härle
  • Patent number: 7442965
    Abstract: A photonic crystal structure is formed in an n-type region of a III-nitride semiconductor structure including an active region sandwiched between an n-type region and a p-type region. A reflector is formed on a surface of the p-type region opposite the active region. In some embodiments, the growth substrate on which the n-type region, active region, and p-type region are grown is removed, in order to facilitate forming the photonic crystal in an an-type region of the device, and to facilitate forming the reflector on a surface of the p-type region underlying the photonic crystal. The photonic crystal and reflector form a resonant cavity, which may allow control of light emitted by the active region.
    Type: Grant
    Filed: March 9, 2006
    Date of Patent: October 28, 2008
    Assignee: Philips Lumileds Lighting Company, LLC
    Inventors: Jonathan J. Wierer, Jr., Michael R. Krames, John E. Epler
  • Patent number: 7436001
    Abstract: A vertical GaN-based LED and a method of manufacturing the same are provided. The vertical GaN-based LED includes an n-electrode, a first n-type GaN layer, a first AlGaN layer, a GaN layer, a second AlGaN layer, a second n-type GaN layer, an active layer, a p-type GaN layer, and a structure support layer. The first n-type GaN layer has uneven patterns having a plurality of protuberances. The first AlGaN layer is formed under the first n-type GaN layer, and the GaN layer is formed under the first AlGaN layer. The active layer is formed under the second n-type GaN layer, and the p-type GaN layer is formed under the active layer. A p-electrode is formed under the p-type GaN layer, and the structure support layer is formed under the p-electrode.
    Type: Grant
    Filed: July 21, 2006
    Date of Patent: October 14, 2008
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jae Hoon Lee, Bang Won Oh, Hee Seok Choi, Jeong Tak Oh, Seok Beom Choi, Su Yeol Lee
  • Publication number: 20080217645
    Abstract: A semiconductor structure includes a substrate, a nucleation layer on the substrate, a compositionally graded layer on the nucleation layer, and a layer of a nitride semiconductor material on the compositionally graded layer. The layer of nitride semiconductor material includes a plurality of substantially relaxed nitride interlayers spaced apart within the layer of nitride semiconductor material. The substantially relaxed nitride interlayers include aluminum and gallium and are conductively doped with an n-type dopant, and the layer of nitride semiconductor material including the plurality of nitride interlayers has a total thickness of at least about 2.0 ?m.
    Type: Application
    Filed: March 9, 2007
    Publication date: September 11, 2008
    Inventors: Adam William Saxler, Albert Augustus Burk
  • Publication number: 20080217646
    Abstract: The present invention presents a nitride semiconductor light emitting device including a substrate, a first n-type nitride semiconductor layer, a light emitting layer, a p-type nitride semiconductor layer, a p-type nitride semiconductor tunnel junction layer, an n-type nitride semiconductor tunnel junction layer, and a second n-type semiconductor layer, in which the p-type and n-type nitride semiconductor tunnel junction layers form a tunnel junction, at least one of the p-type and n-type nitride semiconductor tunnel junction layers contains In, at least one of In-containing layers contacts with a layer having a larger band gap than the In-containing layer, and at least one of shortest distances between an interface of the In-containing layer and the layer having a larger band gap and an interface of the p-type and n-type nitride semiconductor tunnel junction layers is less than 40 nm.
    Type: Application
    Filed: March 3, 2008
    Publication date: September 11, 2008
    Inventor: Satoshi Komada
  • Patent number: 7402838
    Abstract: According to the nitride semiconductor device with the active layer made of the multiple quantum well structure of the present invention, the performance of the multiple quantum well structure can be brought out to intensify the luminous output thereof thereby contributing an expanded application of the nitride semiconductor device. In the nitride semiconductor device comprises an n-region having a plurality of nitride semiconductor films, a p-region having a plurality of nitride semiconductor films, and an active layer interposed therebetween, a multi-film layer with two kinds of the nitride semiconductor films is formed in at least one of the n-region or the p-region.
    Type: Grant
    Filed: November 16, 2006
    Date of Patent: July 22, 2008
    Assignee: Nichia Corporation
    Inventors: Koji Tanizawa, Tomotsugu Mitani, Yoshinori Nakagawa, Hironori Takagi, Hiromitsu Marui, Yoshikatsu Fukuda, Takeshi Ikegami
  • Publication number: 20080157116
    Abstract: Provided are a thin film transistor capable of enhancing electrical and leakage current characteristics by reducing an amount of crystallization inducing metal remaining in a semiconductor layer, a method of fabricating the same, and an organic light emitting diode display device including the same. The method of the thin film transistor of the present invention includes forming a first amorphous silicon layer on a substrate, crystallizing the first amorphous silicon layer into a first polycrystalline silicon layer by using a crystallization inducing metal, forming a second amorphous silicon layer on the first polycrystalline silicon layer, implanting an impurity into the second amorphous silicon layer, and annealing the first polycrystalline silicon layer and the second amorphous silicon layer.
    Type: Application
    Filed: December 28, 2007
    Publication date: July 3, 2008
    Inventors: Byoung-Keon Park, Tae-Hoon Yang, Jin-Wook Seo, Ki-Yong Lee
  • Publication number: 20080149942
    Abstract: In accordance with embodiments of the invention, strain is reduced in the light emitting layer of a III-nitride device by including a strain-relieved layer in the device. The surface on which the strain-relieved layer is grown is configured such that strain-relieved layer can expand laterally and at least partially relax. In some embodiments of the invention, the strain-relieved layer is grown over a textured semiconductor layer or a mask layer. In some embodiments of the invention, the strain-relieved layer is group of posts of semiconductor material.
    Type: Application
    Filed: December 22, 2006
    Publication date: June 26, 2008
    Applicant: PHILIPS LUMILEDS LIGHTING COMPANY, LLC
    Inventors: Sungsoo Yi, Aurelien J. F. David, Nathan F. Gardner, Michael R. Krames, Linda T. Romano
  • Patent number: 7368759
    Abstract: A semiconductor light emitting device has a light-emitting portion formed on a semiconductor substrate, an As-based p-type contact layer formed thereon, a current spreading layer formed thereon of a metal oxide material, and a buffer layer formed between the p-type cladding layer and the p-type contact layer. The buffer layer has a group III/V semiconductor with a p-type conductivity and hydrogen or carbon included intentionally or unavoidably therein, and the buffer layer has a thickness equal to or greater than a diffusion length L of a dopant doped into the p-type contact layer.
    Type: Grant
    Filed: July 13, 2006
    Date of Patent: May 6, 2008
    Assignee: Hitachi Cable, Ltd.
    Inventors: Masahiro Arai, Taichiroo Konno, Kazuyuki Iizuka, Katsuya Akimoto
  • Patent number: 7368750
    Abstract: A semiconductor light-receiving device includes: a semi-insulating substrate; a semiconductor layer of a first conduction type that is formed on the semi-insulating substrate; a buffer layer of the first conduction type that is formed on the semi-insulating substrate and has a lower impurity concentration than the semiconductor layer of the first conduction type; a light absorption layer that is formed on the buffer layer and generates carriers in accordance with incident light; a semiconductor layer of a second conduction type that is formed on the light absorption layer; and a semiconductor intermediate layer that is interposed between the buffer layer and the light absorption layer, and has a forbidden bandwidth within a range lying between the forbidden bandwidth of the buffer layer and the forbidden bandwidth of the light absorption layer.
    Type: Grant
    Filed: September 22, 2003
    Date of Patent: May 6, 2008
    Assignee: Fujitsu Quantum Devices Limited
    Inventors: Gang Wang, Yoshihiro Yoneda
  • Patent number: 7354477
    Abstract: A low dislocation density GaN single crystal substrate is made by forming a seed mask having parallel stripes regularly and periodically aligning on an undersubstrate, growing a GaN crystal on a facet-growth condition, forming repetitions of parallel facet hills and facet valleys rooted upon the mask stripes, maintaining the facet hills and facet valleys, producing voluminous defect accumulating regions (H) accompanying the valleys, yielding low dislocation single crystal regions (Z) following the facets, making C-plane growth regions (Y) following flat tops between the facets, gathering dislocations on the facets into the valleys by the action of the growing facets, reducing dislocations in the low dislocation single crystal regions (Z) and the C-plane growth regions (Y), and accumulating the dislocations in cores (S) or interfaces (K) of the voluminous defect accumulating regions (H).
    Type: Grant
    Filed: September 9, 2004
    Date of Patent: April 8, 2008
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Kensaku Motoki, Ryu Hirota, Takuji Okahisa, Seiji Nakahata
  • Patent number: 7348602
    Abstract: The present invention provides a nitride semiconductor light emitting device with an active layer of the multiple quantum well structure, in which the device has an improved luminous intensity and a good electrostatic withstanding voltage, thereby allowing the expanded application to various products. The active layer 7 is formed of a multiple quantum well structure containing InaGa1?aN (0?a<1). The p-cladding layer 8 is formed on said active layer containing the p-type impurity. The p-cladding layer 8 is mode of a multi-film layer including a first nitride semiconductor film containing Al and a second nitride semiconductor film having a composition different from that of said first nitride semiconductor film. Alternatively, the p-cladding layer 8 is made of single-layered layer made of AlbGa1?bN (0?b?1). A low-doped layer 9 is grown on the p-cladding layer 8 having a p-type impurity concentration lower than that of the p-cladding layer 8.
    Type: Grant
    Filed: October 18, 2004
    Date of Patent: March 25, 2008
    Assignee: Nichia Corporation
    Inventor: Koji Tanizawa
  • Patent number: 7345323
    Abstract: P-type layers of a GaN based light-emitting device are optimized for formation of Ohmic contact with metal. In a first embodiment, a p-type GaN transition layer with a resistivity greater than or equal to about 7 ? cm is formed between a p-type conductivity layer and a metal contact. In a second embodiment, the p-type transition layer is any III-V semiconductor. In a third embodiment, the p-type transition layer is a superlattice. In a fourth embodiment, a single p-type layer of varying composition and varying concentration of dopant is formed.
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: March 18, 2008
    Assignee: Philips Lumileds Lighting Company LLC
    Inventors: Werner K. Goetz, Michael D. Camras, Xiaoping Chen, legal representative, Gina L. Christenson, R. Scott Kern, Chihping Kuo, Paul Scott Martin, Daniel A. Steigerwald, Changhua Chen
  • Patent number: 7345324
    Abstract: A light emitting device in accordance with an embodiment of the present invention includes a first semiconductor layer of a first conductivity type having a first surface, and an active region formed overlying the first semiconductor layer. The active region includes a second semiconductor layer which is either a quantum well layer or a barrier layer. The second semiconductor layer is formed from a semiconductor alloy having a composition graded in a direction substantially perpendicular to the first surface of the first semiconductor layer. The light emitting device also includes a third semiconductor layer of a second conductivity type formed overlying the active region.
    Type: Grant
    Filed: July 7, 2005
    Date of Patent: March 18, 2008
    Assignee: Philips Lumileds Lighting Company LLC
    Inventors: David P. Bour, Nathan F. Gardner, Werner K. Goetz, Stephen A. Stockman, Tetsuya Takeuchi, Ghulam Hasnain, Christopher P. Kocot, Mark R. Hueschen
  • Publication number: 20080042160
    Abstract: A group III-V nitride-based semiconductor substrate is formed of a group III-V nitride-based semiconductor single crystal containing an n-type impurity. The single crystal has a periodical change in concentration of the n-type impurity in a thickness direction of the substrate. The periodical change has a minimum value in concentration of the n-type impurity not less than 5×1017 cm?3 at an arbitrary point in plane of the substrate.
    Type: Application
    Filed: March 12, 2007
    Publication date: February 21, 2008
    Applicant: Hitachi Cable, Ltd.
    Inventor: Masatomo Shibata
  • Publication number: 20070278945
    Abstract: The present invention provides an organic EL device, which is long-life and has high performance, by optimizing the hole transport layer. An organic electroluminescence device including at least a first electrode 102, an organic electroluminescence medium layer 103 having a hole transport layer 103a and an organic luminescent layer 103b, and a second electrode 104 in this order, wherein the hole transport layer 103a includes associates of a donating molecule and an accepting molecule, and the hole transport layer 103a has different component ratios of the donating molecule and the accepting molecule between the side of the first electrode 102 and the side of the organic luminescent layer 103b.
    Type: Application
    Filed: January 25, 2007
    Publication date: December 6, 2007
    Inventors: Yuko Abe, Eiichi Kitazume, Hajime Yokoi, Ryo Shoda
  • Patent number: 7303630
    Abstract: Dotted seeds are implanted in a regular pattern upon an undersubstrate. A GaN crystal is grown on the seed implanted undersubstrate by a facet growth method. The facet growth makes facet pits above the seeds. The facets assemble dislocations from neighboring regions, accumulate the dislocations into pit bottoms, and make closed defect accumulating regions (H) on the seeds. The polycrystalline or slanting orientation single crystal closed defect accumulating regions (H) induce microcracks due to thermal expansion anisotropy. The best one is orientation-inversion single crystal closed defect accumulating regions (H). At an early stage, orientation-inverse protrusions are induced on tall facets and unified with each other above the seeds. Orientation-inverse crystals growing on the unified protrusions become the orientation-inverse single crystal closed defect accumulating regions (H).
    Type: Grant
    Filed: September 3, 2004
    Date of Patent: December 4, 2007
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Kensaku Motoki, Takuji Okahisa, Ryu Hirota, Seiji Nakahata, Koji Uematsu
  • Patent number: 7297989
    Abstract: Disclosed are a diboride single crystal substrate which has a cleavage plane as same as that of a nitride compound semiconductor and is electrically conductive; a semiconductor laser diode and a semiconductor device using such a substrate and methods of their manufacture wherein the substrate is a single crystal substrate 1 of diboride XB2 (where X is either Zr or Ti) which is facially oriented in a (0001) plane 2 and has a thickness of 0.1 mm or less. The substrate 1 is permitted cleaving and splitting along a (10-10) plane 4 with ease. Using this substrate to form a semiconductor laser diode of a nitride compound, a vertical structure device can be realized. Resonant planes of a semiconductor laser diode with a minimum of loss can be fabricated by splitting the device in a direction parallel to the (10-10) plane. A method of manufacture that eliminates a margin of cutting is also realized.
    Type: Grant
    Filed: August 21, 2003
    Date of Patent: November 20, 2007
    Assignees: National Institute for Materials Science, Kyocera Corporation
    Inventors: Shigeki Otani, Hiroyuki Kinoshita, Hiroyuki Matsunami, Jun Suda, Hiroshi Amano, Isamu Akasaki, Satoshi Kamiyama
  • Patent number: 7294865
    Abstract: A light emitting device includes a die and a photostimulable luminescent substance. The die has a first semiconductor light-emitting layer emitting a first color light having a first wavelength range, and a second semiconductor light-emitting layer emitting a second color light having a second wavelength range different from the first wavelength range. The photostimulable luminescent substance is excitable by at least one of the first and second color lights to emit a third color light having a third wavelength range. The third color light is mixed with the first and second color lights to emit a light blend having a wavelength range covering the first, second, and third wavelength ranges.
    Type: Grant
    Filed: July 28, 2005
    Date of Patent: November 13, 2007
    Assignee: Genesis Photonics Inc.
    Inventor: Cheng-Chuan Chen
  • Patent number: 7294867
    Abstract: The semiconductor light generating device comprises a light generating region 3, a first AlX1Ga1-X1N semiconductor (0?X1?1) layer 5 and a second AlX2Ga1-X2N semiconductor (0?X2?1) layer 7. In this semiconductor light generating device, the light generating region 3 is made of III-nitride semiconductor, and includes a InAlGaN semiconductor layer. The first AlX1Ga1-X1N semiconductor (0?X1?1) layer 5 is doped with a p-type dopant, such as magnesium, and is provided on the light generating region 3. The second AlX2Ga1-X2N semiconductor layer 7 has a p-type concentration smaller than the first AlX1Ga1-X1N semiconductor layer 5. The second AlX2Ga1-X2N semiconductor (0?X2?1) layer 7 is provided between the light generating region 3 and the first AlX1Ga1-X1N semiconductor layer 5.
    Type: Grant
    Filed: January 11, 2005
    Date of Patent: November 13, 2007
    Assignees: Sumitomo Electric Industries, Ltd., Riken
    Inventors: Katsushi Akita, Takao Nakamura, Hideki Hirayama
  • Patent number: 7291868
    Abstract: In layer structure 20 of a semiconductor laser of a surface emitting type, 21 and 24 represent an n-type contact layer made of n-type GaN and a p-layer made of p-type AlGaN, respectively. In the laser, an n-type DBR layer 22 made of n-type InGaN and a DBR layer 25 made of dielectric are formed on and below a InGaN active layer 23, respectively, each of which forms a reflection surface vertical to the z axis. By forming a reflection surface vertical to the z axis at each of on and above the active layer 23, a resonator is obtained. Here optical distance between two reflection facets are arranged to an integral multiple of half a oscillation wavelength. Consequently, the present invention enables to produce a semiconductor laser of a surface emitting type easier by far compared with a conventional invention.
    Type: Grant
    Filed: August 20, 2004
    Date of Patent: November 6, 2007
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Masanobu Ando, Masahito Nakai, Toshiya Uemura, Masaaki Nakayama
  • Patent number: 7285799
    Abstract: A semiconductor light emitting device includes a planar light emitting layer with a wurtzite crystal structure having a <0001> axis roughly parallel to the plane of the layer, referred to as an in-plane light emitting layer. The in-plane light emitting layer may include, for example, a {11 20} or {10 10} InGaN light emitting layer. In some embodiments, the in-plane light emitting layer has a thickness greater than 50 ?.
    Type: Grant
    Filed: April 21, 2004
    Date of Patent: October 23, 2007
    Assignee: Philip Lumileds Lighting Company, LLC
    Inventors: James C. Kim, Yu-Chen Shen
  • Patent number: 7274040
    Abstract: A light emitting device includes a substrate, a doped substrate layer, a layer of first conductivity type overlying the doped substrate layer, a light emitting layer overlying the layer of first conductivity type, and a layer of second conductivity type overlying the light emitting layer. A conductive transparent layer, e.g., of indium tin oxide, and a reflective metal layer overlie the layer of second conductivity type and provide electrical contact with the layer of second conductivity type. A plurality of vias may be formed in the reflective metal and conductive transparent layer as well as the layer of second conductivity type, down to the doped substrate layer. A plurality of contacts are formed in the vias and are in electrical contact with the doped substrate layer. An insulating layer formed over the reflective metal layer insulates the plurality of contacts from the conductive transparent layer and reflective metal layer.
    Type: Grant
    Filed: October 6, 2004
    Date of Patent: September 25, 2007
    Assignee: Philips Lumileds Lighting Company, LLC
    Inventor: Decai Sun
  • Patent number: 7271021
    Abstract: A light emitting device includes a substrate, an epitaxial structure positioned on the substrate, an ohmic contact electrode positioned on the epitaxial structure and a current blocking structure positioned in the epitaxial structure. The epitaxial structure includes a bottom cladding layer, an upper cladding layer, a light-emitting layer positioned between the bottom and the upper cladding layer, a window layer positioned on the upper cladding layer and a contact layer positioned on the window layer. The current blocking structure can extend from the bottom surface of the ohmic contact electrode to the light-emitting layer. According to the present invention, at least one ionic implanting process is performed to implant at least one proton beam into the epitaxial structure to form the current blocking structure.
    Type: Grant
    Filed: September 28, 2005
    Date of Patent: September 18, 2007
    Assignee: Atomic Energy Council-Institute of Nuclear Energy Research
    Inventors: Tsun-Neng Yang, Shan-Ming Lan
  • Patent number: 7259404
    Abstract: A light-emitting semiconductor component has a number of layers that predominantly contain elements of groups II and VI of the Periodic Table. The layers are applied epitaxially on a substrate, preferably made of InP, and include a p-doped covering layer and an n-doped covering layer having lattice constants of which correspond to that of the substrate. An undoped active layer lies between the two covering layers. The active layer forms a quantum well structure in interaction with its neighboring layers, a lattice constant of the active layer being made smaller than that of the neighboring layers.
    Type: Grant
    Filed: November 19, 2002
    Date of Patent: August 21, 2007
    Assignee: Osram Opto Semiconductors GmbH
    Inventors: Osram Opto Semiconductors GmbH, legal representative, Wolfgang Faschinger, deceased
  • Patent number: 7259406
    Abstract: A semiconductor optical element having a includes an n-type GaAs buffer layer, an n-type AlGaInP cladding layer, a first InGaAsP (including zero As content)guide layer without added dopant impurities, an InGaAsP (including zero In content) active layer, a second InGaAsP (including zero As content)guide layer without added dopant impurities, a p-type AlGaInP cladding layer, a p-type band discontinuity reduction layer, and a p-type GaAs contact layer sequentially laminated on an n-type GaAs substrate C or Mg is the dopant impurity in the p-type GaAs contact layer, the p-type band discontinuity reduction layer, and the p-type AlGaInP cladding layer.
    Type: Grant
    Filed: November 2, 2005
    Date of Patent: August 21, 2007
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yoshihiko Hanamaki, Kenichi Ono, Kimio Shigihara, Kazushige Kawasaki, Kimitaka Shibata, Naoyuki Shimada
  • Patent number: 7244968
    Abstract: The present invention is to provide a group III nitride tunneling junction structure with a low tunneling potential barrier, in which Si layer or a group III-V compound semiconductor In(a)Ga(b)Al(c)As(d)[N]P(e) (0?a?1, 0?b?1, 0?c?1, 0?d?1, 0?e?1) which has a smaller band gap than that of Al(x)Ga(y)In(z)N (0?x?1, 0?y?1, 0?z?1) and can be doped with a high concentration of p is inserted into a tunneling junction based on a P++-Al(x)Ga(y)In(z)N (0?x?1, 0?y?1, 0?z?1) layer and a N++-Al(x)Ga(y)In(z)N (0?x?1, 0?y?1, 0?z?1) layer. This tunneling junction structure will be useful for the fabrication of a highly reliable ultrahigh-speed optoelectronic device.
    Type: Grant
    Filed: June 3, 2004
    Date of Patent: July 17, 2007
    Assignees: Epivalley Co., Ltd., Samsung Electro-Mechanics Co., Ltd.
    Inventor: Tae-Kyung Yoo
  • Patent number: 7244964
    Abstract: An n-type layer of the opposite conduction type composed of n-GaN is formed between a light emitting layer and a p-type cladding layer composed of p-AlGaN. The bandgap of the n-type layer of the opposite conduction type is larger than the bandgap of the light emitting layer and is smaller than the bandgap of the p-type cladding layer.
    Type: Grant
    Filed: August 24, 2004
    Date of Patent: July 17, 2007
    Assignee: Sanyo Electric Company, Ltd
    Inventor: Masayuki Hata
  • Publication number: 20070158677
    Abstract: Embodiments relate to a bipolar junction transistor and a method for manufacturing the same. An oxide pattern may be formed on a P type semiconductor substrate. A low-density N type collector area may be formed in the semiconductor substrate. First spacers may be formed at sidewalls of the oxide pattern, and a low-density P type base area may be formed in the semiconductor substrate. Second spacers may be formed on sidewalls of the first spacers. A high-density N type emitter area may be formed in the low-density P type base area between the second spacers, and a high-density N type collector area may be formed in the semiconductor substrate at an outside of the first spacers. The bipolar junction transistor may be realized through a self-aligned scheme using dual nitride spacers. A base width between the emitter area and the low-density collector area may be narrowed by the width of the second spacer.
    Type: Application
    Filed: December 22, 2006
    Publication date: July 12, 2007
    Inventor: Kwang Young Ko
  • Patent number: 7230263
    Abstract: In a gallium nitride semiconductor device comprising an active layer made of an n-type gallium nitride semiconductor that includes In and is doped with n-type impurity and a p-type cladding layer made of a p-type gallium nitride semiconductor that includes Al and is doped with p-type impurity, a first cap layer, made of a gallium nitride semiconductor that includes n-type impurity of lower concentration than that of said active layer and p-type impurity of lower concentration than that of said p-type cladding layer, and a second cap layer made p-type gallium nitride semiconductor that includes Al and is doped with p-type impurity are stacked one on another between said active layer and said p-type cladding layer.
    Type: Grant
    Filed: April 8, 2002
    Date of Patent: June 12, 2007
    Assignee: Nichia Corporation
    Inventor: Kimihiro Kawagoe
  • Patent number: 7227196
    Abstract: Semiconductor devices containing group II-VI semiconductor materials are disclosed. The devices may include a p-n junction containing a p-type group II-VI semiconductor material and an n-type semiconductor material. The p-type group II-VI semiconductor includes a single crystal group II-VI semiconductor containing atoms of group II elements, atoms of group VI elements, and one or more p-type dopants. The p-type dopant concentration is greater than about 1016 atoms·cm?3, the semiconductor resistivity is less than about 0.5 ohm·cm, and the carrier mobility is greater than about 0.1 cm2/V·s. The semiconductor devices may include light emitting diodes, laser diodes, field effect transistors, and photodetectors.
    Type: Grant
    Filed: May 19, 2004
    Date of Patent: June 5, 2007
    Inventors: Robert H. Burgener, II, Roger L. Felix, Gary M. Renlund
  • Patent number: 7223998
    Abstract: A white, single or multi-color light emitting diode (LED) includes a mirror for reflecting photons within the LED; a first active region, adjacent the mirror, including one or more current-injected layers for emitting photons when electrically biased in a forward direction; a second active region, adjacent the first active region, including one or more optically-pumped layers for emitting photons, wherein the optically-pumped layers are optically excited by the photons emitted by the current-injected layers, thereby recycling guided modes; and an output interface, adjacent the second active region, for allowing the photons emitted by the optically-pumped layers to escape the LED as emitted light.
    Type: Grant
    Filed: September 10, 2004
    Date of Patent: May 29, 2007
    Assignee: The Regents of the University of California
    Inventors: Carole Schwach, Claude Charles Aime Weisbuch, Steven P. DenBaars, Henri Benisty, Shuji Nakamura
  • Patent number: 7208752
    Abstract: A structure of a gallium nitride light emitting diode has a transparent conductive window layer including a diffusion barrier layer, an ohmic contact layer, and a window layer. By using the added domain contact layer, the diffusion barrier layer and the P-type semiconductor layer of the light emitting diode are put into ohmic contact. And then, the rising of the contact resistivity is barred by applying the diffusion barrier layer to block the diffusion of the window layer from the contact with the domain contact layer so as to lower down the operating voltage and advance the transparency.
    Type: Grant
    Filed: May 7, 2004
    Date of Patent: April 24, 2007
    Assignee: Supernova Optoelectronics Corporation
    Inventors: Mu-Jen Lai, Schang-Jing Hon, Hsueh-Feng Sun, Shih-Ming Yang
  • Patent number: 7208770
    Abstract: In photonic integrated circuits (PICs) having at least one active semiconductor device, such as, a buried heterostructure semiconductor laser, LED, modulator, photodiode, heterojunction bipolar transistor, field effect transistor or other active device, a plurality of semiconductor layers are formed on a substrate with one of the layers being an active region. A current channel is formed through this active region defined by current blocking layers formed on adjacent sides of a designated active region channel where the blocking layers substantially confine the current through the channel. The blocking layers are characterized by being an aluminum-containing Group III-V compound, i.e., an Al-III-V layer, intentionally doped with oxygen from an oxide source. Also, wet oxide process or a deposited oxide source may be used to laterally form a native oxide of the Al-III-V layer.
    Type: Grant
    Filed: February 16, 2005
    Date of Patent: April 24, 2007
    Assignee: Infinera Corporation
    Inventors: Fred A. Kish, Jr., Sheila Hurtt, Charles H. Joyner, Richard P. Schneider
  • Patent number: 7205575
    Abstract: A high brightness light emitting diode (LED) includes a base, a reflector cap, LED dices, a plastic layer, a lens, and a silicon rubber layer. Conductive terminals extend from the base for connection with an external power source. The base defines a bore receiving the cap with a bottom of the cap exposed. The cap forms a cavity receiving the LED dices, which are electrically connected to the conductive terminals. The plastic layer comprising PPA, LCP, or engineer plastics is filled in the cavity o with ends of the terminals extending beyond the plastic layer. The lens is positioned over the plastic layer and has projections that snugly fit over and engage the base. The silicon rubber layer is interposed between the lens and the base. With such an arrangement, lights from the LED dices can be mixed twice for enhanced uniformity of brightness of the light distribution.
    Type: Grant
    Filed: September 22, 2004
    Date of Patent: April 17, 2007
    Assignees: Unity Opto Technology Co., Ltd., Genius Electronic Optical Co., Ltd.
    Inventors: Yuan-Cheng Chin, Hung-Chih Li
  • Patent number: 7202509
    Abstract: In order to provide light emitting devices which have simple constructions and thus can be fabricated easily, and can stably provide high light emission efficiencies for a long time period, a light emitting device includes an n-type nitride semiconductor layer at a first main surface side of a nitride semiconductor substrate, a p-type nitride semiconductor layer placed more distantly from the nitride semiconductor substrate than the n-type nitride semiconductor layer at the first main surface side and a light emitting layer placed between the n-type nitride semiconductor layer and the p-type nitride semiconductor layer at the first main surface side. The nitride semiconductor substrate has a resistivity of 0.5 ?·cm or less and the p-type nitride semiconductor layer side is down-mounted so that light is emitted from the second main surface of the nitride semiconductor substrate at the opposite side from the first main surface.
    Type: Grant
    Filed: August 23, 2004
    Date of Patent: April 10, 2007
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Youichi Nagai, Makoto Kiyama, Takao Nakamura, Takashi Sakurada, Katsushi Akita, Koji Uematsu, Ayako Ikeda, Koji Katayama, Susumu Yoshimoto
  • Patent number: 7199398
    Abstract: A nitride semiconductor light emitting device includes at least a substrate, an active layer formed of a nitride semiconductor containing mainly In and Ga, a p-electrode and an n-electrode. At least one of the p-electrode and n-electrode is electrically separated into at least two regions.
    Type: Grant
    Filed: November 20, 2003
    Date of Patent: April 3, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tomoki Ono, Shigetoshi Ito, Toshiyuki Okumura, Hirokazu Mouri, Kyoko Matsuda, Toshiyuki Kawakami, Takeshi Kamikawa, Yoshihiko Tani
  • Patent number: 7196360
    Abstract: A light emitting device and electronic equipment having a long life at a low electric power consumption are provided. A hole transporting region composed of a hole transporting material, an electron transporting region composed of an electron transporting material, and a mixture region in which both the hole transporting material and the electron transporting material are mixed at a fixed ratio are formed within an organic compound film. Regions having a concentration gradient are formed between the mixture region and carrier transporting regions until the fixed ratio is achieved. In addition, by doping a light emitting material into the mixture region, functions of hole transportation, electron transportation, and light emission can be respectively expressed while all of the interfaces existing between layers of a conventional lamination structure are removed.
    Type: Grant
    Filed: February 5, 2002
    Date of Patent: March 27, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Seo, Shunpei Yamazaki
  • Patent number: 7196348
    Abstract: Although there is provided a high light transmittance of an emitted light by a ITO electrode film conventionally employed, there occurs a formation of a Schottky type contact between the ITO electrode film and a p type GaN system semiconductor layer, thus resulting in a not uniform flow of an electric current. It is an object of the present invention to provide a semiconductor light emitting device constituted by forming a transparent electrode, which facilitates acquiring an ohmic property, to be replaced by an ITO electrode film, at the light extracting or light exit side of the GaN system semiconductor light emitting device, so as to improve a light emission efficiency and a radiation extracting efficiency or a light exit efficiency of a GaN system semiconductor light emitting device.
    Type: Grant
    Filed: January 21, 2004
    Date of Patent: March 27, 2007
    Assignee: Rohm Co., Ltd.
    Inventor: Ken Nakahara
  • Patent number: 7193246
    Abstract: According to the nitride semiconductor device with the active layer made of the multiple quantum well structure of the present invention, the performance of the multiple quantum well structure can be brought out to intensify the luminous output thereof thereby contributing an expanded application of the nitride semiconductor device. In the nitride semiconductor device comprises an n-region having a plurality of nitride semiconductor films, a p-region having a plurality of nitride semiconductor films, and an active layer interposed therebetween, a multi-film layer with two kinds of the nitride semiconductor films is formed in at least one of the n-region or the p-region.
    Type: Grant
    Filed: March 10, 1999
    Date of Patent: March 20, 2007
    Assignee: Nichia Corporation
    Inventors: Koji Tanizawa, Tomotsugu Mitani, Yoshinori Nakagawa, Hironori Takagi, Hiromitsu Marui, Yoshikatsu Fukuda, Takeshi Ikegami
  • Patent number: 7190004
    Abstract: A light emitting device includes a nitride semiconductor substrate with a resistivity of 0.5 ?·cm or less, an n-type nitride semiconductor layer and a p-type nitride semiconductor layer placed more distantly from the nitride semiconductor substrate than the n-type nitride semiconductor layer at a first main surface side of the nitride semiconductor substrate, and a light emitting layer placed between the n-type nitride semiconductor layer and the p-type nitride semiconductor layer, wherein one of the nitride semiconductor substrate and the p-type nitride semiconductor layer is mounted at the top side which emits light and the other is placed at the down side, and a single electrode is placed at the top side. Therefore, there is provided a light emitting device which has a simple configuration thereby making it easy to fabricate, can provide a high light emission efficiency for a long time period, and can be easily miniaturized.
    Type: Grant
    Filed: December 2, 2004
    Date of Patent: March 13, 2007
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Youichi Nagai, Makoto Kiyama, Takao Nakamura, Takashi Sakurada, Katsushi Akita, Koji Uematsu, Ayako Ikeda, Koji Katayama, Susumu Yoshimoto
  • Patent number: 7190002
    Abstract: A flip-chip light emitting device and a method of manufacturing thereof are provided. The flip-chip nitride light emitting device includes a substrate, an n type clad layer, an active layer, a p type clad layer, a multi ohmic contact layer, and a reflective layer, which are stacked in this order, wherein the multi ohmic contact layer is obtained by repeatedly stacking at least one stack unit of a reforming metal layer and a transparent conductive thin film, and wherein the reforming metal layer mainly contains silver (Ag). According to the flip-chip light emitting device and the method of manufacturing thereof, since the ohmic contact characteristics associated with a p type clad layer can be improved, it is possible to increase wire bonding efficiency and yield in a packaging process. In addition, since a low non-contact resistance and a good current-voltage characteristic can be obtained, it is possible to improve light emitting efficiency and to expand life time of the flip-chip light emitting device.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: March 13, 2007
    Assignees: Samsung Electronics Co., Ltd., Gwangju Institute of Science and Technology
    Inventors: Tae-yeon Seong, June-o Song
  • Patent number: 7180100
    Abstract: A semiconductor light-emitting device has a semiconductor layer containing Al between a substrate and an active layer containing nitrogen, wherein Al and oxygen are removed from a growth chamber before growing said active layer and a concentration of oxygen incorporated into said active layer together with Al is set to a level such that said semiconductor light-emitting device can perform a continuous laser oscillation at room temperature.
    Type: Grant
    Filed: February 27, 2004
    Date of Patent: February 20, 2007
    Assignee: Ricoh Company, Ltd.
    Inventors: Takashi Takahashi, Morimasa Kaminishi, Shunichi Sato, Akihiro Itoh, Naoto Jikutani
  • Patent number: 7176501
    Abstract: The present invention relates to a terbium borate-based yellow phosphor, a preparation method thereof, and a white semiconductor light emitting device incorporating the same. The terbium borate-based yellow phosphor of the present invention is represented by the general formula (Tb1-x-y-zREXAy)3DaBbO12:Cez (where, RE is at least one rare earth element selected from the group consisting of Y, Lu, Sc, La, Gd, Sm, Pr, Nd, Eu, Dy, Ho, Er, Tm and Yb; A is a typical metal element selected from the group consisting of Li, Na, K, Rb, Cs and Fr; D is a typical amphoteric element selected from the group consisting of Al, In and Ga; 0?x<0.5; 0?y<0.5; 0<z<0.5; 0<a<5; and 0<b<5). The white semiconductor light emitting device of the present invention comprises a semiconductor light emitting diode and the yellow phosphor, which absorbs a portion of light emitted by the semiconductor light emitting diode and emits light of wavelength different from that of the absorbed light.
    Type: Grant
    Filed: November 25, 2003
    Date of Patent: February 13, 2007
    Assignee: Luxpia Co, Ltd
    Inventors: Dong-Yeoul Lee, Yong-Tae Kim, Jin-Hwan Kim, Eun-Joung Kim
  • Patent number: 7176479
    Abstract: A nitride compound semiconductor element having improved characteristics, productivity and yield. A nitride compound semiconductor element includes: a sapphire substrate; a first single crystalline layer of AlN formed on said sapphire substrate; a second single crystalline layer formed on said first single crystalline layer, said second single crystalline layer being made of AlxGa1-xN (0.8?x?0.97) and having a thickness of equal to or more than 0.3 ?m and equal to or less than 6 ?m; and a device structure section of a nitride semiconductor formed on said second single crystalline layer.
    Type: Grant
    Filed: February 9, 2004
    Date of Patent: February 13, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yasuo Ohba
  • Patent number: 7166874
    Abstract: A nitride semiconductor device has a nitride semiconductor layer structure. The structure includes an active layer of a quantum well structure containing an indium-containing nitride semiconductor. A first nitride semiconductor layer having a band gap energy larger than that of the active layer is provided in contact with the active layer. A second nitride semiconductor layer having a band gap energy smaller than that of the first layer is provided over the first layer. Further, a third nitride semiconductor layer having a band gap energy larger than that of the second layer is provided over the second layer.
    Type: Grant
    Filed: November 24, 2003
    Date of Patent: January 23, 2007
    Assignee: Nichia Corporation
    Inventors: Shuji Nakamura, Shinichi Nagahama, Naruhito Iwasa
  • Patent number: 7164169
    Abstract: A semiconductor device has a substrate and a dielectric film formed directly or indirectly on the substrate. The dielectric film contains a metal silicate film, and a silicon concentration in the metal silicate film is lower in a center portion in the film thickness direction than in an upper portion and in a lower portion.
    Type: Grant
    Filed: August 22, 2002
    Date of Patent: January 16, 2007
    Assignee: NEC Corporation
    Inventors: Heiji Watanabe, Haruhiko Ono, Nobuyuki Ikarashi