With Particular Semiconductor Material Patents (Class 257/103)
  • Patent number: 8890297
    Abstract: A light emitting device package according to embodiments comprises: a package body; a lead frame on the package body; a light emitting device supported by the package body and electrically connected with the lead frame; a filling material surrounding the light emitting device; and a phosphor layer comprising phosphors on the filling material.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: November 18, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventors: Yu Ho Won, Geun Ho Kim
  • Patent number: 8890184
    Abstract: A nanostructured light-emitting device including: a first type semiconductor layer; a plurality of nanostructures each including a first type semiconductor nano-core grown in a three-dimensional (3D) shape on the first type semiconductor layer, an active layer formed to surround a surface of the first type semiconductor nano-core, and a second type semiconductor layer formed to surround a surface of the active layer and including indium (In); and at least one flat structure layer including a flat-active layer and a flat-second type semiconductor layer that are sequentially formed on the first type semiconductor layer parallel to the first type semiconductor layer.
    Type: Grant
    Filed: February 10, 2012
    Date of Patent: November 18, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joo-sung Kim, Taek Kim, Moon-seung Yang
  • Patent number: 8884505
    Abstract: A light emitting device comprises a first conductive semiconductor layer, a plurality of light emitting cells separated on the first conductive semiconductor layer, a phosphor layer on at least one of the light emitting cells, and a plurality of second electrodes electrically connected to the light emitting cells.
    Type: Grant
    Filed: November 18, 2009
    Date of Patent: November 11, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: Sang Youl Lee
  • Patent number: 8884268
    Abstract: The present disclosure is directed to an integrated circuit and its formation. In some embodiments, the integrated circuit includes a diffusion barrier layer. The diffusion barrier layer can be arranged to prevent diffusion of the Si and O2 from a Si substrate into a Group III nitride layer. The diffusion barrier layer can comprise Al2O3. In some embodiments, the integrated circuit further comprises a lattice-matching structure disposed between the silicon substrate and a Group III nitride layer.
    Type: Grant
    Filed: July 16, 2012
    Date of Patent: November 11, 2014
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chi-Ming Chen, Han-Chin Chiu, Chung-Yi Yu, Chia-Shiung Tsai
  • Patent number: 8884330
    Abstract: A wavelength-converting structure for a wavelength-converted light emitting diode (LED) assembly. The wavelength-converting structure includes a thin film structure having a non-uniform top surface. The non-uniform top surface is configured increase extraction of light from the top surface of a wavelength-converting structure.
    Type: Grant
    Filed: April 13, 2011
    Date of Patent: November 11, 2014
    Assignee: Osram Sylvania Inc.
    Inventors: Madis Raukas, Adam M. Scotch, Yi Zheng, Darshan Kundaliya
  • Patent number: 8882935
    Abstract: A method for the fabrication of nonpolar indium gallium nitride (InGaN) films as well as nonpolar InGaN-containing device structures using metalorganic chemical vapor deposition (MOVCD). The method is used to fabricate nonpolar InGaN/GaN violet and near-ultraviolet light emitting diodes and laser diodes.
    Type: Grant
    Filed: June 4, 2013
    Date of Patent: November 11, 2014
    Assignees: The Regents of the University of California, The Japan Science and Technology Agency
    Inventors: Arpan Chakraborty, Benjamin A. Haskell, Stacia Keller, James S. Speck, Steven P. DenBaars, Shuji Nakamura, Umesh K. Mishra
  • Patent number: 8882971
    Abstract: A sputtering apparatus (1) includes: a chamber (10) having an inside maintained in a depressurized state to generate plasma discharge (20); a cathode (22) placed in the chamber (10) and holding a target (21); and a substrate holder (60) holding a substrate (110) so that one surface of the substrate (110) faces the surface of the target (21). The substrate (110) is arranged at an upper portion in the sputtering apparatus (1) with the surface of the substrate (110) facing downward. The target (21) is arranged at a lower portion in the sputtering apparatus (1) with the surface of the target (21) facing upward. The sputtering apparatus (1) includes a heater (65) for heating the substrate (110). The temperature of the substrate (110) is raised by absorbing electromagnetic waves radiated from the heater (65). A method of manufacturing a semiconductor light-emitting element using the sputtering apparatus is also disclosed.
    Type: Grant
    Filed: January 10, 2011
    Date of Patent: November 11, 2014
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Hisayuki Miki, Kenzo Hanawa, Yasunori Yokoyama, Yasumasa Sasaki
  • Publication number: 20140327037
    Abstract: A method of manufacturing at least one semiconducting micro- or nano-wire used for formation of an optoelectric structure, optoelectronic structures including the micro- or nano-wires, and a method enabling manufacture of the photoelectronic structures. The method includes providing a semiconducting substrate, forming a crystalline buffer layer on the substrate, the buffer layer having a first zone over at least part of its thickness composed mainly of magnesium nitride in a form MgxNy, and forming at least one semiconducting micro- or nano-wire on the buffer layer.
    Type: Application
    Filed: December 19, 2012
    Publication date: November 6, 2014
    Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALT
    Inventors: Amelie Dussaigne, Philippe Gilet, Francois Martin
  • Publication number: 20140327036
    Abstract: A light emitting diode (LED) chip includes an N-type semiconductor layer, a compensation layer arranged on the N-type semiconductor layer, an active layer arranged on the compensation layer; and a P-type semiconductor layer arranged on the active layer. During growth of the compensation layer, atoms of an element (i.e., Al) of the compensation layer move to fill epitaxial defects in the N-type semiconductor layer, wherein the epitaxial defects are formed due to lattice mismatch when growing the N-type semiconductor. A method for manufacturing the chip is also disclosed. The compensation layer is made of a compound having a composition of AlxGa1-xN.
    Type: Application
    Filed: October 24, 2013
    Publication date: November 6, 2014
    Applicant: ADVANCED OPTOELECTRONIC TECHNOLOGY, INC.
    Inventors: CHING-HSUEH CHIU, YA-WEN LIN, PO-MIN TU, SHIH-CHENG HUANG
  • Patent number: 8878233
    Abstract: Provided are a compound semiconductor device and a manufacturing method thereof. A substrate and a graphene oxide layer are provided on the substrate. A first compound semiconductor layer is provided on the graphene oxide layer. The first compound semiconductor layer is selectively grown from the substrate exposed by the graphene oxide.
    Type: Grant
    Filed: October 26, 2011
    Date of Patent: November 4, 2014
    Assignee: LG Siltron Inc.
    Inventors: Sung-Jin An, Dong-Gun Lee, Seok-Han Kim
  • Patent number: 8878231
    Abstract: The present invention provides a light emission device and a manufacturing method thereof. The light emission device includes: i) a substrate; ii) a mask layer disposed on the substrate and having at least one opening; iii) a light emission structure formed on the mask layer surrounding the opening and extended substantially perpendicular to a surface of the substrate; iv) a first electrode formed on the mask layer while surface-contacting the external surface of the light emission structure; and v) a second electrode disposed in the light emission structure and surface-contacting the internal surface of the light emission structure.
    Type: Grant
    Filed: May 18, 2010
    Date of Patent: November 4, 2014
    Assignee: SNU R&DB Foundation
    Inventors: Gyu-Chul Yi, Chul-Ho Lee
  • Patent number: 8878198
    Abstract: An organic light-emitting display apparatus includes a substrate including a plurality of red, green, and blue sub-pixel regions, a pixel electrode in each of the plurality of the red, green, and blue sub-pixel regions on the substrate, a Distributed Bragg Reflector (DBR) layer between the substrate and the pixel electrodes, a high-refractive index layer between the substrate and the DBR layer in the blue sub-pixel region, the high-refractive index layer having a smaller area than an area of a corresponding pixel electrode in the blue sub-pixel region, an intermediate layer including an emissive layer on the pixel electrode, and an opposite electrode on the intermediate layer.
    Type: Grant
    Filed: August 22, 2012
    Date of Patent: November 4, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jong-Hyun Choi, Dong-Hyun Lee, Dae-Woo Lee, Seong-Hyun Jin, Guang-Hai Jin
  • Patent number: 8878232
    Abstract: An MQW-structure light-emitting layer is formed by alternately stacking InGaN well layers and AlGaN barrier layers. Each well layer and each barrier layer are formed so as to satisfy the following relations: 12.9??2.8x+100y?37 and 0.65?y?0.86, or to satisfy the following relations: 162.9?7.1x+10z?216.1 and 3.1?z?9.2, here x represents the Al compositional ratio (mol %) of the barrier layer, and y represents the difference in bandgap energy (eV) between the barrier layer and the well layer, and z represents the In compositional ratio (mol %) of the well layer.
    Type: Grant
    Filed: June 19, 2012
    Date of Patent: November 4, 2014
    Assignee: Toyoda Gosei Co., Ltd.
    Inventor: Ryo Nakamura
  • Patent number: 8878212
    Abstract: A light emitting device includes a substrate, at least one electrode, a first contact layer, a second contact layer, a light emitting structure layer, and an electrode layer. The electrode is disposed through the substrate. The first contact layer is disposed on a top surface of the substrate and electrically connected to the electrode. The second contact layer is disposed on a bottom surface of the substrate and electrically connected to the electrode. The light emitting structure layer is disposed above the substrate at a distance from the substrate and electrically connected to the first contact layer. The light emitting structure layer includes a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer. The electrode layer is disposed on the light emitting structure layer.
    Type: Grant
    Filed: February 3, 2011
    Date of Patent: November 4, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventors: Woo Sik Lim, Sung Kyoon Kim, Sung Ho Choo, Hee Young Beom
  • Patent number: 8878208
    Abstract: An illuminating device that may include a substrate; a first light emitting chip which is disposed on the substrate; a second light emitting chip which is spaced apart from the first light emitting chip and is disposed on the substrate; a first lens which includes a first cylindrical side having a height greater than the thickness of the first light emitting chip and includes a first spherical or hemispherical curved surface formed on the first side, and which surrounds the first light emitting chip; and a second lens which includes a second cylindrical side having a height greater than the thickness of the second light emitting chip and includes a second spherical or hemispherical curved surface formed on the second side, and which surrounds the second light emitting chip, wherein at least a portion of the first side contacts with at least a portion of the second side.
    Type: Grant
    Filed: February 13, 2013
    Date of Patent: November 4, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventors: Ki Hyun Kim, Eun Hwa Kim
  • Patent number: 8872217
    Abstract: Electronic devices involving contact structures, and related components, systems and methods associated therewith are described. The contact structures are particularly suitable for use in a variety of light-emitting devices, including LEDs.
    Type: Grant
    Filed: April 16, 2012
    Date of Patent: October 28, 2014
    Assignee: Luminus Devices, Inc.
    Inventors: Michael Gregory Brown, Yves Bertic, Scott W. Duncan, Hong Lu, Ravi Rajan, John Woodhouse, Feng Yun, Hao Zhu
  • Publication number: 20140312381
    Abstract: The present invention relates to semiconductor devices comprising semiconductor nanoelements. In particular the invention relates to devices having a volume element having a larger diameter than the nanoelement arranged in epitaxial connection to the nanoelement. The volume element is being doped in order to provide a high charge carrier injection into the nanoelement and a low access resistance in an electrical connection. The nanoelement may be upstanding from a semiconductor substrate. A concentric layer of low resistivity material forms on the volume element forms a contact.
    Type: Application
    Filed: July 3, 2014
    Publication date: October 23, 2014
    Inventors: Lars Ivar Samuelson, Patrik Svensson, Jonas Ohlsson, Truls Lowgren
  • Patent number: 8866146
    Abstract: A method (100) of fabricating an LED or the active regions of an LED and an LED (200). The method includes growing, depositing or otherwise providing a bottom cladding layer (208) of a selected semiconductor alloy with an adjusted bandgap provided by intentionally disordering the structure of the cladding layer (208). A first active layer (202) may be grown above the bottom cladding layer (208) wherein the first active layer (202) is fabricated of the same semiconductor alloy, with however, a partially ordered structure. The first active layer (202) will also be fabricated to include a selected n or p type doping. The method further includes growing a second active layer (204) above the first active layer (202) where the second active layer (204) Is fabricated from the same semiconductor alloy.
    Type: Grant
    Filed: April 15, 2010
    Date of Patent: October 21, 2014
    Assignee: Alliance for Sustainable Energy, LLC
    Inventors: Angelo Mascarenhas, Myles A. Steiner, Lekhnath Bhusal, Yong Zhang
  • Patent number: 8866186
    Abstract: The present invention aims to enhance the light extraction efficiency of the Group III nitride semiconductor light-emitting device. The inventive Group III nitride semiconductor light-emitting device comprises a substrate; and a Group III nitride semiconductor layer including a light-emitting layer, stacked on the substrate, wherein the side face of the Group III nitride semiconductor layer is tilted with respect to the normal line of the major surface of the substrate.
    Type: Grant
    Filed: September 20, 2006
    Date of Patent: October 21, 2014
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Gaku Oriji, Koji Kamei, Hisayuki Miki, Akihiro Matsuse
  • Patent number: 8866149
    Abstract: A method for the reuse of gallium nitride (GaN) epitaxial substrates uses band-gap-selective photoelectrochemical (PEC) etching to remove one or more epitaxial layers from bulk or free-standing GaN substrates without damaging the substrate, allowing the substrate to be reused for further growth of additional epitaxial layers. The method facilitates a significant cost reduction in device production by permitting the reuse of expensive bulk or free-standing GaN substrates.
    Type: Grant
    Filed: February 14, 2013
    Date of Patent: October 21, 2014
    Assignee: The Regents of the University of California
    Inventors: Casey O. Holder, Daniel F. Feezell, Steven P. DenBaars, Shuji Nakamura
  • Patent number: 8866135
    Abstract: An anthracene derivative represented by the following formula (1): In the formula (1), Z is a structure represented by the following formula (2).
    Type: Grant
    Filed: November 29, 2013
    Date of Patent: October 21, 2014
    Assignee: Idemitsu Kosan Co., Ltd.
    Inventors: Masahiro Kawamura, Chishio Hosokawa, Masaki Numata
  • Publication number: 20140306265
    Abstract: The sapphire substrate has a principal surface for growing a nitride semiconductor to form a nitride semiconductor light emitting device and comprising a plurality of projections of the principal surface, wherein an outer periphery of a bottom surface of each of the projections has at least one depression. This depression is in the horizontal direction. The plurality of projections are arranged so that a straight line passes through the inside of at least any one of projections when the straight line is drawn at any position in any direction in a plane including the bottom surfaces of the plurality of projections.
    Type: Application
    Filed: June 25, 2014
    Publication date: October 16, 2014
    Inventors: Junya NARITA, Takuya Okada, Yohei Wakai, Yoshiki Inoue, Naoya Sako, Katsuyoshi Kadan
  • Patent number: 8859400
    Abstract: Semiconductor structures comprising a III-nitride (e.g., gallium nitride) material region and methods associated with such structures are provided. In some embodiments, the structures include an electrically conductive material (e.g., gold) separated from certain other region(s) of the structure (e.g., a silicon substrate) by a barrier material in order to limit, or prevent, undesirable reactions between the electrically conductive material and the other component(s) which can impair device performance. In certain embodiments, the electrically conductive material may be formed in a via. For example, the via can extend from a topside of the device to a backside so that the electrically conductive material connects a topside contact to a backside contact. The structures described herein may form the basis of a number of semiconductor devices including transistors (e.g., FET), Schottky diodes, light-emitting diodes and laser diodes, amongst others.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: October 14, 2014
    Assignee: International Rectifier Corporation
    Inventors: Robert J. Therrien, Jerry W. Johnson, Allen W. Hanson
  • Patent number: 8860051
    Abstract: This invention is related to LED Light Extraction for optoelectronic applications. More particularly the invention relates to (Al, Ga, In)N combined with optimized optics and phosphor layer for highly efficient (Al, Ga, In)N based light emitting diodes applications, and its fabrication method. A further extension is the general combination of a shaped high refractive index light extraction material combined with a shaped optical element.
    Type: Grant
    Filed: November 15, 2007
    Date of Patent: October 14, 2014
    Assignee: The Regents of the University of California
    Inventors: Natalie N. Fellows, Steven P. DenBaars, Shuji Nakamura
  • Patent number: 8860050
    Abstract: Provided is a hybrid light emitting device. The hybrid light emitting device may include the first light emitting part on the substrate, the capping layer, and the second light emitting part. The first light emitting part may emit light having a first wavelength, and the first light emitting part may include a first electrode, an organic emitting layer, and a second electrode sequentially disposed. A second light emitting part may generate light having a second wavelength. A capping layer may be disposed between the organic emitting layer and the second light emitting part. The capping layer may reflect light having the first wavelength and transmit light having the second wavelength.
    Type: Grant
    Filed: March 1, 2013
    Date of Patent: October 14, 2014
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jun-Han Han, Jeong Ik Lee, Chul Woong Joo, Jin Woo Huh, Jaehyun Moon, Seung Koo Park, Joon Tae Ahn, Boong Joon Lee, Nam Sung Cho, Doo-Hee Cho, Joo Hyun Hwang, Jin Wook Shin, Hye Yong Chu
  • Patent number: 8853715
    Abstract: A first light-emitting layer of a first organic electroluminescent element is disposed in common to a second organic electroluminescent element, a second light-emitting layer of the second organic electroluminescent element is disposed in contact with the first light-emitting layer and in the cathode side, and the second light-emitting layer is a light-emitting layer having an electron trapping property.
    Type: Grant
    Filed: August 27, 2012
    Date of Patent: October 7, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventor: Yojiro Matsuda
  • Patent number: 8852756
    Abstract: The present invention relates to the improvement of organic electroluminescent devices, in particular blue-emitting devices, by using compounds of the formula (1) as dopants in the emitting layer.
    Type: Grant
    Filed: April 21, 2006
    Date of Patent: October 7, 2014
    Assignee: Merck Patent GmbH
    Inventors: Horst Vestweber, Holger Heil, Philipp Stoessel, Arne Buesing, Amir Hossain Parham, Rocco Fortte
  • Patent number: 8852757
    Abstract: Disclosed is an organic electroluminescent device having high external quantum efficiency and long emission life. Also disclosed are an illuminating device and a display, each comprising such an organic electroluminescent device. The organic electroluminescent device is characterized by comprising at least an anode and a cathode on a supporting substrate, while having at least one light-emitting layer between the anode and the cathode. The organic electroluminescent device is also characterized by containing a polymer which at least partially contains a compound A having a partial structure represented by the general formula (a) below and a reactive group, and is obtained by polymerizing the compound A through the reactive group. (In the formula, Ar1 and Ar2 respectively represent an aromatic ring.
    Type: Grant
    Filed: August 27, 2007
    Date of Patent: October 7, 2014
    Assignee: Konica Minolta Holdings, Inc.
    Inventors: Rie Katakura, Hiroshi Kita, Tatsuo Tanaka, Hideo Taka
  • Patent number: 8853728
    Abstract: An LED mounting substrate includes a base substrate, a conductive pattern formed on the base substrate and including a recessed portion on an upper surface thereof, and a light reflecting film formed in an inter-pattern gap of the conductive pattern on the base substrate and in the recessed portion of the conductive pattern.
    Type: Grant
    Filed: June 17, 2013
    Date of Patent: October 7, 2014
    Assignee: Toyoda Gosei Co., Ltd.
    Inventors: Yosuke Tsuchiya, Shota Shimonishi, Hiroyuki Tajima, Akira Sengoku
  • Patent number: 8853710
    Abstract: An optically active material is used to create power devices and circuits having significant performance advantages over conventional methods for affecting optical control of power electronics devices and circuits. A silicon-carbide optically active material is formed by compensating shallow donors with the boron related D-center. The resulting material can be n-type or p-type but it is distinguished from other materials by the ability to induce persistent photoconductivity in it when illuminated by electromagnetic radiation with a photon energy in excess of the threshold energy required to photoexcite electrons from the D-center to allowed states close to the conduction band edge, which varies from polytype to polytype.
    Type: Grant
    Filed: June 3, 2013
    Date of Patent: October 7, 2014
    Assignee: Power Integrations, Inc.
    Inventor: Michael S. Mazzola
  • Publication number: 20140291694
    Abstract: A nonpolar III-nitride film grown on a miscut angle of a substrate, in order to suppress the surface undulations, is provided. The surface morphology of the film is improved with a miscut angle towards an a-axis direction comprising a 0.15° or greater miscut angle towards the a-axis direction and a less than 30° miscut angle towards the a-axis direction.
    Type: Application
    Filed: June 16, 2014
    Publication date: October 2, 2014
    Applicant: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Asako Hirai, Zhongyuan Jia, Makoto Saito, Hisashi Yamada, Kenji Iso, Steven P. DenBaars, Shuji Nakamura, James S. Speck
  • Publication number: 20140295589
    Abstract: An optoelectronic component includes a semiconductor layer sequence having an optoelectronically active region; a dielectric layer on the semiconductor layer sequence; and a metal layer on the dielectric layer, wherein an adhesion layer is arranged between the dielectric layer and the metal layer, the adhesion layer being covalently bonded to the dielectric layer and to the metal layer.
    Type: Application
    Filed: July 23, 2012
    Publication date: October 2, 2014
    Applicant: OSRAM Opto Semiconductors GmbH
    Inventors: Gudrun Lindberg, Lutz Höppel, Heribert Zull
  • Patent number: 8845927
    Abstract: A nanoparticle has a semiconductor nanocrystal capable of emitting light. The nanoparticle further includes a ligand attached to a surface of the coating. The ligand is represented by the formula: X-Sp-Z, wherein X represents, e.g., a primary amine group, a secondary amine group, a urea, a thiourea, an imidizole group, an amide group, a phosphonic or arsonic acid group, a phosphinic or arsinic acid group, a phosphate or arsenate group, a phosphine or arsine oxide group; Sp represents a spacer group, such as a group capable of allowing a transfer of charge or an insulating group; and Z represents: (i) reactive group capable of communicating specific chemical properties to the nanocrystal as well as provide specific chemical reactivity to the surface of the nanocrystal, and/or (ii) a group that is cyclic, halogenated, or polar a-protic.
    Type: Grant
    Filed: March 11, 2010
    Date of Patent: September 30, 2014
    Assignee: QD Vision, Inc.
    Inventors: Craig Breen, Marshall Cox, Jonathan S. Steckel
  • Patent number: 8846482
    Abstract: A method of forming a doped region in a III-nitride substrate includes providing the III-nitride substrate and forming a masking layer having a predetermined pattern and coupled to a portion of the III-nitride substrate. The III-nitride substrate is characterized by a first conductivity type and the predetermined pattern defines exposed regions of the III-nitride substrate. The method also includes heating the III-nitride substrate to a predetermined temperature and placing a dual-precursor gas adjacent the exposed regions of the III-nitride substrate. The dual-precursor gas includes a nitrogen source and a dopant source. The method further includes maintaining the predetermined temperature for a predetermined time period, forming p-type III-nitride regions adjacent the exposed regions of the III-nitride substrate, and removing the masking layer.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: September 30, 2014
    Assignee: Avogy, Inc.
    Inventors: David P. Bour, Richard J. Brown, Isik C. Kizilyalli, Thomas R. Prunty, Linda Romano, Andrew P. Edwards, Hui Nie, Mahdan Raj
  • Patent number: 8841691
    Abstract: A method of fabricating a Light Emitting Diode with improved light extraction efficiency, comprising depositing a plurality of Zinc Oxide (ZnO) nanorods on one or more surfaces of a III-Nitride based LED, by growing the ZnO nanorods from an aqueous solution, wherein the surfaces are different from c-plane surfaces of III-Nitride and transmit light generated by the LED.
    Type: Grant
    Filed: August 19, 2013
    Date of Patent: September 23, 2014
    Assignee: The Regents of the University of California
    Inventors: Jacob J. Richardson, Daniel B. Thompson, Ingrid Koslow, Jun-Seok Ha, Frederick F. Lange, Steven P. DenBaars, Shuji Nakamura
  • Publication number: 20140264429
    Abstract: Protrusions 2 each having a shape of a pyramid or a truncated pyramid are regularly arranged on a growing face 1a of a seed crystal 1 composed of gallium nitride single crystal. It is formed a gallium nitride crystal layer 4 having a thickness of 100 ?m or smaller by flux method directly on the growing face 1a of the seed crystal.
    Type: Application
    Filed: May 28, 2014
    Publication date: September 18, 2014
    Applicant: NGK INSULATORS, LTD.
    Inventors: Shuuhei Higashihara, Makoto Iwai
  • Publication number: 20140264430
    Abstract: The current distribution across the p-layer (130) of a semiconductor device is modified by purposely inhibiting current flow through the p-layer (130) in regions (310) adjacent to the guardsheet (150), without reducing the optical reflectivity of any part of the device. This current flow may be inhibited by increasing the resistance of the p-layer that is coupled to the p-contact (140) along the edges and in the corners of contact area. In an example embodiment, the high-resistance region (130) is produced by a shallow dose of hydrogen-ion (H+) implant after the p-contact (140) is created. Similarly, a resistive coating may be applied in select regions between the p-contact and the p-layer.
    Type: Application
    Filed: October 29, 2012
    Publication date: September 18, 2014
    Applicant: KONINKLIJKE PHILPS N.V.
    Inventor: John Edward Epler
  • Patent number: 8835973
    Abstract: Light-emitting elements in which an increase of driving voltage can be suppressed are provided. Light-emitting devices whose power consumption is reduced by including such light-emitting elements are also provided. In a light-emitting element having an EL layer between an anode and a cathode, a first layer in which carriers can be produced is formed between the cathode and the EL layer and in contact with the cathode, a second layer which transfers electrons produced in the first layer is formed in contact with the first layer, and a third layer which injects the electrons received from the second layer into the EL layer is formed in contact with the second layer.
    Type: Grant
    Filed: March 8, 2012
    Date of Patent: September 16, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiromi Nowatari, Satoshi Seo, Nobuharu Ohsawa, Tetsuo Tsutsui
  • Patent number: 8835969
    Abstract: Disclosed are a light emitting device package and a lighting system. The light emitting device package includes a body including a cavity and formed in a transmittive material; a plurality of lead electrodes in the cavity; an isolation member disposed between the lead electrodes; a light emitting device electrically connected to the lead electrodes in the cavity; and a molding member on the light emitting device.
    Type: Grant
    Filed: August 29, 2013
    Date of Patent: September 16, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventor: Ji Won Jang
  • Patent number: 8835930
    Abstract: A gallium nitride rectifying device includes a p-type gallium nitride based semiconductor layer and an n-type gallium nitride based semiconductor layer, the two layers forming a pn junction with each other. The p-type gallium nitride based semiconductor layer has a carrier trap (level) density of not more than 1×1018 cm?3, or the n-type gallium nitride based semiconductor layer has a carrier trap (level) density of not more than 1×1016 cm?3.
    Type: Grant
    Filed: March 21, 2012
    Date of Patent: September 16, 2014
    Assignee: Hitachi Metals, Ltd.
    Inventors: Tadayoshi Tsuchiya, Naoki Kaneda, Tomoyoshi Mishima
  • Patent number: 8835200
    Abstract: A III-nitride light emitting diode (LED) and method of fabricating the same, wherein at least one surface of a semipolar or nonpolar plane of a III-nitride layer of the LED is textured, thereby forming a textured surface in order to increase light extraction. The texturing may be performed by plasma assisted chemical etching, photolithography followed by etching, or nano-imprinting followed by etching.
    Type: Grant
    Filed: January 12, 2012
    Date of Patent: September 16, 2014
    Assignee: The Regents of the University of California
    Inventors: Hong Zhong, Anurag Tyagi, Kenneth J. Vampola, James S. Speck, Steven P. DenBaars, Shuji Nakamura
  • Patent number: 8835943
    Abstract: A light-emitting element includes: an anode; a cathode; a light-emitting layer which is provided between the anode and the cathode and emits light as the anode and the cathode are electrically connected to each other; and an organic layer which is provided between the anode and the light-emitting layer to come in contact with both layers. The organic layer has a first function of transporting holes and a second function of preventing electrons infiltrating from the light-emitting layer from staying in the organic layer.
    Type: Grant
    Filed: September 6, 2011
    Date of Patent: September 16, 2014
    Assignee: Seiko Epson Corporation
    Inventors: Hidetoshi Yamamoto, Tetsuji Fujita, Koya Shiratori
  • Patent number: 8835018
    Abstract: An anthracene derivative represented by a general formula (1) and an organic compound represented by a general formula (8) are provided. Further, by use of the anthracene derivative represented by the general formula (1), a light-emitting element with high emission efficiency can be obtained. Furthermore, by use of the anthracene derivative represented by the general formula (1), a light-emitting element that emits blue light with high color purity can be obtained.
    Type: Grant
    Filed: March 25, 2008
    Date of Patent: September 16, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Sachiko Kawakami, Nobuharu Ohsawa
  • Patent number: 8835959
    Abstract: A transparent light emitting diode (LED) includes a plurality of III-nitride layers, including an active region that emits light, wherein all of the layers except for the active region are transparent for an emission wavelength of the light, such that the light is extracted effectively through all of the layers and in multiple directions through the layers. Moreover, the surface of one or more of the III-nitride layers may be roughened, textured, patterned or shaped to enhance light extraction.
    Type: Grant
    Filed: September 19, 2012
    Date of Patent: September 16, 2014
    Assignee: The Regents of the University of California
    Inventors: Shuji Nakamura, Steven P. DenBaars, Hirokuni Asamizu
  • Patent number: 8835950
    Abstract: A semiconductor device has an active layer, a first semiconductor layer of first conductive type, an overflow prevention layer disposed between the active layer and the first semiconductor layer, which is doped with impurities of first conductive type and which prevents overflow of electrons or holes, a second semiconductor layer of first conductive type disposed at least one of between the active layer and the overflow prevention layer and between the overflow prevention layer and the first semiconductor layer, and an impurity diffusion prevention layer disposed between the first semiconductor layer and the active layer, which has a band gap smaller than those of the overflow prevention layer, the first semiconductor layer and the second semiconductor layer and which prevents diffusion of impurities of first conductive type.
    Type: Grant
    Filed: February 16, 2012
    Date of Patent: September 16, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Koichi Tachibana, Chie Hongo, Hajime Nago, Shinya Nunoue
  • Patent number: 8829337
    Abstract: Novel structures of photovoltaic cells (also treated as solar cells) are provided. The cells are based on nanometer-scaled wires, tubes, and/or rods, which are made of electronic materials covering semiconductors, insulators or metallic in structure. These photovoltaic cells have large power generation capability per unit physical area over the conventional cells. These cells will have enormous applications in space, commercial, residential, and industrial applications.
    Type: Grant
    Filed: October 8, 2012
    Date of Patent: September 9, 2014
    Assignee: Banpil Photonics, Inc.
    Inventor: Achyut Kumar Dutta
  • Patent number: 8829546
    Abstract: A solid state light emitting device comprising an emitter structure having an active region of semiconductor material and a pair of oppositely doped layers of semiconductor material on opposite sides of the active region. The active region emits light at a predetermined wavelength in response to an electrical bias across the doped layers. An absorption layer of semiconductor material is included that is integral to said emitter structure and doped with at least one rare earth or transition element. The absorption layer absorbs at least some of the light emitted from the active region and re-emits at least one different wavelength of light. A substrate is included with the emitter structure and absorption layer disposed on the substrate.
    Type: Grant
    Filed: February 13, 2006
    Date of Patent: September 9, 2014
    Assignee: Cree, Inc.
    Inventors: Steven P. DenBaars, Eric J. Tarsa, Michael Mack, Bernd Keller, Brian Thibeault, Adam W. Saxler
  • Patent number: 8829559
    Abstract: In a nitride semiconductor light-emitting device having an n-side and a p-side electrode pad formed on the same side of a substrate wherein current distribution in the light-emitting device is improved by forming branch electrodes extended from the p-side electrode pad (and the n-side electrode pad), when sheet resistance values of n-side and p-side layers in the device are low enough, contact resistance between a p-type nitride semiconductor layer and a current diffusion layer of a transparent conductive film formed thereon is reduced and in-plane distribution of the sheet resistance is made uniform whereby improving the optical output, by increasing in a prescribed condition the sheet resistance value of the current diffusion layer.
    Type: Grant
    Filed: March 29, 2012
    Date of Patent: September 9, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yufeng Weng, Michael Brockley
  • Patent number: 8829491
    Abstract: According to example embodiments, a semiconductor device includes a first layer and second layer. The first layer includes a nitride semiconductor doped with a first type dopant. The second layer is below the first layer and includes a high concentration layer. The high concentration layer includes the nitride semiconductor doped with the first type dopant and has a doping concentration higher than a doping concentration of the first layer.
    Type: Grant
    Filed: May 31, 2011
    Date of Patent: September 9, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-won Lee, Jun-youn Kim, Young-jo Tak
  • Patent number: 8829541
    Abstract: Provided are a light emitting device, a light emitting device package, and a lighting system. The light emitting device includes a crystalline substrate having a plurality of side surfaces, a light emitting structure layer comprising a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer on the substrate, and a first electrode on the first conductive type semiconductor layer and a second electrode on the second conductive type semiconductor layer. An amorphous region is defined in a side surface of the substrate, and the amorphous regions of two sides adjacent to each other have different depths from a top surface of the substrate.
    Type: Grant
    Filed: June 20, 2011
    Date of Patent: September 9, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventors: MyeongSoo Kim, SungKyoon Kim, Woo Sik Lim, Sung Ho Choo, Hee Young Beom, Min Gyu Na