Abstract: (OBJECT) The object is to provide a lightened semiconductor device and a manufacturing method thereof by pasting a layer to be peeled to various base materials. (MEANS FOR SOLVING THE PROBLEM) In the present invention, a layer to be peeled is formed on a substrate, then a seal substrate provided with an etching stopper film is pasted with a binding material on the layer to be peeled, followed by removing only the seal substrate by etching or polishing. The remaining etching stopper film is functioned as a blocking film. In addition, a magnet sheet may be pasted as a pasting member.

Abstract: A light-emitting structure includes a package substrate and a light emitter disposed on the package substrate. The package substrate includes a carrier substrate and a plurality of metal units disposed on the carrier substrate. A distance between two arbitrary points on a periphery of the metal unit is defined as a peripheral endpoint distance. The light emitter includes a first electrical metal and a second electrical metal that have different electrical polarities and are separate from each other. A shortest distance between the first electrical metal and the second electrical metal is defined as an electrical metal interval. The electrical metal interval between the first electrical metal and the second electrical metal is greater than the longest peripheral endpoint distance of the metal unit.

Abstract: A semiconductor device includes a base substrate on which a substrate electrode is arranged, and a semiconductor element which includes a chip electrode electrically connected via solder to the substrate electrode and in which a light absorbing layer is formed on a lower surface side.

Abstract: A method of depositing a nanomaterial onto a donor surface comprises applying a composition comprising nanomaterial to a donor surface. In another aspect of the invention there is provided a method of depositing a nanomaterial onto a substrate. Methods of making a device including nanomaterial are disclosed. An article of manufacture comprising nanomaterial disposed on a backing member is disclosed.

Abstract: According to one embodiment, a semiconductor light emitting element includes a conductive substrate, a bonding portion, an intermediate metal film, a first electrode, a semiconductor stacked body and a second electrode. The bonding portion is provided on the support substrate and including a first metal film. The intermediate metal film is provided on the bonding portion and having a larger linear expansion coefficient than the first metal film. The first electrode is provided on the intermediate metal film and includes a second metal film having a larger linear expansion coefficient than the intermediate metal film. The semiconductor stacked body is provided on the first electrode and including a light emitting portion. The second electrode is provided on the semiconductor stacked body.

Abstract: Provided is an LED element which achieves high light extraction efficiency even at low operating voltages and which can be produced using a simple process. The LED element has a first semiconductor layer made of a p-type nitride semiconductor, a light-emitting layer made of a nitride semiconductor formed on the upper layer of the first semiconductor layer, a second semiconductor layer made of an n-type nitride semiconductor formed on the upper layer of the light-emitting layer, and a transparent electrode formed on the whole surface of the second semiconductor layer. The second semiconductor layer in at least a region that is in contact with the transparent electrode is made of AlnGa1-nN (0<n<1) and has an n-type impurity concentration larger than 1×1019/cm3.

Abstract: The present disclosure is directed to an integrated circuit and a method for the fabrication of the integrated circuit. The integrated circuit includes a lattice matching structure. The lattice matching structure can include a first buffer region, a second buffer region and a superlattice structure formed from AlxGa1-xN/AlyGa1-yN layer pairs.

Abstract: Various methods to integrate a Group III nitride material on a silicon material are provided. In one embodiment, the method includes providing a structure including a (100) silicon layer, a (111) silicon layer located on an uppermost surface of the (100) silicon layer, a Group III nitride material layer located on an uppermost surface of the (111) silicon layer, and a blanket layer of dielectric material located on an uppermost surface of the Group III nitride material layer. Next, an opening is formed through the blanket layer of dielectric material, the Group III nitride material layer, the (111) Si layer and within a portion of the (100) silicon layer. A dielectric spacer is then formed within the opening. An epitaxial semiconductor material is then formed on an exposed surface of the (100) silicon layer within the opening and thereafter planarization is performed.

Abstract: Disclosed are a light-emitting diode and a method for manufacturing the same. A light-emitting diode according to one aspect of the present invention includes: a first conductive clad layer; a light-scattering pattern configured, in the first conductive clad layer, having a refractive index different from that of the first conductive clad layer; an active layer located under the first conductive clad layer; a second conductive clad layer located under the active layer; a first electrode configured to be electrically connected to the first conductive clad layer; and a second electrode configured to be electrically connected to the second conductive clad layer. The light-scattering pattern can improve light extraction efficiency.

Abstract: A light-emitting device comprises a first semiconductor layer; and a transparent conductive oxide layer comprising a diffusion region having a first metal material and a non-diffusion region devoid of the first metal material, wherein the non-diffusion region is closer to the first semiconductor layer than the diffusion region.

Abstract: A light-emitting diode (LED) chip is disclosed. The LED chip includes a substrate and a LED stack on the substrate. The LED stack includes a first-type semiconductor layer, an active layer covering a portion and exposing another portion of the first-type semiconductor layer, and a second-type semiconductor layer on the active layer. A current spreading layer is formed on the second-type semiconductor layer. A first electrode is formed on the exposed portion of the first-type semiconductor layer, and a second electrode is formed on the current spreading layer. The current spreading layer includes a first portion having a first thickness and a second portion having a second thickness. A vertical projection of the second portion onto the first-type semiconductor layer surrounds a vertical projection of a portion of the first electrode onto the first-type semiconductor layer. The first thickness is greater than the second thickness.

Abstract: A method of manufacturing a fluoride phosphor includes mixing a first solution which contains at least Mn and F, a second solution which contains at least K and F, and a third solution which contains at least Si and F to form phosphor cores whose composition is represented by a formula K2[M1-aMn4+aF6] wherein a satisfies 0<a<0.2, and M includes at least one selected from group-IV elements of Ti, Zr, and Hf and group IVB elements of Si, Ge, Sn. The phosphor cores and a fourth solution containing a reducing agent are mixed to form a surface region on each of the phosphor cores so that a concentration of tetravalent Mn on the surface region of one of the phosphor cores is lower than in an inner region of the one of the phosphor cores.

Abstract: A method for separating a light-emitting diode (LED) from a substrate comprises the following steps. First, a substrate is provided which includes a junction surface and a bottom surface far away from the junction surface. Then a plurality holes are formed on the junction surface. An LED structure is further grown on the junction surface, and includes a junction portion bonded to the junction surface. The bottom surface is then polished to be shrunk to communicate with the holes. Finally, the junction portion is etched by an etching liquid via the holes to separate the LED structure from the substrate. Accordingly, by forming the holes, the LED structure and the substrate can be separated through polishing and etching processes, thereby providing a high yield rate as well as reduced production costs.

Abstract: A light emitting device includes a p-side heterostructure, an n-side heterostructure, an active region disposed between the p-side heterostructure and the n-side heterostructure. An electron blocking layer (EBL) disposed between the p-side heterostructure and the active region comprises an aluminum containing group-III-nitride alloy. An aluminum composition of the EBL decreases as a function of distance along a [0001] direction from the active region towards the p-side heterostructure over a majority of the thickness of the EBL.

Abstract: To provide a display device which can realize multi-gray scale display by reducing voltage fluctuation of a pixel, a display device includes a plurality of source signal lines, a plurality of gate signal lines which is provided so as to intersect with the source signal lines, and a pixel electrode to which a signal voltage of the source signal line is applied through a transistor including an oxide semiconductor, which is provided near an intersection portion of the source signal line and the gate signal line; in which in the pixel electrode which is provided between a pair of the adjacent source signal lines, edge portions thereof overlap with edge portions of the source signal lines and an overlapped area with one of the source signal lines is substantially equal to an overlapped area with the other source signal line.

Abstract: A flip-chip LED includes a substrate, having a surface with a p-region metal portion and an n-region metal portion separated from each other; a p-type epitaxial layer, an active layer and an n-type epitaxial layer successively laminated on the substrate; a reflection layer between the substrate and the p-type epitaxial layer; a current blocking layer between the reflection layer and the p-type epitaxial layer and positioned to prevent the current from concentrating on the edge of the LED; an insulating protection layer cladding the LED side wall and exposing part of the side wall of the n-type epitaxial layer; a P electrode connecting the metal reflection layer and the p-region metal portion of the substrate; and an N electrode connecting the side wall of the n-type epitaxial layer and n-region metal portion of the substrate.

Abstract: A vertical topology light emitting device comprises a metal support structure; an adhesion structure on the metal support structure, wherein the adhesion structure comprises a first adhesion layer and a second adhesion layer on the first adhesion layer; a metal layer on the adhesion structure, wherein the adhesion structure is thicker than the metal layer; a GaN-based semiconductor structure on the metal layer, wherein the GaN-based semiconductor structure has a thickness less than 5 micrometers; a multi-layered electrode structure on the GaN-based semiconductor structure; and a protective layer on a side surface and a top surface of the GaN-based semiconductor structure, wherein the protective layer is further disposed on the multi-layered electrode structure.

Abstract: A method of ion mobility spectrometry comprising: (i) introducing a packet of ions into a drift space; (ii) passing the ions through the drift space wherein the ions separate according to their ion mobility; and (iii) reflecting or deflecting the ions that have passed through the drift space back into the drift space wherein the ions can further separate according to their ion mobility. The reflecting or deflecting takes place in a region at lower pressure than the drift space. The drift space may be re-used multiple times to extend the separation path length. The regions of low pressure preferably allow inertial ion motion wherein the mean free path between ion collisions with gas is significantly longer than in the stages of ion mobility separation. The low pressure reflecting or deflecting region enables a time of flight focusing of ions to be provided without ion mobility separation occurring therein.

Abstract: The present invention provides a Group III nitride semiconductor light-emitting device in which a flat semiconductor layer is grown on a sapphire substrate provided with an uneven shape, and a method for producing the same. When the area ratio R of the flat surface area S on the main surface to the total area K of the sapphire substrate is 0.1 or more to less than 0.5, in formation of the semiconductor layer on the sapphire substrate having an uneven shape on the main surface thereof, at least two types of gases: a raw material gas containing a Group III element and a raw material gas containing Group V element are supplied so as to satisfy the equation 1,000?Y/(2×R)?1,200. In the equation, Y is the partial pressure ratio of the raw material gas containing Group V element to the raw material gas containing Group III element.

Abstract: Embodiments include apparatuses and methods related to an HFET. In embodiments, one or all of the buffer layer, the back-barrier layer, or the barrier layer may be formed of a digital alloy. In embodiments, the digital alloy may include alternating layers of alloys of aluminum, gallium, and nitrogen. Other embodiments may be disclosed or claimed herein.

Abstract: Provided is an organic light-emitting display apparatus, including a substrate, a first pixel electrode, a second pixel electrode, and a third pixel electrode, disposed on the substrate separated from one another, a red emission layer disposed corresponding to the first pixel electrode, a green emission layer disposed corresponding to the second pixel electrode, and a blue emission layer disposed corresponding to the third pixel electrode, an opposite electrode disposed over the red, green, and blue emission layers facing the first to third pixel electrodes, a first capping layer disposed on the opposite electrode corresponding to the first and second pixel electrodes, and a second capping layer disposed on the first capping layer corresponding to the first and second pixel electrodes and disposed on the opposite electrode to correspond to the third pixel electrode.

Abstract: A light emitting diode includes a substrate, graphene layer, a first semiconductor layer, an active layer, a second semiconductor layer, a first electrode, a second electrode, and a reflection layer. The first semiconductor layer, the active layer, and the second semiconductor layer are stacked on the substrate in sequence. The first electrode is electrically connected with the second semiconductor layer and the second electrode electrically is connected with the second part of the carbon nanotube layer. The graphene layer is located between the active layer and the second semiconductor layer. The reflection layer covers the second semiconductor layer.

Abstract: A light emitting device includes a substrate, a buffer layer, a first conductive layer, an active layer and a third conductive semiconductor layer. The first conductive layer has a prescribed tensile stress, and a second conductive semiconductor layer has a prescribed compressive stress.

Abstract: There are provided with a source part made of a ferromagnetic material magnetized in a first direction, a drain part made of a ferromagnetic material magnetized in the first direction, and separated from and arranged in parallel to the source part, a channel part arranged between the source part and the drain part, and bonded with the source part and the drain part directly or through a tunnel layer, and a circularly polarized light irradiation part that irradiates the channel part with circularly polarized light for controlling a direction of spin of the channel part.

Abstract: A light emitting diode includes a substrate, graphene layer, a first semiconductor layer, an active layer, a second semiconductor layer, a first electrode and a second electrode. The first semiconductor layer is on the epitaxial growth surface of the substrate. The active layer is between the first semiconductor layer and the second semiconductor layer. The first electrode is electrically connected with the second semiconductor layer and the second electrode electrically is connected with the second part of the carbon nanotube layer. The graphene layer is located between the active layer and the first semiconductor layer.

Abstract: A light emitting diode includes: a substrate of front and back main surfaces; a V-shaped groove, which has a reflecting surface, formed over front surface of the conductive substrate; a light-emitting epitaxial layer, the margin of which has its vertical projection between the bottom and the inner margin of the V-shaped groove, formed over the substrate, so that light emitted from the light-emitting epitaxial layer margin is incident to the mirror surface of the V-shaped groove and emits outwards. This structure can effectively improve extraction efficiency of device and control path of light at peripheral region of the light-emitting epitaxial layer.

Abstract: A light-emitting device is disclosed including a light emitting structure comprising a lower layer of the first conductivity type, an active layer, an upper layer of the second conductivity type; a first electrode connected to the lower layer of the first conductivity type; a second electrode connected to the upper layer of the second conductivity type. The light emitting structure is formed using a shell member, which comprises a planar portion and a shell portion. The extent of growth defects such as misfit dislocations is reduced and the extraction of light and heat is improved in the present device. The beam profile of the device may be altered by patterning the light emitting structure instead of shaping the entire chip. The device may be manufactured in a way more compatible with the established, cost-effective processing and packaging methods for large size wafers from the IC industry.

Abstract: A chemical vapor deposition apparatus includes: a reaction chamber including an inner tube having a predetermined volume of an inner space, and an outer tube tightly sealing the inner tube; a wafer holder disposed within the inner tube and on which a plurality of wafers are stacked at predetermined intervals; and a gas supply unit including at least one gas line supplying an external reaction gas to the reaction chamber, and a plurality of spray nozzles communicating with the gas line to spray the reaction gas to the wafers, whereby semiconductor epitaxial thin films are grown on the surfaces of the wafers, wherein the semiconductor epitaxial thin film grown on the surface of the wafer includes a light emitting structure in which a first-conductivity-type semiconductor layer, an active layer, and a second-conductivity-type semiconductor layer are sequentially formed.

Abstract: Solid-state transducer (“SST”) dies and SST arrays having electrical cross-connections are disclosed herein. An array of SST dies in accordance with a particular embodiment can include a first terminal, a second terminal and a plurality of SST dies coupled between the first and second terminals with at least a pair of the SST dies being coupled in parallel. The plurality of SST dies can individually include a plurality of junctions coupled in series with an interconnection between each individual junction. Additionally, the individual SST dies can have a cross-connection contact coupled to the interconnection. In one embodiment, the array can further include a cross-connection between the cross-connection contacts on the pair of the SST dies.

Abstract: A transparent electrode is provided for an organic light emitting diode (OLED) device. The electrode may be made according to a method including: sputter-depositing a first layer of or including indium tin oxide (ITO) on a substrate; sputter-depositing a thin second metallic or substantially metallic layer on the glass substrate over the first layer to form an electrode structure, and heat treating the electrode structure at temperature(s) of at least about 400 degrees C. in order to thermally activate at least the first layer of or including ITO. The electrode structure may then be provided in an OLED device on the light-emitting side of the organic light emitting semiconductor layer.

Abstract: Solid state lighting devices with selected thermal expansion and/or surface characteristics, and associated methods are disclosed. A method in accordance with a particular embodiment includes forming an SSL (solid state lighting) formation structure having a formation structure coefficient of thermal expansion (CTE), selecting a first material of an interlayer structure to have a first material CTE greater than the substrate CTE, and selecting a second material of the interlayer structure based at least in part on the second material having a second material CTE less than the first material CTE. The method can further include forming the interlayer structure over the SSL formation structure by disposing (at least) a first layer of the first material over the SSL formation structure, a portion of the second material over the first material, and a second layer of the first material over the second material.

Abstract: An oxide semiconductor material having p-type conductivity and a semiconductor device using the oxide semiconductor material are provided. The oxide semiconductor material having p-type conductivity can be provided using a molybdenum oxide material containing molybdenum oxide (MoOy (2<y<3)) having an intermediate composition between molybdenum dioxide and molybdenum trioxide. For example, a semiconductor device is formed using a molybdenum oxide material containing molybdenum trioxide (MoO3) as its main component and MoOy (2<y<3) at 4% or more.

Abstract: A semiconductor structure includes a III-nitride substrate with a first side and a second side opposing the first side. The III-nitride substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure also includes a III-nitride epitaxial layer of the first conductivity type coupled to the first surface of the III-nitride substrate, and a first metallic structure electrically coupled to the second surface of the III-nitride substrate. The semiconductor structure further includes an AlGaN epitaxial layer coupled to the III-nitride epitaxial layer of the first conductivity type, and a III-nitride epitaxial structure of a second conductivity type coupled to the AlGaN epitaxial layer. The III-nitride epitaxial structure comprises at least one edge termination structure.

Abstract: The semiconductor device includes a first conductive layer over a substrate; an oxide semiconductor layer which covers the first conductive layer; a second conductive layer in a region which is not overlapped with the first conductive layer over the oxide semiconductor layer; an insulating layer which covers the oxide semiconductor layer and the second conductive layer; and a third conductive layer in a region including at least a region which is not overlapped with the first conductive layer or the second conductive layer over the insulating layer.

Abstract: To improve light extraction efficiency of a deep ultraviolet light-emitting diode (DUVLED), a typical LED element has a single crystal substrate made of sapphire or AlN, The ultraviolet layer is arranged as a film stack having an n-type conductive layer, a recombination layer, and a p-type conductive layer. A stack of a p-type contact layer and a reflective electrode is disposed on the p-type conductive layer. The ultraviolet emission layer and a p-type contact layer are made of mixed crystal of AlN and GaN. The transmittance for the emission wavelength of the p-type contact layer is increased, and the light extraction efficiency is improved. Also an LED element whose p-type contact layer is configured in a layered structure and whose reflective electrode is patterned is provided. Moreover, an electric appliance having such LED elements is provided.

Abstract: Disclosed are a light emitting device, a method of fabricating the light emitting device, a light emitting device package, and a lighting system. The light emitting device includes a first conductive semiconductor layer (130), an AlGaInP-based active layer (140) on the first conductive semiconductor layer (130), a second conductive clad layer (150) on the AlGaInP-based active layer (140), a second conductive GaP layer (162) having first concentration on the second conductive clad layer (150), and a second conductive GaP layer (164) having second concentration higher than the first concentration on the second conductive GaP layer (162) having the first concentration.

Abstract: A high power, wide-bandgap device is disclosed that exhibits reduced junction temperature and higher power density during operation and improved reliability at a rated power density. The device includes a diamond substrate for providing a heat sink with a thermal conductivity greater than silicon carbide, a single crystal silicon carbide layer on the diamond substrate for providing a supporting crystal lattice match for wide-bandgap material structures that is better than the crystal lattice match of diamond, and a Group III nitride heterostructure on the single crystal silicon carbide layer for providing device characteristics.

Abstract: A miniaturized semiconductor device including a transistor in which a channel formation region is formed using an oxide semiconductor film and variation in electric characteristics due to a short-channel effect is suppressed is provided. In addition, a semiconductor device whose on-state current is improved is provided. A semiconductor device is provided with an oxide semiconductor film including a pair of second oxide semiconductor regions which are amorphous regions and a first oxide semiconductor region located between the pair of second oxide semiconductor regions, a gate insulating film, and a gate electrode provided over the first oxide semiconductor region with the gate insulating film interposed therebetween. Hydrogen or a rare gas is added to the second oxide semiconductor regions.

Abstract: In the nitride semiconductor device of the present invention, an active layer 12 is sandwiched between a p-type nitride semiconductor layer 11 and an n-type nitride semiconductor layer 13. The active layer 12 has, at least, a barrier layer 2a having an n-type impurity; a well layer 1a made of a nitride semiconductor that includes In; and a barrier layer 2c that has a p-type impurity, or that has been grown without being doped. An appropriate injection of carriers into the active layer 12 becomes possible by arranging the barrier layer 2c nearest to the p-type layer side.

Abstract: A III-V semiconductor device on a silicon substrate is constructed with a silicon (Si) substrate onto which gallium arsenide (GaAs) indium phosphide (InP) and aluminum indium arsenide (AlInAs) to form a structure of AlInAs over InP over GaAs over Si. The GaAs is applied in at least one layer over the Si, followed by at least one layer of InP and at least one layer of AlInAs. A portion of the structure is doped and a cap or passivation layer is applied.

Abstract: A semiconductor device includes a light emitting semiconductor die mounted on at least one of first and second electrically conductive bonding pads, which are located on a first major surface of a substrate of the device. The light emitting semiconductor die has an anode and a cathode, which are electrically connected to the first and second electrically conductive bonding pads. The semiconductor device further includes first and second electrically conductive connecting pads, which are located on a second major surface of the substrate. The first and second electrically conductive bonding pads are electrically connected to the first and second electrically conductive connecting pads via first and second electrically conductive edge interconnecting elements.

Abstract: A semiconductor device includes a substrate, a buffer layer of GaN containing at least one of Fe and C and disposed on the substrate, a channel layer of GaN disposed on the buffer layer and through which electrons travel, an electron supply layer disposed on the channel layer and producing a two-dimensional electron gas in the channel layer, a gate electrode, a drain electrode, and a source electrode. Recovery time of a drain current of the semiconductor device is no more than 5 seconds, where the recovery time is defined as the period of time after the semiconductor device is stopped from outputting high frequency power until the change in the drain current, after the stopping of the semiconductor device, reaches 95% of the change in the drain current occurring during the first 10 seconds after the stopping of the semiconductor device.

Abstract: Disclosed is an optical element that includes: carrier generation layer (16) in which carriers are generated by light from light guide body (12) into which light from a light-emitting element enters; plasmon excitation layer (17) that has a plasma frequency higher than the frequency of light generated when carrier generation layer (16) is excited by light from the light-emitting element; and wave vector conversion layer (18) that converts surface plasmon generated by plasmon excitation layer (17) light having a predetermined exit angle to output the light. Plasmon excitation layer (17) is sandwiched between two layers having dielectric properties.

Abstract: Semiconductor structures include an active region between a plurality of layers of InGaN. The active region may be at least substantially comprised by InGaN. The plurality of layers of InGaN include at least one well layer comprising InwGa1-wN, and at least one barrier layer comprising InbGa1-bN proximate the at least one well layer. In some embodiments, the value of w in the InwGa1-wN of the well layer may be greater than or equal to about 0.10 and less than or equal to about 0.40 in some embodiments, and the value of b in the InbGa1-bN of the at least one barrier layer may be greater than or equal to about 0.01 and less than or equal to about 0.10. Methods of fainting semiconductor structures include growing such layers of InGaN to form an active region of a light emitting device, such as an LED. Luminary devices include such LEDs.

Abstract: A method of forming a light-emitting diode (LED) device is provided. The method includes steps of providing a first substrate, forming an LED structure on the first substrate, forming a porous layer on the first substrate after forming the LED structure, forming a conductive substrate on the LED structure, and separating the LED structure from the first substrate along the porous layer. The substrate has a doped layer. The forming of the porous layer includes a step of converting the dopes layer to the porous layer.

Abstract: In the present invention, a fabrication process for epitaxy onto back-side patterned substrate, where the substrate patterns were defined prior to epitaxy and therefore simplify post growth processing. Specifically, for LED devices, said fabrication process reduces the post growth processing steps required to obtain high LEE due to strong scattering of the back-side features defined on the substrate. The features defined on the back-side patterned substrate scatters strongly with light emitted from the LED devices. Methods of obtaining such features include wet and dry etching.

Abstract: An integrated circuit includes an optical source that provides an optical signal to an optical waveguide. In particular, the optical source may be implemented by fusion-bonding a III-V semiconductor to a semiconductor layer in the integrated circuit. In conjunction with surrounding mirrors (at least one of which is other than a distributed Bragg reflector), this structure may provide a cavity with suitable optical gain at a wavelength in the optical signal along a vertical direction that is perpendicular to a plane of the semiconductor layer. For example, the optical source may include a vertical-cavity surface-emitting laser (VCSEL). Moreover, the optical waveguide, defined in the semiconductor layer, may be separated from the optical source by a horizontal gap in the plane of the semiconductor layer. During operation of the optical source, the optical signal may be optically coupled across the gap from the optical source to the optical waveguide.

Abstract: A method is provided for bonding a first substrate carrying a semiconductor device layer on its front surface to a second substrate. The method comprises producing the semiconductor device layer on the front surface of the first substrate, depositing a first metal bonding layer or a stack of metal layers on the first substrate, on top of the semiconductor device layer, depositing a second metal bonding layer or a stack of metal layers on the front surface of the second substrate, depositing a metal stress-compensation layer on the back side of the second substrate, thereafter establishing a metal bond between the first and second substrate, by bringing the first and second metal bonding layers or stacks of layers into mutual contact under conditions of mechanical pressure and temperature suitable for obtaining the metal bond, and removing the first substrate.

Abstract: A light emitting diode is provided which can obtain emission at the shorter wavelength side of the emission range of normal 6H-type SiC doped with B and N. A porous layer 124 consisting of single crystal 6H-type SiC of porous state is formed on a SiC substrate 102 of a light emitting diode element 100. Visible light is created from blue color to green color when the porous layer 124 is excited by ultra violet light emitted from the nitride semiconductor layer.

Abstract: A semiconductor device comprises one or more transistors and two or more layers of dielectric material encapsulating a front side of said one or more transistors. The gate of each of said one or more transistors is located within a cavity, or air-box, in at least one of the dielectric layers, so that the gate terminal is physically separated from said dielectric material. Such an arrangement may reduce parasitic capacitance. In another arrangement, a semiconductor device comprises one or more gallium nitride high electron mobility transistors and one or more dielectric layers encapsulating a front side of said one or more transistors, wherein the gate terminal of each of said one or more transistors is located within a cavity in at least one of the one or more dielectric layers, separated from said dielectric material.