In Groove Or With Thinned Semiconductor Portion Patents (Class 257/117)
  • Patent number: 11837606
    Abstract: A display panel and a display device are provided. The display panel includes at least one driving circuit and at least one pixel circuit. A driving circuit provides a driving signal for a pixel circuit. The driving circuit includes N-level shift registers cascaded with each other, where N is greater than or equal to two. A shift register includes at least one first active layer, and an active layer with a largest area is a first preset active layer. The pixel circuit includes at least one second active layer, where an active layer with a largest area among active layers containing silicon is a second preset active layer, and an active layer with a largest area among active layers containing oxide semiconductor is a third preset active layer. The first preset active layer has an area greater than the second preset active layer and the third preset active layer.
    Type: Grant
    Filed: October 15, 2021
    Date of Patent: December 5, 2023
    Assignee: XIAMEN TIANMA MICRO-ELECTRONICS CO., LTD.
    Inventors: Qingjun Lai, Yihua Zhu, Yong Yuan, Ping An, Zhaokeng Cao
  • Patent number: 10692918
    Abstract: Various aspects of the present disclosure provide a semiconductor device, for example comprising a finger print sensor, and a method for manufacturing thereof. Various aspects of the present disclosure may, for example, provide an ultra-slim finger print sensor having a thickness of 500 ?m or less that does not include a separate printed circuit board (PCB), and a method for manufacturing thereof.
    Type: Grant
    Filed: May 28, 2019
    Date of Patent: June 23, 2020
    Assignee: Amkor Technology, Inc.
    Inventors: Jin Young Kim, No Sun Park, Yoon Joo Kim, Seung Jae Lee, Se Woong Cha, Sung Kyu Kim, Ju Hoon Yoon
  • Patent number: 10304890
    Abstract: Various aspects of the present disclosure provide a semiconductor device, for example comprising a finger print sensor, and a method for manufacturing thereof. Various aspects of the present disclosure may, for example, provide an ultra-slim finger print sensor having a thickness of 500 ?m or less that does not include a separate printed circuit board (PCB), and a method for manufacturing thereof.
    Type: Grant
    Filed: November 28, 2017
    Date of Patent: May 28, 2019
    Assignee: Amkor Technology, Inc.
    Inventors: Jin Young Kim, No Sun Park, Yoon Joo Kim, Seung Jae Lee, Se Woong Cha, Sung Kyu Kim, Ju Hoon Yoon
  • Patent number: 9831282
    Abstract: Various aspects of the present disclosure provide a semiconductor device, for example comprising a finger print sensor, and a method for manufacturing thereof. Various aspects of the present disclosure may, for example, provide an ultra-slim finger print sensor having a thickness of 500 ?m or less that does not include a separate printed circuit board (PCB), and a method for manufacturing thereof.
    Type: Grant
    Filed: August 26, 2016
    Date of Patent: November 28, 2017
    Assignee: AMKOR TECHNOLOGY, INC.
    Inventors: Jin Young Kim, No Sun Park, Yoon Joo Kim, Seung Jae Lee, Se Woong Cha, Sung Kyu Kim, Ju Hoon Yoon
  • Patent number: 9431447
    Abstract: Various aspects of the present disclosure provide a semiconductor device, for example comprising a finger print sensor, and a method for manufacturing thereof. Various aspects of the present disclosure may, for example, provide an ultra-slim finger print sensor having a thickness of 500 ?m or less that does not include a separate printed circuit board (PCB), and a method for manufacturing thereof.
    Type: Grant
    Filed: August 4, 2015
    Date of Patent: August 30, 2016
    Assignee: AMKOR TECHNOLOGY, INC.
    Inventors: Jin Young Kim, No Sun Park, Yoon Joo Kim, Seung Jae Lee, Se Woong Cha, Sung Kyu Kim, Ju Hoon Yoon
  • Publication number: 20150091048
    Abstract: A device includes a semiconductor substrate having a plurality of doped layers forming first and second junctions. The semiconductor substrate includes a first surface and a second surface opposite the first surface. The device includes a plurality of waveguides defined by a plurality of glass inlaid channels defined within the first surface. Each of the plurality of glass inlaid channels extends through the second junction. The device includes a pattern of reflective elements associated with sidewalls of the plurality of glass inlaid channels to reflect light into the plurality of waveguides. A first electrically-conductive layer is disposed on the first surface and covers the plurality of glass inlaid channels.
    Type: Application
    Filed: September 29, 2014
    Publication date: April 2, 2015
    Inventors: LELAND J. SPANGLER, KENSALL D. WISE
  • Patent number: 8785967
    Abstract: Disclosed is a crystallization apparatus capable of locally crystallizing amorphous silicon. The crystallization apparatus includes a heat emission part, a support part and a roller. The heat emission part emits heat upon receiving a heat emission source. The support part supports the heat emission part and provides the heat emission source to the heat emission part. The roller receives the heat emission part and has at least one opening to provide heat to a target (e.g., amorphous silicon). Local crystallization is performed without causing damage to a substrate.
    Type: Grant
    Filed: October 7, 2009
    Date of Patent: July 22, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Tae-Hyung Hwang, Hyun-Jae Kim, Doh-Kyung Kim, Tae-Hun Jung, Woong-Hee Jeong, Choong-Hee Lee
  • Patent number: 8669166
    Abstract: One illustrative method disclosed herein includes forming a plurality of die above a crystalline semiconducting substrate, irradiating and cooling an edge region of the substrate to form an amorphous region in the edge region of the substrate and, after forming the amorphous region, performing at least one process operation to reduce the thickness of the substrate.
    Type: Grant
    Filed: August 15, 2012
    Date of Patent: March 11, 2014
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Rahul Agarwal, Ramakanth Alapati, Jon Greenwood
  • Patent number: 8664687
    Abstract: Provided are a nitride semiconductor light-emitting device comprising a polycrystalline or amorphous substrate made of AlN; a plurality of dielectric patterns formed on the AlN substrate and having a stripe or lattice structure; a lateral epitaxially overgrown-nitride semiconductor layer formed on the AlN substrate having the dielectric patterns by Lateral Epitaxial Overgrowth; a first conductive nitride semiconductor layer formed on the nitride semiconductor layer; an active layer formed on the first conductive nitride semiconductor layer; and a second conductive nitride semiconductor layer formed on the active layer; and a process for producing the same.
    Type: Grant
    Filed: July 26, 2004
    Date of Patent: March 4, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong Hyun Cho, Masayoshi Koike, Yuiji Imai, Min Ho Kim, Bang Won Oh, Hun Joo Hahm
  • Patent number: 8624268
    Abstract: A light emitting device package is provided. The light emitting device package comprises a substrate comprising a plurality of protrusions, an insulating layer on the substrate, a metal layer on the insulating layer, and a light emitting device on the substrate electrically connected to the metal layer.
    Type: Grant
    Filed: July 23, 2008
    Date of Patent: January 7, 2014
    Assignee: LG Innotek Co., Ltd.
    Inventors: Bum Chul Cho, Jin Soo Park
  • Patent number: 8493524
    Abstract: An array substrate and a display apparatus including the array substrate are provided. The array substrate includes a substrate divided into a display area and a peripheral area adjacent to the display area. A pixel array is formed on the substrate corresponding to the display area and receives a driving signal. A driving circuit includes a plurality of stages and is formed on the substrate corresponding to the peripheral area. Each of the stages includes a first transistor having a source electrode connected to an output terminal to output the driving signal, a channel layer formed between a gate insulating layer and the source electrode, the channel layer having an opening to facilitate contact between a portion of the gate insulating layer and the source electrode, and a capacitor defined by a gate electrode of the first transistor, the source electrode, and the gate insulating layer contacting the source electrode.
    Type: Grant
    Filed: December 1, 2005
    Date of Patent: July 23, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yong-Koo Her, Jin Jeon, Yong-Han Park, Sang-Hoon Lee, Ji-Suk Lim
  • Patent number: 8410508
    Abstract: A light emitting diode (LED) package includes a substrate and a light emitting diode (LED) die on the substrate configured to emit electromagnetic radiation in a first spectral region. The (LED) package also includes a dielectric layer on the (LED) die and a wavelength conversion member on the dielectric layer configured to convert the electromagnetic radiation in the first spectral region to electromagnetic radiation in a second spectral region. The (LED) package also includes an interconnect comprising a conductive trace on the wavelength conversion member and on the dielectric layer in electrical contact with a die contact on the (LED) die and with a conductor on the substrate, and a transparent dome configured as a lens encapsulating the (LED) die.
    Type: Grant
    Filed: September 12, 2011
    Date of Patent: April 2, 2013
    Assignee: SemiLEDS Optoelectronics Co., Ltd.
    Inventors: Jui- Kang Yen, Trung Tri Doan
  • Patent number: 8299486
    Abstract: A semiconductor light emitting device including a substrate, an electrode and a light emitting region is provided. The substrate may have protruding portions formed in a repeating pattern on substantially an entire surface of the substrate while the rest of the surface may be substantially flat. The cross sections of the protruding portions taken along planes orthogonal to the surface of the substrate may be semi-circular in shape. The cross sections of the protruding portions may in alternative be convex in shape. A buffer layer and a GaN layer may be formed on the substrate.
    Type: Grant
    Filed: June 30, 2010
    Date of Patent: October 30, 2012
    Assignee: Nichia Corporation
    Inventors: Isamu Niki, Motokazu Yamada, Masahiko Sano, Shuji Shioji
  • Patent number: 8148744
    Abstract: A semiconductor light emitting device including a substrate, an electrode and a light emitting region is provided. The substrate may have protruding portions formed in a repeating pattern on substantially an entire surface of the substrate while the rest of the surface may be substantially flat. The cross sections of the protruding portions taken along planes orthogonal to the surface of the substrate may be semi-circular in shape. The cross sections of the protruding portions may in alternative be convex in shape. A buffer layer and a GaN layer may be formed on the substrate.
    Type: Grant
    Filed: June 30, 2010
    Date of Patent: April 3, 2012
    Assignee: Nichia Corporation
    Inventors: Isamu Niki, Motokazu Yamada, Masahiko Sano, Shuji Shioji
  • Patent number: 8145020
    Abstract: A semiconductor device includes a direct light-triggered thyristor triggered by an optical gate signal, a first optical fiber connected to the direct light-triggered thyristor and through which the optical gate signal is transmitted, a second optical fiber used to extend the first optical fiber, and a inter-optical-fiber relaying unit configured to connect the first optical fiber to the second optical fiber and to input the optical gate signal output from the second optical fiber to the first optical fiber.
    Type: Grant
    Filed: October 22, 2009
    Date of Patent: March 27, 2012
    Assignee: Toshiba Mitsubishi—Electric Industrial Systems Corporation
    Inventor: Takafumi Fujimoto
  • Patent number: 8129739
    Abstract: In a semiconductor light emitting device having a matrix of a plurality of bumps composed of one n-bump formed on an n-electrode layer and of a large number of p-bumps formed on p-electrode layers, the occurrence of a faulty junction after mounting can be suppressed by placement of the n-bump at center of the bump array, because the position at the center is most resistant to occurrence of stress after the mounting. Employment of such a configuration of bump array increases reliability of mounting thereof while improving uniformity of light emission intensity in the semiconductor light emitting device having an increased size.
    Type: Grant
    Filed: July 12, 2006
    Date of Patent: March 6, 2012
    Assignee: Panasonic Corporation
    Inventors: Kazushi Higashi, Shinji Ishitani
  • Patent number: 7982240
    Abstract: A main semiconductor region grown on a substrate has formed on its surface a pair of main electrodes spaced from each other, a gate electrode between the main electrodes, and a pair of diode-forming electrodes spaced farther away from the gate electrode than are the main electrodes. Making ohmic contact with the main semiconductor region, the pair of main electrodes serve both as drain or source of a HEMT switch and as cathodes of a pair of Schottky diodes integrated with the HEMT switch. Both gate electrode and diode-forming electrodes are in Schottky contact with the main semiconductor region.
    Type: Grant
    Filed: December 16, 2008
    Date of Patent: July 19, 2011
    Assignee: Sanken Electric Co., Ltd.
    Inventor: Osamu Machida
  • Patent number: 7922399
    Abstract: In a semiconductor apparatus, a plurality of light-triggered type semiconductor devices, each having a groove for burying of an optical fiber for supplying an optical gate signal to a housing of the light-triggered type semiconductor device, are connected in series. Device cooling heat sinks, each having a flow path for circulating a coolant medium and a coolant inlet and a coolant outlet communicating with the flow path, are disposed on both sides of the housing of each light-triggered type semiconductor device. The light-triggered type semiconductor devices and the device cooling heat sinks are coupled into a single structure. An optical fiber insertion groove, which corresponds in position to the groove of the housing, is provided on a side surface of the device cooling heat sink, which contacts a groove (4)-side surface of the housing of the light-triggered type semiconductor device.
    Type: Grant
    Filed: September 22, 2005
    Date of Patent: April 12, 2011
    Assignee: Toshiba Mitsubishi-Electric Industrial Systems Corporation
    Inventor: Takafumi Fujimoto
  • Patent number: 7911015
    Abstract: An infrared detector includes a first PN junction diode and a second PN junction diode which are formed in a silicon layer formed apart from a support substrate, the silicon layer having a P-type first region and an N-type second region, wherein the first PN junction diode is composed of the P-type first region and an N-type first region formed in the P-type first region at a position separated from the N-type second region, and the second PN junction diode is composed of the N-type second region and a P-type second region formed in the N-type second region at a position separated from the P-type first region, and wherein the first PN junction diode and the second PN junction diode are connected by a metal film formed on a surface of a concave portion spreading both of the P-type first region and the N-type second region.
    Type: Grant
    Filed: April 3, 2009
    Date of Patent: March 22, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventor: Takaki Sugino
  • Patent number: 7859071
    Abstract: A sensing system tethered to an optical fiber for delivering optical power. A sensing system has a semiconductor device that includes photodiodes and a laser. The optical signal delivered through the optical fiber generates a current in the photodiodes that can be used to at least recharge the sensing system's power supply or bias the laser. The optical signal can be modulated to deliver data to the sensing system. The laser can be modulated to transmit data from the sensing system over the optical fiber. Because the power source can be recharged, the sensing system can also transmit and receive using an RF module.
    Type: Grant
    Filed: March 30, 2006
    Date of Patent: December 28, 2010
    Assignee: Finisar Corporation
    Inventor: Frank Levinson
  • Patent number: 7804101
    Abstract: A semiconductor light emitting device including a substrate, an electrode and a light emitting region is provided. The substrate may have protruding portions formed in a repeating pattern on substantially an entire surface of the substrate while the rest of the surface may be substantially flat. The cross sections of the protruding portions taken along planes orthogonal to the surface of the substrate may be semi-circular in shape. The cross sections of the protruding portions may in alternative be convex in shape. A buffer layer and a GaN layer may be formed on the substrate.
    Type: Grant
    Filed: July 23, 2004
    Date of Patent: September 28, 2010
    Assignee: Nichia Corporation
    Inventors: Isamu Niki, Motokazu Yamada, Masahiko Sano, Shuji Shioji
  • Patent number: 7786491
    Abstract: A semiconductor light-emitting device includes: a substrate; a plurality of semiconductor layers grown on the substrate and including an active layer; and an electrode formed on the semiconductor layers. An opening in which at least a portion of the semiconductor layers is exposed is formed in the substrate. The electrode faces the opening in the substrate and a portion of the substrate surrounding the opening.
    Type: Grant
    Filed: February 2, 2007
    Date of Patent: August 31, 2010
    Assignee: Panasonic Corporation
    Inventors: Tetsuzo Ueda, Kenji Orita
  • Patent number: 7728399
    Abstract: Apparatuses and methods directed to an integrated circuit package having an optical component are disclosed. The package may include an integrated circuit die having at least one light sensitive region disposed on a first surface thereof. By way of example, the die may be a laser diode that emits light through the light sensitive region, or a photodetector that receives and detects light through the light sensitive region. An optical concentrator may be positioned adjacent the first surface of the first die. The optical concentrator includes a lens portion positioned adjacent the light sensitive region and adapted to focus light.
    Type: Grant
    Filed: July 22, 2008
    Date of Patent: June 1, 2010
    Assignees: National Semiconductor Corporation, The Regents of the University of California
    Inventors: Randall L. Walberg, Luu T. Nguyen, Robert Dahlgren, James B. Wieser, Kenneth Pedrotti, Jacob A. Wysocki
  • Patent number: 7693360
    Abstract: On the back surface of a transparent plate having a light extracting part for outputting lights to the outside, an electrode for wiring, and an electrode for an electromagnetic shield, an optical device is flip-chip mounted right under the light extracting part, an a driver IC is flip-chip mounted at a desired position with metal bumps. When currents driving the optical device flow from the driver IC according to an electric logical signal from the outside, an optical signal is emitted from the optical device, and is output to the outside through the light extracting part. The light extracting part may be provided with a light coupling material or an optical axis converter.
    Type: Grant
    Filed: April 18, 2003
    Date of Patent: April 6, 2010
    Assignee: NEC Corporation
    Inventors: Takanori Shimizu, Takara Sugimoto, Jun-ichi Sasaki, Kazuhiko Kurata
  • Patent number: 7615391
    Abstract: A method of fabricating a solar cell forms a large number of grooves on a first main surface of a p-type silicon single crystal substrate sliced out from a silicon single crystal ingot as described below. First an edge portion of a groove-carving blade is projected out from a flat substrate feeding surface of a working table by a predetermined height. The p-type silicon single crystal substrate is moved along the substrate feeding surface towards the rotating groove-carving blade while keeping a close contact of the first main surface thereof with the substrate feeding surface. Electrodes are then formed on the inner side face of thus-carved grooves only on one side in the width-wise direction thereof.
    Type: Grant
    Filed: March 27, 2007
    Date of Patent: November 10, 2009
    Assignee: Shin-Etsu Chemical Co., Ltd.
    Inventors: Satoyuki Ojima, Hiroyuki Ohtsuka, Masatoshi Takahashi, Takenori Watabe
  • Patent number: 7616356
    Abstract: An image sensor and a method of manufacturing the image sensor, wherein the image sensor can electrically connect a light receiving portion and a printed circuit board (PCB) including circuits by forming holes and filling the holes with a conductive material, without using a wire for the electrical connection between the light receiving portion and the PCB. The light receiving portion converts lights into electrical signals and the PCB electrically processes signals. That is, since a distance for a wire between a sealing structure and because a filter is unnecessary, a thickness may be reduced. Also, since a space for wire bonding is unnecessary on the outside of an image sensor, a fill factor may increase. Also, since a process that may cause contaminates is removed, average yield may increase and production cost may decrease. The manufacturing productivity may be improved.
    Type: Grant
    Filed: March 8, 2006
    Date of Patent: November 10, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyu Dong Jung, Min Seog Choi, Seung Wan Lee, Woon Bae Kim
  • Patent number: 7608867
    Abstract: A vertical IMOS-type transistor including: a stack of a first semiconductor portion doped with dopant elements of a first type, of a second substantially undoped intrinsic semiconductor portion, and of a third semiconductor portion doped with dopant elements of a second type forming a PIN-type diode; and a conductive gate placed against the stack with an interposed insulating layer.
    Type: Grant
    Filed: March 30, 2006
    Date of Patent: October 27, 2009
    Assignee: STMicroelectronics Crolles 2 SAS
    Inventors: Clément Charbuillet, Thomas Skotnicki, Alexandre Villaret
  • Patent number: 7605440
    Abstract: A pixel having a well-isolated charge storage region or floating diffusion region may be obtained by providing a separate P-well around the storage region or floating diffusion region. In one embodiment, a separate P-well entirely encases the storage region and is in contact with the storage region. This P-well provides an electrical barrier for preventing electrons that are generated elsewhere in the pixel from contaminating the storage region. In another embodiment, a first separate P-well encases and is in contact with the storage region and a second separate P-well encases and is in contact with the floating diffusion region.
    Type: Grant
    Filed: April 7, 2006
    Date of Patent: October 20, 2009
    Assignee: Aptina Imaging Corporation
    Inventor: Parker Altice
  • Patent number: 7592654
    Abstract: CMOS image sensor having high sensitivity and low crosstalk, particularly at far-red to infrared wavelengths, and a method for fabricating a CMOS image sensor. A CMOS image sensor has a substrate, an epitaxial layer above the substrate, and a plurality of pixels extending into the epitaxial layer for receiving light. The image sensor also includes at least one of a horizontal barrier layer between the substrate and the epitaxial layer for preventing carriers generated in the substrate from moving to the epitaxial layer, and a plurality of lateral barrier layers between adjacent ones of the plurality of pixels for preventing lateral diffusion of electrons in the epitaxial layer.
    Type: Grant
    Filed: November 15, 2007
    Date of Patent: September 22, 2009
    Assignee: Aptina Imaging Corporation
    Inventors: Sandeep R. Bahl, Fredrick P. LaMaster, David W. Bigelow
  • Patent number: 7582917
    Abstract: A monolithically integrated light-activated thyristor in an n-p-n-p-n-p sequence consists of a four-layered thyristor structure and an embedded back-biased PN junction structure as a turn-off switching diode. The turn-off switching diode is formed through structured doping processes and/or depositions on a single semiconductor wafer so that it is integrated monolithically without any external device or semiconductor materials. The thyristor can be switching on and off optically by two discrete light beams illuminated on separated openings of electrodes on the top surface of a semiconductor body. The carrier injection of the turning on process is achieved by illuminating the bulk of the thyristor with a high level light through the first aperture over the cathode to create high density charge carriers serving as the gate current injection and to electrically short the emitter and drift layer.
    Type: Grant
    Filed: March 10, 2006
    Date of Patent: September 1, 2009
    Assignee: BAE Systems Information and Electronic Systems Integration Inc.
    Inventor: Yeuan-Ming Sheu
  • Patent number: 7528420
    Abstract: Image sensing devices and methods for fabricating the same are provided. An exemplary image sensing device includes a first substrate having a first side and a second side opposing each other. A plurality of image sensing elements is formed in the first substrate at the first side. A conductive via is formed through the first substrate, having a first surface exposed by the first substrate at the first side and a second surface exposed by the first substrate at the second side. A conductive pad overlies the conductive via at the first side and is electrically connecting the image sensing elements. A conductive layer overlies the conductive via at the second side and electrically connects with the conductive pad. A conductive bump is formed over a portion of the conductive layer. A second substrate is bonded with the first substrate at the first side.
    Type: Grant
    Filed: May 23, 2007
    Date of Patent: May 5, 2009
    Assignee: Visera Technologies Company Limited
    Inventors: Jui-Peng Weng, Tzu-Han Lin, Pai-Chun Peter Zung
  • Patent number: 7525131
    Abstract: Disclosed is a photoelectric surface including: a first group III nitride semiconductor layer that produces photoelectrons according to incidence of ultraviolet rays; and a second group III nitride semiconductor layer provided adjacent to the first group III nitride semiconductor layer and made of a thin-film crystal having c-axis orientation in a thickness direction, the second group III nitride semiconductor layer having an Al composition higher than that of the first group III nitride semiconductor layer.
    Type: Grant
    Filed: August 29, 2006
    Date of Patent: April 28, 2009
    Assignees: National University Corporation Shizuoka University, Hamamatsu Photonics K.K.
    Inventors: Masatomo Sumiya, Shunro Fuke, Tokuaki Nihashi, Minoru Hagino
  • Patent number: 7518158
    Abstract: A submount for a semiconductor light emitting device includes a semiconductor substrate having a cavity therein configured to receive the light emitting device. A first bond pad is positioned in the cavity to couple to a first node of a light emitting device received in the cavity. A second bond pad is positioned in the cavity to couple to a second node of a light emitting device positioned therein. Light emitting devices including a solid wavelength conversion member and methods for forming the same are also provided.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: April 14, 2009
    Assignee: Cree, Inc.
    Inventors: Bernd Keller, James Ibbetson, Peter Andrews, Gerald H. Negley, Norbert Hiller
  • Patent number: 7494909
    Abstract: Provided are a chip, a chip stack, and a method of manufacturing the same. A plurality of chips which each include: at least one pad formed on a wafer; and a metal layer which protrudes up to a predetermined thickness from the bottom of the wafer and is formed in a via hole exposing the bottom of the pad are stacked such that the pad and the metal layer of adjacent chips are bonded. This leads to a simplified manufacturing process, high chip performance and a small footprint for a chip stack.
    Type: Grant
    Filed: August 3, 2006
    Date of Patent: February 24, 2009
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Chull Won Ju, Byoung Gue Min, Seong Il Kim, Jong Min Lee, Kyung Ho Lee, Young Il Kang
  • Patent number: 7492988
    Abstract: Planar AWG circuits and systems are disclosed that use air trench bends to increase planar circuit compactness.
    Type: Grant
    Filed: December 4, 2007
    Date of Patent: February 17, 2009
    Inventors: Gregory P. Nordin, Yongbin Lin, Seunghyun Kim
  • Patent number: 7423284
    Abstract: A light-emitting device includes a GaN substrate; a n-type AlxGa1-xN layer on a first main surface side of the GaN substrate; a p-type AlxGa1-xN layer positioned further away from the GaN substrate compared to the n-type AlxGa1-xN layer; a multi-quantum well (MQW) positioned between the n-type AlxGa1-xN layer and the p-type AlxGa1-xN layer. In this light-emitting device, the p-type AlxGa1-xN layer side is down-mounted and light is emitted from the second main surface, which is the main surface of the GaN substrate opposite from the first main surface. hemispherical projections are formed on the second main surface of the GaN substrate.
    Type: Grant
    Filed: February 24, 2006
    Date of Patent: September 9, 2008
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Youichi Nagai, Koji Katayama, Hiroyuki Kitabayashi
  • Patent number: 7400004
    Abstract: Regions of an integrated circuit are isolated by a structure that includes at least one isolating trench on the periphery of an active area. The trench is deep, extending at least about 0.5 ?m into the substrate. The isolating structure prevents photons and electrons originating in peripheral circuitry from reaching the active area. Where the substrate has a heavily-doped lower layer and an upper layer on it, the trench can extend through the upper layer to the lower layer. A thermal oxide can be grown on the trench walls. A liner can also be deposited on the sidewalls of each trench. A fill material having a high-extinction coefficient is then deposited over the liner. The liner can also be light absorbent so that both the liner and fill material block photons.
    Type: Grant
    Filed: May 10, 2006
    Date of Patent: July 15, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Bryan G. Cole, Troy Sorensen
  • Patent number: 7397066
    Abstract: Microelectronic imagers with curved image sensors and methods for manufacturing curved image sensors. In one embodiment, a microelectronic imager device includes an imager die having a substrate, a curved microelectronic image sensor having a face with a convex and/or concave portion at one side of the substrate, and integrated circuitry in the substrate operatively coupled to the image sensor. The imager die can further include external contacts electrically coupled to the integrated circuitry and a cover over the curved image sensor.
    Type: Grant
    Filed: August 19, 2004
    Date of Patent: July 8, 2008
    Assignee: Micron Technology, Inc.
    Inventor: Steven D. Oliver
  • Patent number: 7329942
    Abstract: An array-type modularized light-emitting diode structure and a method for packaging the structure. The array-type modularized light-emitting diode structure includes a lower substrate and an upper substrate fixed on the lower substrate. A material with high heat conductivity is selected as the material of the upper substrate. The upper substrate is formed with multiple arrayed dents and through holes on the bottom of each dent. A material with high heat conductivity is selected as the material of the lower substrate. The surface of the lower substrate is formed with a predetermined circuit layout card. The bottom face of the upper substrate is placed on the upper face of the lower substrate with the through holes of the dents respectively corresponding to the contact electrodes of the circuit layout card of the lower substrate. Multiple light-emitting diode crystallites are respectively fixed on the bottoms of the dents.
    Type: Grant
    Filed: May 18, 2005
    Date of Patent: February 12, 2008
    Inventors: Ching-Fu Tsou, I-Ju Chen, Yeh-Chin Chao
  • Patent number: 7214971
    Abstract: A semiconductor light-receiving device has a substrate including upper, middle and lower regions in its front side. A p-type layer on the lower region has a top surface including a portion on a level with the middle region. An electrode covers at least part of the boundary between the portion of the p-type layer and the middle region. An n-type layer on the p-type layer has a top surface including a portion on a level with the upper region. Another electrode covers at least part of the boundary between the portion of the n-type layer and the upper region.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: May 8, 2007
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Minoru Niigaki, Kazutoshi Nakajima
  • Patent number: 7154136
    Abstract: Regions of an integrated circuit are isolated by a structure that includes at least one isolating trench on the periphery of an active area. The trench is deep, extending at least about 0.5 ?m into the substrate. The isolating structure prevents photons and electrons originating in peripheral circuitry from reaching the active area. Where the substrate has a heavily-doped lower layer and an upper layer on it, the trench can extend through the upper layer to the lower layer. A thermal oxide can be grown on the trench walls. A liner can also be deposited on the sidewalls of each trench. A fill material having a high-extinction coefficient is then deposited over the liner. The liner can also be light absorbent so that both the liner and fill material block photons.
    Type: Grant
    Filed: February 20, 2004
    Date of Patent: December 26, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Bryan G. Cole, Troy Sorensen
  • Patent number: 7102185
    Abstract: An interline transfer type image sensing device that can be operated at high speed and with low image smear is described. The device incorporates a refractory metal layer which is used for both a light shield over the vertical charge transfer region and as a wiring layer for low resistance strapping of poly crystalline silicon (polysilicon) gate electrodes for the vertical charge transfer region. Plugs provided by a separate metallization layer connect the refractory light shield to the polysilicon gate electrode. These plugs allow high temperature processing after refractory light shield patterning for improved sensor performance without degradation of the polysilicon gate electrode or the refractory lightshield layer.
    Type: Grant
    Filed: June 21, 2004
    Date of Patent: September 5, 2006
    Assignee: Eastman Kodak Company
    Inventors: David N. Nichols, David L. Losee, Christopher Parks
  • Patent number: 7057214
    Abstract: Semiconductor switches, such as thyristors, may be light activated by introducing the light into the switch via a groove having a sloped surface to receive the triggering light. The use of a sloped surface increases the surface path length between points of different electrical potential in the groove and, therefore, reduces the likelihood of electrical breakdown on the groove wall. In one particular embodiment, a light-activated thyristor includes a semiconductor anode layer, an n-base layer, a p-base layer and a semiconductor cathode layer disposed parallel to a thyristor plane. A thyristor axis lies perpendicular to the thyristor plane. A groove having a light refracting side wall extends into the thyristor from the anode layer. A portion of the light refracting side wall is disposed non-parallel to the thyristor plane and to the thyristor axis, and extends in the n-drift layer.
    Type: Grant
    Filed: July 1, 2003
    Date of Patent: June 6, 2006
    Assignee: Optiswitch Technology Corporation
    Inventors: David M. Giorgi, Tajchai Navapanich
  • Patent number: 7002187
    Abstract: An integrated Schottky diode and method of manufacture of such a diode is disclosed. In a first aspect, a Schottky diode comprises a semiconductor substrate. The semiconductor substrate includes an epitaxial layer (EPI) on the substrate region. The diode includes a plurality of guard rings in the EPI layer and a plurality of oxidized slots. Finally, the diode includes metal within the plurality of slots to form a Buried Power Buss. A portion of the metal is completely oxide isolated from the other elements of the diode. In a second aspect, a method for manufacturing a Schottky diode comprises providing a substrate region, A buried N+ region providing an epitaxial (EPI) layer. The method also includes providing a plurality of guard rings in the EPI layer and providing a plurality of slots in the semiconductor substrate that is in contact with the EPI layer and the substrate region.
    Type: Grant
    Filed: June 9, 2003
    Date of Patent: February 21, 2006
    Assignee: Micrel, Inc.
    Inventor: John Durbin Husher
  • Patent number: 6982432
    Abstract: A touch type liquid-crystal display device has a liquid-crystal display panel having flexibility, a touch panel provided to adhere closely to a back side, opposite to a visual side, of the liquid-crystal display panel, and electrodes disposed to be opposite to each other through a gap. The electrodes are capable of coming into partial contact with each other by a pressing force to thereby detect an input position.
    Type: Grant
    Filed: April 17, 2001
    Date of Patent: January 3, 2006
    Assignee: Nitto Denko Corporation
    Inventors: Seiji Umemoto, Tomonori Noguchi, Tadayuki Kameyama, Kiichi Shimodaira, Hideo Sugawara, Hidehiko Andou
  • Patent number: 6972477
    Abstract: To make thin a circuit device 10 in which are incorporated a plurality of types of circuit elements 12 that differ in thickness, first conductive patterns, onto which comparatively thin circuit elements 12A are mounted, are formed thickly, and second conductive patterns 11B, onto which comparatively thick second circuit elements 12B are mounted, are formed thinly. Also, fine wiring parts may be formed using the thinly formed second conductive patterns 12B. Thus even in the case where thick circuit elements are incorporated, by affixing such circuit elements onto the thinly formed second conductive patterns 11B, the total thickness can be made thin. Thinning of circuit device 10 as a whole can thus be accomplished.
    Type: Grant
    Filed: December 11, 2003
    Date of Patent: December 6, 2005
    Assignees: Sanyo Electric Co., Ltd., Kanto Sanyo Semiconductors Co., Ltd.
    Inventors: Yusuke Igarashi, Nobuhisa Takakusaki, Jun Sakano, Noriaki Sakamoto
  • Patent number: 6965130
    Abstract: A semiconductor device including a semiconductive body having formed therein an active region and a termination feature which includes spaced field rings disposed around the active region and diffusion rings of the same conductivity type as, but different conductivity than the semiconductive body formed between each pair of field rings.
    Type: Grant
    Filed: June 5, 2003
    Date of Patent: November 15, 2005
    Assignee: International Rectifier Corporation
    Inventor: Milton J. Boden
  • Patent number: 6913955
    Abstract: A thyristor-based semiconductor device has a control port formed in a trench having a height-to-width aspect ratio that can be prohibitive to filling a bottom portion of the trench with an insulative material. According to an example embodiment of the present invention, a trench is formed in the substrate adjacent to a thyristor region, and a control port is formed near a bottom of the trench. An upper portion of the trench is then filled, thereby covering the control port. The control port is adapted to reduce the aspect ratio of a remaining portion of the trench over the control port, making it possible to fill trenches having a high height-to-width aspect ratio (e.g., at least 2:1). The thyristor control port is capacitively coupled to the thyristor region via a dielectric on a sidewall of the trench, and is configured and arranged to control current in the thyristor body via the capacitive coupling.
    Type: Grant
    Filed: October 1, 2002
    Date of Patent: July 5, 2005
    Assignee: T-RAM, Inc.
    Inventors: Andrew Horch, Scott Robins
  • Patent number: 6876034
    Abstract: A semiconductor device having grooves uniformly filled with semiconductor fillers is provided. Both ends of each of narrow active grooves are connected to an inner circumferential groove surrounding the active grooves. The growth speed of semiconductor fillers on both ends of the active grooves becomes equal to that at their central portions. As a result, a semiconductor device having the active grooves filled with the semiconductor fillers at a uniform height is obtained.
    Type: Grant
    Filed: June 27, 2003
    Date of Patent: April 5, 2005
    Assignee: Shindengen Electric Manufacturing Co., Ltd.
    Inventors: Toru Kurosaki, Hiroaki Shishido, Mizue Kitada, Shinji Kunori, Kosuke Ohshima
  • Patent number: 6828606
    Abstract: Substrates with embedded free space light guiding channels for optical interconnects, and methods for making such substrates are shown. The method comprising steps of a groove in a first generally planar body, and combining the first body with a second generally planar body to form the substrate, and providing input and output ports to enable light to travel into and out of the groove. The first and second bodies may be made of silicon, polymers or combinations of the two. Additional generally planar bodies may be incorporated to provide for complex, 3D optical signal routing within the substrate.
    Type: Grant
    Filed: April 15, 2003
    Date of Patent: December 7, 2004
    Assignee: Fujitsu Limited
    Inventor: Alexei Glebov