Abstract: An electrical binding structure is provided, which includes a substrate, a contact pad set, and a combination of a micro device and an electrode. The contact pad set is on the substrate in which the contact pad set includes at least one contact pad, and the at least one contact pad is conductive. The combination is on the contact pad set. Opposite sides of the electrode are respectively in contact with the micro device and the contact pad set in which at least the contact pad set and the electrode define at least one volume space. A vertical projection of the at least one volume space on the substrate is overlapped with a vertical projection of one of the contact pad set and the electrode on the substrate, and is enclosed by a vertical projection of an outer periphery of the micro device on the substrate.

Abstract: Provided herein are electronic devices including arrays of printable light emitting diodes (LEDs) having device geometries and dimensions providing enhanced thermal management and control relative to conventional LED-based lighting systems. The systems and methods described provide large area, transparent, and/or flexible LED arrays useful for a range of applications in microelectronics, including display and lightning technology. Methods are also provided for assembling and using electronic devices including thermally managed arrays of printable light emitting diodes (LEDs).

Abstract: An electronic device may include a temperature sensing semiconductor substrate, that may include a thermal sensor at an upper surface thereof, and a cooling semiconductor substrate having an upper surface coupled to a lower surface of the temperature sensing semiconductor substrate. The cooling semiconductor substrate may include a Peltier cooler. At least one of the temperature sensing semiconductor substrate and the cooling semiconductor substrate may have a cavity therein beneath the thermopile and aligned therewith.

Abstract: An ionic device includes a layer of an ionic conductor containing first and second species of impurities. The first species of impurity in the layer is mobile in the ionic conductor, and a concentration profile of the first species determines a functional characteristic of the device. The second species of impurity in the layer interacts with the first species within the layer to create a structure that limits mobility of the first species in the layer.

Abstract: According to an embodiment, a semiconductor device includes a semiconductor substrate and an amorphous semi-insulating layer on the semiconductor substrate.

Abstract: Embodiments of a thin-film heterostructure thermoelectric material and methods of fabrication thereof are disclosed. In general, the thermoelectric material is formed in a Group IIa and IV-VI materials system. The thermoelectric material includes an epitaxial heterostructure and exhibits high heat pumping and figure-of-merit performance in terms of Seebeck coefficient, electrical conductivity, and thermal conductivity over broad temperature ranges through appropriate engineering and judicious optimization of the epitaxial heterostructure.

Abstract: A thermopile sensor array is provided. The thermopile sensor array may include multiple pixels formed by multiple thermopiles arranged on a single common shared support membrane. A separation between the edge of the shared support membrane and the outermost thermopile(s) may be included to provide additional thermal isolation between the thermopile and an underlying silicon substrate.

Abstract: Strontium ruthenium oxide provides an effective interface between a ruthenium conductor and a strontium titanium oxide dielectric. Formation of the strontium ruthenium oxide includes the use of atomic layer deposition to form strontium oxide and subsequent annealing of the strontium oxide to form the strontium ruthenium oxide. A first atomic layer deposition of strontium oxide is preformed using water as an oxygen source, followed by a subsequent atomic layer deposition of strontium oxide using ozone as an oxygen source.

Abstract: A semiconductor device equipped with a primary semiconductor element and a temperature detecting element for detecting a temperature of the primary semiconductor element. The device includes a first semiconductor layer of a first conductivity type that forms the primary semiconductor element. A second semiconductor region of a second conductivity type is provided in the first semiconductor layer. A third semiconductor region of the first conductivity type is provided in the second semiconductor region. The temperature detecting element is provided in the third semiconductor region and is separated from the first semiconductor layer by a PN junction.

Abstract: A semiconductor device that may include temperature sensing circuits is disclosed. The temperature sensing circuits may be used to control various parameters, such as internal regulated supply voltages, internal refresh frequency, or a word line low voltage. In this way, operating specifications of a semiconductor device at worst case temperatures may be met without compromising performance at normal operating temperatures. Each temperature sensing circuit may include a selectable temperature threshold value as well as a selectable temperature hysteresis value. In this way, temperature performance characteristics may be finely tuned. Furthermore, a method of testing the temperature sensing circuits is disclosed in which a current value may be monitored and temperature threshold values and temperature hysteresis values may be thereby determined.

Abstract: In a semiconductor device including a semiconductor substrate, and at least one sensor element made of vanadium oxide formed over the semiconductor substrate, the sensor element is designed so that a density of a current flowing through the sensor element is between 0 and 100 ?A/?m2.

Abstract: In a semiconductor integrated circuit device, a sheet-like temperature monitor member of vanadium oxide is provided, whose one end is connected to one via while the other end is connected to another via. A sheet-like thermal conducting layer of aluminum is provided below the temperature monitor member. A region equal to or greater than a half of the entire temperature monitor member overlies the thermal conducting layer in a plan view.

Abstract: The present invention comprises a tunneling device in which the collector electrode is modified so that tunneling of higher energy electrons from the emitter electrode to the collector electrode is enhanced. In one embodiment, the collector electrode is contacted with an insulator layer, preferably aluminum or silicon nitride, disposed between the collector and emitter electrodes. The present invention additionally comprises a method for enhancing tunneling of higher energy electrons from an emitter electrode to a collector electrode, the method comprising the step of contacting the collector electrode with an insulator, preferably aluminum or silicon nitride, and placing the insulator between the collector electrode and the emitter electrode.

Abstract: Cooled photosensitive cell (80) comprising a table (50), sensors (66) which are fitted on the table, a screen (80) to prevent parasitic radiation on the sensors, and at least one Joule-Thomson cooler (41, 42) to cool the table and the screen. The table (50) and the screen (80) are cooled by convection, the table (50) being provided with apertures (55) for passage of the cooling flow, which communicate with an annular cavity (63) for cooling of the screen (80).

Abstract: There is provided a small-size electronic heat pump device which is low in power consumption and which secures a vacuum gap without use of an additional circuit. The electronic heat pump device includes an emitter 1 and a collector 2. An electrically and thermally insulative spacer section 5 for keeping a space, i.e. vacuum gap G between an emitter electrode 11 and a collector electrode 21 constant is integrally formed in a semiconductor substrate 20 of the collector 2, which makes it possible to maintain the vacuum gap to be a specified space while a back flow of heat is prevented in a simple structure with a reduced number of component parts.

Abstract: A stack of heat generating integrated circuit chips may be provided with intervening cooling integrated circuit chips. The cooling integrated circuit chips may include microchannels for the flow of the cooling fluid. The cooling fluid may be pumped using the integrated electroosmotic pumps. Removal of cooling fluid gases may be accomplished using integrated re-combiners in some embodiments.

Abstract: A structure and associated method for annealing a trapped charge from a semiconductor device. The semiconductor structure comprises a substrate and a first heating element. The substrate comprises a bulk layer, an insulator layer and a device layer. The first heating element is formed within the bulk layer. A first side of the first heating element is adjacent to a first portion of the insulator layer. The first heating element is adapted to be selectively activated to generate thermal energy to heat the first portion of the insulator layer and anneal a trapped electrical charge from the first portion of the insulator layer.

Abstract: A semiconductor device has a semiconductor wafer having sensing portions exposed on a surface thereof and an adhesive sheet attached to the semiconductor wafer as a protective cap to cover the sensing portions. The adhesive sheet is composed of a flat adhesive sheet and adhesive disposed generally on an entire surface of the adhesive sheet. Adhesion of the adhesive is selectively reduced by UV irradiation to have adhesion reduced regions, and the adhesion reduced regions face the sensing portions. The protective cap can be produced with high productivity, and securely protect the sensing portions when the semiconductor wafer is diced and is transported.

Abstract: A high temperature hybrid-circuit structure includes a temperature sensitive device which comprises SiC, AlN and/or AlxGa1-xN(x>0.69) connected via electrodes to an electrically conductive mounting layer that is physically bonded to an AlN die. The die, temperature sensitive device and mounting layer, which can be a thin film of W, WC or W2C less than 10 micrometers thick, have temperature coefficients of expansion within 1.06 of each other. The mounting layer can consist entirely of a W, WC or W2C adhesive layer, or an adhesive layer with an overlay metallization having a thermal coefficient of expansion not greater than about 3.5 times that of the adhesive layer. Applications include temperature sensors, pressure sensors, chemical sensors and high temperature and high power electronic circuits. Without the mounting layer, a thin film piezoelectric layer of SiC, AlN and/or AlxGa1-xN(x>0.69), less than 10 micrometers thick, can be secured to the die.

Abstract: An insulating substrate (1) has insulative ceramic layers (2, 3) laid one upon another, an intermediate layer (4) made of a material that is different from a material of the ceramic layers and arranged between adjacent ones of the ceramic layers to join the adjacent ceramic layers to each other, a first conductive layer (5) joined to the top surface of a top one of the ceramic layers, and a second conductive layer (6) joined to the bottom surface of a bottom one of the ceramic layers. Even if any one of the ceramic layers has strength lower than design strength and causes a breakage due to, for example, thermal stress, the remaining ceramic layers are sound to secure a specified breakdown voltage for the insulating substrate.

Abstract: A device for thermal sensing is disclosed based on only one thermopile. The cold junctions of said thermopile are coupled thermally to a first channel comprising a first substance while the hot junctions of said thermopile are coupled thermally to a second channel comprising a second substance, said first and said second channel are separated and thermally isolated one from another. Said device can further comprise a membrane to thermally and electrically isolate said thermopile and to mechanically support said thermopile. Particularly a liquid rubber, i.e. ELASTOSIL LR3003/10A, B can be used as a membrane material. Further disclosed is a method for fabricating such a device using micromachining techniques.

Abstract: At least one forward-biased semiconductor diode having a potential barrier is used as a temperature sensor whose sensitivity can be finely adjusted. An operational amplifier circuit (A1) is used to apply a bias voltage of DC or rectangular waveform to a semiconductor diode (D) having a potential barrier used as a temperature sensor. In view of the fact that the temperature sensitivity of the semiconductor diode (D) depends on the height of its potential barrier, the forward bias voltage applied from a bias circuit (2) directly to the semiconductor diode (D) is finely adjusted to obtain desired temperature sensitivity. The output voltage of the sensor is associated with a current, having an exponential temperature dependence, which flows in the semiconductor diode (D) with the forward bias being fixed.

Abstract: A composite semiconductor structure includes a thermal circuit device that is used to regulate the operation of a heat-sensitive semiconductor device. The thermal circuit device may be a non-compound semiconductor device such as a Group IV monocrystalline semiconductor device that is formed from a non-compound semiconductor portion of the composite semiconductor structure. The heat-sensitive device may be a compound semiconductor device such a monocrystalline compound semiconductor device that is formed from a compound semiconductor portion of the composite semiconductor structure. The thermal circuit device may be formed to be in a heat-sensing relationship with the heat-sensitive semiconductor device. The thermal circuit device may have an output current that may be used to regulate how the heat-sensitive semiconductor device is operated. The compound semiconductor portion may be epitaxially formed over the non-compound semiconductor portion with a compliant film in between to relieve lattice mismatches.

Abstract: A high temperature hybrid-circuit structure includes a temperature sensitive device which comprises SiC, AlN and/or AlxGa1−xN(x>0.69) connected by electrodes to an electrically conductive mounting layer that is physically bonded to an AlN die. The die, temperature sensitive device and mounting layer (which can be W, WC or W2C) have temperature coefficients of expansion within 1.06 of each other. The mounting layer can consist entirely of a W, WC or W2C adhesive layer, or an adhesive layer with an overlay metallization having a thermal coefficient of expansion not greater than about 3.5 times that of the adhesive layer. The device can be encapsulated with a reacted borosilicate mixture, with or without an upper die which helps to hold on lead wires and increases structural integrity. Applications include temperature sensors, pressure sensors, chemical sensors, and high temperature and high power electronic circuits.

Abstract: A heat resisting resin sheet is bonded to a semiconductor chip as a protective cap for protecting a beam structure provided on the semiconductor chip, through a heat resisting adhesive. The heat resisting resin sheet is composed of a polyimide base member and the heat resisting adhesive is composed of silicone adhesive. The heat resisting resin sheet is not deformed during a manufacturing process of the semiconductor chip. In addition, grinding water does not invade into the semiconductor chip during dicing-cut.

Abstract: An integrated circuit chip (10, 50, 100) may comprise an integrated circuit (14, 54, 108, 110, 112) formed in a semiconductor layer (12, 52, 102). A thermal contact (16, 56, 116) may be formed at a high temperature region of the integrated circuit (14, 54, 108, 110, 112). A thick plated metal layer (40, 80, 140) may be generally isolated from the integrated circuit (14, 54, 108, 110, 112). The thick plated metal layer (40, 80, 140) may include a base (42, 82, 142) and an exposed surface (44, 84, 144) opposite the base (42, 82, 142). The base (42, 82, 142) may be coupled to the thermal contact (16, 56, 116) to receive thermal energy of the high temperature region. The exposed surface (44, 84, 144) may dissipate thermal energy received by the thick plated metal layer (40, 80, 140).

Abstract: Current leads are used for connecting a power supply placed in a room-temature environment and a superconducting coil placed in an ultralow-temperature environment. The current leads includes a first current lead and a second current lead. The first current lead is made up of a room-temperature N-type thermoelectric semiconductor, a low-temperature N-type thermoelectric semiconductor, and a high-temperature superconductor. The second current lead is made up of a room-temperature P-type thermoelectric semiconductor, a low-temperature P-type thermoelectric semiconductor, and a high-temperature superconductor. At least one of the first and second current leads is formed of a functionally gradient material.

Abstract: A temperature-indicating field effect transistor (100) includes a transistor die (101) including a drain (103), a source (105), and a gate (107). A temperature measurement device (109, 111) is thermally coupled to the transistor die (101) and electrically coupled to the gate (107). A transistor package (113) encapsulates the transistor die (101) and the temperature measurement device (109, 111). The transistor package (113) has three externally accessible terminals including a first terminal (115) connected to the drain (103), a second terminal (117) connected to the source (105), and an input terminal (119) coupled to the temperature measurement device (109, 111).

Abstract: A temperature controlled cryogenic package system for efficiently and precisely monitoring and controlling the operating temperature of a high temperature superconductor circuit placed on a substrate. The cryogenic package system comprises a heating element formed on the same substrate as the high temperature superconductor circuit, a control circuit capable of activating and deactivating the heating element, and a temperature sensor placed in thermal proximity to the high temperature superconductor circuit. The temperature sensor monitors the operating temperature of the high temperature superconductor circuit, and conveys temperature information to the control circuit. The control circuit activates or deactivates the heating element according to the warming or cooling effect that is necessary in order to maintain the high temperature superconductor circuit within a predetermined temperature range, where the range of temperature fluctuation is within plus or minus 0.1 K of a predetermined temperature.

Abstract: Thermally isolated circuit formed on a semiconductor on insulator structure includes a semiconductor surrounded by a semiconductor outer portion with an insulator therebetween. A cavity formed in the underlying semiconductor substrate opposite to the island provides thermal isolation.

Abstract: This invention provides a Peltier cooling device generally useful in cooling electronic devices, especially those which are formed of high Tc superconducting materials. The Peltier device of the invention is formed on a micromachined membrane structure to assure good thermal isolation and to intimately integrate the cooling device with the electronic device it is to cool.The membrane is formed by selective, controlled etching of a bulk substrate of a material such as silicon. The Peltier device is formed by selectively implanting or depositing appropriate dopants to form n-doped and p-doped segments on the membrane with a junction between the differently doped segments at the approximate mid-point of the membrane.

Abstract: A thermal picture synthesis device (1) of multi-layer construction has a resistor element (3) spaced from a semi-conductor substrate layer (2). The resistor element (3) is made of titanium or Ni-chrome. A drive element layer (4) is provided either in or attached to the substrate layer (2) for the resistor element (3). By placing the drive element layer parallel to and spaced from the resistor element (3) it is possible to pack a plurality of resistor elements (3) into a side by side adjacent array with a high fill factor or packing density and this coupled with the use of titanium or Ni-chrome for the resistor elements (3) and the spacing of these elements from the semi-conductor substrate (2) allows the device to operate at a higher apparent temperature than is conventional.

Abstract: An optical filter for an infrared detector is provided by creating an impurity band in a semiconductor substrate onto which the infrared detector is epitaxially grown. The impurity band provides a range of absorption and a long wavelength pass band characteristic. The range of absorption is broadened by doping the substrate with a dopant of different photoelectric threshold from the dopant used to create the impurity band.

Abstract: In the conventional thermoelectric conversion module, P-type thermoelectric semiconductor chips and N-type thermoelectric semiconductor chips are alternately arranged in both the longitudinal and the transverse directions. Consequently, assembling work is complicated and there arises the problem in quality that erroneous types of chips are arranged. In the present invention, therefore, each of either rows of chips or columns of chips is constituted by thermoelectric semiconductor chips of the same type, thereby to improve assembling workability as well as to prevent erroneous arrangement. Furthermore, as a preferred fabricating method, bar-shaped thermoelectric semiconductors are used and are jointed to one substrate and then, are electrically disconnected between the leads.

Abstract: A thermoelectric semiconductor device having a porous structure and an air-tight sealing structure maintaining it in a deaerated state is disclosed. A refrigeration panel comprising a plurality of p-type and n-type semiconductor elements each having a structure mentioned above, in which the elements are arranged alternatively and electrically connected in series is also disclosed.

Abstract: A thermoelectric semiconductor device having a porous structure and an air-tight sealing structure maintaining it in a deaerated state is disclosed. A refrigeration panel comprising a plurality of p-type and n-type semiconductor elements each having a structure mentioned above, in which the elements are arranged alternatively and electrically connected in series is also disclosed.