Responsive To Non-electrical Signal (e.g., Chemical, Stress, Light, Or Magnetic Field Sensors) Patents (Class 257/414)
  • Patent number: 11407636
    Abstract: The present disclosure, in some embodiments, relates to a method of forming a micro-electromechanical system (MEMS) package. The method includes forming one or more depressions within a capping substrate. A back-side of a MEMS substrate is bonded to the capping substrate after forming the one or more depressions, so that the one or more depressions define one or more cavities between the capping substrate and the MEMS substrate. A front-side of the MEMS substrate is selectively etched to form one or more trenches extending through the MEMS substrate, and one or more polysilicon vias are formed within the one or more trenches. A conductive bonding structure is formed on the front-side of the MEMS substrate at a location contacting the one or more polysilicon vias. The MEMS substrate is bonded to a CMOS substrate having one or more semiconductor devices by way of the conductive bonding structure.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: August 9, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shyh-Wei Cheng, Chih-Yu Wang, Hsi-Cheng Hsu, Ji-Hong Chiang, Jui-Chun Weng, Shiuan-Jeng Lin, Wei-Ding Wu, Ching-Hsiang Hu
  • Patent number: 11393734
    Abstract: A fingerprint sensor device and a method of making a fingerprint sensor device. As non-limiting examples, various aspects of this disclosure provide various fingerprint sensor devices, and methods of manufacturing thereof, that comprise a sensing area on a bottom side of a die without top side electrodes that senses fingerprints from the top side, and/or that comprise a sensor die directly electrically connected to conductive elements of a plate through which fingerprints are sensed.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: July 19, 2022
    Assignee: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Sung Sun Park, Ji Young Chung, Christopher Berry
  • Patent number: 11355501
    Abstract: In a method of manufacturing an SRAM device, an insulating layer is formed over a substrate. First dummy patterns are formed over the insulating layer. Sidewall spacer layers, as second dummy patterns, are formed on sidewalls of the first dummy patterns. The first dummy patterns are removed, thereby leaving the second dummy patterns over the insulating layer. After removing the first dummy patterns, the second dummy patterns are divided. A mask layer is formed over the insulating layer and between the divided second dummy patterns. After forming the mask layer, the divided second dummy patterns are removed, thereby forming a hard mask layer having openings that correspond to the patterned second dummy patterns. The insulating layer is formed by using the hard mask layer as an etching mask, thereby forming via openings in the insulating layer. A conductive material is filled in the via openings, thereby forming contact bars.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: June 7, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventor: Jhon Jhy Liaw
  • Patent number: 11292097
    Abstract: A structure for fixing a membrane to a carrier including a carrier; a suspended structure; and a holding structure with a rounded concave shape which is configured to fix the suspended structure to the carrier and where a tapered side of the holding structure physically connects to the suspended structure is disclosed. A method of forming the holding structure on a carrier to support a suspended structure is further disclosed. The method may include: forming a holding structure on a carrier; forming a suspended structure on the holding structure; shaping the holding structure such that it has a concave shape; and arranging the holding structure such that a tapered side of the holding structure physically connects to the suspended structure.
    Type: Grant
    Filed: May 3, 2019
    Date of Patent: April 5, 2022
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Alfons Dehe, Reinhard Gabl, Ulrich Krumbein
  • Patent number: 11275031
    Abstract: Devices and methods of providing a high-performance optical sensor disclose a sensor comprised of a porous material designed to have a multilayer rib-type or multilayer pillar-type waveguide geometry. The resulting porous nanomaterial multilayer-rib or multilayer-pillar waveguide design is optically capable of achieving ˜100% confinement factor while maintaining small mode area and single-mode character. Fabrication of the device is enabled by an inverse processing technique, wherein silicon wafers are first patterned and etched through well-established techniques, which allows porous nanomaterial synthesis (i.e., porous silicon anodization) either at the wafer-scale or at the chip-scale after wafer dicing. While ˜100% is an optimal target, typical devices per presently disclosed subject matter may operate with ˜98-99+%, while allowing for some design adjustments to be made if necessary, and still maintaining high sensitivity. i.e., >85-90% confinement suitable in some applications.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: March 15, 2022
    Assignee: Clemson University
    Inventors: Judson Ryckman, Gabriel Allen, William Frederick Delaney, Tahmid Talukdar
  • Patent number: 11254564
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a plurality of vias, a signal transmitting portion, a heater and a sensing material. The plurality of vias penetrates the substrate, wherein each of the plurality of vias includes a conductive or semiconductive portion surrounded by an oxide layer. The signal transmitting portion is disposed in the substrate, wherein adjacent vias of the plurality of vias surrounds the signal transmitting portion. The heater is electrically connected to the signal transmitting portion, and the sensing material is disposed over the heater and electrically connected to the substrate. A method of manufacturing a semiconductor structure is also provided.
    Type: Grant
    Filed: April 8, 2020
    Date of Patent: February 22, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chun-Wen Cheng, Chia-Hua Chu, Fei-Lung Lai, Shiang-Chi Lin
  • Patent number: 11222988
    Abstract: The present invention relates to a photovoltaic device (10) comprising: a first conducting layer (16), a second conducting layer electrically insulated from the first conducting layer, a porous substrate (20) made of an insulating material arranged between the first and second conducting layers, a light absorbing layer (1) comprising a plurality of grains (2) of a doped semiconducting material disposed on the first conducting layer (16) so that the grains are in electrical and physical contact with the first conducting layer, and a charge conductor (3) made of a charge conducting material partly covering the grains and arranged to penetrate through the first conducting layer (16) and the porous substrate such that a plurality of continuous paths (22) of charge conducting material is formed from the surface of the grains (2) to the second conducting layer (18), wherein the first conducting layer (16) comprises a conducting material, an oxide layer (28) formed on the surface of conducting material, and an insul
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: January 11, 2022
    Assignee: Exeger Operations AB
    Inventor: Henrik Lindström
  • Patent number: 11214482
    Abstract: A micromechanical device that includes a substrate, a functional layer, and a cap that are situated one above the other in parallel to a main plane of extension. A cavity that is surrounded by a bond frame that extends in parallel to the main plane of extension is formed in the functional layer, the cap being connected to the bond frame. The cavity is situated partially between the bond frame and the substrate in a direction perpendicular to the main plane of extension. A method for manufacturing a micromechanical device is also provided.
    Type: Grant
    Filed: October 4, 2018
    Date of Patent: January 4, 2022
    Assignee: Robert Bosch GmbH
    Inventors: Jochen Reinmuth, Martin Rambach
  • Patent number: 11194990
    Abstract: A fingerprint sensor package and method are provided. Embodiments include a sensor and a sensor surface material encapsulated within the fingerprint sensor package. An array of electrodes of the sensor are electrically connected using through vias that are located either in the sensor, in connection blocks separated from the sensor, or through connection blocks, or else connected through other connections such as wire bonds. A high voltage die is attached in order to increase the sensitivity of the fingerprint sensor.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: December 7, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Chih Huang, Chih-Hua Chen, Yu-Jen Cheng, Chih-Wei Lin, Yu-Feng Chen, Hao-Yi Tsai, Chung-Shi Liu, Chen-Hua Yu
  • Patent number: 11187663
    Abstract: A NEMS readout system includes a sensor array comprising a plurality of sensors. Each sensor of the plurality of sensors including a resonator with frequency characteristics different from the resonator of each other sensor of the plurality of sensors. A readout signal indicative of a plurality of output signals is collected from the sensor array. Each output signal of the plurality of output signals corresponding to one of the plurality of sensors. An analysis of the plurality of output signals is performed to identify a plurality of resonant frequencies and to detect a frequency shift associated with at least one of the plurality of resonant frequencies.
    Type: Grant
    Filed: February 11, 2020
    Date of Patent: November 30, 2021
    Assignee: California Institute of Technology
    Inventors: Michael L. Roukes, Chung Wah Fon, Ewa Rej
  • Patent number: 11180366
    Abstract: A method includes obtaining an active device layer. The active device layer has a first surface with one or more active feature areas. First portions of the active feature areas are exposed, and second portions of the active feature areas are covered by an insulating layer. A conformal overcoat layer is formed on the first surface. A base of a microelectromechanical systems (MEMS) device layer is formed on the conformal overcoat layer. The MEMS device layer is spatially segregated from the active feature areas by removing portions of the base of the MEMS device layer in one or more antiparasitic regions (APRs) that correspond to the active feature areas. Metal MEMS features are formed on the base of the MEMS device layer. Selected portions of the active feature areas are exposed removing portions of the conformal overcoat layer that overlay the active feature areas.
    Type: Grant
    Filed: March 23, 2020
    Date of Patent: November 23, 2021
    Assignee: General Electric Company
    Inventors: Marco Francesco Aimi, Joleyn Eileen Brewer
  • Patent number: 11163121
    Abstract: A detection method for electronic devices including steps as follows is provided. The detection method includes: providing an electronic device substrate; attaching a portion of electronic devices of the electronic device substrate through an electronic device transfer module, wherein the electronic device transfer module includes a plurality of detecting elements corresponding to the portion of the electronic devices, and each of the detecting elements includes at least one pair of electrodes; detecting whether a conducting path between the at least one pair of electrodes is generated or not to confirm a status of contact between the portion of the electronic devices and a contact target; and transferring the portion of the electronic devices attached to the electronic device transfer module to a target substrate. An electronic device transfer module having detecting elements is also provided.
    Type: Grant
    Filed: June 4, 2019
    Date of Patent: November 2, 2021
    Assignee: Industrial Technology Research Institute
    Inventors: Ming-Hsien Wu, Yen-Hsiang Fang, Shih-Hao Wang, Yi-Chen Lin
  • Patent number: 11131568
    Abstract: Disclosed are sensor packages, methods of manufacturing the same, and methods of manufacturing lid structures. The sensor package comprises a package substrate, a gas sensor on the package substrate, a lid on the package substrate and having a hole extending between a first inner surface and a first outer surface of the lid, the first inner surface of the lid facing toward the package substrate and the first outer surface of the lid facing away from the package substrate, and a waterproof film in the hole of the lid. The waterproof film is formed on the first inner surface and the first outer surface of the lid.
    Type: Grant
    Filed: August 25, 2020
    Date of Patent: September 28, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sungeun Jo, Youngshin Kwon, Minjin Kim, Woonbae Kim, Youngdoo Jung, Eunhee Jung, Inho Choi
  • Patent number: 11085907
    Abstract: Devices, systems, and methods for detecting contaminants in water are provided. A device may include: a sensor configured to detect one or more contaminants in a liquid when the sensor is dipped into the liquid; a computing device connected to the sensor, the computing device being configured to determine a resistance of the device when the sensor is dipped into the liquid; and a wireless electronic device connected to the computing device via one or more wireless links and configured to receive the resistance of the device when the sensor is dipped into the liquid from the computing device, and the wireless electronic device determines a level of contamination in the liquid based on a difference between the resistance of the device when the sensor is dipped into the liquid and a set or predetermined resistance.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: August 10, 2021
    Inventor: Gitanjali Adhikarla Rao
  • Patent number: 11067377
    Abstract: A device for accounting for environmental capacitances caused by an external object when detecting the presence and surface location of an electrically conductive coating on a transparent and/or translucent medium includes: a capacitive sensor that provides multiple capacitances; electronics that are responsive to the capacitances; an excitation source that generates a train of pulses, voltage or current to determine capacitances at the capacitive sensor; a selective indicator; and, a capacitive sensing plate that affects, or is affected by, the pulses, voltage or current from the excitation source.
    Type: Grant
    Filed: March 19, 2019
    Date of Patent: July 20, 2021
    Assignee: EDTM, Inc.
    Inventors: Jeffrey A. Simpson, Mark A. Imbrock, Nathan Strimpel, Jed Martens
  • Patent number: 11063159
    Abstract: An optoelectronic device package includes an optoelectronic device having an active region on a first surface of a substrate, a bond pad area on the first surface that includes at least one contact pad electrically connected to the active region, and a cap having a first cap surface and a second cap surface, the first cap surface being secured to the first surface of the substrate, the cap covering the optoelectronic device. At least one of the cap and the substrate has an angled sidewall extending at an angle relative to an axis parallel to an optical path. The at least one contact pad is exposed by and adjacent to the angled sidewall. An electrical line extends from each of the at least one contact pad along the angled sidewall and to the second cap surface that does not overlap the active region.
    Type: Grant
    Filed: March 21, 2019
    Date of Patent: July 13, 2021
    Assignee: FLIR Systems, Inc.
    Inventors: Hagit Gershtenman-Avsian, Andrey Grinman, Alexander Feldman, Alan D. Kathman, David Ovrutsky
  • Patent number: 11011601
    Abstract: The present disclosure, in some embodiments, relates to a semiconductor structure. The semiconductor structure includes a substrate. As viewed from a top-view, the substrate has a first sidewall, one or more second sidewalls, and a plurality of third sidewalls. The first sidewall extends along a first direction and defines a first side of a trench. The one or more second sidewalls extends along the first direction and define a second side of the trench. The plurality of third sidewalls are oriented in parallel and extends in a second direction perpendicular to the first direction. The plurality of third sidewalls protrude outward from the second side of the trench and define a plurality of parallel releasing openings that are separated along the first direction by the substrate. The trench continuously extends in opposing directions past the plurality of parallel releasing openings.
    Type: Grant
    Filed: September 25, 2019
    Date of Patent: May 18, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kuei-Sung Chang, Te-Hao Lee
  • Patent number: 11011645
    Abstract: The present disclosure discloses a thin film transistor and a manufacturing method thereof, an array substrate and a display device, and belongs to the field of semiconductor display technology. The active layer of the thin film transistor is made of a CIGS material. By manufacturing the active layer of the thin film transistor with the CIGS material, and the crystal defects of the CIGS are less than LTPS and IGZO, the mobility of the thin film transistor is higher, and the switching speed of the thin film transistor is faster, thereby being advantageous to further improve the resolution of the display device.
    Type: Grant
    Filed: June 20, 2019
    Date of Patent: May 18, 2021
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Qingrong Ren, Guangcai Yuan, Feng Guan, Dongsheng Li, Jianming Sun
  • Patent number: 11011647
    Abstract: A semiconductor device structure is disclosed. The semiconductor device structure includes a mesa extending above a substrate. The mesa has a channel region between a first side and second side of the mesa. A first gate is on a first side of the mesa, the first gate comprising a first gate insulator and a first gate conductor comprising graphene overlying the first gate insulator. The gate conductor may comprise graphene in one or more monolayers. Also disclosed are a method for fabricating the semiconductor device structure; an array of vertical transistor devices, including semiconductor devices having the structure disclosed; and a method for fabricating the array of vertical transistor devices.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: May 18, 2021
    Assignee: Micron Technology, Inc.
    Inventor: Gurtej S. Sandhu
  • Patent number: 10996183
    Abstract: A detection device includes a plurality of detection units formed on a semiconductor circuit, a correction capacitive element that indicates a correction capacitance value for correcting detected capacitance values detected by the detection units, a difference acquisition circuit that acquires a difference value between each of the detected capacitance values and the correction capacitance value, and a conversion circuit that converts the difference value into a digital signal. The correction capacitive element, the difference acquisition circuit, and the conversion circuit are formed on the semiconductor circuit.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: May 4, 2021
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Noboru Iwata, Tatsuhito Arimura
  • Patent number: 10998386
    Abstract: In one embodiment, an electronic display includes a first plurality of hexagon-shaped pixels and a second plurality of hexagon-shaped pixels that are coplanar with the first plurality of hexagon-shaped pixels. The first plurality of hexagon-shaped pixels each include an infrared (IR) emitter subpixel that is operable to emit IR light. The second plurality of hexagon-shaped pixels each include an IR detector subpixel that is operable to detect IR light. Each IR emitter subpixel and each IR detector subpixel includes an anode layer and a cathode layer. Each particular IR emitter subpixel includes an IR emissive layer located between the anode layer and the cathode layer of the particular IR emitter subpixel. Each particular IR detector subpixel includes an IR detector layer located between the anode layer and the cathode layer of the particular IR detector subpixel.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: May 4, 2021
    Assignee: Lockheed Martin Corporation
    Inventors: Mark A. Lamkin, Kyle M. Ringgenberg, Jordan D. Lamkin
  • Patent number: 10955304
    Abstract: A piezo-resistor-based sensor, and a method to fabricate such sensor, comprise a sensor having at least a sensing element provided on a flexible structure, such as a membrane or cantilever or the like. The sensing element includes at least one piezo-resistor comprising at least a first region of the flexible structure doped with dopant atoms of a first type. The flexible structure furthermore comprises a second doped region within it, at least partially overlapping the first doped region, forming a shield for shielding the sensing element from external electrical field interference, wherein dopant atoms of the second doped region are of a second type opposite to the dopant atoms of the first doped region, for generating a charge depletion layer within the flexible structure at the overlapping region between the first doped region and the second doped region.
    Type: Grant
    Filed: June 13, 2019
    Date of Patent: March 23, 2021
    Assignee: Melexis Technologies NV
    Inventor: Maliheh Ramezani
  • Patent number: 10958213
    Abstract: A clock oscillator includes with a pullable BAW oscillator to generate an output signal with a target frequency. The BAW oscillator is based on a BAW resonator and voltage-controlled variable load capacitance, responsive to a capacitance control signal to provide a selectable load capacitance. An oscillator driver (such as a differential negative gm transconductance amplifier), is coupled to the BAW oscillator to provide an oscillation drive signal. The BAW oscillator is responsive to the oscillation drive signal to generate the output signal with a frequency based on the selectable load capacitance. The oscillator driver can include a bandpass filter network with a resonance frequency substantially at the target frequency.
    Type: Grant
    Filed: May 8, 2020
    Date of Patent: March 23, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Ben-yong Zhang, Seong-Ryong Ryu, Ali Kiaei, Ting-Ta Yen, Kai Yiu Tam
  • Patent number: 10955288
    Abstract: The disclosed embodiments include a method, apparatus, and computer program product for generating a cross-sensor standardization model. For example, one disclosed embodiment includes a system that includes at least one processor; at least one memory coupled to the at least one processor and storing instructions that when executed by the at least one processor performs operations comprising selecting a representative sensor from a group of sensors comprising at least one of same primary optical elements and similar synthetic optical responses and calibrating a cross-sensor standardization model based on a matched data pair for each sensor in the group of sensors and for the representative sensor. In one embodiment, the at least one memory coupled to the at least one processor and storing instructions that when executed by the at least one processor performs operations further comprises generating the matched data pair, wherein the matched data pair comprises calibration input data and calibration output data.
    Type: Grant
    Filed: December 7, 2018
    Date of Patent: March 23, 2021
    Assignee: Halliburton Energy Services, Inc.
    Inventors: Dingding Chen, David L. Perkins
  • Patent number: 10958239
    Abstract: A bulk acoustic wave resonator includes: support members disposed between air cavities; a resonant part including a first electrode, a piezoelectric layer, and a second electrode sequentially disposed above the air cavities and on the support members; and a wiring electrode connected either one or both of the first electrode and the second electrode, and disposed above one of the air cavities, wherein a width of an upper surface of the support members is greater than a width of a lower surface of the support members, and side surfaces of the support members connecting the upper surface and the lower surface to each other are inclined.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: March 23, 2021
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Tae Yoon Kim, Moon Chul Lee, Yoon Sok Park
  • Patent number: 10932721
    Abstract: Methods, systems, and apparatus for high-resolution patterning of various substrates with functional materials, including nanomaterials. A technique of preparing a patterned substrate in a high-resolution mold for stick and transfer process is disclosed with promotes integrity of the high-resolution pattern onto the substrate. One example of a substrate is an adhesive tape. The transferred pattern(s) are scalable and can be implemented in different fabrication processes. One example is a roll-to-roll processes. In one embodiment, the transferred pattern comprises nanomaterials and the substrate comprises a flexible substrate for use in flexible and conformal assemblies for a wide variety of applications including, but not limited to, electrical-based sensors on non-planar inanimate surfaces, plant body surface, or human or animal skin.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: March 2, 2021
    Assignee: Iowa State University Research Foundation, Inc.
    Inventors: Seval Oren, Liang Dong
  • Patent number: 10927004
    Abstract: A method for bonding wafers eutectically, including the steps: (a) providing a first wafer having a first bonding layer and a second wafer having a second bonding layer and a spacer; (b) bringing the first wafer in juxtaposition with the second wafer, the spacer resting against the first bonding layer; (c) pressing the first wafer and the second wafer together, until the first bonding layer and the second bonding layer abut, the spacer penetrating the first bonding layer; (d) bonding the first wafer to the second wafer eutectically, by forming a eutectic alloy of at least parts of the first bonding layer and the second bonding layer. Also described is a eutectically bonded wafer composite and a micromechanical device having such a eutectically bonded wafer composite.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: February 23, 2021
    Assignee: Robert Bosch GmbH
    Inventors: Axel Grosse, Volker Schmitz
  • Patent number: 10921548
    Abstract: A focusing mechanism includes: a driving source in which three or more cantilever-like piezoelectric actuators are radially arranged; and an optical lens unit that consists of an outer frame, an optical lens, a lens holder provided around the optical lens and holding the optical lens, and an elastic body connecting the lens holder to the outer frame and elongating and contracting in a radial direction of the optical lens, wherein surfaces of driving distal ends of the cantilever-like piezoelectric actuators, which are perpendicular to a direction of an optical axis of the optical lens, are in contact with the lens holder, and the cantilever-like piezoelectric actuators move the optical lens in the direction of the optical axis of the optical lens by the drive of the cantilever-like piezoelectric actuators to perform focusing.
    Type: Grant
    Filed: August 29, 2018
    Date of Patent: February 16, 2021
    Assignee: FUJIFILM Corporation
    Inventor: Yoshikazu Hishinuma
  • Patent number: 10914939
    Abstract: A compact and robust microelectromechanical reflector system that comprises a support, a reflector, a peripheral edge of the reflector including edge points, and suspenders including piezoelectric actuators and suspending the reflector from the support. Two pairs of suspenders are fixed from two fixing points to the support such that in each pair of suspenders, first ends of a pair of suspenders are fixed to a fixing point common to the pair. A first axis of rotation is aligned to a line running though the two fixing points, and divides the reflector to a first reflector part and a second reflector part. In each pair of suspenders, a second end of one suspender is coupled to the first reflector part and a second end of the other suspender is coupled to the second reflector part.
    Type: Grant
    Filed: July 24, 2018
    Date of Patent: February 9, 2021
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Altti Torkkeli, Matti Liukku
  • Patent number: 10916375
    Abstract: An electronic device includes a chip component and a metal terminal. The chip component includes a terminal electrode formed on an element body. The metal terminal is connectable with the terminal electrode of the chip component. The metal terminal includes a terminal body and a pair of holding pieces. The terminal body faces an end surface of the terminal electrode of the chip component. The pair of holding pieces is formed on the terminal body and sandwiches the chip component. A width, a protrusion length, or a protrusion area of one of the pair of holding pieces is different from that of the other holding piece.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: February 9, 2021
    Assignee: TDK CORPORATION
    Inventors: Norihisa Ando, Sunao Masuda, Masahiro Mori, Kayou Matsunaga, Kosuke Yazawa
  • Patent number: 10900884
    Abstract: A method, structure and system for capacitive sensing is provided. A system includes: a two-dimensional electrode structure, wherein the two-dimensional sensing structure includes a channel for capacitive sensing, at least one integrated circuit connected to the two dimensional sensing structure and configured to mitigate external interference associated with the capacitive sensing by i) receiving a input signal from the two-dimensional electrode structure or ii) providing a select signal to the two-dimensional structure, and a data acquisition device connected to the two-dimensional electrode structure via the integrated circuit configuration and configured to receive an output signal from the integrated circuit.
    Type: Grant
    Filed: March 8, 2018
    Date of Patent: January 26, 2021
    Assignee: International Business Machines Corporation
    Inventors: Frank Libsch, Venkat K. Balagurusamy
  • Patent number: 10903816
    Abstract: A thin-film package includes: a substrate; a wiring layer disposed on the substrate; a microelectromechanical systems (MEMS) element disposed on a surface of the substrate; a partition wall disposed on the substrate to surround the MEMS element, and formed of a polymer material; a cap forming a cavity with the substrate and the partition wall; and an external connection electrode connected to the wiring layer. The external connection electrode includes at least one inclined portion disposed on at least one inclined surface formed on any one or any combination of any two or more of the substrate, the partition wall, and the cap.
    Type: Grant
    Filed: June 4, 2019
    Date of Patent: January 26, 2021
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Seung Wook Park, Jae Chang Lee, Jae Hyun Jung, Seong Hun Na
  • Patent number: 10882072
    Abstract: The invention relates to a process for producing a structured shaped body or a layer of this type from a precursor of a metal oxide or mixed oxide selected from compounds of metals selected from among magnesium, strontium, barium, aluminum, gallium, indium, silicon, tin, lead and the transition metals. The process includes at least the following steps: (a) dissolving at least one compound of the at least one metal in an organic solvent and/or exchanging a ligand of the one or more dissolved metallic compounds for a stabilizing ligand, (b) adding a ligand that has at least one photochemically polymerizable group and at least one such group that allows a stable complex formation to the solution and forming a sol with or from the product of this reaction (precursor), (c) applying the sol on a substrate, and (d) exposing the sol anisotropically in such a way that a polymerization of the photochemically polymerizable groups takes place in the exposed areas.
    Type: Grant
    Filed: May 24, 2011
    Date of Patent: January 5, 2021
    Assignee: Multiphoton Optics GmbH
    Inventors: Ruth Houbertz, Daniela Trotschel
  • Patent number: 10886071
    Abstract: An electronic component includes a capacitor array having a plurality of multilayer capacitors consecutively arranged in a first direction, the plurality of multilayer capacitors each comprising a body, and first and second external electrodes respectively comprising first and second head portions, and first and second band portions respectively extending from the first and second head portions to portions of upper and lower surfaces and portions of side surfaces of the body, a first metal frame coupled to the plurality of first band portions by binding the first band portions in belt form so as to be connected to the plurality of first external electrodes, and a second metal frame coupled to the plurality of second band portions by binding the second band portions in belt form so as to be connected to the plurality of second external electrodes.
    Type: Grant
    Filed: February 11, 2019
    Date of Patent: January 5, 2021
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Ki Young Kim, Woo Chui Shin, Beom Joon Cho, Sang Soo Park
  • Patent number: 10865103
    Abstract: The present disclosure provides a packaging method, including: providing a first semiconductor substrate; forming a bonding region on the first semiconductor substrate, wherein the bonding region of the first semiconductor substrate includes a first bonding metal layer and a second bonding metal layer; providing a second semiconductor substrate having a bonding region, wherein the bonding region of the second semiconductor substrate includes a third bonding layer; and bonding the first semiconductor substrate to the second semiconductor substrate by bringing the bonding region of the first semiconductor substrate in contact with the bonding region of the second semiconductor substrate; wherein the first and third bonding metal layers include copper (Cu), and the second bonding metal layer includes Tin (Sn). An associated packaging structure is also disclosed.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: December 15, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chih-Ming Chen, Yuan-Chih Hsieh, Chung-Yi Yu
  • Patent number: 10868240
    Abstract: A manufacturing method results in a magnetoresistance element having conductive contacts disposed between the magnetoresistance element and a semiconductor substrate.
    Type: Grant
    Filed: February 20, 2019
    Date of Patent: December 15, 2020
    Assignee: Allegro MicroSystems, LLC
    Inventors: Yen Ting Liu, Maxim Klebanov, Bryan Cadugan, Sundar Chetlur, Harianto Wong
  • Patent number: 10861356
    Abstract: Provided is a transfer printing substrate and a method for producing the same, in order to improve yield of picking up of the micro-components and further improve quality of image display. The transfer printing substrate includes a carrying substrate, a plurality of supporting structures, and a plurality of micro-components corresponding to the plurality of support structures in one-to-one correspondence, wherein each of the plurality of supporting structures includes a fixing part and a suspended supporting part, wherein an end of the fixing part is fixed on the carrying substrate, an end of the suspended supporting part is connected to the fixing part, the other end of the suspended supporting part supports a corresponding one of the plurality of micro-components, and a first moving space is provided between the suspended supporting part and the carrying substrate. The transfer printing substrate is used for transferring the micro-components.
    Type: Grant
    Filed: April 24, 2018
    Date of Patent: December 8, 2020
    Assignee: SHANGHAI TIANMA MICRO-ELECTRONICS CO., LTD.
    Inventors: Xingda Xia, Junhui Lou, Zeshang He
  • Patent number: 10853616
    Abstract: A fingerprint sensor package and method are provided. The fingerprint sensor package comprises a fingerprint sensor along with a fingerprint sensor surface material and electrical connections from a first side of the fingerprint sensor to a second side of the fingerprint sensor. A high voltage chip is connected to the fingerprint sensor and then the fingerprint sensor package with the high voltage chip are connected to a substrate, wherein the substrate has an opening to accommodate the presence of the high voltage chip.
    Type: Grant
    Filed: December 11, 2019
    Date of Patent: December 1, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Yu-Feng Chen, Chih-Hua Chen, Hao-Yi Tsai, Chung-Shi Liu
  • Patent number: 10847313
    Abstract: An electronic component and a mounting board for mounting of the same are provided. The electronic component includes a body including external electrodes disposed on surfaces of the body opposing each other in a first direction, respectively, and metal frames connected to the external electrodes, respectively. The metal frames include supports bonded to the external electrodes and mounting portions extending from lower ends of the supports in the first direction and are spaced apart from the body and the external electrodes. The supports include a lower support portion disposed on a lower side of the body and an upper support portion disposed on an upper side of the body, and the lower support portion has a thickness in a second direction perpendicular to the first direction relatively greater than a thickness of the upper support portion in the first direction.
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: November 24, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Ho Yoon Kim, Sang Soo Park, Woo Chul Shin
  • Patent number: 10830838
    Abstract: A magnetic sensor includes a magnetic field conversion unit, a magnetic field detection unit, and a magnetic film. The magnetic field conversion unit includes a yoke that receives an input magnetic field and generates an output magnetic field. The input magnetic field contains an input magnetic field component in a direction parallel to Z direction. The output magnetic field contains an output magnetic field component in a direction parallel to X direction. The magnetic field detection unit includes a magnetic detection element that receives the output magnetic field and generates a detection value corresponding to the output magnetic field component. The magnetic film absorbs part of magnetic flux resulting from a noise magnetic field, which is a magnetic field in a direction to which the magnetic detection element has sensitivity and which is other than the output magnetic field component.
    Type: Grant
    Filed: July 6, 2018
    Date of Patent: November 10, 2020
    Assignee: TDK CORPORATION
    Inventors: Keisuke Uchida, Kenzo Makino
  • Patent number: 10823560
    Abstract: A tilt sensor includes: a pressure sensor disposed to be relatively movable with respect to a detection target object and configured to detect pressure of a fluid; and a tilt information detection unit configured to detect tilt information (for example, a tilt angle) of the detection target object according to an output of the pressure sensor and movement information of the pressure sensor.
    Type: Grant
    Filed: August 10, 2016
    Date of Patent: November 3, 2020
    Assignee: SEIKO INSTRUMENTS INC.
    Inventors: Takeshi Uchiyama, Manabu Oumi, Yoko Shinohara, Masayuki Suda, Ayako Nobe, Yoshiyuki Kaiho
  • Patent number: 10816415
    Abstract: A flexible sensor for monitoring operating parameters, including pressure and temperature, of a flexible structure, such as a tire, provides electrodes and an active area that are formed of flexible materials. In particular, the active area may be formed from an elastomeric piezoresistive material, such as an ionic liquid-polymer. The flexible properties of the sensor allow it to be readily incorporated into the body of a tire during manufacture. This allows the operating parameters of the tire to be monitored, such as in real-time, while the tire is in operation. Furthermore, the sensor is formed of materials that allow the sensor to be formed using additive manufacturing techniques, such as 3D (three-dimensional) printing. As such, the sensor may be 3D printed together with another structure, such as a tire tread, so that the sensor is integrated therein.
    Type: Grant
    Filed: February 13, 2017
    Date of Patent: October 27, 2020
    Assignee: THE UNIVERSITY OF AKRON
    Inventor: Jae-Won Choi
  • Patent number: 10797271
    Abstract: A manufacturing method for OLED display panel is disclosed, which first performs patterning on the encapsulation colloid of the encapsulant to divide encapsulation colloid into a plurality of target encapsulation areas, with each target encapsulation area corresponding to each OLED substrate unit, and a gap area outside of target encapsulation areas, performing disintegration treatment from the other side of encapsulation colloid on a portion of encapsulation colloid belonging to gap area so that the surface losing adhesiveness, then attaches encapsulation colloid to OLED substrate, and finally, obtains a plurality of OLED display panels by cutting. This method is simple to perform, reduces the size compatibility requirement of the laminator and avoids the use of extra manipulator and carrier fixture, which reduces the product cost incurred by fixture cleaning, transport, storage and other complex operations, and improves the product of the alignment accuracy, is good for automated production.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: October 6, 2020
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Weijing Zeng
  • Patent number: 10782269
    Abstract: Micromachined ultrasonic transducers integrated with complementary metal oxide semiconductor (CMOS) substrates are described, as well as methods of fabricating such devices. Fabrication may involve two separate wafer bonding steps. Wafer bonding may be used to fabricate sealed cavities in a substrate. Wafer bonding may also be used to bond the substrate to another substrate, such as a CMOS wafer. At least the second wafer bonding may be performed at a low temperature.
    Type: Grant
    Filed: August 22, 2018
    Date of Patent: September 22, 2020
    Assignee: Butterfly Network, Inc.
    Inventors: Jonathan M. Rothberg, Susan A. Alie, Keith G. Fife, Nevada J. Sanchez, Tyler S. Ralston
  • Patent number: 10784231
    Abstract: The present invention addresses the problem of enlarging a sensing area in an ultrasonic probe so as to achieve a higher definition. This ultrasonic diagnostic equipment is provided with an ultrasonic probe that comprises: a CMUT chip (2a) that has drive electrodes (3e)-(3j), etc., arranged in a grid-like configuration on a rectangular CMUT element section (21); and a CMUT chip (2b) that has drive electrodes (3p)-(3u), etc., arranged in a grid-like configuration on the rectangular CMUT element section (21), that is adjacent to the CMUT chip (2a), and in which the drive electrodes (3e)-(3j) of the adjacent CMUT chip (2a) are electrically connected to the respective drive electrodes (3p)-(3u) via bonding wires (4f)-(4i), etc.
    Type: Grant
    Filed: June 20, 2017
    Date of Patent: September 22, 2020
    Assignee: HITACHI, LTD.
    Inventors: Yasuhiro Yoshimura, Akifumi Sako, Naoaki Yamashita, Tatsuya Nagata
  • Patent number: 10773952
    Abstract: The present disclosure relates to a wafer-level package that includes a first thinned die having a first device layer, a multilayer redistribution structure, a first mold compound, and a second mold compound. The multilayer redistribution structure includes redistribution interconnects that connect the first device layer to package contacts on a bottom surface of the multilayer redistribution structure. Herein, the connections between the redistribution interconnects and the first device layer are solder-free. The first mold compound resides over the multilayer redistribution structure and around the first thinned die, and extends beyond a top surface of the first thinned die to define an opening within the first mold compound and over the first thinned die. The second mold compound fills the opening and is in contact with the top surface of the first thinned die.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: September 15, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Julio C. Costa, Jon Chadwick, David Jandzinski, Merrill Albert Hatcher, Jr., Jonathan Hale Hammond
  • Patent number: 10771666
    Abstract: The present disclosure provides a camera module and an electrical bracket thereof. The electrical bracket is provided with a clear aperture. The electrical bracket not only has the functions of a conventional circuit board (conduction of the electrical signal of an electronic device such as a chip and a motor), but also has the effects of a conventional base to support an optical filter and serve as a motor base bracket.
    Type: Grant
    Filed: December 1, 2016
    Date of Patent: September 8, 2020
    Assignee: NINGBO SUNNY OPOTECH CO., LTD.
    Inventors: Mingzhu Wang, Baozhong Zhang, Zhen Huang, Feifan Chen, Nan Guo, Zhenyu Chen, Ye Wu
  • Patent number: 10770573
    Abstract: For example, an Electrostatically Formed Nanowire (EFN) may include a source region; at least one drain region; a wire region configured to drive a current between the source and drain regions via a conductive channel; a first lateral-gate area extending along a first surface of the wire region between the source and drain regions; a second lateral-gate area extending along a second surface of the wire region between the source and drain regions; and a sensing area in opening in a backside of a silicon substrate under the wire region and the first and second lateral-gate areas, the sensing area configured to, in reaction to a predefined substance, cause a change in a conductivity of the conductive channel.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: September 8, 2020
    Assignees: TOWER SEMICONDUCTOR LTD., RAMOT AT TEL AVIV UNIVERSITY LTD.
    Inventors: Zohar Shaked, Yakov Roizin, Menachem Vofsy, Alexey Heiman, Yossi Rosenwaks, Klimentiy Shimanovich, Yhonatan Vaknin
  • Patent number: 10760930
    Abstract: Disclosed are sensor packages, methods of manufacturing the same, and methods of manufacturing lid structures. The sensor package comprises a package substrate, a gas sensor on the package substrate, a lid on the package substrate and having a hole extending between a first inner surface and a first outer surface of the lid, the first inner surface of the lid facing toward the package substrate and the first outer surface of the lid facing away from the package substrate, and a waterproof film in the hole of the lid. The waterproof film is formed on the first inner surface and the first outer surface of the lid.
    Type: Grant
    Filed: September 14, 2018
    Date of Patent: September 1, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sungeun Jo, Youngshin Kwon, Minjin Kim, Woonbae Kim, Youngdoo Jung, Eunhee Jung, Inho Choi
  • Patent number: 10761275
    Abstract: The disclosed embodiments relate to an integrated circuit structure and methods of forming them in which photonic devices are formed on the back end of fabricating a CMOS semiconductor structure containing electronic devices. Doped regions associated with the photonic devices are formed using microwave annealing for dopant activation.
    Type: Grant
    Filed: June 22, 2018
    Date of Patent: September 1, 2020
    Assignee: Micron Technology, Inc.
    Inventor: Gurtej Sandhu