Responsive To Non-electrical Signal (e.g., Chemical, Stress, Light, Or Magnetic Field Sensors) Patents (Class 257/414)
  • Patent number: 10734161
    Abstract: A multilayer electronic component includes first and second frame terminals, and first and second electronic components. The first frame terminal includes a first side frame and a first bottom frame extended from a lower end of the first side frame. The second frame terminal includes a second side frame facing the first side frame and a second bottom frame extended from a lower end of the second side frame. The first electronic component is disposed between the first and second side frames, and the second electronic component is stacked on the first electronic component and disposed between the first and second side frames. Conductive adhesives are provided between the first and second side frames and the first and second electronic components, but a conductive adhesive is not formed between the first and second side frames and portions of the first electronic component close to a mounting surface.
    Type: Grant
    Filed: June 1, 2018
    Date of Patent: August 4, 2020
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Beom Joon Cho, Ki Young Kim, Jae Young Na, Jin Mo Ahn
  • Patent number: 10717641
    Abstract: In some embodiments, a sensor includes a microelectromechanical system (MEMS) structure, a cover, and a bump stop. The MEMS structure is configured to move responsive to electromechanical stimuli. The cover is positioned on the MEMS structure. The cover is configured to mechanically protect the MEMS structure. The bump stop is disposed on a substrate and the bump stop is configured to stop the MEMS structure from moving beyond a certain point. The bump stop is further configured to stop the MEMS structure from making physical contact with the substrate. Moreover, the cover is configured to apply a force to the MEMS structure responsive to a voltage being applied to the cover.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: July 21, 2020
    Assignee: InvenSense, Inc.
    Inventors: Alexander Castro, Chae Ahn
  • Patent number: 10676348
    Abstract: The present disclosure relates to a wafer-level package that includes a first thinned die having a first device layer, a multilayer redistribution structure, a first mold compound, and a second mold compound. The multilayer redistribution structure includes redistribution interconnects that connect the first device layer to package contacts on a bottom surface of the multilayer redistribution structure. Herein, the connections between the redistribution interconnects and the first device layer are solder-free. The first mold compound resides over the multilayer redistribution structure and around the first thinned die, and extends beyond a top surface of the first thinned die to define an opening within the first mold compound and over the first thinned die. The second mold compound fills the opening and is in contact with the top surface of the first thinned die.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: June 9, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Julio C. Costa, Jon Chadwick, David Jandzinski, Merrill Albert Hatcher, Jr., Jonathan Hale Hammond
  • Patent number: 10663358
    Abstract: A method of sensing a pressure applied to a surface comprises monitoring an electrical signal generated by redistribution of mobile ions in a piezoionic layer under the surface. An externally applied local pressure at a portion of the layer induces redistribution of mobile ions in the piezoionic layer. It is determined that the surface is pressured based on detection of the electrical signal. A piezoionic sensor includes a sensing surface; a piezoionic layer disposed under the sensing surface such that an externally applied local pressure on a portion of the sensing surface causes detectable redistribution of mobile ions in the piezoionic layer; and electrodes in contact with the layer, configured to monitor electrical signal generated by the redistribution of mobile ions in the piezoionic layer.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: May 26, 2020
    Assignee: The University of British Columbia
    Inventors: John Madden, Mirza Sarwar, Yuta Dobashi, Edmond Cretu, Shahriar Mirabbasi, Ettore Glitz, Meisam Farajollahi
  • Patent number: 10651507
    Abstract: A method for integrating a thin film microbattery with electronic circuitry includes forming a release layer over a handler, forming a thin film microbattery over the release layer of the handler, removing the thin film microbattery from the handler, depositing the thin film microbattery on an interposer, forming electronic circuitry on the interposer, and sealing the thin film microbattery and the electronic circuitry to create individual microbattery modules.
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: May 12, 2020
    Assignee: International Business Machines Corporation
    Inventors: Qianwen Chen, Bing Dang, John U. Knickerbocker
  • Patent number: 10635221
    Abstract: An array substrate includes: a plurality of sub-pixel units arranged in an array, in which every two adjacent rows of the sub-pixel units form one sub-pixel-unit group, and two gate lines that are configured to respectively provide gate signals for the two rows of the sub-pixel units are disposed between the two rows of the sub-pixel units; a plurality of touch driving electrodes, disposed between the sub-pixel-unit groups that are provided on the array substrate, and arranged in a row direction of the sub-pixel units; and a plurality of touch sensing electrodes, disposed on the array substrate, arranged in a column direction of the sub-pixel units, and insulated from the touch driving electrodes and the gate lines.
    Type: Grant
    Filed: December 16, 2013
    Date of Patent: April 28, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Shengji Yang, Xue Dong, Haisheng Wang
  • Patent number: 10637101
    Abstract: A method for integrating a thin film microbattery with electronic circuitry includes forming a release layer over a handler, forming a thin film microbattery over the release layer of the handler, removing the thin film microbattery from the handler, depositing the thin film microbattery on an interposer, forming electronic circuitry on the interposer, and sealing the thin film microbattery and the electronic circuitry to create individual microbattery modules.
    Type: Grant
    Filed: May 3, 2017
    Date of Patent: April 28, 2020
    Assignee: International Business Machines Corporation
    Inventors: Qianwen Chen, Bing Dang, John U. Knickerbocker
  • Patent number: 10629567
    Abstract: Apparatus(es) and method(s) relate generally to via arrays on a substrate. In one such apparatus, the substrate has a conductive layer. First plated conductors are in a first region extending from a surface of the conductive layer. Second plated conductors are in a second region extending from the surface of the conductive layer. The first plated conductors and the second plated conductors are external to the first substrate. The first region is disposed at least partially within the second region. The first plated conductors are of a first height. The second plated conductors are of a second height greater than the first height. A second substrate is coupled to first ends of the first plated conductors. The second substrate has at least one electronic component coupled thereto. A die is coupled to second ends of the second plated conductors. The die is located over the at least one electronic component.
    Type: Grant
    Filed: January 10, 2019
    Date of Patent: April 21, 2020
    Assignee: Invensas Corporation
    Inventors: Cyprian Emeka Uzoh, Rajesh Katkar
  • Patent number: 10629372
    Abstract: A laminated electronic component includes a laminate including internal electrodes and dielectric layers laminated alternately and a first main surface, an external electrode that continuously covers at least one end surface of the laminate in a longitudinal direction and a portion of the first main surface adjacent to the one end surface, and a conductive elastic structure connected to the external electrode at at least corner portions of the first main surface in a portion where the external electrode covers the first main surface. The elastic structure includes a base portion connected to the external electrode to extend along the first main surface, and a branch portion branched from the base portion and extending at a position spaced from the first main surface to connect to another electrode, and having elasticity.
    Type: Grant
    Filed: March 10, 2014
    Date of Patent: April 21, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Yasuo Fujii
  • Patent number: 10618804
    Abstract: A method of manufacturing a semiconductor structure includes receiving a substrate, receiving a heater, receiving an electrode, and receiving a sensing material. The substrate have a first surface, a second surface opposite to the first surface and a plurality of vias extending from the second surface toward the first surface and filled with a conductive or semiconductive material and a first oxide layer, the first oxide layer surrounding the conductive or semiconductive material in the plurality of vias, and a second oxide layer disposed over the first surface and the second surface. The heater is disposed within a membrane over the first surface of the substrate and electrically connected with the substrate. The electrode is over the heater and the membrane; and the sensing material covers a portion of the electrode.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: April 14, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chun-Wen Cheng, Chia-Hua Chu, Fei-Lung Lai, Shiang-Chi Lin
  • Patent number: 10622046
    Abstract: The invention relates to a magnetic memory cell (30), comprising: a stack (31) including a magnetic layer section (34) between a conductive layer section (32) and a section (36) of a layer that is different from the conductive layer, the magnetic layer having a magnetisation (35) perpendicular to the plane of the layers; a metallisation section (42) on which the stack is placed; and first, second, third and fourth metallisation arms (44D to 44G), each arm having a median axis (45D to 45G), wherein, for each arm, a current flowing towards the stack in the direction of the median axis sees that portion of the stack which is closest the arm mostly on its left for the first and second arms (44E, 44G), and mostly on its right for the third and fourth arms (44D, 44F).
    Type: Grant
    Filed: October 5, 2016
    Date of Patent: April 14, 2020
    Assignees: CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE, COMMISSARIAT√Ā L'√ČNERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Gilles Gaudin, Ioan Mihai Miron, Olivier Boulle, Safeer Chenattukuzhiyil
  • Patent number: 10602036
    Abstract: An electronic module includes a mounting surface, a cover disposed above the mounting surface, wherein the cover includes a protruding portion extending from a lower surface of the cover to a predetermined distance, and an adhesion part adhering the protruding portion to the mounting surface.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: March 24, 2020
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Heung Woo Park, Jung Gon Choi
  • Patent number: 10593768
    Abstract: An apparatus and method, the apparatus comprising: at least one electrode configured to provide an electrical connection to a channel of two dimensional material wherein the electrode comprises a conductive layer and plurality of nanostructures wherein at least some of the nanostructures comprise a conductive core and a coating of two dimensional material.
    Type: Grant
    Filed: March 28, 2017
    Date of Patent: March 17, 2020
    Assignee: NOKIA TECHNOLOGIES OY
    Inventors: Mark Allen, Richard White
  • Patent number: 10589993
    Abstract: The present disclosure relates to a wafer-level package that includes a first thinned die having a first device layer, a multilayer redistribution structure, a first mold compound, and a second mold compound. The multilayer redistribution structure includes redistribution interconnects that connect the first device layer to package contacts on a bottom surface of the multilayer redistribution structure. Herein, the connections between the redistribution interconnects and the first device layer are solder-free. The first mold compound resides over the multilayer redistribution structure and around the first thinned die, and extends beyond a top surface of the first thinned die to define an opening within the first mold compound and over the first thinned die. The second mold compound fills the opening and is in contact with the top surface of the first thinned die.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: March 17, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Julio C. Costa, Jon Chadwick, David Jandzinski, Merrill Albert Hatcher, Jr., Jonathan Hale Hammond
  • Patent number: 10580924
    Abstract: Devices and methods for Terahertz (THz) sensing/detection, imaging, spectroscopy, and communication are provided. A graphene-based field effect transistor (FET) can have a quality factor of greater than 400 and a responsivity of at least 400 Volts per Watt. A FET sensor can include a substrate, a gate disposed on the substrate, an insulation layer disposed on the gate and the substrate, a source terminal and a drain terminal disposed on the substrate, and a graphene layer disposed on the insulation layer.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: March 3, 2020
    Assignee: The Florida International University Board of Trustees
    Inventors: Mustafa Karabiyik, Nezih Pala
  • Patent number: 10566089
    Abstract: A method for sensing presence of at least one specified chemical component in a patient's sample gas, associated with a disease (or medical condition), and for associating presence of the disease with presence of the specified chemical component concentration in an identified concentration range. Pattern matching is applied to identify one or more specified components that are present in the sample gas. Measured electrical parameter values (EPVs) for each nanosensor are modeled by constitutive relations dependent on a polynomial of powers of component concentrations. The EPV models are used to estimate component concentrations for the differently functionalized nanosensors. Estimated concentrations are averaged over the sensors to provide an overall concentration value for each surviving specified component. These overall concentration values are compared with concentration ranges associated, to estimate presence or absence of a disease or medical condition.
    Type: Grant
    Filed: December 21, 2012
    Date of Patent: February 18, 2020
    Assignee: United States of America as Represented by the Administrator of NASA
    Inventor: Jing Li
  • Patent number: 10567868
    Abstract: A sound generator includes a housing with an acoustic cavity and including a mounting base and a separation plate extending from the mounting base to the outside of the housing; a speaker unit accommodated in the acoustic cavity and being mounted on the mounting base; a front cavity and a back cavity formed by acoustic cavity divided by the mounting base, the speaker unit and the separation plate; and at least one cavity extending from the mounting base and/or the separation plate. The cavity has at least a first through-hole for communicating the cavity with the front cavity and at least a second through-hole for communicating the cavity with the back cavity.
    Type: Grant
    Filed: January 26, 2017
    Date of Patent: February 18, 2020
    Assignee: AAC Technologies Pte. Ltd.
    Inventor: Peng Qin
  • Patent number: 10551340
    Abstract: The present invention provides capacitor-based fluid sensing units. The capacitor-based fluid sensing unit comprises a substrate, a first electrode configured on the substrate, a sensing layer configured on the first electrode, a second electrode configured on the sensing layer. More particularly, the second electrode is a porous electrode, while the sensing layer is made of a porous dielectric material and has a thickness between 50 nm and 5 mm. Permittivity of the sensing layer changes as fluid permeates from the second electrode to the sensing layer. The subsequent change in capacitance of the capacitor-based fluid sensing unit is used to determine the volume of the fluid.
    Type: Grant
    Filed: January 13, 2017
    Date of Patent: February 4, 2020
    Assignee: CHANG GUNG UNIVERSITY
    Inventors: Chao-Sung Lai, Chia-Ming Yang, Hsin-Yin Peng, Wei-Yin Zeng, Chun-Hui Chen
  • Patent number: 10549988
    Abstract: The present disclosure relates to a wafer-level package that includes a first thinned die having a first device layer, a multilayer redistribution structure, a first mold compound, and a second mold compound. The multilayer redistribution structure includes redistribution interconnects that connect the first device layer to package contacts on a bottom surface of the multilayer redistribution structure. Herein, the connections between the redistribution interconnects and the first device layer are solder-free. The first mold compound resides over the multilayer redistribution structure and around the first thinned die, and extends beyond a top surface of the first thinned die to define an opening within the first mold compound and over the first thinned die. The second mold compound fills the opening and is in contact with the top surface of the first thinned die.
    Type: Grant
    Filed: May 22, 2017
    Date of Patent: February 4, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Julio C. Costa, Jon Chadwick, David Jandzinski, Merrill Albert Hatcher, Jr., Jonathan Hale Hammond
  • Patent number: 10553784
    Abstract: A vertical Hall element and method of fabricating are disclosed. The method includes forming a buried region having a first conductivity type in a substrate having a second conductivity type and implanting a dopant of the first conductivity type into a well region between the top surface of the substrate and the buried region. The buried region has a doping concentration increasing with an increasing depth from a top surface of the substrate and the well region has a doping concentration decreasing from the top surface of the substrate to the buried region. The method includes forming first through fifth contacts on the well region. First and second contacts define a conductive path and second and third contacts define another conductive path through the well region. The fourth contact is formed between first and second contacts and the fifth contact is formed between second and third contacts.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: February 4, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Keith Ryan Green, Iouri Mirgorodski
  • Patent number: 10553626
    Abstract: To provide a solid-state light-receiving device for ultraviolet light which can measure the amount of irradiation with ultraviolet light harmful to the human body using a simplified structure and properly and accurately, which can be readily integrated with a sensor of a peripheral circuit, which is small, light-weight, and low-cost, and which is suitable for mobile or wearable purposes. One solution is a solid-state light-receiving device for ultraviolet light which is provided with a first photodiode (1), a second photodiode (2), and a differential circuit which receives respective signals based on outputs from these photodiodes, wherein a position of the maximum concentration of a semiconductor impurity is provided in each of the photodiodes (1,2) and in a semiconductor layer region formed on each photodiode, and an optically transparent layer having a different wavelength selectivity is provided on a light-receiving surface of each photodiode.
    Type: Grant
    Filed: May 7, 2015
    Date of Patent: February 4, 2020
    Assignee: TOHOKU UNIVERSITY
    Inventors: Shigetoshi Sugawa, Rihito Kuroda
  • Patent number: 10535590
    Abstract: A multi-layer solder-resist provides useful adhesion to a semiconductor device package substrate while allowing for increasingly small geometries of bond pads and spacings.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: January 14, 2020
    Assignee: Intel Corporation
    Inventor: Jonathan L. Rosch
  • Patent number: 10532924
    Abstract: A packaging structure including at least one hermetically sealed cavity in which at least one microelectronic device is arranged, the cavity being formed between a substrate and at least one cap layer through which several release holes are formed. Several separated portions of metallic material are provided such that each of the separated portions of metallic material is arranged on the cap layer above and around one of the release holes and forms an individual and hermetical plug of said one of the release holes. At least one diffusion barrier layer including at least one non-metallic material is arranged on the cap layer and forms a diffusion barrier against an atmosphere outside the cavity at least around the release holes. Parts of the diffusion barrier layer are not covered by the portions of metallic material.
    Type: Grant
    Filed: December 6, 2013
    Date of Patent: January 14, 2020
    Assignees: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES, EPCOS AG
    Inventors: Damien Saint-Patrice, Arnoldus Den Dekker, Marcel Giesen, Gudrun Henn, Jean-Louis Pornin, Bruno Reig
  • Patent number: 10531204
    Abstract: A multi-device module, comprising: a first substrate, which houses a first MEMS transducer, designed to transduce a first environmental quantity into a first electrical signal, and an integrated circuit, coupled to the first MEMS transducer for receiving the first electrical signal; a second substrate, which houses a second MEMS transducer, designed to transduce a second environmental quantity into a second electrical signal; and a flexible printed circuit, mechanically connected to the first and second substrates and electrically coupled to the integrated circuit and to the second MEMS transducer so that the second electrical signal flows, in use, from the second MEMS transducer to the integrated circuit.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: January 7, 2020
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Roberto Brioschi, Marco Omar Ghidoni
  • Patent number: 10522743
    Abstract: The present invention provides a Hall element module for achieving miniaturization. A Hall element module includes a Hall element having an element surface and an element back surface, a terminal portion electrically connected to the Hall element and separated from the Hall element as viewed in a z direction, and a resin package covering at least one portion of each of the Hall element and the terminal. The resin package has a rectangular shape with four sides along the x direction and the y direction as viewed in the z direction. The terminal portion includes a terminal back surface facing the z direction and exposed from the resin package. An end edge of the terminal back surface includes a terminal back surface inclined portion opposed to the Hall element and inclined with respect to the x direction and the y direction as viewed in the z direction.
    Type: Grant
    Filed: October 5, 2018
    Date of Patent: December 31, 2019
    Assignee: ROHM CO., LTD.
    Inventors: Satohiro Kigoshi, Shinsei Mizuta
  • Patent number: 10518292
    Abstract: CMOS Ultrasonic Transducers and processes for making such devices are described. The processes may include forming cavities on a first wafer and bonding the first wafer to a second wafer. The second wafer may be processed to form a membrane for the cavities. Electrical access to the cavities may be provided.
    Type: Grant
    Filed: January 11, 2018
    Date of Patent: December 31, 2019
    Assignee: Butterfly Network, Inc.
    Inventors: Jonathan M. Rothberg, Keith G. Fife, Tyler S. Ralston, Gregory L. Charvat, Nevada J. Sanchez
  • Patent number: 10509938
    Abstract: A fingerprint sensor package and method are provided. The fingerprint sensor package comprises a fingerprint sensor along with a fingerprint sensor surface material and electrical connections from a first side of the fingerprint sensor to a second side of the fingerprint sensor. A high voltage chip is connected to the fingerprint sensor and then the fingerprint sensor package with the high voltage chip are connected to a substrate, wherein the substrate has an opening to accommodate the presence of the high voltage chip.
    Type: Grant
    Filed: April 22, 2019
    Date of Patent: December 17, 2019
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Yu-Feng Chen, Chih-Hua Chen, Hao-Yi Tsai, Chung-Shi Liu
  • Patent number: 10499523
    Abstract: The present invention provides a fingerprint recognition module, including: a substrate, a fingerprint sensing die fixed on the substrate, an encapsulation layer covering the fingerprint sensing die and the substrate, the encapsulation layer having a composition plane, and an imprint layer, where the imprint layer is formed on the composition plane.
    Type: Grant
    Filed: November 16, 2017
    Date of Patent: December 3, 2019
    Assignee: PRIMAX ELECTRONICS LTD.
    Inventor: Chih-Hao Hsu
  • Patent number: 10497747
    Abstract: Microelectromechanical (MEMS) devices and associated methods are disclosed. Piezoelectric MEMS transducers (PMUTs) suitable for integration with complementary metal oxide semiconductor (CMOS) integrated circuit (IC), as well as PMUT arrays having high fill factor for fingerprint sensing, are described.
    Type: Grant
    Filed: August 18, 2015
    Date of Patent: December 3, 2019
    Assignee: INVENSENSE, INC.
    Inventors: Julius Ming-Lin Tsai, Michael Daneman
  • Patent number: 10491980
    Abstract: A first MEMS motor and s second MEMS motor share a common back volume and a common support structure, and the common support structure is configured to support a first diaphragm and the first back plate, and the common support structure is also configured to support the second diaphragm and the second back plate. A channel passes through the common support structure and communicates with the exterior environment, the channel being of a first diameter, the channel being disposed beyond an outer periphery of each back plate. An opening extends through the silicon nitride layer, the opening having a second diameter, the second diameter being less than the first diameter, the channel communicating with the opening. The opening has a length that is orthogonal to second diameter, and the first back plate and the second back plate have a thickness, wherein the length is no greater than twice the thickness.
    Type: Grant
    Filed: August 3, 2016
    Date of Patent: November 26, 2019
    Assignee: Knowles Electronics, LLC
    Inventor: Sung Bok Lee
  • Patent number: 10474866
    Abstract: A finger biometric sensor may include a lower conductive layer, an upper conductive layer, and a spacer between the lower and upper conductive layers to define an air gap therebetween. The finger biometric sensor may also include a finger biometric sensing integrated circuit (IC) above the upper conductive layer and capable of deflecting the upper conductive layer toward the lower conductive layer to change a capacitance thereof based upon pressure applied to the finger biometric sensing IC. A pressure sensing circuit may be coupled to the lower and upper conductive layers to sense the change in capacitance.
    Type: Grant
    Filed: June 25, 2018
    Date of Patent: November 12, 2019
    Assignee: APPLE INC.
    Inventor: Dale R. Setlak
  • Patent number: 10464808
    Abstract: A semiconductor arrangement and method of formation are provided. The semiconductor arrangement includes a MEMS device in a MEMS area, where a first metal layer is connected to a first metal connect adjacent the MEMS area and a cap is over the MEMS area to vacuum seal the MEMS area. A first wafer portion is over and bonded to the first metal layer which connects the first metal connect to a first I/O port using metal routing. The first metal layer and the first wafer portion bond requires 10% less bonding area than a bond not including the first metal layer. The semiconductor arrangement including the first metal layer has increased conductivity and requires less processing than an arrangement that requires a dopant implant to connect a first metal connect to a first I/O port and has a better vacuum seal due to a reduction in outgassing.
    Type: Grant
    Filed: October 2, 2017
    Date of Patent: November 5, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED
    Inventors: Hsin-Ting Huang, Hsiang-Fu Chen, Wen-Chuan Tai, Chia-Ming Hung, Shao-Chi Yu, Hung-Hua Lin, Yuan-Chih Hsieh
  • Patent number: 10457549
    Abstract: A semiconductive structure includes a first substrate comprising an interconnection layer and a first conductor protruding from the interconnection layer, a second substrate comprising a second conductor bonded with the first conductor, a first cavity between and sealed by the first substrate and the second substrate and the first cavity has a first cavity pressure, a second cavity between and sealed by the first substrate and the second substrate and the second cavity has a second cavity pressure, a first surface of the interconnection layer is a sidewall of the first cavity, wherein the first cavity pressure is less than the second cavity pressure.
    Type: Grant
    Filed: June 9, 2017
    Date of Patent: October 29, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANFACTURING COMPANY LTD.
    Inventors: Yen-Cheng Liu, Cheng-Yu Hsieh, Shang-Ying Tsai, Kuei-Sung Chang
  • Patent number: 10455309
    Abstract: A MEMS transducer package (1) comprises a semiconductor die element (3) and a cap element (23). The semiconductor die element (3) and cap element (23) have mating surfaces (9, 21). The semiconductor die element (3) and cap element (23) are configured such that when the semiconductor die element (3) and cap element (4) are conjoined, a first volume (7, 27) is formed through the semiconductor die element (3) and into the semiconductor cap element (23), and an acoustic channel is formed to provide an opening between a non-mating surface (11) of the semiconductor die element (3) and either a side surface (10, 12) of the transducer package or a non-mating surface (29) of the cap element (23).
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: October 22, 2019
    Assignee: Cirrus Logic, Inc.
    Inventors: Tsjerk Hoekstra, David Talmage Patten
  • Patent number: 10436731
    Abstract: A miniature gas sensing device includes a silicon-based substrate including an opening. A first membrane is formed over the silicon-based substrate and a first portion of the first membrane covers the opening. A gas sensing layer is formed over a number of electrodes disposed over a first surface of the first portion of the first membrane and one or more heating elements. A permeable enclosure encapsulating the gas sensing layer can maintain thermal energy density over the gas sensing layer at a level sufficient to destroy a target gas to allow measuring a zero baseline.
    Type: Grant
    Filed: July 27, 2018
    Date of Patent: October 8, 2019
    Assignee: Apple Inc.
    Inventors: Paulo S. Motta, Roberto M. Ribeiro, Richard Yeh
  • Patent number: 10424523
    Abstract: A method for forming a sealed cavity includes bonding a non-conductive structure to a first substrate to form a non-conductive aperture into the first substrate. On a surface of the non-conductive structure opposite the first substrate, the method includes depositing a first metal layer. The method further includes patterning a first iris in the first metal layer, depositing a first dielectric layer on a surface of the first metal layer opposite the non-conductive structure, and patterning an antenna on a surface of the first dielectric layer opposite the first metal layer. The method also includes creating a cavity in the first substrate, depositing a second metal layer on a surface of the cavity, patterning a second iris in the second metal layer, and bonding a second substrate to a surface of the first substrate opposite the non-conductive structure to thereby seal the cavity.
    Type: Grant
    Filed: September 7, 2017
    Date of Patent: September 24, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Adam Joseph Fruehling, Juan Alejandro Herbsommer, Simon Joshua Jacobs, Benjamin Stassen Cook
  • Patent number: 10403789
    Abstract: This disclosure discloses a light-emitting element having a light-emitting unit, a transparent layer and a wavelength conversion layer formed on the transparent layer. The transparent layer covers the light-emitting unit. The wavelength conversion layer includes a phosphor layer having a phosphor and a stress release layer without the phosphor.
    Type: Grant
    Filed: February 3, 2017
    Date of Patent: September 3, 2019
    Assignee: Epistar Corporation
    Inventors: Ching-Tai Cheng, Ju-lien Kuo, Min-Hsun Hsieh, Shau-Yi Chen, Shih-An Liao, Jhih-Hao Chen
  • Patent number: 10393695
    Abstract: A method of manufacturing an integrated circuit device includes providing a substrate comprising a semiconductor active layer, and forming source/drain regions, temperature sensors, and heating elements either in the semiconductor active layer or on the front side of the semiconductor active layer. The semiconductor active layer has channel regions between adjacent source/drain regions, and each of the heating elements is aligned over at least a portion of a corresponding temperature sensor. The method also includes forming a metal interconnect structure over the front side of the semiconductor active layer and exposing the channel regions from the back side of the semiconductor active layer substrate. A fluid gate dielectric layer is formed over the exposed channel regions.
    Type: Grant
    Filed: October 19, 2018
    Date of Patent: August 27, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yi-Shao Liu, Jui-Cheng Huang, Tung-Tsun Chen
  • Patent number: 10384935
    Abstract: A method of functionalizing carbon nanotubes with metallic moieties is disclosed. Carbon nanotubes are first associated with one or more binding moieties to provide carbon nanotubes encapsulated by the binding moieties. The encapsulated carbon nanotubes are then contacted with a metal salt or a metal complex that binds to the binding moieties. Reduction of the metal salt or metal complex provides carbon nanotubes functionalized with metal nanoparticles.
    Type: Grant
    Filed: July 7, 2009
    Date of Patent: August 20, 2019
    Assignee: NORTHWESTERN UNIVERSITY
    Inventors: Gordana Ostojic, Mark C. Hersam
  • Patent number: 10370244
    Abstract: A semiconductor device and a method of manufacturing the same are provided such that a microelectromechanical systems (MEMS) element is protected at an early manufacturing stage. A method for protecting a MEMS element includes: providing at least one MEMS element, having a sensitive area, on a substrate; and depositing, prior to a package assembly process, a protective material over the sensitive area of the at least one MEMS element such that the sensitive area of at least one MEMS element is sealed from an external environment, where the protective material permits a sensor functionality of the at least one MEMS element.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: August 6, 2019
    Assignee: Infineon Technologies AG
    Inventors: Florian Brandl, Manfred Fries, Franz-Peter Kalz
  • Patent number: 10358341
    Abstract: Embodiments of multi-frequency excitation are described. In various embodiments, a natural frequency of a device may be determined. In turn, a first voltage amplitude and first fixed frequency of a first source of excitation can be selected for the device based on the natural frequency. Additionally, a second voltage amplitude of a second source of excitation can be selected for the device, and the first and second sources of excitation can be applied to the device. After applying the first and second sources of excitation, a frequency of the second source of excitation can be swept. Using the methods of multi-frequency excitation described herein, new operating frequencies, operating frequency ranges, resonance frequencies, resonance frequency ranges, and/or resonance responses can be achieved for devices and systems.
    Type: Grant
    Filed: September 4, 2015
    Date of Patent: July 23, 2019
    Assignee: KING ABDULLAH UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventor: Mohammad Younis
  • Patent number: 10350593
    Abstract: A device for monitoring fluid media, and methods of manufacture thereof are disclosed. The monitoring device may be implemented as a single monolithic unit made from a certain type of material without a separate packaging, and having a base element comprising at least one fluid port and at least one cavity or fluid flow path fluidly coupled to the at least one fluid port for enabling fluid exchange of fluid media therewith. The device comprises at least one sensing element associated with the cavity or fluid flow path and configured and operable for measuring at least one property or condition of fluid media introduced thereinto, and generate measurement data or signals indicative thereof. Electrical contacts disposed on the base element of the device, and electrically coupled to the at least one sensing element are used for establishing electrical connection with the at least one sensing element.
    Type: Grant
    Filed: August 3, 2016
    Date of Patent: July 16, 2019
    Assignee: EZMEMS LTD.
    Inventors: Tsvi Shmilovich, Nicola Molinazzi
  • Patent number: 10352848
    Abstract: A gas detection system, comprising a sample gas inlet, a reference gas inlet and a gas modulation valve alternatingly connecting one of the sample gas inlet and the reference gas inlet to a gas sensor, is characterized in that a selective transfer filter is located in the gas flow path connecting the gas modulation valve and the gas sensor.
    Type: Grant
    Filed: October 24, 2016
    Date of Patent: July 16, 2019
    Assignee: INFICON GmbH
    Inventors: Fredrik Enquist, Niclas Edvardsson, Johan Hellgren, Henrik Vennerberg
  • Patent number: 10347692
    Abstract: An organic light emitting display device in an embodiment of the present invention comprises a display panel equipped with a plurality of pixels each including an OLED and a driving TFT for driving the OLED and a sensing circuit connected to pixels through a sensing line and detecting driving characteristics of a corresponding pixel. The sensing circuit may comprise a plural sensing units including an integrator for integrating currents respectively flowing two adjacent sensing lines connected to inverting and non-inverting input terminals of a fully differential amplifier, a sampling unit for respectively sampling two integral outputs of the integrator and a scaler for regulating an operating range of outputs of the sampling unit, a differential amplifier for differentially amplifying one or more outputs of the scaler, and an ADC for converting an output of the differential amplifier into a digital sensing value.
    Type: Grant
    Filed: October 24, 2017
    Date of Patent: July 9, 2019
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Taeyoung Lee, Changwoo Lee, Osung Do
  • Patent number: 10343895
    Abstract: A method for forming a micro-electro-mechanical system (MEMS) device structure is provided. The MEMS device structure includes a micro-electro-mechanical system (MEMS) substrate, and a substrate formed over the MEMS substrate. The substrate includes a semiconductor via through the substrate. The MEMS device structure includes a dielectric layer formed over the substrate and a polymer layer formed on the dielectric layer. The MEMS device structure also includes a conductive layer formed in the dielectric layer and the polymer layer. The conductive layer is electrically connected to the semiconductor via, and the polymer layer is between the conductive layer and the dielectric layer.
    Type: Grant
    Filed: February 14, 2018
    Date of Patent: July 9, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Kai-Fung Chang, Lien-Yao Tsai, Len-Yi Leu
  • Patent number: 10325131
    Abstract: Embodiments described herein include an input device including an array of sensing pixels configured to sense an input object in a sensing region, each of the sensing pixels including a sense element. Each of the sensing pixels also includes a first transistor, wherein the first transistor includes a gate terminal connected to a row select line and a second terminal connected to the sense element. Each of the sensing pixels also includes a non-linear circuit element, wherein the non-linear circuit element includes a first terminal connected to the sense element and the second terminal of the first transistor, and wherein the non-linear circuit element further includes a second terminal connected to a column output line.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: June 18, 2019
    Assignee: SYNAPTICS INCORPORATED
    Inventors: Arash Akhavan Fomani, Patrick Smith
  • Patent number: 10322481
    Abstract: A structure for fixing a membrane to a carrier including a carrier; a suspended structure; and a holding structure with a rounded concave shape which is configured to fix the suspended structure to the carrier and where a tapered side of the holding structure physically connects to the suspended structure is disclosed. A method of forming the holding structure on a carrier to support a suspended structure is further disclosed. The method may include: forming a holding structure on a carrier; forming a suspended structure on the holding structure; shaping the holding structure such that it has a concave shape; and arranging the holding structure such that a tapered side of the holding structure physically connects to the suspended structure.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: June 18, 2019
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Alfons Dehe, Reinhard Gabl, Ulrich Krumbein
  • Patent number: 10315917
    Abstract: A micromechanical sensor device and a corresponding manufacturing method. The micromechanical sensor device is equipped with a substrate which includes a diaphragm area, multiple sensor layer areas being formed on the diaphragm area, which have a particular structured sensor layer; and a particular electrode device, via which the sensor layer areas are electrically connectable outside of the diaphragm area, the sensor layer areas being structured in such a way that they have length and width dimensions of a magnitude between 1 and 10 micrometers.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: June 11, 2019
    Assignee: ROBERT BOSCH GMBH
    Inventors: Andreas Krauss, Elisabeth Preiss
  • Patent number: 10308507
    Abstract: Provided herein is a method including forming a cavity in a first side of a first silicon wafer. An oxide layer is formed on the first side and in the cavity. The first side of the first silicon wafer is bonded to a first side of a second silicon wafer, and a gap control structure is deposited on a second side of the second silicon wafer. A MEMS structure is formed in the second silicon wafer. The second side of the second silicon wafer is eutecticly bonded to the third silicon wafer, and the eutectic bonding includes pressing the second silicon wafer to the third silicon wafer.
    Type: Grant
    Filed: October 20, 2016
    Date of Patent: June 4, 2019
    Assignee: InvenSense, Inc.
    Inventors: Jong Ii Shin, Peter Smeys, Bongsang Kim
  • Patent number: 10297515
    Abstract: A fingerprint sensor device and a method of making a fingerprint sensor device. As non-limiting examples, various aspects of this disclosure provide various fingerprint sensor devices, and methods of manufacturing thereof, that comprise a sensing area on a bottom side of a die without top side electrodes that senses fingerprints from the top side, and/or that comprise a sensor die directly electrically connected to conductive elements of a plate through which fingerprints are sensed.
    Type: Grant
    Filed: April 18, 2016
    Date of Patent: May 21, 2019
    Assignee: Amkor Technology, Inc.
    Inventors: Sung Sun Park, Ji Young Chung, Christopher Berry