Abstract: An avalanche breakdown diode includes a p-doped trough in which a highly p-doped region is introduced. In addition to the trough, an n-doped region is introduced, which is underlaid by a p-doped layer. The trough and the p-doped layer define a precisely established interspace. The arrangement is introduced into a p-type substrate. An insulating layer and thereon, in turn, a conductive layer are applied over the region between the trough and the p-doped layer. The conductive layer and the n-doped region are connected to a positive voltage and the highly p-doped region is connected to a negative voltage. A drift of the breakdown voltage is thereby prevented. In addition, the resistance during the breakdown is small due to the defined interspace between the trough and the layer.

Abstract: A protection circuit (13) for an integrated circuit (10) is capable of handling higher externally-provided voltages supplied to internal circuitry within the integrated circuit (10). The protection circuit (13) comprises a zener diode (20), wherein a N+ type diffusion region (38) is separated from a P field implant (40) lying between the N+ type diffusion region (38) and a P+ type diffusion region (39).

Abstract: An improved structure and method for forming an integrated circuit guard ring which prevents contamination/moisture from diffusing through a fuse opening, in the insulating layer(s), to device areas, is described. A first insulating layer is formed over portions of the substrate. A gate insulating layer is formed surrounding the first insulating layer. The first ring surrounds a fuse area--including the area where the fuse will be cut by a laser or burned by a current. A first dielectric layer is formed over the substrate surface. A first passivation layer is then formed over the first insulating layer. A first opening is formed through the first passivation layer and first dielectric layer over the first ring. A fuse is formed over the first passivation layer over the fuse area and a second ring of water impervious material is formed on the first ring through the first opening. The first and second rings form a moisture impervious seal.

Abstract: A semiconductor device that includes at least one MOS transistor that is formed on a semiconductor substrate, in which there is a structure for protecting circuit elements such as transistors from excessive static electricity from the outside, such as surge input and static electricity generated during the production process. Transistors and diodes are formed so that contact is made between a high impurity concentration diffusion region that forms the source or drain and a low impurity concentration diffusion region that has a conductivity opposite that of the high impurity concentration diffusion region that forms an LDD structure transistor offset. By making contact between a high impurity concentration diffusion region and a low impurity concentration diffusion region, there is formed a circuit element that reduces the junction breakdown voltage. In addition, by using the offset of the CMOS structure, there is no increase in the number of production process steps.

Abstract: A low-noise Zener diode that enables to improve the surge resistance performance without degeneration of its low-noise characteristic is provided. The diode contains a semiconductor substrate of a first conductivity type and a first impurity doped region of a second conductivity type formed in a surface area of the substrate. The first impurity doped region has spaces into which no impurity of the second conductivity type is doped. The diode further contains a second impurity doped region of the second conductivity type formed in the first impurity doped region. The second impurity doped region has a depth less than that of the first impurity doped region. The second impurity doped region is contacted with the substrate in the spaces, producing main p-n junctions of the diode at respective interfaces of the second impurity doped regions and the substrate. The second impurity doped region is contacted with the first impurity doped region other than in the spaces.

Abstract: A high speed soft recovery diode having a large breakdown voltage is disclosed. Anode P layers (3) are selectively formed in a top portion of an N.sup.- body (2). A P.sup.- layer (4a) is disposed in the top portion of the N.sup.- body (2) so as to be spacewise complementary to the anode P layers (3). In the N.sup.- body (2), P regions (5) are selectively formed below the P.sup.- layer (4a). On the N.sup.- body (2), an anode electrode (6) is disposed in contact with both the P.sup.- layer (4a) and the anode P layers (3). A cathode electrode (7) is disposed under the N.sup.- body (2) through a cathode layer (1). When the diode is reverse-biased, a depletion layer does not have a sharply curved configuration due to the P regions (5). Hence, concentration of electric field is avoided and a breakdown voltage would not deteriorate. During forward-bias state of the diode, injection of excessive holes from the anode P layers (3) into the N.sup.- body (2) is prevented, thereby reducing a recovery current.

Abstract: An avalanche semiconductor switch device utilizes trigger input. The integrated trigger input is a charge carrier injector which injects charge carriers directly into the avalanche semiconductor switch device. The avalanche semiconductor switch device includes: an active, semi-insulating layer; an anode; a cathode; and an injector disposed on the anode contact. The injector serves to switch the device into a state of very high conductance when a positive bias is applied to the injector. The integrated trigger input allows low power optical sources to be used with the avalanche semiconductor switch device further back in the trigger chain. The injector may inject holes or electrons. The injector may be integrated on one side of the substrate.

Abstract: A semiconductor device for electrostatic-charge protection is provided. The device includes first and second diodes parallel-connected and an MOS transistor connected serially to the second diode, all of which are provided on a semiconductor substrate. The breakdown voltages of the first and second diodes are higher than the threshold voltage of the MOS transistor. When a voltage lower than the threshold voltage is applied across a pair of electrodes of the device, the MOS transistor is open, so that only the first diode is effective, providing small capacitance between the pair of the electrodes. When a voltage equal to or higher than the threshold voltage is applied across the pair of the electrodes, the MOS transistor becomes short, so that both of the first and second diodes becomes effective.

Abstract: Semiconductor arrangements, in particular diodes, have a p-layer and two n-layers that are doped to varying degrees of thickness. The p-n junction between the p-layer and the heavily doped n-layer is arranged in the chip so as to allow it to lie completely inside the chip. The p-n junction between the p-layer and the n-layer is situated in the outside areas of the chip. This arrangement does not permit any high field strengths to occur on the outside of the chip and, at the same time, it makes it possible for easily reproducible properties to be achieved. The manufacturing method can also be carried-out outside of a clean room.

Abstract: An insulated gate bipolar transistor has a reverse conducting function built therein. A semiconductor layer of a first conduction type is formed on the side of a drain, a semiconductor layer of a second conduction type for causing conductivity modulation upon carrier injection is formed on the semiconductor layer of the first conduction type, a semiconductor layer of the second conduction type for taking out a reverse conducting current opposite in direction to a drain current is formed in the semiconductor layer of the second conduction type which is electrically connected to a drain electrode, and a semiconductor layer of the second conduction type is formed at or in the vicinity of a pn junction, through which carriers are given and received to cause conductivity modulation, with a high impurity concentration resulting in a path for the reverse conducting current into a pattern not impeding the passage of the carriers.

Abstract: A reference diode is formed in an N-type insulated well. An avalanche diode includes a P-type deep region having a high doping level, beneath which is formed an N-type overlapping buried layer, a P-type deep diffused region contacting a central portion of the deep region, a second, P-type, deep diffused region contacting the periphery of the deep region, an N-type highly doped surface region coating the surface of the first deep diffused region and forming therewith an avalanche junction. At least another structure identical to the avalanche diode structure, without the N-type surface region, forms a resistor between its electrodes.

Abstract: A reference diode is formed in an N-type insulated well. An avalanche diode includes a P-type deep region having a high doping level, beneath which is formed an N-type overlapping buried layer, a P-type deep diffused region contacting a central portion of the deep region, a second, P-type, deep diffused region contacting the periphery of the deep region, an N-type highly doped surface region coating the surface of the first deep diffused region and forming therewith an avalanche junction. At least another structure identical to the avalanche diode structure, without the N-type surface region, forms a resistor between its electrodes.

Abstract: A high speed soft recovery diode having a large breakdown voltage is disclosed. Anode P layers (3) are selectively formed in a top portion of an N.sup.- body (2). A P.sup.- layer (4a) is disposed in the top portion of the N.sup.- body (2) so as to be spacewise complementary to the anode P layers (3). In the N.sup.- body (2), P regions (5) are selectively formed below the P.sup.- layer (4a). On the N.sup.- body (2), an anode electrode (6) is disposed in contact with both the P.sup.- layer (4a) and the anode P layers (3). A cathode electrode (7) is disposed under the N.sup.- body (2) through a cathode layer (1). When the diode is reverse-biased, a depletion layer does not have a sharply curved configuration due to the P regions (5). Hence, concentration of electric field is avoided and a breakdown voltage would not deteriorate. During forward-bias state of the diode, injection of excessive holes from the anode P layers (3) into the N.sup.- body (2) is prevented, thereby reducing a recovery current.

Abstract: A semiconductor device including first and second diodes which are provided on the same side of a semiconductor substrate of a first conductivity type and which are connected in series with each other through the substrate. A main surface of the substrate is covered with an insulator film having first and second windows. A first patterned conductive film of a second conductivity type is in contact with the main surface of the substrate through the first window. The first conductive film and the substrate forme a p-n junction of a first diode at their interface. A second patterned conductive film is formed on the first conductive film acting as one of electrodes of the semiconductor device. A first conductive region of the second conductivity type is formed in a surface area of the substrate adjacent to the main surface. The first conductive region and the substrate form a p-n junction of a second diode at their interface.

Abstract: A zener diode having a semiconductor body (1) with a surface zone (1') doped with more than 10.sup.18 atoms/cc, in which at least two regions (2, 3) are provided through diffusion, which regions have substantially the same concentration of doping atoms and adjoin a surface (4) of the surface zone (1') and form p-n junctions (5,6) with the surface zone (1'), a first region (2) having a smaller lateral cross-section and a smaller depth than a second region (3). Both regions (2, 3) are connected to a first connection electrode (7, 8) provided on the surface (4), and a second connection electrode (9), which is spaced apart from the regions (2, 3), is provided on the semiconductor body (1). The first region has a side edge (10) which is formed through lateral diffusion and which is at least partly spaced apart from the second region (3). A higher electric field is created locally in the junction (5) during operation of the zener diode owing to the side edge (10).

Abstract: A zener diode with a low reverse breakdown avalanche voltage and the use of zener diode in electrostatic discharge protection circuit is described herein. The low breakdown avalanche voltage is achieved by creating a zener diode with a lightly doped region between the P+ and N+ zones. Zener diode disclosed herein is particularly useful in protection circuits for integrated circuits having features or sizes of one micron or less.

Abstract: An active semiconductor device having a negative resistance based upon a negative effective mass of carriers in the semiconductor. A PN junction formed between semiconductor regions of P and N conductivity types is biased in a constant steady state current condition of a fixed reversible break down in the reverse direction based on the avalanche phenomenon, then the carriers may have negative effective mass in all directions within the region in which the carriers moved out of the transition region and are not so many times scattered by the lattice. The negative resistance relying upon this condition can be directly obtained as output by providing two output electrodes on one of the surfaces of the two types of semiconductor regions which sandwich the PN junction.