Abstract: A sensor unit including a first semiconductor component and a second semiconductor component, the first semiconductor component including a first substrate and a sensor structure. The second semiconductor component includes a second substrate, the first and second semiconductor components being connected to each other with the aid of a wafer connection, the sensor unit having a decoupling structure, which is configured in such a way that the sensor structure is decoupled thermally and/or mechanically from the second semiconductor component.

Abstract: Disclosed are EMI shielded packages, electronic device packages, and related methods. EMI shielded packages are formed by applying an insulating material to a first side of a substrate strip, separating the substrate strip into segments, adhering the insulating material of the segments to a solid conductor, applying a conductive paste around lateral sides of the segments, curing the conductive paste, and cutting through the conductive paste and the solid conductor to form the EMI packages. An electronic device package includes a substrate including electronic circuitry, an EMI shield, and an insulating material insulating the substrate from the EMI shield. The EMI shield includes a solid conductor adhered to the insulating material, and a cured conductive paste at least partially surrounding a lateral edge of the substrate. The cured conductive paste electrically connects the solid conductor to a conductive terminal in a lateral side of the substrate.

Abstract: One semiconductor device includes a wiring substrate, a semiconductor chip, and a sealing body. The wiring substrate includes an insulating base material, a first conductive pattern formed on one surface of the insulating base material, and a second conductive pattern formed on one surface of the insulating base material, connected to the first conductive pattern and having an end face exposed to the side. The semiconductor chip is mounted on the wiring substrate so as to overlap with the first conductive pattern. The sealing body is formed on the wiring substrate so as to cover the semiconductor chip.

Abstract: An electronic apparatus includes a housing that houses an electronic component, and a first cover and a second cover that cover the housing, wherein the electronic component is oriented along and on an inner side of a first sidewall of the first cover, wherein a side surface of the electronic component that faces the first sidewall has a cut, wherein the first cover has a recess that is depressed from the first sidewall toward the inner side in such a manner as to conform to the cut, and wherein the first cover is fastened at the recess to the second cover with a fastening member.

Abstract: A magnetic shielded package includes a magnetic device, a first magnetic shield member, and a second magnetic shield member. The first magnetic shield member is disposed below the magnetic device. The second magnetic shield member is disposed on the first magnetic shield member so as to cover the magnetic device. An opening portion is formed in the first magnetic shield member (i) at such a position as not to be adjacent to an outer circumference of the first magnetic shield member or (ii) an upper wall of the second magnetic shield member.

Abstract: This power receiving device includes a magnetic shield, and the magnetic shield includes: a first magnetic sheet located beside the power receiving unit; a conductive sheet located opposite to the power receiving unit with the first magnetic sheet interposed therebetween; and a second magnetic sheet located opposite to the first magnetic sheet with the conductive sheet interposed therebetween.

Abstract: A display device is disclosed. In one aspect, the display device includes a first power wire is disposed in a non-display area of a substrate and includes a first wiring extending in a first direction and a second wiring spaced apart from the first wiring. A second power wire is disposed in the non-display area and includes an extension portion extending in a second direction crossing the first direction, the extension portion located between the first and second wirings. A protective layer covers the first and second power wires, and a bridge wire is disposed on the protective layer and configured to electrically connect the first wiring to the second wiring. A vertical gap between the bridge wire and the extension portion is greater than a vertical gap between the bridge wire and the first wiring or a vertical gap between the bridge wire and the second wiring.

Abstract: A semiconductor package, and a method of manufacturing thereof, comprising a contact in a plated sidewall encapsulant opening, substantially as shown in and/or described in connection with at least one of the figures, as set forth more completely in the claims.

Abstract: Semiconductor chip laminates and inductive, capacitive, and electromagnetic shielding laminate structures that can be integrated together to form electronic circuits for use in systems and devices such as smartphones, tablet computers, notebook computers, wearable electronic devices, portable medical devices, servers, networking equipment, industrial equipment, etc. Fabrications of such integrated laminate structures can be modularized into four (4) types of laminates, namely, inductive laminates, capacitive laminates, electromagnetic shielding laminates, and semiconductor chip laminates, which can be vertically laminated together and/or integrated side-by-side with high density to produce the desired electronic circuits, systems, and devices.

Abstract: Package structures and methods for forming the same are provided. The package structure includes an integrated circuit die and a first shielding feature over a base layer. The package structure also includes a package layer encapsulating the integrated circuit die and the first shielding feature. The package structure further includes a second shielding feature extending from the side surface of the base layer towards the first shielding feature to electrically connect to the first shielding feature. The side surface of the second shielding feature faces away from the side surface of the base layer and is substantially coplanar with the side surface of the package layer.

Abstract: The present invention relates to a two-end driving, high-frequency sub-substrate structure, comprising a sub-substrate body, wherein: the sub-substrate body has an upper side provided with a first signal pad area and a second signal pad area, the first signal pad area and the second signal pad area are symmetric with respect to each other, each of the first signal pad area and the second signal pad area extends from one of two lateral portions of the sub-substrate body in an extending direction toward a center of the sub-substrate body and terminates in an end, the end of the first signal pad area is adjacent to but spaced from the end of the second signal pad area, the first signal pad area is configured for supporting a semiconductor chip provided thereon, the second signal pad area is provided with a jumper wire connected to an electrode of the semiconductor chip, there are two grounding pad areas provided respectively on two lateral sides of the first signal pad area and the second signal pad area and con

Abstract: A semiconductor package may include a semiconductor device mounted on a package substrate, a conductive roof located over the semiconductor device, a plurality of conductive walls disposed on the package substrate and arrayed in a closed loop line surrounding the semiconductor device. Conductive pillars may be disposed in regions between the conductive walls on the package substrate and bonded to the conductive roof. The semiconductor package may include a first dielectric layer filling a space between the package substrate and the conductive roof.

Abstract: A process fluid pressure measurement probe includes a pressure sensor formed of a single-crystal material and mounted to a first metallic process fluid barrier and disposed for direct contact with a process fluid. The pressure sensor has an electrical characteristic that varies with process fluid pressure. A feedthrough is formed of a single-crystal material and has a plurality of conductors extending from a first end to a second end. The feedthrough is mounted to a second metallic process fluid barrier and is spaced from, but electrically coupled to, the pressure sensor. The pressure sensor and the feedthrough are mounted such that the secondary metallic process fluid barrier is isolated from process fluid by the first metallic process fluid barrier.

Abstract: Provided is a method of fabricating a semiconductor package. The method includes providing a substrate including a plurality of semiconductor chips; forming a mold layer covering the semiconductor chips; forming a first shielding layer on the mold layer; cutting the mold layer and the first shielding layer to form trenches between the semiconductor chips; and forming a second shielding layer to fill the trenches.

Abstract: A device package includes a substrate having an active surface. Electrical connection bumps are deposited on the active surface and are arranged in an array having a perimeter. At least one electronic component is formed at a region of the active surface, where the region is located outside of the perimeter of the array of electrical connection bumps. When the device package is coupled with external circuitry via the electrical connection bumps, the region at which the electronic component is formed is suspended over the electronic circuitry. This region is subject to a lower stress profile than a region of the active surface circumscribed by the perimeter. Thus, stress sensitive electronic components can be located in this lower stress region of the active surface.

Abstract: Apparatuses relating generally to a microelectronic package having protection from interference are disclosed. In an apparatus thereof, a substrate has an upper surface and a lower surface opposite the upper surface and has a ground plane. A first microelectronic device is coupled to the upper surface of the substrate. Wire bond wires are coupled to the ground plane for conducting the interference thereto and extending away from the upper surface of the substrate. A first portion of the wire bond wires is positioned to provide a shielding region for the first microelectronic device with respect to the interference. A second portion of the wire bond wires is not positioned to provide the shielding region. A second microelectronic device is coupled to the substrate and located outside of the shielding region. A conductive surface is over the first portion of the wire bond wires for covering the shielding region.

Abstract: In a method of forming an assembly including projecting or protruding nodules, a substrate is provided that supports an electrical circuit. One or more cavities are formed in the substrate, a conductive pad is formed in each cavity, and one or more conductive traces are formed on the substrate. Each conductive trace connects a conductive pad to a location, node, or terminal of the electrical circuit. A part of the substrate is removed to form the assembly that includes the electrical circuit, the one or more conductive traces, and a portion of each conductive pad projecting or protruding from the substrate. The electrical circuit can be formed on the substrate, which can be a PCB, or can be formed on a microchip supported by the substrate, which can be formed of semiconductor material, e.g., a semiconductor wafer.

Abstract: A prelam layer for use in forming a laminated card includes a flexible circuit substrate; a fingerprint sensor disposed on the flexible circuit substrate, the fingerprint sensor having upper and bottom surfaces, the bottom surface of the fingerprint sensor being disposed on the substrate, an active layer of the fingerprint sensor disposed towards the upper surface of the fingerprint sensor; a first integrated circuit chip disposed on the substrate and having at least one lead electrically connected to the flexible circuit substrate; and an adapter flexible circuit electrically bonded to the active layer of the fingerprint sensor. The integrated circuit chip is adapted to communicate with the fingerprint sensor through the adapter flexible circuit.

Abstract: Embodiments include packaged semiconductor devices and methods of manufacturing packaged semiconductor devices. A semiconductor die includes a conductive feature coupled to a bottom surface of the die. The conductive feature only partially covers the bottom die surface to define a conductor-less region that spans a portion of the bottom die surface. The die is encapsulated by attaching the encapsulant material to the bottom die surface (e.g., including over the conductor-less region). The encapsulant material includes an opening that exposes the conductive feature. After encapsulating the die, a heatsink is positioned within the opening, and a surface of the heatsink is attached to the conductive feature. Because the heatsink is attached after encapsulating the die, the heatsink sidewalls are not directly bonded to the encapsulant material.

Abstract: A transmission line is provided and includes a center conductor suspended above a ground plane and comprising a line of printed, self-supporting metallic material, ground walls disposed on either side of the center conductor and comprising stacked lines of printed metallic material and a lid suspended above the center conductor between the ground walls and comprising arrayed lines of the printed, self-supporting metallic material.

Abstract: An integrated circuit package including an integrated circuit die including a first side and a second side opposite the first side, the first side including at least one magnetoresistive device formed thereon. The integrated circuit package also may include a first magnetic shield disposed on or adjacent the first side of the integrated circuit die, wherein the first magnetic shield is formed of a composite material.

Abstract: The present disclosure provides a method for interconnecting components. First and second substrates are provided. First and second components are respectively provided on the first and second substrates, in which the second component is not in contact with the first component. Then, a joint component is formed between the first and second components by passing a flow of a fluid comprising ions of a conductive material between the first and second components and electrolessly plating the first and second components by the conductive material so that the joint component is electrically connected between the first and second components. The present disclosure also provides related interconnection structures and a fixture for forming a related microchannel structure.

Abstract: A method for making shielded integrated circuit (IC) packages includes providing spaced apart IC dies carried by a substrate and covered by a common encapsulating material, and cutting through the common encapsulating material between adjacent IC dies to define spaced apart IC packages carried by the substrate. An electrically conductive layer is positioned over the spaced apart IC packages and fills spaces between adjacent IC packages. The method further includes cutting through the electrically conductive layer between adjacent IC packages and through the substrate to form the shielded IC packages.

Abstract: A semiconductor layer having an opening and a MEMS resonator formed in the opening is disposed between first and second substrates to encapsulate the MEMS resonator. An electrical contact that extends from the opening to an exterior of the MEMS device is formed at least in part within the semiconductor layer and at least in part within the first substrate.

Abstract: A semiconductor device has a first component. A modular interconnect structure is disposed adjacent to the first component. A first interconnect structure is formed over the first component and modular interconnect structure. A shielding layer is formed over the first component, modular interconnect structure, and first interconnect structure. The shielding layer provides protection for the enclosed semiconductor devices against EMI, RFI, or other inter-device interference, whether generated internally or from external semiconductor devices. The shielding layer is electrically connected to an external low-impedance ground point. A second component is disposed adjacent to the first component. The second component includes a passive device. An LC circuit includes the first component and second component. A semiconductor die is disposed adjacent to the first component. A conductive adhesive is disposed over the modular interconnect structure.

Abstract: The package includes: a substrate having at least one circuit layer; at least one electronic component mounted on at least one surface of the substrate; a molded part formed on the surface of the substrate to enclose the electronic component; at least one via formed in the molded part to be electrically connected to the circuit layer of the substrate; and a pattern connected to one end of a plated tail connected to the circuit layer connected to the via and exposed to the exterior of the substrate.

Abstract: The method of manufacturing a semiconductor device includes receiving a substrate. The substrate comprises at least one chip region and at least one scribe line next to the chip region, and each chip region comprises an active region. The method further includes disposing a buffer layer at least covering the scribe line, disposing a dielectric layer including an opening over each chip region, and disposing a bump material to the opening of the dielectric layer and electrically connecting to the active region. The method further includes forming a mold over the substrate, covering the buffer layer and cutting the substrate along the scribe line. Furthermore, the buffer layer includes an elastic modulus less than that of the mold, or the buffer layer includes a coefficient of thermal expansion less than that of the mold.

Abstract: A system in package (SiP) is disclosed that uses an EMI shield to inhibit EMI or other electrical interference on the components within the SiP. A metal shield may be formed on an upper surface of an encapsulant encapsulating the SiP. The metal shield may be electrically coupled to a ground layer in a printed circuit board (PCB) to form the EMI shield around the SiP. The metal shield may be electrically coupled to the ground layer using one or more conductive structures located in the encapsulant. The conductive structures may be located on a perimeter of the components in the SiP. The conductive structures may provide a substantially vertical connection between the substrate and the shield on the upper surface of the encapsulant.

Abstract: Embodiments of the present disclosure are directed towards electro-magnetic interference (EMI) shielding techniques and configurations. In one embodiment, an apparatus includes a first substrate, a die having interconnect structures coupled with the first substrate to route input/output (I/O) signals between the die and the first substrate and a second substrate coupled with the first substrate, wherein the die is disposed between the first substrate and the second substrate and at least one of the first substrate and the second substrate include traces configured to provide electro-magnetic interference (EMI) shielding for the die. Other embodiments may be described and/or claimed.

Abstract: An electric device and method of fabrication of that electric device is disclosed. The electric device includes one or more electrical devices attached to a substrate. The electric device further includes one or more grounding pads attached to the substrate. The electric device further includes a perforated conductive material placed on the substrate. The electric device further includes a molding compound deposited to cover the perforated conductive material, the one or more devices, and the one or more grounding pads.

Abstract: Provided are a semiconductor device having a stably formed structure capable of being electrically connected to a second electronic device without causing damage to the semiconductor device, and a manufacturing method thereof. In one embodiment, the semiconductor device may comprise a semiconductor die, an encapsulation part formed on lateral surfaces of the semiconductor die, a dielectric layer formed on the semiconductor die and the encapsulation part, a redistribution layer passing through a part of the dielectric layer and electrically connected to the semiconductor die, a plurality of conductive balls extending through other parts of the dielectric layer and electrically connected to the redistribution layer where the conductive balls are exposed to an environment outside of the semiconductor device, and conductive vias extending through the encapsulation part and electrically connected to the redistribution layer.

Abstract: An electronic device module includes a first substrate having at least one or more electronic devices mounted on one surface thereof, a second substrate bonded to one surface of the first substrate and including at least one device accommodating part having a space in which the electronic device is accommodated, and a shielding member disposed in the device accommodating part and accommodating at least one or more electronic devices therein.

Abstract: An antenna device of the present embodiment includes: a first conductive layer connected to a ground potential, a semiconductor device provided above the first conductive layer, a second conductive layer provided above the semiconductor device, a first via connecting the second conductive layer and the first conductive layer, a third conductive layer provided above the second conductive layer, a second via passing through the first opening, and an antenna provided above the third conductive layer. A dielectric is provided between the second conductive layer and the semiconductor device, between the third conductive layer and the second conductive layer, and between the antenna and the third conductive layer. The second conductive layer includes a first opening. The second via connects the third conductive layer and the first conductive layer.

Abstract: In a plasma processing step in a method of manufacturing an element chip in which a plurality of element chips are manufactured by dividing a substrate, which has a plurality of element regions, the substrate is divided into element chips by exposing the substrate to first plasma. In a protection film forming step of forming a protection film covering a side surface and a second surface by exposing the element chips to second plasma of which raw material gas is mixed gas of carbon fluoride and helium, protection film forming conditions are set such that a thickness of a second protection film of the second surface is greater than a thickness of a first protection film of the side surface.

Abstract: An electromagnetic interference shield is described for semiconductor chip packages. In some embodiments, a mold compound is formed over a semiconductor die, the die being over a front side redistribution layer on a side opposite the mold compound, the redistribution layer extending past the die and the mold compound extending around the die to contact the redistribution layer. A plurality of vias are formed in the mold compound vertically toward the redistribution layer, the vias being outside of the die, wherein the bottoms of the vias are over a ground layer of the front side redistribution layer. A continuous conductive shielding film is applied over the mold compound and into the vias, wherein the shielding film in some of the vias directly connects to the ground layer and wherein the shielding film in some of the vias does not directly connect to the ground layer, the redistribution layer connecting the metal film to an external ground so that the vias form a shield.

Abstract: Semiconductor packages and methods of forming semiconductor packages are described. In an example, a semiconductor package includes a shielding layer containing metal particles, e.g., conductive particles or magnetic particles, in a resin matrix to attenuate electromagnetic interference. In an example, the shielding layer is transferred from a molding chase to the semiconductor package during a polymer molding operation.

Abstract: An encapsulated semiconductor device package with an overlying conductive EMI or RFI shield in contact with an end of a grounded conductive component at a lateral side of the package, and methods of making the semiconductor device package.

Abstract: Semiconductor packages and methods of manufacturing semiconductor packages are described herein. In certain embodiments, the semiconductor package includes a housing including a first compartment and a second compartment, the first and second compartments being divided from one another. The semiconductor package can also include an integrated device die disposed in the first compartment, and a radio frequency (RF) absorber disposed in the second compartment.

Abstract: In accordance with various embodiments of this disclosure, stray magnetic field mitigation in an MRAM memory such as a spin transfer torque (STT) random access memory (RAM), STTRAM is described. In one embodiment, retention of bitcell bit value storage states in an STTRAM may be facilitated by generating magnetic fields to compensate for stray magnetic fields which may cause bitcells of the memory to change state. In another embodiment, retention of bitcell bit value storage states in an STTRAM may be facilitated by selectively suspending access to a row of memory to temporarily terminate stray magnetic fields which may cause bitcells of the memory to change state. Other aspects are described herein.

Abstract: A three-dimensional printing technique can be used to form a microphone package. The microphone package can include a housing having a first side and a second side opposite the first side. A first electrical lead can be formed on an outer surface on the first side of the housing. A second electrical lead can be formed on an outer surface on the second side of the housing. The first electrical lead and the second electrical lead may be electrically shorted to one another. Further, vertical and horizontal conductors can be monolithically integrated within the housing.

Abstract: Devices and method related to stacked duplexers. In some embodiments, an assembly may include a first wafer-level packaging (WLP) device having a radio-frequency (RF) shield. The assembly may also include a second WLP device having an RF shield, the second WLP device positioned over the first WLP device such that the RF shield of the second WLP device is electrically connected to the RF shield of the first WLP device.

Abstract: A semiconductor device and method of fabricating the semiconductor device are disclosed. The method includes forming a plurality of gate electrodes at a predetermined interval on a surface of a semiconductor substrate, forming spacers on sidewalls of the gate electrodes, depositing an interconnection layer conformally on the surface of the semiconductor substrate over the gate electrodes and the spacers, selectively etching the interconnection layer, wherein at least a portion of the interconnection layer that is formed on the surface of the semiconductor substrate and sidewalls of the spacers and located between adjacent gate electrodes remains after the selective etch, and forming an electrical contact on the etched interconnection layer located between the adjacent gate electrodes.

Abstract: Shielding of high-frequency circuits is achieved using a simple and inexpensive configuration not using any lid. A high-frequency circuit mounting substrate (20) is disposed, on an underside surface layer of which are disposed high-frequency circuits (21 and 22) and is formed a first grounding conductor that has same electric potential as grounding conductors of the high-frequency circuits and that surrounds the high-frequency circuits. A mother control substrate (3) is disposed, on which the high-frequency circuit mounting substrate (20) is mounted in such a way that the high-frequency circuits are sandwiched therebetween and on which a second grounding conductor is formed in a region facing the high-frequency circuits. Plural first lands are formed on the first grounding conductor of the high-frequency circuit mounting substrate (20) to surround the high-frequency circuits.

Abstract: An electronic device includes: a first substrate, a first function part in its first surface, an adhesive layer on the first surface so as to surround the first function part, a second substrate bonded to the first substrate by the adhesive layer to form a gap between the first and second substrates, a first via interconnection piercing the first substrate to connect the first surface and an opposite second surface, a second via interconnection piercing the second substrate to connect a third surface of the second substrate opposite to the first substrate and a fourth surface opposite to the third surface, a first terminal provided on the second surface and connected to the first via interconnection, a second terminal provided on the fourth surface and connected to the second via interconnection. The first function part is connected to at least one of the first and second via interconnections.

Abstract: Shielded electronic packages may have metallic lead frames to connect an electromagnetic shield to ground. In one embodiment, a metallic lead frame of the electronic package and a surface of the metallic lead frame defines a component area for attaching an electronic component. The metallic lead frame includes a metallic structure associated with the component area that may have a grounding element for connecting to ground and one or more signal connection elements, such as signal leads, for transmitting input and output signals. The electromagnetic shield connects to the metallic lead frame to safely connect to ground while maintaining the signal connection elements isolated from the shield.

Abstract: Provided is a method of manufacturing a semiconductor package. The method includes mounting a semiconductor device on a substrate; disposing a mold on the substrate, wherein the mold is formed to cover the semiconductor device such that at least one inner side surface of the mold has a slope; providing a molding material into the mold to encapsulate the semiconductor device; removing the mold from the substrate; and forming an electromagnetic shielding (EMS) layer to cover a top surface and side surfaces of the molding material.

Abstract: An Integrated Circuit device, including: a base wafer including single crystal, the base wafer including a plurality of first transistors; at least one metal layer providing interconnection between at least a portion of the plurality of first transistors; a second layer of less than 2 micron thickness, the second layer including a plurality of second transistors, the second layer overlying the at least one metal layer; and at least one conductive structure constructed to provide power to a portion of the second transistors, where the provide power is controlled by at least one of the transistors.

Abstract: In some embodiments, a semiconductor device package may include a semiconductor device package on package assembly. The package on package assembly may include a first package, a second package, and a shield. The first package may include a first surface, a second surface substantially opposite the first surface, a first die, and a first set of electrical conductors coupled to the first surface and configured to electrically connect the package on package assembly. The second package may include a third surface and a fourth surface substantially opposite the third surface, and a second die. The third surface may be coupled to the second surface. The first package may be electrically coupled to the second package. The shield may be applied to the fourth surface of the semiconductor device package assembly. In some embodiments, the shield may transfer, during use, heat from the first die.

Abstract: Radio frequency/electromagnetic interference (RF/EMI) shielding within redistribution layers of a fan-out wafer level package is provided. By using RDL metal layers to provide the shielding, additional process steps are avoided (e.g., incorporating a shielding lid or applying conformal paint on the package back side). Embodiments use metal filled trench vias in the RDL dielectric layers to provide metal “walls” around the RF sensitive signal lines through the dielectric layer regions of the RDL. These walls are coupled to ground, which isolates the signal lines from interference or noise generated outside the walls.

Abstract: A method for applying a magnetic shielding layer to a substrate is provided, wherein a first magnetic shielding layer is adhered to a first surface of the substrate. A first film layer is adhered to the first magnetic shielding layer and the first magnetic shielding layer is more adherent to the first surface than the film layer to the first magnetic shielding layer.