Abstract: Methods and apparatus to form silicon-based transistors on group III-nitride materials using aspect ratio trapping are disclosed. An example integrated circuit includes a group III-nitride substrate and a fin of silicon formed on the group III-nitride substrate. The integrated circuit further includes a first transistor formed on the fin of silicon and a second transistor formed on the group III-nitride substrate.

Abstract: Batteries include an anode structure, a cathode structure, and a conductive overcoat. The anode structure includes an anode substrate, an anode formed on the anode substrate, and an anode conductive liner that is in contact with the anode. The cathode structure includes a cathode substrate, a cathode formed on the cathode substrate, and a cathode conductive liner that is in contact with the cathode. The conductive overcoat is formed over the anode structure and the cathode structure to seal a cavity formed by the anode structure and the cathode structure. At least one of the anode substrate and the cathode substrate is pierced by through vias that are in contact with the respective anode conductive liner or cathode conductive liner.

Abstract: The invention relates to novel organic semiconducting compounds containing a polycyclic unit, to methods for their preparation and educts or intermediates used therein, to compositions, polymer blends and formulations containing them, to the use of the compounds, compositions and polymer blends as organic semiconductors in, or for the preparation of, organic electronic (OE) devices, especially organic photovoltaic (OPV) devices, organic photodetectors (OPD), organic field effect transistors (OFET) and organic light emitting diodes (OLED), and to OE, OPV, OPD, OFET and OLED devices comprising these compounds, compositions or polymer blends.

Abstract: Batteries and methods of forming the same include an anode structure, a cathode structure, and a conductive overcoat. The anode structure includes an anode substrate, an anode formed on the anode substrate, and an anode conductive liner that is in contact with the anode. The cathode structure includes a cathode substrate, a cathode formed on the cathode substrate, and a cathode conductive liner that is in contact with the cathode. The conductive overcoat is formed over the anode structure and the cathode structure to seal a cavity formed by the anode structure and the cathode structure. At least one of the anode substrate and the cathode substrate is pierced by through vias that are in contact with the respective anode conductive liner or cathode conductive liner.

Abstract: A semiconductor light-emitting device includes a light-emitting structure, a reflective electrode layer, and a transparent cover layer. The light-emitting structure includes a first semiconductor layer, an active layer, and a second semiconductor layer. The reflective electrode layer covers an upper surface of the second semiconductor layer. The transparent cover layer covers an upper surface of the second semiconductor layer on the reflective electrode layer. The transparent cover layer includes a tail portion including a first portion and a second portion. The first portion covers an edge of the reflective electrode layer and a convex upper surface. The second portion is thinner than and extends from the first portion.

Abstract: Embodiments of the invention include a semiconductor structure (23) including a light emitting layer. A substrate (10) comprising lithium is attached to the semiconductor structure (23). A surface of the substrate (10) forms an angle with a major plane of the semiconductor structure (23) that is between 60° and 75°.

Abstract: Provided is a light emitting device which includes a light emitting element having a peak emission wavelength in a range of 400 nm to 500 nm, and a fluorescent member containing a fluorescent material having a peak emission wavelength in a range of 630 nm to 670 nm, and a composition represented by the formula. CasSrtEuuSivAlwNx. In the formula, s, t, u, v, w, and x satisfy 0.25?s?0.5, 0.4?t?0.75, 0.01?u?0.04, 0.8?s+t+u?1.1, 0.8?v?1.2, 0.8?w?1.2, 1.8?v+w?2.2, and 2.5?x?3.2. The light emitting device emits light having an x value of CIE 1931 chromaticity coordinates of 0.640 or more.

Abstract: Disclosed are a light emitting device, a conductive substrate; a second electrode layer on the conductive substrate and including a center portion and a peripheral portion surrounding the center portion; a protective layer on the peripheral portion of the second electrode layer; and a light emitting structure including a second conductive semiconductor layer on the second electrode layer, an active layer on the second conductive semiconductor layer and a first conductive semiconductor layer on the active layer; and a first electrode layer on the first conductive semiconductor layer, wherein the second conductive semiconductor layer includes edge portions extending outside of the light emitting structure.

Abstract: According to one embodiment, a semiconductor light emitting device includes a light emitting chip and a fluorescent material layer. The light emitting chip includes a semiconductor layer, a first electrode, a second electrode, an insulating layer, a first interconnect layer, a second interconnect layer, a first metal pillar, a second metal pillar, and a resin layer. The semiconductor layer includes a light emitting layer, a first major surface, and a second major surface formed on a side opposite to the first major surface. The fluorescent material layer is provided on the first major surface and has a larger planer size than the light emitting chip.

Abstract: A method of fabricating method light-emitting diode according to an exemplary embodiment of the present invention includes forming a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer on a first substrate, forming a second substrate on the second conductivity-type semiconductor layer, separating the first substrate from the first conductivity-type semiconductor layer, forming a mask pattern including a plurality of openings on the first conductivity-type semiconductor layer exposed after separating the substrate, etching the first conductivity-type semiconductor layer having the mask pattern disposed thereon to form a plurality of recesses separated from each other, removing the mask pattern, and etching a surface of the first conductivity-type semiconductor layer to form a sub-micro texture.

Abstract: Light-emitting devices, and related components, systems and methods are disclosed.

Abstract: A light emitting structure includes a first conductive semiconductor layer, an active layer under the first conductive semiconductor layer, and a second conductive semiconductor layer under the active layer. A plurality of first electrodes is provided on the first conductive semiconductor layer, and a second electrode electrically connects to the second conductive semiconductor layer. A conductive support member is provided under the second electrode, and a plurality of first connection parts is coupled the first electrodes to the conductive support member, respectively. A second connection part is coupled to the second electrode. The first electrodes are spaced apart from each other on a top surface of the first conductive semiconductor layer.

Abstract: An optoelectronic semiconductor chip includes an active layer with a first and a second major face, including a semiconductor material which emits or receives radiation when the semiconductor chip is in operation; a patterned layer including three-dimensional patterns for outcoupling or incoupling radiation and arranged on the first major face in a beam path of the radiation, wherein the patterned layer includes an inorganic-organic hybrid material.

Abstract: In this junction element 1, when a forward voltage is applied, a depletion layer is formed in a semiconductor layer 2, prohibiting electrons present in an electrode layer 4 to move into the semiconductor layer 2. For this reason, a majority of holes in a semiconductor layer 3 do not disappear by recombination with conduction electrons in the semiconductor layer 2, but reach the electrode layer 4 while diffusing into the semiconductor layer 2. Accordingly, the junction element 1 can serve as a good conductor for holes, while avoiding the influence of a resistance value, and allows a current to flow therethrough at a level equal to or more than that achieved by a semiconductor element formed of a Si or SiC semiconductor.

Abstract: Disclosed herein is a high efficiency light emitting diode. The light emitting diode includes: a semiconductor stack positioned over a support substrate; a reflective metal layer positioned between the support substrate and the semiconductor stack to ohmic-contact a p-type compound semiconductor layer of the semiconductor stack and having a groove exposing the semiconductor stack; a first electrode pad positioned on an n-type compound semiconductor layer of the semiconductor stack; an electrode extension extending from the first electrode pad and positioned over the groove region; and an upper insulating layer interposed between the first electrode pad and the semiconductor stack. In addition, the n-type compound semiconductor layer includes an n-type contact layer, and the n-type contact layer has a Si doping concentration of 5 to 7×1018/cm3 and a thickness in the range of 5 to 10 um.

Abstract: A semiconductor light-emitting device is provided. The semiconductor light-emitting device may include a light-emitting structure, an electrode, an ohmic layer, an electrode layer, an adhesion layer, and a channel layer. The light-emitting structure may include a compound semiconductor layer. The electrode may be disposed on the light-emitting structure. The ohmic layer may be disposed under the light-emitting structure. The electrode layer may include a reflective metal under the ohmic layer. The adhesion layer may be disposed under the electrode layer. The channel layer may be disposed along a bottom edge of the light-emitting structure.

Abstract: Disclosed are a light emitting device and a lighting system having the same. The light emitting device includes a first conductivity-type semiconductor layer, an interfacial layer including at least two superlattice structures adjacent to the first conductivity-type semiconductor layer, an active layer adjacent to the interfacial layer, and a second conductivity-type semiconductor layer adjacent to the active layer. The first conductivity-type semiconductor layer, interfacial layer, active layer, and second conductivity-type semiconductor layer are stacked in a same direction, the first and second semiconductor layer are of different conductivity types, an energy band gap of the superlattice structure adjacent to the active layer is smaller than an energy band gap of the superlattice structure adjacent to the first conductivity-type semiconductor layer.

Abstract: A structure and method of producing a semiconductor structure including a semi-insulating semiconductor layer, a plurality of isolated devices formed over the semi-insulating semiconductor layer, and a metal-semiconductor alloy region formed in the semi-insulating semiconductor layer, where the metal-semiconductor alloy region electrically connects two or more of the isolated devices.

Abstract: An edge terminated semiconductor device is described including a GaN substrate; a doped GaN epitaxial layer grown on the GaN substrate including an ion-implanted insulation region, wherein the ion-implanted region has a resistivity that is at least 90% of maximum resistivity and a conductive layer, such as a Schottky metal layer, disposed over the GaN epitaxial layer, wherein the conductive layer overlaps a portion of the ion-implanted region. A Schottky diode is prepared using the Schottky contact structure.

Abstract: A mounting structure of an electronic component includes a plurality of joining portions that join a plurality of first electrode terminals on the electronic component to a plurality of second electrode terminals on a circuit board. The joining portions each include a first projecting electrode formed on the first electrode terminal, a second projecting electrode formed on the second electrode terminal, and a solder portion that joins the first projecting electrode to the second projecting electrode. The end face of the first projecting electrode is larger in area than the end face of the second projecting electrode, and at least a part of the second electrode terminals exposed from the circuit board has a larger area than the bottom of the second projecting electrode.

Abstract: Light emitting devices include a light emitting diode (“LED”) and a recipient luminophoric medium that is configured to down-convert at least some of the light emitted by the LED. In some embodiments, the recipient luminophoric medium includes a first broad-spectrum luminescent material and a narrow-spectrum luminescent material. The broad-spectrum luminescent material may down-convert radiation emitted by the LED to radiation having a peak wavelength in the red color range. The narrow-spectrum luminescent material may also down-convert radiation emitted by the LED into the cyan, green or red color range.

Abstract: An organic light emitting diode display including a substrate, a first electrode on the substrate, a light-emitting layer on the first electrode, a second electrode on the light-emitting layer, and a p-doping layer between the first electrode and the light-emitting layer.

Abstract: An optically active material is used to create power devices and circuits having significant performance advantages over conventional methods for affecting optical control of power electronics devices and circuits. A silicon-carbide optically active material is formed by compensating shallow donors with the boron related D-center. The resulting material can be n-type or p-type but it is distinguished from other materials by the ability to induce persistent photoconductivity in it when illuminated by electromagnetic radiation with a photon energy in excess of the threshold energy required to photoexcite electrons from the D-center to allowed states close to the conduction band edge, which varies from polytype to polytype.

Abstract: A white light emitting diode includes a blue light emitting diode (“LED”) light source, and a light conversion layer which converts incident light from the blue LED light source into white light. The light conversion layer includes a green light emitting semiconductor nanocrystal and a red light emitting semiconductor nanocrystal. The white light emitting diode has a red, green and blue color (“RGB”) color locus which is within a chrominance error range (±4?E*ab±2?E*ab) locus from the constant hue locus of each of sRGB color coordinates, or within a chrominance error range (±4?E*ab±2?E*ab) locus from the constant hue locus of each of AdobeRGB color coordinates.

Abstract: A method of treating a sheet of semiconducting material comprises forming a sinterable first layer over each major surface of a sheet of semiconducting material, forming a second layer over each of the first layers to form a particle-coated semiconductor sheet, placing the particle-coated sheet between end members, heating the particle-coated sheet to a temperature effective to at least partially sinter the first layer and at least partially melt the semiconducting material, and cooling the particle-coated sheet to solidify the semiconducting material and form a treated sheet of semiconducting material.

Abstract: An embodiment is to include a staggered (top gate structure) thin film transistor in which an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer and a buffer layer is provided between the semiconductor layer and a source and drain electrode layers. The buffer layer having higher carrier concentration than the semiconductor layer is provided intentionally between the source and drain electrode layers and the semiconductor layer, whereby an ohmic contact is formed.

Abstract: Some embodiments show a semiconductor structure including a substrate with a {100} crystal surface plane which includes a plurality of adjacent structured regions at a top side of the substrate. The plurality of adjacent structured regions includes adjacent substrate surfaces with {111} crystal planes and a III-V semiconductor material layer above the top side of the substrate. A semiconductor device region includes at least one semiconductor device structure. The semiconductor device region is arranged above the plurality of adjacent structured regions at the top side of the substrate.

Abstract: A method for fabricating an edge termination, which can be used in conjunction with GaN-based materials, includes providing a substrate of a first conductivity type. The substrate has a first surface and a second surface. The method also includes forming a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the substrate and forming a second GaN epitaxial layer of a second conductivity type opposite to the first conductivity type. The second GaN epitaxial layer is coupled to the first GaN epitaxial layer. The substrate, the first GaN epitaxial layer and the second GaN epitaxial layer can be referred to as an epitaxial structure.

Abstract: Methods of forming ternary III-nitride materials include epitaxially growing ternary III-nitride material on a substrate in a chamber. The epitaxial growth includes providing a precursor gas mixture within the chamber that includes a relatively high ratio of a partial pressure of a nitrogen precursor to a partial pressure of one or more Group III precursors in the chamber. Due at least in part to the relatively high ratio, a layer of ternary III-nitride material may be grown to a high final thickness with small V-pit defects therein. Semiconductor structures including such ternary III-nitride material layers are fabricated using such methods.

Abstract: It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.

Abstract: The present invention provides a method of manufacturing a nitride semiconductor capable of improving the crystallinity and the surface state of the nitride semiconductor crystal formed on top of a high-temperature AlN buffer layer. An AlN buffer layer is formed on top of a growth substrate, and then nitride semiconductor crystals are grown on top of the AlN buffer layer. In a stage of manufacturing the nitride semiconductor, the crystal of the AlN buffer layer is grown at a high temperature of 900° C. or higher. In addition, an Al-source material of the AlN buffer layer is started to be supplied first to a reaction chamber and continues to be supplied without interruption, and then a N-source material is supplied intermittently.

Abstract: The invention offers a method of producing a semiconductor device that can suppress the worsening of the property due to surface roughening of a wafer by sufficiently suppressing the surface roughening of the wafer in the heat treatment step and a semiconductor device in which the worsening of the property caused by the surface roughening is suppressed. The method of producing a MOSFET as a semiconductor device is provided with a step of preparing a wafer 3 made of silicon carbide and an activation annealing step that performs activation annealing by heating the wafer 3. In the activation annealing step, the wafer 3 is heated in an atmosphere containing a vapor of silicon carbide generated from the SiC piece 61, which is a generating source other than the wafer 3.

Abstract: An integrated circuit (IC) package includes an IC chip and a package carrier. The IC chip includes a substrate and an IC layered structure configured on an active surface of the substrate. The IC layered structure includes a first physical layer interface and a second physical layer interface. The first physical layer interface includes a plurality of first bump pads and a plurality of first inner pads electrically connected to the first bump pads, respectively. The second physical layer interface includes a plurality of second bump pads and a plurality of second inner pads electrically connected to the second bump pads, respectively. The second bump pads are mirror images of the first bump pads with respect to a first geometric plane perpendicular to the active surface. The second inner pads are mirror images of the first inner pads with respect to the first geometric plane.

Abstract: An ultra-violet light-emitting device and method for fabricating an ultraviolet light emitting device, 12, (LED or an LD) with an AlInGaN multiple-quantum-well active region, 10, exhibiting stable cw-powers. The device includes a non c-plane template with an ultraviolet light-emitting structure thereon. The template includes a first buffer layer, 321, on a substrate, 100, then a second buffer layer, 421, on the first preferably with a strain-relieving layer, 302, in both buffer layers. Next there is a semiconductor layer having a first type of conductivity, 500, followed by a layer providing a quantum-well region, 600. Another semiconductor layer, 700, having a second type of conductivity is applied next. Two metal contacts, 980 and 990, are applied to this construction, one to the semiconductor layer having the first type of conductivity and the other to the semiconductor layer having the second type of conductivity, to complete the light emitting device.

Abstract: A method of making a semi-insulating epitaxial layer includes implanting a substrate or a first epitaxial layer formed on the substrate with boron ions to form a boron implanted region on a surface of the substrate or on a surface of the first epitaxial layer, and growing a second epitaxial layer on the boron implanted region of the substrate or on the boron implanted region of the first epitaxial layer to form a semi-insulating epitaxial layer.

Abstract: Embodiments include semiconductor devices with low leakage Schottky contacts. An embodiment is formed by providing a partially completed semiconductor device including a substrate, a semiconductor on the substrate, and a passivation layer on the semiconductor, and using a first mask, locally etching the passivation layer to expose a portion of the semiconductor. Without removing the first mask, a Schottky contact is formed of a first material on the exposed portion of the semiconductor, and the first mask is removed. Using a further mask, a step-gate conductor of a second material electrically coupled to the Schottky contact is formed overlying parts of the passivation layer adjacent to the Schottky contact. By minimizing the process steps between opening the Schottky contact window in the passivation layer and forming the Schottky contact material in this window, the gate leakage of a resulting field effect device having a Schottky gate may be substantially reduced.

Abstract: A display substrate includes a gate wire formed on an insulating substrate, a semiconductor pattern formed on the gate wire and containing a metal oxynitride compound, and a data wire formed on the semiconductor pattern to cross the gate wire. The semiconductor pattern has a carrier number density ranging from 1016/cm3 to 1019/cm3.

Abstract: A semiconductor device includes a first semiconductor substrate of a first band-gap material and a second semiconductor substrate of a second band-gap material. The second band-gap material has a lower band-gap than the first band-gap material. A heterojunction is formed between the first semiconductor substrate and the second semiconductor substrate substantially in a first plane. The semiconductor device further includes, in a cross-section which is perpendicular to the first plane, a first semiconductor region of a first conductivity type and a second semiconductor region of the first conductivity type both of which extend from the second semiconductor substrate at least partially into the first semiconductor substrate.

Abstract: A semiconductor voltage transformation structure is provided. The semiconductor voltage transformation structure includes: a first electrode layer; an electricity-to-light conversion layer formed on the first electrode layer; a second electrode layer formed on the electricity-to-light conversion layer; a first isolation layer formed on the second electrode layer; a third electrode layer formed on the first isolation layer; a light-to-electricity conversion layer formed on the third electrode layer; and a fourth electrode layer formed on the light-to-electricity conversion layer, in which the first isolation layer, the second electrode layer and the third electrode layer are transparent to a working light emitted by the electricity-to-light conversion layer.

Abstract: The semiconductor device includes a thin film transistor which includes a gate electrode layer, a gate insulating layer over the gate electrode layer, a source electrode layer and a drain electrode layer over the gate insulating layer, a buffer layer over the source electrode layer and the drain electrode layer, and a semiconductor layer over the buffer layer. A part of the semiconductor layer overlapping with the gate electrode layer is over and in contact with the gate insulating layer and is provided between the source electrode layer and the drain electrode layer. The semiconductor layer is an oxide semiconductor layer containing indium, gallium, and zinc. The buffer layer contains a metal oxide having n-type conductivity. The semiconductor layer and the source and drain electrode layers are electrically connected to each other through the buffer layer.

Abstract: A very high transmittance, back-illuminated, silicon-on-thin sapphire-on-fused silica wafer substrate design is presented for enabling high quantum efficiency and high resolution, silicon or silicon-germanium avalanche photodiode detector arrays with improved indirect optical crosstalk suppression. The wafer substrate incorporates a stacked antireflective bilayer between the sapphire and silicon, comprised of single crystal aluminum nitride (AlN) and non-stoichiometric, silicon rich, amorphous silicon nitride (a-SiNX<1.33), as well as a one quarter wavelength, magnesium fluoride (?/4-MgF2) back-side antireflective layer which is bonded to a fused silica wafer. The fused silica provides mechanical support, allowing the sapphire to be thinned to optimal thickness below 50 ?m, for improved optical transmittance and in conjunction with monolithic sapphire microlenses, suppression of indirect optical crosstalk from multiple reflections of APD emitted light.

Abstract: An optically active material is used to create power devices and circuits having significant performance advantages over conventional methods for affecting optical control of power electronics devices and circuits. A silicon-carbide optically active material is formed by compensating shallow donors with the boron related D-center. The resulting material can be n-type or p-type but it is distinguished from other materials by the ability to induce persistent photoconductivity in it when illuminated by electromagnetic radiation with a photon energy in excess of the threshold energy required to photoexcite electrons from the D-center to allowed states close to the conduction band edge, which varies from polytype to polytype.

Abstract: A virtual substrate structure includes a crystalline silicon substrate with a first layer of III-N grown on the silicon substrate. Ge clusters or quantum dots are grown on the first layer of III-N and a second layer of III-N is grown on the Ge clusters or quantum dots and any portions of the first layer of III-N exposed between the Ge clusters or quantum dots. Additional alternating Ge clusters or quantum dots and layers of III-N are grown on the second layer of III-N forming an upper surface of III-N. Generally, the additional alternating layers of Ge clusters or quantum dots and layers of III-N are continued until dislocations in the III-N adjacent the upper surface are substantially eliminated.

Abstract: A semiconductor substrate includes: a substrate having a single crystal silicon on at least one surface thereof; a buffer layer that is provided on the single crystal silicon and has at least one cobalt silicide layer primarily containing cobalt silicide; and a silicon carbide single crystal film provided on the buffer layer.

Abstract: An organic electroluminescent device includes: a pair of electrodes; a first light-emitting region that is disposed between the pair of electrodes, and that emits light when a voltage is applied between the pair of electrodes such that one of the pair of electrodes serves as an anode; and a second light-emitting region that is disposed between the pair of electrodes, and that emits light when a voltage is applied between the pair of electrodes such that the other of the pair of electrodes serves as an anode.

Abstract: A GaN related compound semiconductor element includes: a channel layer made of a GaN related compound semiconductor; and a source layer and a drain layer, which are disposed in a manner of sandwiching the channel layer. The source layer includes two adjacent ridge portions which are formed by selective growth. A source electrode is formed over the surface, sandwiched by the ridge portions, of the channel layer, and the surfaces of the respective two adjacent ridge portions. The selective-growth mask formed between the two ridge portions is removed by wet etching. In addition, as another embodiment, a gate electrode is formed in a manner that the direction of the longer dimension of the gate electrode is aligned with the m plane of the channel layer. Moreover, as still another embodiment, the channel layer has a multilayer structure in which a GaN layer doped with no impurity is used as an intermediate layer.

Abstract: A laterally contacted blue LED device involves a PAN structure disposed over an insulating substrate. The substrate may be a sapphire substrate that has a template layer of GaN grown on it. The PAN structure includes an n-type GaN layer, a light-emitting active layer involving indium, and a p-type GaN layer. The n-type GaN layer has a thickness of at least 500 nm. A Low Resistance Layer (LRL) is disposed between the substrate and the PAN structure such that the LRL is in contact with the bottom of the n-layer. In one example, the LRL is an AlGaN/GaN superlattice structure whose sheet resistance is lower than the sheet resistance of the n-type GnA layer. The LRL reduces current crowding by conducting current laterally under the n-type GaN layer. The LRL reduces defect density by preventing dislocation threads in the underlying GaN template from extending up into the PAN structure.

Abstract: Provided are a novel anthracene derivative and an organic light-emitting device using the same, and more particularly, an anthracene derivative having a core (e.g., an indenoanthracene core) where an anthracene moiety with excellent device characteristics is fused with a fluorene moiety or the like with excellent fluorescent properties, wherein an aryl group is introduced at the core, and an organic light-emitting device using the anthracene derivative, which is enhanced in efficiency, operating voltage, lifetime, etc.

Abstract: Some embodiments show a semiconductor structure including a substrate with a {100} crystal surface plane which includes a plurality of adjacent structured regions at a top side of the substrate. The plurality of adjacent structured regions includes adjacent substrate surfaces with {111} crystal planes and a III-V semiconductor material layer above the top side of the substrate. A semiconductor device region includes at least one semiconductor device structure. The semiconductor device region is arranged above the plurality of adjacent structured regions at the top side of the substrate.

Abstract: An ultra-violet emitting light-emitting device and method for fabricating an ultraviolet light emitting device (LED) with an AlInGaN multiple-quantum-well active region exhibiting stable cw-powers. The LED includes a template with an ultraviolet light-emitting structure on it. The template includes a first buffer layer on a substrate, then a second buffer layer on the first preferably with a strain-relieving layer in both buffer layers. Next there is a semiconductor layer having a first type of conductivity followed by a layer providing a quantum-well region with an emission spectrum ranging from 190 nm to 369 nm. Another semiconductor layer having a second type of conductivity is applied next. Two metal contacts are applied to this construction, one to the semiconductor layer having the first type of conductivity and the other to the semiconductor layer having the second type of conductivity, to complete the LED.