Abstract: A gallium nitride thin film on sapphire substrate having reduced bending deformation and a method for manufacturing the same. An etching trench structure is formed on a sapphire substrate by primary nitradation and HCl treatment and a gallium nitride film is grown thereon by secondary nitradation. The gallium nitride thin film on sapphire substrate comprises an etching trench structure formed on a sapphire substrate, wherein a function graph of a curvature radius Y according to a thickness X of a gallium nitride film satisfies Equation 1 below, and corresponds to or is located above a function graph drawn when Y0 is 6.23±1.15, A is 70.04 ±1.92, and T is 1.59±0.12: Y=Y0+A·e?(X?1)/T,??[Equation 1] where Y is the curvature radius m, X is the thickness of the gallium nitride film, and Y0, A, and T are positive numbers.

Abstract: A heterostructure having a heterojunction comprising: a diamond layer; and a boron aluminum nitride (B(x)Al(1?x)N) layer disposed in contact with a surface of the diamond layer, where x is between 0 and 1.

Abstract: An integrated device includes two sections, such as a DFB laser and an EAM modulator, having a semi-insulating separation region therebetween. The separation region is of a material acting as a trap on electrons and configured to impede current flow between the two sections due to holes. The separation region may be of a material acting as a trap both on electrons and holes. Alternatively, the separation region is of a material that acts as a trap on electrons and is provided over a p-type substrate common to the two sections.

Abstract: An ohmic contact in accordance with the invention includes a layer of p-type GaN-based material. A first layer of a group II-VI compound semiconductor is located adjacent to the layer of p-type GaN-based material. The ohmic contact further includes a metal layer that provides metal contact. A second layer of a different II-VI compound semiconductor is located adjacent to the metal layer.

Abstract: A metal oxide nanostructure is formed by oxidizing metallic metal in the presence of a solution containing a liquid ligand to form a metal-ligand complex, and decomposing the metal-ligand complex to form the metal oxide nanostructure. The metal-ligand complex can be a complex of zinc or copper with formamide. In one form, the nanostructure forms ZnO nanorods having a diameter of 10 to 1000 nm, where the nanorods having a hexagonal crystallographic morphology, and the nanorods are oriented perpendicular to a substrate.

Abstract: A semiconductor light-emitting device including a light-emitting layer forming portion, a semiconductor substrate of a first conductivity type, a first electrode which is disposed on a surface of the semiconductor substrate of the first conductivity type, a semiconductor substrate of a second conductivity type, and a second electrode which is disposed a surface of the semiconductor substrate of the second conductivity type, at least one of the semiconductor substrate of the first conductivity type and the semiconductor substrate of the second conductivity type having an interstice located near an outer side surface on a side close to the light-emitting layer forming portion and around a joined surface on a principal surface of the light-emitting layer forming portion.

Abstract: A method of growing a nitride semiconductor crystal which has very few crystal defects and can be used as a substrate is disclosed. This invention includes the step of forming a first selective growth mask on a support member including a dissimilar substrate having a major surface and made of a material different from a nitride semiconductor, the first selective growth mask having a plurality of first windows for selectively exposing the upper surface of the support member, and the step of growing nitride semiconductor portions from the upper surface, of the support member, which is exposed from the windows, by using a gaseous Group 3 element source and a gaseous nitrogen source, until the nitride semiconductor portions grown in the adjacent windows combine with each other on the upper surface of the selective growth mask.

Abstract: In the solid-state imaging device of the present invention having a photoelectric conversion section and a charge transfer section equipped with a charge transfer electrode for transferring an electric charge generated in the photoelectric conversion section, the charge transfer electrode has an alternate arrangement of a first layer electrode including a first layer electrically conducting film and a second layer electrode including a second layer electrically conducting film, which are formed on a gate oxide film including a laminate film consisting of a silicon oxide film and a metal oxide thin film, and the first layer electrode and the second layer electrode are separated by insulation with an interelectrode insulating film including a sidewall insulating film formed by a CVD process to cover the lateral wall of the first layer electrode.

Abstract: A method of forming a high thermal conductivity diamond film and its associated structures comprising selectively nucleating a region of a substrate, and forming a diamond film on the substrate such that the diamond film has large grains, which are at least about 20 microns in size. Thus, the larger grained diamond film has greatly improved thermal management capabilities and improves the efficiency and speed of a microelectronic device.

Abstract: Fast, bright inorganic scintillators at room temperature are based on radiative electron-hole recombination in direct-gap semiconductors, e.g. CdS and ZnO. The direct-gap semiconductor is codoped with two different impurity atoms to convert the semiconductor to a fast, high luminosity scintillator. The codopant scheme is based on dopant band to dopant trap recombination. One dopant provides a significant concentration of carriers of one type (electrons or holes) and the other dopant traps carriers of the other type. Examples include CdS:In,Te; CdS:In,Ag; CdS:In,Na; ZnO:Ga,P; ZnO:Ga,N; ZnO:Ga,S; and GaN:Ge,Mg.

Abstract: A process for fabricating a III-nitride power semiconductor device which includes forming a gate structure while providing a protective body over areas that are to receive power electrodes.

Abstract: Boron carbide heteroisomer semiconductor devices are used as particle detectors. The boron carbide semiconductor devices produce electric current in response to incident particles, such as alpha particles, neutrons, or photons.

Abstract: The invention provides a method of growing a non-polar a-plane gallium nitride. In the method, first, an r-plane substrate is prepared. Then, a low-temperature nitride-based nucleation layer is deposited on the substrate. Finally, the non-polar a-plane gallium nitride is grown on the nucleation layer. In growing the non-polar a-plane gallium nitride, a gallium source is supplied at a flow rate of about 190 to 390 ?mol/min and the flow rate of a nitrogen source is set to produce a V/III ratio of about 770 to 2310.

Abstract: A semiconductor substrate includes a first semiconductor layer and a second semiconductor layer. The first semiconductor layer is formed of II-VI-group semiconductor material, III-V-group semiconductor material, or II-VI-group semiconductor material and III-V-group semiconductor material. At least one amorphous region and at least one crystalloid region are formed in the first semiconductor layer. The second semiconductor layer is formed on the first semiconductor layer and is crystal-grown from the at least one crystalloid region. A method of manufacturing a semiconductor substrate includes preparing a growth substrate; crystal-growing the first semiconductor layer on the growth substrate; forming the at least one amorphous region and the at least one crystalloid region in the first semiconductor layer; and forming a second semiconductor layer on the first semiconductor layer using the at least one amorphous region as a mask and the at least one crystalloid region as a seed.

Abstract: A flip-chip type of Group III nitride based compound semiconductor light-emitting device comprises a transparent conductive film 10 made of ITO on a p-type contact layer. On the transparent conductive film, an insulation protection film 20, a reflection film 30 which is made of silver (Ag) and aluminum (Al) and reflects light to a sapphire substrate side, and a metal layer 40 made of gold (Au) are deposited in sequence. Because the insulation protection film 20 exists between the transparent conductive film 10 and the reflection film 30, metal atoms comprised in the reflection film 30 can be prevented from diffusing in the transparent conductive film 10. That enables the transparent conductive film 10 to maintain high transmissivity. As a result, a light-emitting device having high external quantum efficienty can be provided.

Abstract: A semiconductor light emitting apparatus is proposed, which has thyristor without increasing number of constituent semiconductor layers, with large degree of freedom of selection of ON voltage.

Abstract: A light-emitting device and illumination apparatus using the same are provided. The light-emitting device includes a semiconductor light-emitting element that emits blue-violet or blue light and a fluorescent material that absorbs the light emitted by the semiconductor light-emitting element and emits fluorescence of wavelengths different from the light, wherein the fluorescent material includes a mixture of a first fluorescent material, a second fluorescent material that has a longer emission wavelength than that of the first fluorescent material, and a third fluorescent material that has a longer emission wavelength than the second fluorescent material, and the first fluorescent material is a europium-activated ?-SiAlON fluorescent material, the second fluorescent material is a europium-activated ?-SiAlON fluorescent material, and the third fluorescent material is a nitride crystalline red fluorescent material of a general formula of (Ca,Eu)AlSiN3.

Abstract: An assembly comprising a semiconductor substrate having a first lattice constant, an intermediate layer having a second lattice constant formed on the semiconductor substrate, and a virtual substrate layer having a third lattice constant formed on the intermediate layer. The intermediate layer comprises one of a combination of III–V elements and a combination of II–VI elements. The second lattice constant has a value that is approximately between the values of the first lattice constant and the third lattice constant.

Abstract: An Al0.15Ga0.85N layer 2 is formed on a silicon substrate 1 in a striped or grid pattern. A GaN layer 3 is formed in regions A where the substrate 1 is exposed and in regions B which are defined above the layer 2. At this time, the GaN layer grows epitaxially and three-dimensionally (not only in a vertical direction but also in a lateral direction) on the Al0.15Ga0.85N layer 2. Since the GaN layer grows epitaxially in the lateral direction as well, a GaN compound semiconductor having a greatly reduced number of dislocations is obtained in lateral growth regions (regions A where the substrate 1 is exposed).

Abstract: Semiconductor devices formed by depositing III-nitride compounds on lithium niobate and/or lithium tantalate substrates are disclosed. Also disclosed, are semiconductor devices formed by depositing lithium niobate and/or lithium tantalate on III-Nitrides and Silicon Carbide substrates. The semiconductor devices provide good lattice matching characteristics between the substrate and the material that is deposited upon the substrate. The method of forming such semiconductor devices, which is also disclosed, enables fabrication of periodically-poled devices in a manner that is advantageous in comparison to existing technologies.

Abstract: A method of growing a nitride semiconductor crystal which has very few crystal defects and can be used as a substrate is disclosed. This invention includes the step of forming a first selective growth mask on a support member including a dissimilar substrate having a major surface and made of a material different from a nitride semiconductor, the first selective growth mask having a plurality of first windows for selectively exposing the upper surface of the support member, and the step of growing nitride semiconductor portions from the upper surface, of the support member, which is exposed from the windows, by using a gaseous Group 3 element source and a gaseous nitrogen source, until the nitride semiconductor portions grown in the adjacent windows combine with each other on the upper surface of the selective growth mask.

Abstract: A lateral power diodes with an optimal drift doping formed in widebandgap semiconductors like Silicon Carbide, Aluminum Nitride and Gallium Nitride and Diamond are provided with a voltage rating greater 200V. Contrary to conventional vertical design of power diodes, a higher, optimum doping for a given thickness is critical in supporting higher anode/cathode blocking voltage, and lower on-resistance than vertical drift region designs. The backside contact and the anode junction must be able to support the rated blocking voltage of the device.

Abstract: A magnetic semiconductor material having magnetization characteristics and a method for preparing the same is provided. In the method for preparing the magnetic semiconductor, Mn is vapor-deposited at a thickness of 200 to 300 ? onto a CdGeP2 single crystal (2) while the CdGeP2 single crystal (2) is maintained at a temperature of about 390° C. in a molecular beam epitaxy apparatus (1). The Mn-deposited CdGeP2 single crystal is heated at a temperature of about 510° C. for 1 hour. Thus, a magnetic semiconductor comprising CdMnGeP2 and having magnetization characteristics at room temperature is prepared.

Abstract: The principal surface of a substrate made of a group III-V compound semiconductor material is about a (100) plane. A light emitting lamination structure is disposed on the principal surface. In the light emitting lamination structure, a quantum well layer is sandwiched by a pair of carrier confinement layers made of a semiconductor material having a band gap wider than a semiconductor material of the quantum well layer. The pair of carrier confinement layers are sandwiched by a pair of clad layers made of a semiconductor material having a band gap wider than the band gap of the semiconductor material of the carrier confinement layers. Thicknesses of the quantum well layer and the carrier confinement layers, as well as compositions of the semiconductor materials thereof, are set such that light emission recombination of electrons and holes occurs in the quantum well layer and not in the carrier confinement layers.

Abstract: Semiconductor structures and method of forming semiconductor structures. The semiconductor structures including nano-structures or fabricated using nano-structures. The method of forming semiconductor structures including generating nano-structures using a nano-mask and performing additional semiconductor processing steps using the nano-structures generated.

Abstract: A color mixing light emitting diode (LED) is disclosed. The present invention is featured in that a plurality of LEDs emitting different colors of light can be electrically connected in series and/or in parallel by using chip manufacturing to generate other colors of light. For example, the first LED chip set can emit such as yellow light (or changing to reddish-red light), and the second LED chip can emit such as blue light (or changing to bluish-green light), thereby making the present invention to emit white light. Moreover, the first LED chip set can be a photoluminescence LED chip, wherein the first LED chip can be excited by the light emitted by the second LED chip to emit light, and then the light emitted by the second LED chip and the light emitted by the first LED chip can be mixed into other colors of light.

Abstract: A compound semiconductor laser of a III group nitride semiconductor of the present invention includes a first cladding layer 104 of a first conduction type formed on a substrate 101, an active layer 106 formed on the first cladding layer, a second cladding layer 108 of a second conduction type formed on the active layer 106, and a buried layer 110 formed on the second cladding layer 108, the buried layer having an opening portion for constricting a current in a selected region of the active layer, wherein an upper portion of the second cladding layer 108 has a ridge portion, the ridge portion residing in the opening portion of the buried layer 110, and the buried layer 110 does not substantially absorb light output from the active layer 106, and the buried layer has a refractive index which is approximately identical with that of the second cladding layer 108.

Abstract: The present invention relates to a semiconductor light emitting device comprising a sapphire substrate 11; a u-GaN layer 12 that is formed on top of the substrate 11 and that comprises a plurality of concave portions 121 formed into band-like shapes with predetermined intervals therebetween; a regrown u-GaN layer 13 formed on the u-Ga layer 12; a layered structure that is formed on the u-GaN layer 13 comprises an n-GaN layer 15, an active layer 16, and a p-GaN layer 19; an n-type electrode 24 formed on the n-GaN layer 15 exposed by removing a potion of the layered structure; and a transparent p-type electrode 20 formed on the p-GaN layer 19, wherein the p-type electrode 20 is an emission detection surface, and an air layer S is formed between the bottom surface of the u-GaN layer 13 and the concave portions 121.

Abstract: When GaN or other nitride III-V compound semiconductor layers are grown on a substrate such as a sapphire substrate, thickness x of the substrate relative to thickness y of the nitride III-V compound semiconductor layers is controlled to satisfy 0<y/x?0.011 and x?450 ?m. Alternatively, if the maximum dimension of the substrate is D (cm), its warpage H is in the range of 0<H?70×10?4 (cm), and Z=y/x, D is controlled to satisfy the relation 0<D<(2/CZ)cos?1(1?HCZ), where C (cm?1) is the proportionality constant when the radius of curvature of the substrate ? (cm) is expressed as 1/?=CZ.

Abstract: A power LED high in light extraction efficiency is obtained without increasing the operation voltage and degrading the reliability. The power LED comprises: epitaxial growth layers including a first conductive type clad layer, an active layer made of an InGaAlP compound semiconductor on said first conductive type clad layer to generate light, and a second conductive type clad layer formed on said active layer; and a transparent first conductive type GaP substrate made of GaP with a thickness of equal to or more than 150 ?m and having a first surface, said first surface having an area equal to or wider than 0.1 mm2 and bonded to a bonding surface of said first conductive type clad layer via no layer or via a bond layer, an area of said bonding surface of said first conductive type clad layer being smaller than said first surface of said substrate to locally expose said first surface or said bond layer.

Abstract: A silicon carbide semi-insulating epitaxy layer is used to create power devices and integrated circuits having significant performance advantages over conventional devices. A silicon carbide semi-insulating layer is formed on a substrate, such as a conducting substrate, and one or more semiconducting devices are formed on the silicon carbide semi-insulating layer. The silicon carbide semi-insulating layer, which includes, for example, 4H or 6H silicon carbide, is formed using a compensating material, the compensating material being selected depending on preferred characteristics for the semi-insulating layer. The compensating material includes, for example, boron, vanadium, chromium, or germanium. Use of a silicon carbide semi-insulating layer provides insulating advantages and improved thermal performance for high power and high frequency semiconductor applications.

Abstract: A chalcogenide comprising material is formed to a first thickness over the first conductive electrode material. The chalcogenide material comprises AxBy. A metal comprising layer is formed to a second thickness over the chalcogenide material. The metal comprising layer defines some metal comprising layer transition thickness for the first thickness of the chalcogenide comprising material such that when said transition thickness is met or exceeded, said metal comprising layer when diffused within said chalcogenide comprising material transforms said chalcogenide comprising material from an amorphous state to a crystalline state. The second thickness being less than but not within 10% of said transition thickness. The metal is irradiated effective to break a chalcogenide bond of the chalcogenide material at an interface of the metal and chalcogenide material and diffuse at least some of the metal into the chalcogenide material.

Abstract: This invention discloses novel device structures for full color flat panel displays utilizing pseudomorphically cladded quantum dot nanocrystals. Different colors are obtained by changing the core size and composition of the quantum dots while maintaining a nearly defect-free lattice at the core-cladding interface. Light emission from the quantum dot core is obtained either by injection or by avalanche electroluminescence. A nanotip emitter device is also presented. These generic devices can be addressed using a variety of conventional display drivers, including active and passive matrix configurations.

Abstract: A semiconductor device includes a semiconductor chip, electrodes pads, an insulating layer, first and second conductive patterns and external terminals. The electrode pads are formed on a first area of a main surface of the semiconductor chip. The insulating layer is formed on a second area of the semiconductor chip so as to expose the electrode pads. The first conductive patterns provide a ground potential and are formed on the insulating layer. The second conductive pattern transfers a signal. The second conductive pattern is formed on the insulating layer and located between the first conductive patterns. The external terminals are formed on the first and second patterns at the second area.

Abstract: An Al0.15Ga0.85N layer 2 is formed on a silicon substrate 1 in a striped or grid pattern. A GaN layer 3 is formed in regions A where the substrate 1 is exposed and in regions B which are defined above the layer 2. At this time, the GaN layer grows epitaxially and three-dimensionally (not only in a vertical direction but also in a lateral direction) on the Al0.15Ga0.85N layer 2. Since the GaN layer grows epitaxially in the lateral direction as well, a GaN compound semiconductor having a greatly reduced number of dislocations is obtained in lateral growth regions (regions A where the substrate 1 is exposed).

Abstract: A layered article and method for forming the same includes a single crystal silicon substrate, a silicon oxynitride layer (SixNyOz) disposed on the silicon substrate, and a single crystal GaN layer disposed on the oxynitride layer. The silicon oxynitride layer can be formed by nitridation of a native oxide layer. One or more integrated electronic circuits and/or integrated optical or optoelectronic devices can be built on the article.

Abstract: A process for the production of contacts for electrically operated II/VI semiconductor structures (for example laser diodes). The contact materials palladium and gold hitherto used in relation to electrically operated II/VI semiconductor lasers are distinguished by a relatively great, not purely ohmic specific contact resistance in relation to the II/VI cover layer. The consequentially necessary higher operating voltages result in the unnecessary generation of heat and thus substantially accelerate degradation of the entire laser structure. That effect causes a limitation in terms of the service life of II/VI semiconductor laser diodes. The invention permits the operation of semiconductor laser diodes with lower operating voltages. The II/VI semiconductor laser diodes produced with our invention are distinguished by a longer service life. That permits inter alia commercial use of semiconductor laser diodes in the blue-green spectral range.

Abstract: A semiconductor structure includes a monocrystalline silicon substrate, an amorphous oxide material overlying the monocrystalline silicon substrate, a monocrystalline perovskite oxide material overlying the amorphous oxide material, and a monocrystalline compound semiconductor material overlying the monocrystalline perovskite oxide material. A composite transistor includes a first transistor having first active regions formed in the monocrystalline silicon substrate, a second transistor having second active regions formed in the monocrystalline compound semiconductor material, and a mode control terminal for controlling the first transistor and the second transistor.

Abstract: An Al0.15Ga0.85N layer 2 is formed on a silicon substrate 1 in a striped or grid pattern. A GaN layer 3 is formed in regions A where the substrate 1 is exposed and in regions B which are defined above the layer 2. At this time, the GaN layer grows epitaxially and three-dimensionally (not only in a vertical direction but also in a lateral direction) on the Al0.15Ga0.85N layer 2. Since the GaN layer grows epitaxially in the lateral direction as well, a GaN compound semiconductor having a greatly reduced number of dislocations is obtained in lateral growth regions (regions A where the substrate 1 is exposed).

Abstract: A persistent p-type group II-VI semiconductor material is disclosed. The group II-VI semiconductor includes atoms of group II elements, atoms of group VI elements, and one or more p-type dopants. The p-type dopant concentration is sufficient to render the group II-VI semiconductor material in a single crystal form. The semiconductor resistivity is less than about 0.5 ohm·cm, and the carrier mobility is greater than about 0.1 cm2/V·s. Group II elements include zinc, cadmium, the alkaline earth metals such as beryllium, magnesium calcium, strontium, and barium, and mixtures thereof. Group VI elements include oxygen, sulfur, selenium, tellurium, and mixtures thereof. P-type dopants include, but are not limited to, nitrogen, phosphorus, arsenic, antimony, bismuth, copper, chalcogenides of the foregoing, and mixtures thereof.

Abstract: An Al0.15Ga0.85N layer 2 is formed on a silicon substrate 1 in a striped or grid pattern. A GaN layer 3 is formed in regions A where the substrate 1 is exposed and in regions B which are defined above the layer 2. At this time, the GaN layer grows epitaxially and three-dimensionally (not only in a vertical direction but also in a lateral direction) on the Al0.15Ga0.85N layer 2. Since the GaN layer grows epitaxially in the lateral direction as well, a GaN compound semiconductor having a greatly reduced number of dislocations is obtained in lateral growth regions (regions A where the substrate 1 is exposed).

Abstract: An electro luminescence device comprises a compound semiconductor crystal substrate comprising a Group 12 (2B) element and a Group 16 (6B) element in a periodic table. It is produced by providing a substrate having a low dislocation density or a low inclusion density; forming a pn junction by thermally diffusing an element converting the substrate of a first conduction type into the one of a second conduction type from a front surface of the substrate; and forming electrodes on front and rear of the substrate. A diffusion source including an element converting the substrate of a first conduction type into the one of a second conduction type is disposed on the front surface of the substrate, preventing forming of a defect compensating an impurity level which is formed in the substrate by the element during a diffusion process, and gettering impurity on the front surface of the substrate by the diffusion source.

Abstract: The present invention provides a high efficient nitride semiconductor element having an opposed terminal structure, whose terminals facing each other, and a method for producing thereof.

Abstract: A p-type contact electrode device in a ZnSe-based II-VI compound semiconductor, which electrode device uses, as a contact layer, a BeTe layer having a high p-type doping and a low lattice mismatching with a GaAs substrate to prevent oxidation in air. The device 2 includes a contact layer 5 composed of p-BeTe and a cap layer 4 is composed of p-ZnSe. The cap layer 4 is positioned on the contact layer 5 and an electrode 3 sits atop the cap layer. Preferably, the thickness of the cap layer is 30 to 70 Å and the electrode is composed of gold or gold is dispersed in the cap layer.

Abstract: A semiconductor device includes a first semiconductor chip and a second semiconductor chip which are laminated on a substrate, wherein electrode terminals which are provided on each of the semiconductor chips are electrically connected to the substrate by first bonding wires and second bonding wires, and an insulation layer is formed between the second bonding wires and the first semiconductor chip.

Abstract: A semi-insulating bulk single crystal of silicon carbide is disclosed that has a resistivity of at least 5000 &OHgr;-cm at room temperature and a concentration of deep level trapping elements that is below the amounts that will affect the resistivity of the crystal, preferably below detectable levels. A method of forming the crystal is also disclosed, along with some resulting devices that take advantage of the microwave frequency capabilities of devices formed using substrates according to the invention.

Abstract: Optoelectronic component and method for producing the same To improve the permeability of a contact layer (6) of a light-emitting diode (1), it is proposed to provide the contact layer (6) with openings (8) through which photons generated in a pn junction (5) can escape. Small spheres, for example of polystyrene, are used to produce the openings (8). FIG.

Abstract: A process for producing monocrystalline semiconductor layers. In an exemplary embodiment, a graded Si1−xGex (x increases from 0 to y) is deposited on a first silicon substrate, followed by deposition of a relaxed Si1−yGey layer, a thin strained Si1−zGez layer and another relaxed Si1−yGey layer. Hydrogen ions are then introduced into the strained SizGez layer. The relaxed Si1−yGey layer is bonded to a second oxidized substrate. An annealing treatment splits the bonded pair at the strained Si layer, such that the second relaxed Si1−yGey layer remains on the second substrate. In another exemplary embodiment, a graded Si1−xGex is deposited on a first silicon substrate, where the Ge concentration x is increased from 0 to 1. Then a relaxed GaAs layer is deposited on the relaxed Ge buffer. As the lattice constant of GaAs is close to that of Ge, GaAs has high quality with limited dislocation defects.

Abstract: The present invention provides a high efficient nitride semiconductor element having an opposed terminal structure, whose terminals facing each other, and a method for producing thereof.

Abstract: This invention describes a radiation-emitting semiconductor component with the a multilayered structure (4) that contains a radiation-emitting active layer (5), and a window (1) transparent to radiation that has a first principal face (2) and a second principal face (3) opposite the first principal face (2), and whose first principal face (2) adjoins the multilayered structure (4).