Flexible Insulating Substrates (epo) Patents (Class 257/E23.177)
  • Patent number: 10506708
    Abstract: A flexible electronics assembly includes a single-piece substrate having two regions of rigidity separated by a localized region of flexibility. The localized region of flexibility has a lower rigidity than the two regions of rigidity. The two regions of rigidity are angularly deflectable from a planar configuration of the single-piece substrate to a non-planar configuration of the single-piece substrate by hinging action of the localized region of flexibility. At least one electronic component is mounted on at least one of the two regions of rigidity.
    Type: Grant
    Filed: July 14, 2017
    Date of Patent: December 10, 2019
    Assignee: Brigham Young University (BYU)
    Inventors: Bryce Parker Defigueiredo, Spencer Magleby, Larry Howell
  • Patent number: 10392245
    Abstract: An integrated device includes: a first die; a second die coupled in a stacked way on the first die along a vertical axis; a coupling region arranged between facing surfaces of the first die and of the second die, which face one another along the vertical axis and lie in a horizontal plane orthogonal to the vertical axis, for mechanical coupling of the first and second dies; electrical-contact elements carried by the facing surfaces of the first and second dies, aligned in pairs along the vertical axis; and conductive regions arranged between the pairs of electrical-contact elements carried by the facing surfaces of the first and second dies, for their electrical coupling. Supporting elements are arranged at the facing surface of at least one of the first and second dies and elastically support respective electrical-contact elements.
    Type: Grant
    Filed: May 10, 2017
    Date of Patent: August 27, 2019
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Enri Duqi, Lorenzo Baldo, Domenico Giusti
  • Patent number: 10382871
    Abstract: The application relates to a portable electronic device comprising a) a folded substrate carrying components of the device, and b) another, separate component having a fixed outer contour, and c) a housing for enclosing said folded substrate and said separate component, said housing having an inner contour, wherein said folded substrate is folded from a planar substrate along a folding line, said folded substrate exhibiting outer edges comprising a folded edge following said folding line. The application further relates to a method of manufacturing a folded substrate. The object of the present application is to facilitate miniaturization of a portable electronic device, such as a hearing aid. The problem is solved in that the folded substrate is shaped to provide that at least one of said outer edges follow(s) the fixed outer contour of the separate component and/or the inner contour of said housing.
    Type: Grant
    Filed: November 28, 2017
    Date of Patent: August 13, 2019
    Assignee: Oticon A/S
    Inventors: Kenneth Rueskov Moller, Jan T. L. Larsen
  • Patent number: 10368444
    Abstract: A fingerprint module includes a cover plate, a fingerprint chip, an intermediate board, and a circuit board. An assembling region is disposed on the cover plate. The fingerprint chip is fixed in the assembling region. The intermediate board is bonded to one surface of the fingerprint chip opposite to the cover plate to press the fingerprint chip. The circuit board is electrically connected to the fingerprint chip via the intermediate board.
    Type: Grant
    Filed: August 15, 2017
    Date of Patent: July 30, 2019
    Assignee: Guangdong Oppo Mobile Telecommunications Corp., Ltd.
    Inventor: Wenzhen Zhang
  • Patent number: 10001713
    Abstract: A support such as a clamp (310) is configured to releasably hold a patterning device such as a reticle (300) to secure it and prevent heat-induced deformation of it. For example, an electrostatic clamp includes a first substrate (312) having opposing first (313) and second (315) surfaces, a plurality of burls (316) located on the first surface and configured to contact the reticle, a second substrate (314) having opposing first (317) and second (319) surfaces. The first surface of the second substrate is coupled to the second surface of the first substrate. A plurality of cooling elements (318) are located between the first surface of the second substrate and the second surface of the first substrate. The cooling elements are configured to cause electrons to travel from the second surface of the first substrate to the first surface of the second substrate. Each cooling element is substantially aligned with a respective burl.
    Type: Grant
    Filed: February 5, 2014
    Date of Patent: June 19, 2018
    Assignees: ASML Holding N.V., ASML Netherlands B.V.
    Inventors: Santiago E. Del Puerto, Matthew Lipson, Kenneth C. Henderson, Raymond Wilhelmus Louis LaFarre, Louis John Markoya, Tammo Uitterdijk, Johannes Petrus Martinus Bernardus Vermeulen, Antonius Franciscus Johannes De Groot, Ronald Van Der Wilk
  • Patent number: 9997493
    Abstract: The present invention mainly relates to a 3-D packaging structure based on a flexible substrate and a method for manufacturing the same; the method comprises: providing a bendable continuous flexible substrate, determining the shape of the substrate according to the size, the quantity and the shape of dies, and making surface wiring on the substrate to allow interlayer electrical connection; welding dies that are to be packaged onto the bendable continuous flexible substrate; filling the gaps between the dies and the substrate with an underfill; bending the substrates towards the center to allow the peripheral dies to coincide in parallel with the die situated at the center, and bonding the two layers of parallel dies with a bonding adhesive.
    Type: Grant
    Filed: June 12, 2014
    Date of Patent: June 12, 2018
    Assignee: INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES
    Inventors: Xueping Guo, Yuan Lu
  • Patent number: 9991467
    Abstract: A display device includes a flexible substrate having a display area for displaying an image, and a pad area adjacent the display area, a circuit film coupled to the flexible substrate at the pad area, and a passivation layer on at least a part of the circuit film and at part of the pad area.
    Type: Grant
    Filed: December 1, 2015
    Date of Patent: June 5, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jun Namkung, Soon Ryong Park, Chul Woo Jeong
  • Patent number: 9943124
    Abstract: Flexible LED light arrays particularly suitable for use in clothing and other articles are disclosed. The light arrays are disposed on flexible printed circuit boards (PCBs). The flexible PCBs include substantially sinusoidal metal contact traces, along which the LEDs are attached at an angle preselected to minimize stresses in the expected directions of bending. The flexible PCBs may have control electronics provided on separate, attachable control boards, which may be either flexible or rigid. The flexible LED light arrays may also be arranged in master-slave configurations with a number of arrays, in which one master control array or board is attached to a number of slave arrays and handles external communication for the slave arrays.
    Type: Grant
    Filed: May 24, 2016
    Date of Patent: April 17, 2018
    Assignee: Erogear, Inc.
    Inventor: Anders Kristofer Nelson
  • Patent number: 9862561
    Abstract: A driving board folding machine comprises a machine housing, a movable table and one or more pre-folding stations for holding an unfolded flexible circuit and a circuit housing. When the driving board folding machine is activated, the one or more pre-folding stations are moved to a folding station located within the machine housing and the flexible circuit is folded and inserted within the circuit housing. The driving board folding station is able to comprise multiple pre-folding stations on one or more sides of the movable table. A holding pin holds the flexible circuit in place while a forming press moves in order to preform the flexible circuit, fold the flexible circuit and move the circuit housing to insert the flexible circuit into the housing.
    Type: Grant
    Filed: December 2, 2013
    Date of Patent: January 9, 2018
    Assignee: Flextronics AP, LLC
    Inventors: Juan Jose Montiel Martinez, Guillermo Armando Martinez Cruz, Mario Lopez Ruiz
  • Patent number: 9826640
    Abstract: An electronic apparatus includes a frame, at least one circuit board, at least one hardware device, and at least one first connector. The frame includes a first frame body and a second frame body. The first frame body includes a first wire therein. The circuit board includes a first edge and a second, and at least a portion of the circuit board is flexible. The first edge is connected to the first frame body. The second edge is connected to the second frame body. The circuit board is electrically connected to the first wire. The hardware device is disposed on the circuit board. The first frame body includes a first inner surface, and the first connector is disposed on the first inner surface and electrically connected to the first wire, and the first edge of the circuit board is plugged in the first connector.
    Type: Grant
    Filed: June 13, 2016
    Date of Patent: November 21, 2017
    Assignee: E Ink Holdings Inc.
    Inventor: Chun-Wei Chu
  • Patent number: 9554461
    Abstract: A flexible board includes a first sheet section including a first principal surface, a second sheet section including a second principal surface and provided in a different position from the first principal surface in a normal direction to the first principal surface, at least one first bent sheet section configured to connect ends of the first and second sheet sections, the first bent sheet section including a third principal surface not parallel to the first and second principal surfaces, and at least two second bent sheet sections each including a fourth principal surface and provided in different positions from the third principal surface in a normal direction to the third principal surface. The second bent sheet sections are positioned so as to sandwich the first bent sheet section therebetween when viewed in a plan view in the normal direction to the third principal surface.
    Type: Grant
    Filed: June 16, 2014
    Date of Patent: January 24, 2017
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Noboru Kato
  • Patent number: 9515025
    Abstract: The present invention provides stretchable, and optionally printable, semiconductors and electronic circuits capable of providing good performance when stretched, compressed, flexed or otherwise deformed. Stretchable semiconductors and electronic circuits of the present invention preferred for some applications are flexible, in addition to being stretchable, and thus are capable of significant elongation, flexing, bending or other deformation along one or more axes. Further, stretchable semiconductors and electronic circuits of the present invention may be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.
    Type: Grant
    Filed: July 1, 2015
    Date of Patent: December 6, 2016
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: John A. Rogers, Dahl-Young Khang, Yugang Sun, Etienne Menard
  • Patent number: 9372375
    Abstract: A display device includes a TFT substrate with gate signal lines, drain signal lines, thin-film transistors connected thereto, a gate driver connected to the gate signal lines, a drain driver having output terminals connected to drain signal lines, and a film substrate having first wirings. The first wirings are disposed between the drain driver and the film substrate. The drain driver is mounted on the film substrate, and the output terminals are connected to the first wirings between the film substrate and the drain driver. The output terminal includes first group terminals formed in parallel with a longer edge of the drain driver, and second group terminals formed in parallel with the longer edge and disposed between the loner edge and the first group terminals.
    Type: Grant
    Filed: October 10, 2013
    Date of Patent: June 21, 2016
    Assignees: JAPAN DISPLAY INC., PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD.
    Inventors: Mitsuru Goto, Hiroko Hayata
  • Patent number: 9326368
    Abstract: An electronic control unit includes a board, a heat-generating device, a connector, and a heatsink. The board has an insulating layer and a wiring pattern partially exposed outside the insulating layer. The heat-generating device is mounted on the board and electrically connected to the wiring pattern. The connector is located adjacent to the heat-generating device and has a connection terminal connected to the wiring pattern. The heatsink is located opposite to the board across the heat-generating device and in contact with the heat-generating device to dissipate heat of the heat-generating device. The wiring pattern has a land pattern including a mount portion and a connection portion. The heat-generating device is mounted on the mount portion. The connection terminal of the connector is connected to the connection portion.
    Type: Grant
    Filed: December 24, 2014
    Date of Patent: April 26, 2016
    Assignee: DENSO CORPORATION
    Inventors: Ryo Nishimoto, Shinsuke Oota
  • Patent number: 8907376
    Abstract: A stretchable electronic circuit that includes a stretchable base substrate having a plurality of stretchable conductors formed onto a surface thereof, with both the stretchable base substrate and conductors being bendable together about two orthogonal axes. The stretchable circuit also includes a stretchable sensor layer attached to the base substrate with a cavity formed therein which has a contact point exposing one of the plurality of stretchable conductors. The stretchable electronic circuit further includes a surface mount device (SMD) package with a conductor contact protrusion installed into the cavity, and wherein a substantially constant electrical connection is established between the conductor contact protrusion and the stretchable conductor at the contact point by tensile forces interacting between the stretchable base substrate and the stretchable sensor layer.
    Type: Grant
    Filed: November 8, 2012
    Date of Patent: December 9, 2014
    Assignee: University of Utah Research Foundation
    Inventors: Stephen Mascaro, Debra Mascaro, Jumana Abu-Khalaf, Jungwoo Park
  • Patent number: 8865532
    Abstract: A method for manufacturing an active device array substrate includes providing a flexible substrate having a transistor region and a transparent region; forming a gate electrode on the transistor region; sequentially forming a dielectric layer and a semiconductor layer to cover the gate electrode and the flexible substrate; removing a part of the semiconductor layer to form a channel layer above the gate electrode and removing a thickness of the dielectric layer disposed on the transparent region, such that a portion of the dielectric layer on the gate electrode has a first thickness, and another portion of the dielectric layer on the transparent region has a second thickness less than the first thickness; respectively forming a source electrode and a drain electrode on opposite sides of the channel layer; and forming a pixel electrode electrically connected to the drain electrode.
    Type: Grant
    Filed: September 25, 2012
    Date of Patent: October 21, 2014
    Assignee: AU Optronics Corporation
    Inventors: Jia-Hong Ye, Ssu-Hui Lu, Wu-Hsiung Lin, Chao-Chien Chiu, Ming-Hsien Lee, Chia-Tien Peng, Wei-Ming Huang
  • Patent number: 8860203
    Abstract: A stretchable organic light-emitting display device includes a stretchable base plate including a stretchable substrate, first metal electrodes that are separated from each other and located in a plurality of rows on a the stretchable substrate, and first power wirings electrically coupling respective ones of the metal electrodes of each row, a light-emitting layer on the stretchable base plate, second metal electrodes located in a plurality of rows on the light-emitting layer and corresponding to the first metal electrodes, second power wirings for electrically coupling respective ones of the second metal electrodes of each row, and an encapsulation substrate covering the second power wiring.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: October 14, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventors: Chang-Hoon Lee, Jong-Ho Hong, Won-Sang Park, Jong-In Baek
  • Patent number: 8829508
    Abstract: A display apparatus including an organic light emitting display including a terminal portion, a battery disposed on a surface of the organic light emitting display, and a flexible printed circuit board (PCB) bent to cover the organic light emitting display and the battery, a side of the flexible PCB being connected to the terminal portion and another side of the flexible PCB extending outside and attached to the battery.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: September 9, 2014
    Assignee: Samsung Display Co., Ltd.
    Inventor: Jin-Hee Park
  • Patent number: 8748909
    Abstract: A display system provides a first semiconductor light source that is electrically connected in a first plane. A second semiconductor light source is electrically connected in a second plane separate from the first plane. A third semiconductor light source is electrically connected in the first plane at least a distance away from the first semiconductor light source equal to the width of the second semiconductor light source. The first plane and the second plane are merged into a combined plane by positioning the electrically connected second semiconductor light source between the electrically connected first semiconductor light source and the electrically connected third semiconductor light source.
    Type: Grant
    Filed: November 3, 2006
    Date of Patent: June 10, 2014
    Assignee: Apple Inc.
    Inventors: Victor Yin, John Zhong
  • Patent number: 8678669
    Abstract: A reconfigurable polarity detachable connector assembly includes a housing defining two accommodation channels and providing a springy protruding member at a top side, two mating simplex connectors respectively detachably mounted in the accommodation channels of the housing, a fiber optic cable fastened to the housing with two optical fiber cores thereof respectively inserted into respective calibration support rods of the mating simplex connectors, and a sliding cap slidably coupled to the housing. The sliding cap is unlocked and can be moved backwardly relative to the housing to expose the optical fiber cores of the fiber optic cable to the outside of the housing for allowing position exchange between the two mating simplex connectors after the user presses the springy protruding member.
    Type: Grant
    Filed: August 14, 2012
    Date of Patent: March 25, 2014
    Assignee: Alliance Fiber Optic Products Co., Ltd.
    Inventor: Jhih-Ping Lee
  • Patent number: 8648469
    Abstract: A semiconductor device includes a wafer level substrate having a plurality of first conductive vias formed through the wafer level substrate. A first semiconductor die is mounted to the wafer level substrate. A first surface of the first semiconductor die includes contact pads oriented toward a first surface of the wafer level substrate. A first encapsulant is deposited over the first semiconductor die. A second semiconductor die is mounted to the wafer level substrate. A first surface of the second semiconductor die includes contact pads oriented toward a second surface of the wafer level substrate opposite the first surface of the wafer level substrate. A second encapsulant is deposited over the second semiconductor die. A plurality of bumps is formed over the plurality of first conductive vias. A second conductive via can be formed through the first encapsulant and connected to the first conductive via. The semiconductor packages are stackable.
    Type: Grant
    Filed: July 26, 2011
    Date of Patent: February 11, 2014
    Assignee: STATS ChipPAC, Ltd.
    Inventors: DaeSik Choi, JongHo Kim, HyungMin Lee
  • Patent number: 8502367
    Abstract: An electronic package that includes a composite material base. In one embodiment the electronic package is an expanded wafer-level package. The composite material base is composed of woven strands and polymer material. In one embodiment the composite material base is composed of woven fiberglass strands and an epoxy material. In various embodiments the package includes an electronic circuitry layer on one or another face of the composite material base. In other embodiments conductive vias connect the circuitry layers, including a redistribution layer. In yet another embodiment an electronic package is mounted on the composite material base and electrically couples to the circuit of the expanded wafer-level package. The package having the composite material base is mechanically stronger and can be made thinner than a package that relies on an encapsulant material for structure, and resists cracking.
    Type: Grant
    Filed: September 29, 2010
    Date of Patent: August 6, 2013
    Assignee: STMicroelectronics Pte Ltd.
    Inventor: Jing-En Luan
  • Patent number: 8436455
    Abstract: A stacked structure of semiconductor packages includes an upper semiconductor package, a lower semiconductor package and inter-package connectors. The upper semiconductor package includes an upper package substrate, a plurality of upper semiconductor chips stacked on the upper package substrate, and conductive upper connection lands formed on a bottom surface of the upper package substrate. The lower semiconductor package includes a lower package substrate, a plurality of lower semiconductor chips stacked on the lower package substrate, and lower through-silicon vias vertically penetrating the lower semiconductor chips. The inter-package connectors may electrically connect the through-silicon vias to the upper connection lands.
    Type: Grant
    Filed: October 8, 2010
    Date of Patent: May 7, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Hyung-Lae Eun
  • Patent number: 8426983
    Abstract: A semiconductor device may include: first and second wiring boards separated from each other via a gap; a semiconductor chip; first and second groups of electrode pads; and first and second groups of connection pads. The semiconductor chip is fixed to upper surfaces of the first and second wiring boards, and has a first portion adjacent to the gap. The first and second groups of electrode pads are disposed on the first portion. The first and second groups of electrode pads are aligned adjacent to side surfaces of the first and second wiring boards, respectively. The side surfaces of the first and second wiring boards face each other. The first and second groups of connection pads are disposed on lower surfaces of the first and second wiring boards, respectively. The first and second groups of connection pads are aligned adjacent to the side surfaces of the first and second wiring boards, respectively.
    Type: Grant
    Filed: January 26, 2011
    Date of Patent: April 23, 2013
    Assignee: Elpida Memory, Inc.
    Inventors: Hiromasa Takeda, Satoshi Isa, Mitsuaki Katagiri
  • Patent number: 8399301
    Abstract: A structure of an integrated circuit module includes a wiring board, a plurality of integrated circuits and at least one terminating resistance circuit. The wiring board has a mounting region on at least one surface thereof. The plurality of integrated circuits are mounted in the mounting region of the wiring board and spaced from one another in a first direction. The at least one terminating resistance circuit is arranged between at least two adjacent integrated circuits, and coupled to an output of a last of the plurality of integrated circuits.
    Type: Grant
    Filed: March 4, 2011
    Date of Patent: March 19, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Joo Park, Ki-Hyun Ko, Young Yun, Soo-Kyung Kim
  • Patent number: 8368197
    Abstract: A semiconductor package includes a first semiconductor chip, a second semiconductor chip, a stepped pad, a plurality of first bonding wires and a second bonding wire. The first semiconductor chip is stacked on a substrate having a plurality of bonding pads, the first semiconductor chip having a plurality of first chips pads formed along a side portion of the first semiconductor chip. The second semiconductor chip is stacked like a step of a staircase on the first semiconductor chip to form a stepped portion through which the first chip pads are exposed on the first semiconductor chip, the second semiconductor chip having a plurality of second chip pads formed along a side portion of the first semiconductor chip. The stepped pad is arranged between the first chip pads on the stepped portion of the first semiconductor chip, the stepped pad including an adhesive pad adhered to the first semiconductor chip and a conductive pad formed on the adhesive pad.
    Type: Grant
    Filed: July 22, 2010
    Date of Patent: February 5, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Joong-Kyo Kook
  • Patent number: 8354300
    Abstract: Mitigating electrostatic discharge damage when fabricating a 3-D integrated circuit package, wherein in one embodiment when a second tier die is placed in contact with a first tier die, conductive bumps near the perimeter of the second tier die that are electrically coupled to the substrate of the second tier die make contact with corresponding conductive bumps on the first tier die that are electrically coupled to the substrate of first tier die before other signal conductive bumps and power conductive bumps on the second tier and first tier dice make electrical contact.
    Type: Grant
    Filed: February 23, 2010
    Date of Patent: January 15, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Brian Matthew Henderson, Arvind Chandrasekaran
  • Patent number: 8258608
    Abstract: In a lead frame used for manufacturing a semiconductor device by forming a circuit pattern group including unit lead frames having plural upper side terminal parts in the periphery of a semiconductor element mounting region in one line or plural lines and an outer frame surrounding the circuit pattern group in a state of having a gap in a lead frame material and then mounting a semiconductor element every the unit lead frame and carrying out necessary wiring and enclosing the entire surface of the circuit pattern group in which the semiconductor element is mounted and a part of the outer frame with a resin from an upper surface side and further etching from a lower surface side and forming lower side terminal parts joined to the upper side terminal parts of the circuit pattern group, the circuit pattern group and the outer frame are had and the inner edge of the outer frame is formed in an uneven portion in plan view and bonding between the resin and the outer frame is enhanced.
    Type: Grant
    Filed: October 25, 2010
    Date of Patent: September 4, 2012
    Assignee: Mitsui High-Tec, Inc.
    Inventor: Keiji Takai
  • Patent number: 8217507
    Abstract: A semiconductor package which is structured to allow for the edge mounting thereof in a vertical mount orientation. The semiconductor package comprises a flexible substrate or “flex circuit.” The flexible substrate includes a conductive pattern disposed on a first surface thereof, and a plurality of conductive pads or terminals disposed on a second surface thereof which is disposed in opposed relation to the first surface. Mounted to the first surface of the flexible substrate are one or more electronic components such as semiconductor dies. The semiconductor die(s) is/are electrically connected to the conductive pattern, and thereafter covered or encapsulated by a package body applied to a portion of the first surface of the flexible substrate. That portion of the flexible substrate including the conductive pads or terminals formed on the second surface thereof is thereafter folded and adhered to a portion of the package body through the use of a suitable adhesive.
    Type: Grant
    Filed: January 22, 2010
    Date of Patent: July 10, 2012
    Assignee: Amkor Technology, Inc.
    Inventors: Jesse E. Galloway, Bob-Shih Wei Kuo, Ahmer Syed
  • Patent number: 8188474
    Abstract: It is an object to provide a flexible light-emitting device with long lifetime in a simple way and to provide an inexpensive electronic device with long lifetime using the flexible light-emitting device. A flexible light-emitting device is provided, which includes a substrate having flexibility and a light-transmitting property with respect to visible light; a first adhesive layer over the substrate; an insulating film containing nitrogen and silicon over the first adhesive layer; a light-emitting element including a first electrode, a second electrode facing the first electrode, and an EL layer between the first electrode and the second electrode; a second adhesive layer over the second electrode; and a metal substrate over the second adhesive layer, wherein the thickness of the metal substrate is 10 ?m to 200 ?m inclusive. Further, an electronic device using the flexible light-emitting device is provided.
    Type: Grant
    Filed: October 14, 2009
    Date of Patent: May 29, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kaoru Hatano, Satoshi Seo, Takaaki Nagata, Tatsuya Okano
  • Patent number: 8093706
    Abstract: A mounting structure includes: at least one semiconductor device having solder bumps as outer terminals and a flexible wiring board with wiring formed thereon. The semiconductor device is structured to be wrapped by the flexible wiring board, the mounting structure is provided with outer electrodes on both sides of the flexible wiring board, one side being a side where outer terminals of the semiconductor device are formed, and the other side being an opposite side thereof. At least one wiring layer is formed on the flexible wiring board. A supporting member is provided covering side faces and a surface of the semiconductor device opposite to the side where the outer terminals are formed and protruding from the side faces of the semiconductor device and extending toward the surface on which the outer terminals are formed.
    Type: Grant
    Filed: March 24, 2009
    Date of Patent: January 10, 2012
    Assignee: NEC Corporation
    Inventors: Shinji Watanabe, Takao Yamazaki
  • Patent number: 8072045
    Abstract: Extendable connectors are facilitated. According to an example embodiment, an integrated electrical circuit uses a connector that has first and second connected ends. The connector is unbundled from an initial state in which the first and second connected ends are separated by a first proximate distance and applied in an extended state in which the first and second connected ends are separated by a second distance that is greater than the first proximate distance.
    Type: Grant
    Filed: November 3, 2010
    Date of Patent: December 6, 2011
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Peter Peumans, Kevin Huang, Fu-Kuo Chang
  • Patent number: 7998797
    Abstract: A method of assembling a semiconductor device includes providing a chip attached to an elastic carrier, and supporting the elastic carrier with a stiffener. The method additionally includes removing the stiffener from the elastic carrier after attaching the elastic carrier to a board.
    Type: Grant
    Filed: December 9, 2008
    Date of Patent: August 16, 2011
    Assignee: Infineon Technologies AG
    Inventors: Thomas Killer, Erich Syri, Gerold Gruendler, Juergen Hoegerl, Volker Strutz, Hermann Josef Lutz
  • Patent number: 7982296
    Abstract: The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.
    Type: Grant
    Filed: September 22, 2009
    Date of Patent: July 19, 2011
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Ralph G. Nuzzo, John A. Rogers, Etienne Menard, Keon Jae Lee, Dahl-Young Khang, Yugang Sun, Matthew Meitl, Zhengtao Zhu
  • Patent number: 7943491
    Abstract: The present invention provides methods, systems and system components for transferring, assembling and integrating features and arrays of features having selected nanosized and/or microsized physical dimensions, shapes and spatial orientations. Methods of the present invention utilize principles of ‘soft adhesion’ to guide the transfer, assembly and/or integration of features, such as printable semiconductor elements or other components of electronic devices. Methods of the present invention are useful for transferring features from a donor substrate to the transfer surface of an elastomeric transfer device and, optionally, from the transfer surface of an elastomeric transfer device to the receiving surface of a receiving substrate. The present methods and systems provide highly efficient, registered transfer of features and arrays of features, such as printable semiconductor element, in a concerted manner that maintains the relative spatial orientations of transferred features.
    Type: Grant
    Filed: June 9, 2006
    Date of Patent: May 17, 2011
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Ralph G. Nuzzo, John A. Rogers, Etienne Menard, Keon Jae Lee, Dahl-Young Khang, Yugang Sun, Matthew Meitl, Zhengtao Zhu
  • Patent number: 7898074
    Abstract: A packaged electronic device includes a die, a flexible circuit structure, and a barrier film disposed on the die. The die includes die circuitry and electrical contacts. The flexible circuit structure is bonded directly to the die, and includes electrical conductors encapsulated by structural layers. Each electrical conductor contacts a respective electrical contact. The electronic device is encapsulated by the barrier film and one or more of the structural layers.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: March 1, 2011
    Inventors: Helmut Eckhardt, Stefan Ufer
  • Patent number: 7834424
    Abstract: Extendable connectors are facilitated. According to an example embodiment, an integrated electrical circuit uses a connector that has first and second connected ends. The connector is unbundled from an initial state in which the first and second connected ends are separated by a first proximate distance and applied in an extended state in which the first and second connected ends are separated by a second distance that is greater than the first proximate distance.
    Type: Grant
    Filed: September 12, 2007
    Date of Patent: November 16, 2010
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Peter Peumans, Kevin Huang, Fu-Kuo Chang
  • Patent number: 7804985
    Abstract: Impact resistant circuit modules are disclosed for enclosing a die having a sensor area. Preferred modules include a flexible circuit and a die coupled thereto. The flexible circuit is preferably folded over compressible material to help absorb applied forces. A gap may be provided between sides of the die and the compressible material to help prevent peeling. A metal reinforcing layer may be bonded to the back of the die. A low modulus material including a patterned gap underneath the die may be used to absorb forces. A dry film adhesive may be placed between at least part of the upper surface of the die and the flexible circuit, preferably to provide further point impact resistance and protection. High and low modulus material may be combined in ruggedizing structures. Consumer devices employing such circuit modules are also taught, as well as module construction methods.
    Type: Grant
    Filed: August 25, 2008
    Date of Patent: September 28, 2010
    Assignee: Entorian Technologies LP
    Inventors: Leland Szewerenko, Julian Partridge, Ron Orris
  • Patent number: 7772109
    Abstract: A first multilayer wiring structural body 16 and a second multilayer wiring structural body 56 are simultaneously formed on both surfaces 101A, 101B of a substrate 101 and thereafter the portion of a structural body 120 corresponding to a third region C1 is folded so as to oppose a second structural body 22 to a second structural body 62 and the first multilayer wiring structural body 16 is electrically connected to the second multilayer wiring structural body 56.
    Type: Grant
    Filed: March 15, 2007
    Date of Patent: August 10, 2010
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventor: Yoshihiro Machida
  • Patent number: 7750457
    Abstract: A semiconductor apparatus of the present invention includes: (i) a wire substrate having an insulating substrate in which a plurality of wire patterns are provided, (ii) a semiconductor element installed on the wire substrate with the insulating resin interposed therebetween, and a plurality of connecting terminals provided in the semiconductor element are electrically connected to connecting terminals of the wire patterns, respectively. In the semiconductor apparatus, the insulating substrate has mark patterns for alignment of the connecting terminals of the semiconductor element and the connecting terminals of the wire patterns, and an entire upper face of each of the mark patterns is covered with the insulating resin.
    Type: Grant
    Filed: February 7, 2008
    Date of Patent: July 6, 2010
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Toshiharu Seko
  • Patent number: 7719098
    Abstract: The present invention stacks integrated circuits into modules that conserve board surface area. In a precursor assembly devised as a component for a stacked circuit module in accordance with a preferred embodiment of the present invention, one or more stiffeners are disposed at least partially between a flex circuit and an integrated circuit. In a two-high stacked circuit module devised in accordance with a preferred embodiment of the present invention, an integrated circuit is stacked above a precursor assembly. The two integrated circuits are connected with the flex circuit of the precursor assembly. The present invention may be employed to advantage in numerous configurations and combinations of integrated circuits in modules.
    Type: Grant
    Filed: October 16, 2007
    Date of Patent: May 18, 2010
    Assignee: Entorian Technologies LP
    Inventor: James Douglas Wehrly, Jr.
  • Patent number: 7676918
    Abstract: A method for forming a molded circuit board is provided. The method includes the steps of forming a circuit having a first section and a second section on a conductive substrate, the first section and the second section being coplanar; then deforming the conductive substrate by mold-pressing, so that the first section and the second section become non-coplanar; providing a plastic material to cover the circuit and the conductive substrate; curing the plastic material by injection-molding; and removing the conductive substrate to expose the circuit. The molded circuit board made by this method is also provided.
    Type: Grant
    Filed: July 12, 2007
    Date of Patent: March 16, 2010
    Assignee: Mutual-Tek Industries Co., Ltd
    Inventor: Jung-Chien Chang
  • Patent number: 7671449
    Abstract: One embodiment of the present invention provides a system that facilitates high-bandwidth communication using a flexible bridge. This system includes a chip with an active face upon which active circuitry and signal pads reside, and a second component with a surface upon which active circuitry and/or signal pads reside. A flexible bridge provides high-bandwidth communication between the active face of the chip and the surface of the second component. This flexible bridge provides a flexible connection that allows the chip to be moved with six degrees of freedom relative to the second component without affecting communication between the chip and the second component. Hence, the flexible bridge allows the chip and the second component to communicate without requiring precise alignment between the chip and the second component.
    Type: Grant
    Filed: May 4, 2006
    Date of Patent: March 2, 2010
    Assignee: Sun Microsystems, Inc.
    Inventors: Arthur R. Zingher, Bruce M. Guenin, Ronald Ho, Robert J. Drost
  • Patent number: 7649245
    Abstract: One embodiment of the present invention provides a system that facilitates high-bandwidth communication using a flexible bridge. This system includes a chip with an active face upon which active circuitry and signal pads reside, and a second component with a surface upon which active circuitry and/or signal pads reside. A flexible bridge provides high-bandwidth communication between the active face of the chip and the surface of the second component. By matching the wire line size in the flexible bridge to the size of circuits and/or signal pads on the chip and on the second component, the system allows signals to be sent between the circuits on the chip and the second component without having to change the scale of the interconnect, thereby alleviating wireability and bandwidth limitations of conventional chip packaging technologies.
    Type: Grant
    Filed: May 4, 2006
    Date of Patent: January 19, 2010
    Assignee: Sun Microsystems, Inc.
    Inventors: Arthur R. Zingher, Bruce M. Guenin, Ronald Ho, Robert J. Drost
  • Publication number: 20090309214
    Abstract: Turbulence inducers are provided on circuit modules. Rising above a substrate or heat spreader surface, turbulence generators may be added to existing modules or integrated into substrates or heat spreaders employed by circuit modules constructed according to traditional or new technologies.
    Type: Application
    Filed: August 24, 2009
    Publication date: December 17, 2009
    Inventors: Leland Szewerenko, Julian Partridge, Wayne Lieberman, Paul Goodwin
  • Patent number: 7629691
    Abstract: A flexible conductor formed on a flexible substrate. In one embodiment, a semiconductor device is disclosed. The semiconductor device comprises a periodic structure of islands and at least one conductor. The at least one conductor comprises a series of repeating geometric features affixed to the periodic structure of islands. The geometric features of the conductor are adapted to stretch the conductor rather than break the conductor when the substrate is bent.
    Type: Grant
    Filed: June 16, 2004
    Date of Patent: December 8, 2009
    Assignee: Honeywell International Inc.
    Inventors: Jerry A. Roush, John F. Schmidt, Sonia R. Dodd
  • Patent number: 7626273
    Abstract: The present invention provides a system and method that mounts integrated circuit devices onto substrates and a system and method for employing the method in stacked modules. The contact pads of a packaged integrated circuit device are substantially exposed. A solder paste that includes higher temperature solder paste alloy is applied to a substrate or to the integrated circuit device to be mounted. The integrated circuit device is positioned to contact the contacts of the substrate. Heat is applied to create high temperature joints between the contacts of the substrate and the integrated circuit device resulting in a device-substrate assembly with high temperature joints. The formed joints are less subject to re-melting in subsequent processing steps. The method may be employed in devising stacked module constructions such as those disclosed herein as preferred embodiments in accordance with the invention. Typically, the created joints are low in profile.
    Type: Grant
    Filed: January 20, 2009
    Date of Patent: December 1, 2009
    Assignee: Entorian Technologies, L.P.
    Inventors: Julian Partridge, James W. Cady, James Wilder, David L. Roper, James Douglas Wehrly, Jr.
  • Patent number: 7622367
    Abstract: The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.
    Type: Grant
    Filed: June 2, 2005
    Date of Patent: November 24, 2009
    Assignee: The Board of Trustees of the University of Illinois
    Inventors: Ralph G. Nuzzo, John A. Rogers, Etienne Menard, Keon Jae Lee, Dahl-Young Khang, Yugang Sun, Matthew Meitl, Zhengtao Zhu
  • Publication number: 20090283891
    Abstract: The present invention relates to an integrated-circuit device comprising a multitude of separate rigid substrate islands (202 to 208) with circuit elements, a respective substrate island being connected to respective neighbor substrate islands by respective elastically deformable connections 210 to 222), which contain at least one respective signaling layer that is made of an electrically conductive material. At least one elastically deformable connection between substrate islands has a signaling layer, which is not electrically connected and thus forms a dummy signaling layer (210a to 210c), and the elastically deformable connections, which connect a respective substrate island to respective neighbor substrate islands along a first direction, have an elastic deformability in the first direction governed by respective moduli of elasticity, the ratio of which is between 0.5 and 2.0. This reduces the inhomogeneity of strain in the network of substrate islands that is formed by the integrated-circuit device.
    Type: Application
    Filed: April 3, 2007
    Publication date: November 19, 2009
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventors: Ronald Dekker, Theodorus Martinus Michielsen, Theodoros Zoumpoulidis
  • Patent number: 7608920
    Abstract: The present invention provides a system and method for employing leaded packaged memory devices in memory cards. Leaded packaged ICs are disposed on one or both sides of a flex circuitry structure to create an IC-populated structure. In a preferred embodiment, leads of constituent leaded IC packages are configured to allow the lower surface of the leaded IC packages to contact respective surfaces of the flex circuitry structure. Contacts for typical embodiments are supported by a rigid portion of the flex circuitry structure and the IC-populated structure is disposed in a casing to provide card structure for the module.
    Type: Grant
    Filed: May 16, 2006
    Date of Patent: October 27, 2009
    Assignee: Entorian Technologies, LP
    Inventor: James Douglas Wehrly, Jr.