For Device Having Potential Or Surface Barrier (epo) Patents (Class 257/E31.112)
  • Patent number: 11329089
    Abstract: Pixel isolation wells in a semiconductor image sensor are implemented via two or more photoresist patterning phases and two or more corresponding dopant implantation operations. A distinct photomask is applied in each patterning phase with the isolation-well street lines patterned by each mask spaced from one another by an integer multiple (i.e., 2 or greater) of the pixel pitch, and patterns formed by respective masks being staggered by the pixel pitch.
    Type: Grant
    Filed: June 7, 2020
    Date of Patent: May 10, 2022
    Assignee: Gigajot Technology, Inc.
    Inventor: Jiaju Ma
  • Patent number: 9712767
    Abstract: A solid-state imaging device includes a pixel unit in which a plurality of pixels converting physical quantities into electric signals are arranged in a two-dimensional shape, a vertical signal line for reading signals from the pixels, and column circuits arranged corresponding to columns of the pixel unit and collecting the signals from the vertical signal line at the inside of the pixel unit.
    Type: Grant
    Filed: July 8, 2016
    Date of Patent: July 18, 2017
    Assignee: Sony Corporation
    Inventor: Keiji Mabuchi
  • Patent number: 9692999
    Abstract: A solid-state imaging device includes a pixel unit in which a plurality of pixels converting physical quantities into electric signals are arranged in a two-dimensional shape, a vertical signal line for reading signals from the pixels, and column circuits arranged corresponding to columns of the pixel unit and collecting the signals from the vertical signal line at the inside of the pixel unit.
    Type: Grant
    Filed: August 2, 2016
    Date of Patent: June 27, 2017
    Assignee: Sony Corporation
    Inventor: Keiji Mabuchi
  • Patent number: 9627432
    Abstract: A semiconductor integrated circuit includes a first semiconductor substrate in which a part of an analog circuit is formed between the analog circuit and a digital circuit which subjects an analog output signal output from the analog circuit to digital conversion; a second semiconductor substrate in which the remaining part of the analog circuit and the digital circuit are formed; and a substrate connection portion which connects the first and second semiconductor substrates to each other. The substrate connection portion transmits an analog signal which is generated by a part of the analog circuit of the first semiconductor substrate to the second semiconductor substrate.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: April 18, 2017
    Assignee: Sony Corporation
    Inventor: Yoshiharu Kudoh
  • Patent number: 8779452
    Abstract: An embodiment of the invention provides a chip package which includes: a substrate having a first surface and a second surface; an optoelectronic device disposed at the first surface; a protection layer disposed on the second surface of the substrate, wherein the protection layer has an opening; a conducting bump disposed on the second surface of the substrate and filled in the opening; a conducting layer disposed between the protection layer and the substrate, wherein the conducting layer electrically connects the optoelectronic device to the conducting bump; and a light shielding layer disposed on the protection layer, wherein the light shielding layer does not contact with the conducting bump.
    Type: Grant
    Filed: September 1, 2011
    Date of Patent: July 15, 2014
    Inventors: Tzu-Hsiang Hung, Hsin-Chih Chiu, Chuan-Jin Shiu, Chia-Sheng Lin, Yen-Shih Ho, Yu-Min Liang
  • Patent number: 8766340
    Abstract: A solid-state imaging apparatus and a manufacturing method of a solid-state imaging apparatus are provided. Metal wirings 102 and 103 are formed in an effective pixel region A and out-of effective pixel region B of a semiconductor substrate 100, and an etch stop layer 118 is formed over the metal wirings 102 and 103. Moreover, an insulating film 119 is formed on the etch stop layer 118, and another metal wiring 104 is formed on the insulating film 119 in the out-of effective pixel region B. Next, the insulating film 119 in the effective pixel region A is removed by using the etch stop layer 118, and interlayer lenses 105 are formed in the step in the effective pixel region A where the insulating film 119 is removed.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: July 1, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventor: Takehiro Toyoda
  • Patent number: 8338904
    Abstract: According to an embodiment, there is provided a semiconductor device including a semiconductor substrate having a first surface on which an active layer having a light receiving portion is provided and a second surface to be a light receiving surface for the light receiving portion, a wiring layer provided on the active layer, an insulating layer provided to cover the wiring layer, and a supporting substrate joined to the semiconductor substrate via the insulating layer to face the first surface of the semiconductor substrate. A joined body of the semiconductor substrate and the supporting substrate includes an intercalated portion provided between its outer peripheral surface and the active surface. The intercalated portion is provided to penetrate the semiconductor substrate and the insulating layer from the second surface of the semiconductor substrate and to reach inside the supporting substrate.
    Type: Grant
    Filed: September 16, 2010
    Date of Patent: December 25, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazumasa Tanida, Chiaki Takubo, Hideo Numata, Yoshihisa Imori
  • Patent number: 8154095
    Abstract: Provided is an image sensor that comprises a readout circuitry, an interlayer dielectric, an interconnection, an image sensing device, an ion implantation region, a contact, and a pixel separation layer. The readout circuitry is disposed at a first substrate. The interlayer dielectric is disposed on the first substrate. The interconnection is disposed in the interlayer dielectric, and electrically connected to the readout circuitry. The image sensing device is disposed on the interconnection, and comprises a first conductive type layer and a second conductive type layer. The contact electrically connects the first conductive type layer of the image sensing device and the interconnection. The ion implantation region is formed in the second conductive type layer at a region corresponding to the contact. The pixel separation layer is disposed at a pixel boundary of the image sensing device.
    Type: Grant
    Filed: September 25, 2009
    Date of Patent: April 10, 2012
    Assignee: Dongbu Hitek Co., Ltd.
    Inventor: Joon Hwang
  • Publication number: 20100186807
    Abstract: The present invention relates to electrical contacts in a semiconductor device, and more particularly to methods and apparatuses for providing point contacts in a polysilicon emitter or HIT type solar cell. According to certain aspects, the invention uses a dielectric layer interposed between the substrate and a conductive layer to provide a limited area over which junction current can flow. The benefit is that the metal grid conductors do not need to align to the contacts, and can be applied freely without registration. Another benefit of the invention is that it provides increased efficiency for poly emitter and HIT cells through use of point contacts to increase current density. A further benefit is that patterning can be accomplished using low cost methods such as inclusion masking, screen printing or laser ablation. A still further benefit is that final contacts do not need alignment to the point contacts, eliminating registration required for conventional point contact designs.
    Type: Application
    Filed: January 27, 2009
    Publication date: July 29, 2010
    Inventor: Peter BORDEN
  • Publication number: 20100079638
    Abstract: Provided is an image sensor that comprises a readout circuitry, an interlayer dielectric, an interconnection, an image sensing device, an ion implantation region, a contact, and a pixel separation layer. The readout circuitry is disposed at a first substrate. The interlayer dielectric is disposed on the first substrate. The interconnection is disposed in the interlayer dielectric, and electrically connected to the readout circuitry. The image sensing device is disposed on the interconnection, and comprises a first conductive type layer and a second conductive type layer. The contact electrically connects the first conductive type layer of the image sensing device and the interconnection. The ion implantation region is formed in the second conductive type layer at a region corresponding to the contact. The pixel separation layer is disposed at a pixel boundary of the image sensing device.
    Type: Application
    Filed: September 25, 2009
    Publication date: April 1, 2010
    Inventor: JOON HWANG
  • Patent number: 7531379
    Abstract: A charge storage capacitor which is connected to various light sensitive and/or electrical elements of a CMOS imager, as well as methods of formation, are disclosed. The charge storage capacitor may be formed entirely over a field oxide region of the CMOS imager, entirely over an active area of a pixel sensor cell, or partially over a field oxide region and partially over an active pixel area of a pixel sensor cell.
    Type: Grant
    Filed: September 12, 2003
    Date of Patent: May 12, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Howard Rhodes, Jeff Mckee
  • Patent number: 7443038
    Abstract: The present invention provides flip-chip packaging for optically interactive devices such as image sensors and methods of assembly. In a first embodiment of the invention, conductive traces are formed directly on the second surface of a transparent substrate and an image sensor chip is bonded to the conductive traces. Discrete conductive elements are attached to the conductive traces and extend below a back surface of the image sensor chip. In a second embodiment, a secondary substrate having conductive traces formed thereon is secured to the transparent substrate. In a third embodiment, a backing cap having a full array of attachment pads is attached to the transparent substrate of the first embodiment or the secondary substrate of the second embodiment. In a fourth embodiment, the secondary substrate is a flex circuit having a mounting portion secured to the second surface of the transparent substrate and a backing portion bent over adjacent to the back surface of the image sensor chip.
    Type: Grant
    Filed: June 14, 2005
    Date of Patent: October 28, 2008
    Assignee: Micron Technology, Inc.
    Inventor: Larry D. Kinsman
  • Patent number: 7429764
    Abstract: A signal processing device is provided which is capable of suppressing a voltage change of a power supply when output signals from a plurality of signal sources are read, and capable of outputting a stable signal at a high sensitivity, and an image pickup apparatus using such a signal processing device is also provided. The signal processing device has: a plurality of terminals connectable to a plurality of signal sources; and a read circuit for converting signals input from the terminals into serial signals and outputting the serial signals, wherein: the read circuit comprises a holding capacitor connected to each of the terminals, a transfer switch for transferring a signal held in the holding capacitor to a common signal line, and a shift register for driving the transfer switch; and a semiconductor layer under the common signal line has a conductivity type opposite to a first conductivity type of a semiconductor substrate.
    Type: Grant
    Filed: February 26, 2003
    Date of Patent: September 30, 2008
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toru Koizumi, Katsuhito Sakurai, Hiroki Hiyama, Masaru Fujimura
  • Publication number: 20080122034
    Abstract: A multiple function thin-film resistor-capacitor array is used for an optical fiber receiving module. A dielectric thin film with desired pattern and thickness is form on surface of a silicon substrate by semiconductor manufacture process. Resistors of different resistances and capacitors of different capacitances or the combination thereof, and circuit connection therebetween can be provided by controlling the thickness and shape of thin film. The thickness of the thin-film resistor-capacitor array is adjusted by grinding to provide a substrate of a photodiode. The photodiode can be die bonded to the resistor-capacitor array with desired optical position.
    Type: Application
    Filed: November 6, 2006
    Publication date: May 29, 2008
    Inventor: Daniel Liu