Detail Of Nonsemiconductor Component Of Radiation-sensitive Semiconductor Device (epo) Patents (Class 257/E31.11)
  • Patent number: 9437650
    Abstract: A method of forming of an image sensor device includes a patterned hardmask layer is formed over a substrate. The patterned hard mask layer has a plurality of first openings in a periphery region, and a plurality of second openings in a pixel region. A first patterned mask layer is formed over the pixel region to expose the periphery region. A plurality of first trenches is etched into the substrate in the periphery region. Each first trench, each first opening and each second opening are filled with a dielectric material. A second patterned mask layer is formed over the periphery region to expose the pixel region. The dielectric material in each second opening over the pixel region is removed. A plurality of dopants is implanted through each second opening to form various doped isolation features in the pixel region.
    Type: Grant
    Filed: May 26, 2015
    Date of Patent: September 6, 2016
    Assignee: Taiwam Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Chen Lu, Ching-Sen Kuo, Shih-Chi Fu, Ming-Ying Hsieh
  • Patent number: 9040341
    Abstract: A method of forming of an image sensor device includes a patterned hardmask layer is formed over a substrate. The patterned hard mask layer has a plurality of first openings in a periphery region, and a plurality of second openings in a pixel region. A first patterned mask layer is formed over the pixel region to expose the periphery region. A plurality of first trenches is etched into the substrate in the periphery region. Each first trench, each first opening and each second opening are filled with a dielectric material. A second patterned mask layer is formed over the periphery region to expose the pixel region. The dielectric material in each second opening over the pixel region is removed. A plurality of dopants is implanted through each second opening to form various doped isolation features in the pixel region.
    Type: Grant
    Filed: June 4, 2012
    Date of Patent: May 26, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Chen Lu, Ching-Sen Kuo, Shih-Chi Fu, Ming-Ying Hsieh
  • Patent number: 8980676
    Abstract: A method of forming a window cap wafer (WCW) structure for semiconductor devices includes machining a plurality of cavities into a front side of a first substrate; bonding the first substrate to a second substrate, at the front side of the first substrate; removing a back side of the first substrate so as to expose the plurality of cavities, thereby defining the WCW structure comprising the second substrate and a plurality of vertical supports comprised of material of the first substrate.
    Type: Grant
    Filed: June 25, 2012
    Date of Patent: March 17, 2015
    Assignee: Raytheon Company
    Inventors: Buu Diep, Stephen H. Black
  • Patent number: 8951824
    Abstract: Provided are novel methods of fabricating photovoltaic modules using pressure sensitive adhesives (PSA) to secure wire networks of interconnect assemblies to one or both surfaces of photovoltaic cells. A PSA having suitable characteristics is provided near the interface between the wire network and the cell's surface. It may be provided together as part of the interconnect assembly or as a separate component. The interconnect assembly may also include a liner, which may remain as a part of the module or may be removed later. The PSA may be distributed in a void-free manner by applying some heat and/or pressure. The PSA may then be cured by, for example, exposing it to UV radiation to increase its mechanical stability at high temperatures, in particular at a, for example the maximum, operating temperature of the photovoltaic module. For example, the modulus of the PSA may be substantially increased during this curing operation.
    Type: Grant
    Filed: April 8, 2011
    Date of Patent: February 10, 2015
    Assignee: Apollo Precision (Fujian) Limited
    Inventor: Todd Krajewski
  • Patent number: 8928101
    Abstract: A semiconductor device includes: a first semiconductor layer of a first conductivity type; an insulation layer on the first semiconductor layer; a second semiconductor layer in the insulation layer; an active element in the second semiconductor layer; a first semiconductor region on the first semiconductor layer and of a second conductivity type; a second semiconductor region in the first semiconductor region and of the second conductivity type with a higher impurity concentration than the first semiconductor region; a first conductor in a through hole in the insulation layer and connected to the second semiconductor region; a second conductor above or within the insulation layer, the second conductor surrounding the first conductor such that an outside edge thereof is outside the second semiconductor region; a third conductor connecting the first and second conductors; and a fourth conductor connected to the first semiconductor layer.
    Type: Grant
    Filed: October 5, 2011
    Date of Patent: January 6, 2015
    Assignees: LAPIS Semiconductor Co., Ltd., RIKEN
    Inventors: Hiroki Kasai, Yasuo Arai, Takaki Hatsui
  • Patent number: 8927320
    Abstract: A method of bonding by molecular bonding between at least one lower wafer and an upper wafer comprises positioning the upper wafer on the lower wafer. In accordance with the invention, a contact force is applied to a peripheral side of at least one of the two wafers in order to initiate a bonding wave between the two wafers.
    Type: Grant
    Filed: June 11, 2010
    Date of Patent: January 6, 2015
    Assignee: Soitec
    Inventors: Chrystelle Lagahe Blanchard, Marcel Broekaart, Arnaud Castex
  • Patent number: 8916916
    Abstract: A solid-state imaging device includes: a substrate which is formed of a semiconductor and includes a first surface and a second surface which face opposite sides; a gate insulation film which is formed on a trench formed in the substrate to penetrate the first surface and the second surface; and a gate electrode which is embedded in the trench through the gate insulation film to be exposed to a second surface side of the substrate. A step difference is formed from the second surface of the substrate to a tip end surface of the gate electrode on the second surface side.
    Type: Grant
    Filed: January 25, 2012
    Date of Patent: December 23, 2014
    Assignee: Sony Corporation
    Inventor: Hideaki Togashi
  • Patent number: 8907434
    Abstract: A MEMS inertial sensor and a method for manufacturing the same are provided. The method includes: depositing a first carbon layer on a semiconductor substrate; patterning the first carbon layer to form a fixed anchor bolt, an inertial anchor bolt and a bottom sealing ring; forming a contact plug in the fixed anchor bolt and a contact plug in the inertial anchor bolt; forming a first fixed electrode, an inertial electrode and a connection electrode on the first carbon layer, where the first fixed electrode and the inertial electrode constitute a capacitor; forming a second carbon layer on the first fixed electrode and the inertial electrode; and forming a sealing cap layer on the second carbon layer and the top sealing ring. Under an inertial force, only the inertial electrode may move, the fixed electrode will almost not move or vibrate, which improves the accuracy of the MEMS inertial sensor.
    Type: Grant
    Filed: April 25, 2013
    Date of Patent: December 9, 2014
    Assignee: Lexvu Opto Microelectronics Technology (Shanghai) Ltd.
    Inventors: Zhiwei Wang, Deming Tang, Lei Zhang, Jianhong Mao, Fengqin Han
  • Patent number: 8906257
    Abstract: The present invention refers to a composite getter for thin-film photovoltaic panels which is made with a polymer having low H2O transmission containing one or more alkaline earth metal oxide, to a photovoltaic panel containing such composite getter and to a method for the manufacturing of photovoltaic panels.
    Type: Grant
    Filed: July 29, 2014
    Date of Patent: December 9, 2014
    Assignee: SAES Getters S.p.A.
    Inventors: Sergio Rondena, Antonio Bonucci, Giorgio Longoni, Luca Toia, Marco Amiotti
  • Patent number: 8900912
    Abstract: Embodiments of the invention relate to a camera assembly including a rear-facing camera and a front-facing camera operatively coupled together (e.g., bonded, stacked on a common substrate). In some embodiments of the invention, a system having an array of frontside illuminated (FSI) imaging pixels is bonded to a system having an array of backside illuminated (BSI) imaging pixels, creating a camera assembly with a minimal size (e.g., a reduced thickness compared to prior art solutions). An FSI image sensor wafer may be used as a handle wafer for a BSI image sensor wafer when it is thinned, thereby decreasing the thickness of the overall camera module. According to other embodiments of the invention, two package dies, one a BSI image sensor, the other an FSI image sensor, are stacked on a common substrate such as a printed circuit board, and are operatively coupled together via redistribution layers.
    Type: Grant
    Filed: June 26, 2013
    Date of Patent: December 2, 2014
    Assignee: OmniVision Technologies, Inc.
    Inventors: Gang Chen, Ashish Shah, Duli Mao, Hsin-Chih Tai, Howard E. Rhodes
  • Patent number: 8896075
    Abstract: A compound semiconductor radiation detector includes a body of compound semiconducting material having an electrode on at least one surface thereof. The electrode includes a layer of a compound of a first element and a second element. The first element is platinum and the second element includes at least one of the following: chromium, cobalt, gallium, germanium, indium, molybdenum, nickel, palladium, ruthenium, silicon, silver, tantalum, titanium, tungsten, vanadium, zirconium, manganese, iron, magnesium, copper, tin, or gold. The layer can further include sublayers, each of which is made from a different one of the second elements and platinum as the first element.
    Type: Grant
    Filed: January 23, 2009
    Date of Patent: November 25, 2014
    Assignee: eV Products, Inc.
    Inventors: Gary L. Smith, Csaba Szeles
  • Patent number: 8895350
    Abstract: A method for forming a nanostructure according to one embodiment includes creating a hole in an insulating layer positioned over an electrically conductive layer; and forming a nanocable in the hole such that the nanocable extends through the hole in the insulating layer and protrudes therefrom, the nanocable being in communication with the electrically conductive layer. Additional systems and methods are also presented.
    Type: Grant
    Filed: July 24, 2009
    Date of Patent: November 25, 2014
    Assignees: Q1 Nanosystems, Inc, The Regents of the University of California
    Inventors: Brian Argo, Ruxandra Vidu, Pieter Stroeve, John Argo, Saif Islam, Jie-Ren Ku, Michael Chen
  • Patent number: 8865508
    Abstract: Provided is a semiconductor device having a backside illuminated image sensor and a method of forming same. The method includes providing a first substrate and a second substrate, forming metal interconnections on a first surface of the first substrate, forming a filling insulating layer filling spaces between sides of the metal interconnections and covering upper surfaces of the metal interconnections, forming a buffer insulating layer softer than the filling insulating layer on the filling insulating layer, forming a capping insulating layer denser than the buffer insulating layer on the buffer insulating layer, and bonding a surface of the capping insulating layer to a surface of the second substrate.
    Type: Grant
    Filed: April 12, 2013
    Date of Patent: October 21, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dae-Keun Park, Dong-Jo Kang, Hyoung-Jun Kim, Jin-Sung Chung
  • Patent number: 8866237
    Abstract: An embedded micro-electro-mechanical system (MEMS) (100) comprising a semiconductor chip (101) embedded in an insulating board (120), the chip having a cavity (102) including a radiation sensor MEMS (105), the opening (104) of the cavity at the chip surface covered by a plate (110) transmissive to the radiation (150) sensed by the MEMS. The plate surface remote from the cavity having a bare central area, to be exposed to the radiation sensed by the MEMS in the cavity, and a peripheral area covered by a metal film (111) touching the plate surface and a layer (112) of adhesive stacked on the metal film.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: October 21, 2014
    Assignee: Texas Instruments Incorporated
    Inventors: Christopher D. Manack, Frank Stepniak, Sreenivasan K. Koduri
  • Patent number: 8859391
    Abstract: A method for manufacturing a semiconductor device including: forming a wiring layer on a surface side of a first semiconductor wafer; forming a buried film so as to fill in a level difference on the wiring layer, the level difference being formed at a boundary between a peripheral region of the first semiconductor wafer and an inside region being on an inside of the peripheral region, and the level difference being formed as a result of a surface over the wiring layer in the peripheral region being formed lower than a surface over the wiring layer in the inside region, and making the surfaces over the wiring layer in the peripheral region and the inside region substantially flush with each other; and opposing and laminating the surfaces over the wiring layer formed in the first semiconductor wafer to a desired surface of a second semiconductor wafer.
    Type: Grant
    Filed: February 3, 2012
    Date of Patent: October 14, 2014
    Assignee: Sony Corporation
    Inventor: Hiroyasu Matsugai
  • Patent number: 8853528
    Abstract: A radio frequency transparent photovoltaic cell includes a back contact layer formed of an electrically conductive material, at least one aperture formed in the back contact layer, and at least one photovoltaic cell section disposed on the back contact layer. An airship includes one or more radio frequency antennas disposed in an interior of the airship. One or more radio frequency transparent photovoltaic cells are disposed on an outer surface of the airship.
    Type: Grant
    Filed: March 25, 2010
    Date of Patent: October 7, 2014
    Assignee: Raytheon Company
    Inventors: Daniel F. Sievenpiper, Michael Wechsberg, Fangchou Yang
  • Patent number: 8847336
    Abstract: In a micromechanical component having an inclined structure and a corresponding manufacturing method, the component includes a substrate having a surface; a first anchor, which is provided on the surface of the substrate and which extends away from the substrate; and at least one cantilever, which is provided on a lateral surface of the anchor, and which points at an inclination away from the anchor.
    Type: Grant
    Filed: November 28, 2008
    Date of Patent: September 30, 2014
    Assignee: Robert Bosch GmbH
    Inventors: Tjalf Pirk, Stefan Pinter, Hubert Benzel, Heribert Weber, Michael Krueger, Robert Sattler, Frederic Njikam Njimonzie, Joerg Muchow, Joachim Fritz, Christoph Schelling, Christoph Friese
  • Patent number: 8846432
    Abstract: Frontside-illuminated barrier infrared photodetector devices and methods of fabrication are disclosed. In one embodiment, a frontside-illuminated barrier infrared photodetector includes a transparent carrier substrate, and a plurality of pixels. Each pixel of the plurality of pixels includes an absorber layer, a barrier layer on the absorber layer, a collector layer on the barrier layer, and a backside electrical contact coupled to the absorber layer. Each pixel has a frontside and a backside. The absorber layer and the barrier layer are non-continuous across the plurality of pixels, and the barrier layer of each pixel is closer to a scene than the absorber layer of each pixel. A plurality of frontside common electrical contacts is coupled to the frontside of the plurality of pixels, wherein the frontside of the plurality of pixels and the plurality of frontside common electrical contacts are bonded to the transparent carrier substrate.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: September 30, 2014
    Assignee: L-3 Communications Cincinnati Electronics Corporation
    Inventors: Robert A. Jones, David Forrai, Richard L. Rawe, Jr.
  • Patent number: 8847245
    Abstract: Objects are to provide a small imaging device that can take an image of a thick book without distortion of an image of a gutter and to improve the portability of an imaging device by downsizing the imaging device. The imaging device has imaging planes on both surfaces. All elements included in the imaging device are preferably provided over one substrate. In other words, the imaging device has a first imaging plane and a second imaging plane facing opposite to the first imaging plane.
    Type: Grant
    Filed: October 5, 2012
    Date of Patent: September 30, 2014
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yoshiyuki Kurokawa
  • Patent number: 8822255
    Abstract: A method of manufacturing a solar cell, which includes an edge deletion step using a laser beam, and a manufacturing apparatus which is used in such a method, the method and the apparatus being capable of preventing a shunt and cracks from being generated are provided. By radiating a first laser beam to a multilayer body, which includes a transparent electrode layer, a photoelectric conversion layer, and a back electrode layer sequentially formed on a transparent substrate, from a side of the transparent substrate, the photoelectric conversion layer and the back electrode layer in a first region are removed, and by radiating a second laser beam into the region such that the second laser beam is spaced from a peripheral rim of the region, the transparent electrode layer in a second region is removed.
    Type: Grant
    Filed: August 30, 2010
    Date of Patent: September 2, 2014
    Assignee: Ulvac, Inc.
    Inventors: Yoshiaki Yamamoto, Hitoshi Ikeda, Tomoki Ohnishi, Kouichi Tamagawa
  • Patent number: 8815628
    Abstract: A complementary metal oxide semiconductor (CMOS) device and a method for fabricating the same are provided. The CMOS image sensor includes: a first conductive type substrate including a trench; a channel stop layer formed by using a first conductive type epitaxial layer over an inner surface of the trench; a device isolation layer formed on the channel stop layer to fill the trench; a second conductive type photodiode formed in a portion of the substrate in one side of the channel stop layer; and a transfer gate structure formed on the substrate adjacent to the photodiode to transfer photo-electrons generated from the photodiode.
    Type: Grant
    Filed: December 12, 2011
    Date of Patent: August 26, 2014
    Assignee: Intellectual Ventures II LLC
    Inventor: Sang-Young Kim
  • Patent number: 8815707
    Abstract: A device fabrication method includes: (1) providing a growth substrate including a base and an oxide layer disposed over the base; (2) forming a metal layer over the oxide layer; (3) forming a stack of device layers over the metal layer; (4) performing interfacial debonding of the metal layer to separate the stack of device layers and the metal layer from the growth substrate; and (5) affixing the stack of device layers to a target substrate.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: August 26, 2014
    Assignee: Board of Trustess of the Leland Stanford Junior University
    Inventors: Chi-Hwan Lee, Dong Rip Kim, Xiaolin Zheng
  • Patent number: 8815629
    Abstract: A method of manufacturing an optical reflector including an alternating stack of at least one first layer of complex refraction index n1 and at least one second layer of complex refraction index n2, in which the first layer includes semiconductor nanocrystals, including the following steps: calculation of the total number of layers of the stack, of the thicknesses of each of the layers and of the values of complex refraction indices n1 and n2 on the basis of the characteristics of a desired spectral reflectivity window of the optical reflector, including the use of an optical transfer matrices calculation method; calculation of deposition and annealing parameters of the layers on the basis of the total number of layers and of the values of previously calculated complex refraction indices n1 and n2; deposition and annealing of the layers in accordance with the previously calculated parameters.
    Type: Grant
    Filed: August 10, 2012
    Date of Patent: August 26, 2014
    Assignee: Commissariat a l'energie atomique et aux energies alternatives
    Inventors: Kavita Surana, Mathieu Baudrit, Pierre Mur, Philippe Thony
  • Patent number: 8802480
    Abstract: The invention relates to a method for producing a monograin membrane and a monograin membrane produced according to said method. The invention further relates to the production of a solar cell from such a monograin membrane as well as a produced solar cell. The monograin membranes produced according to the invention can also be used for other applications, e.g. for converting electric energy into radiation energy or in detectors for detecting radiation. The aim of the invention is to improve the production of monograin membranes and solar cells. Said aim is achieved by first preparing a horizontally oriented layer made of a binder that is not yet cured or cross-linked such that the binder is liquid or at least viscous. Grains are partially introduced into the layer through a surface of the layer in such a way that only a portion of each grain is immersed in the layer and a zone of the grain remains above the surface of the layer.
    Type: Grant
    Filed: June 10, 2009
    Date of Patent: August 12, 2014
    Assignee: crystalsol GmbH
    Inventor: Dieter Meissner
  • Patent number: 8796800
    Abstract: An image sensor package and method of manufacture that includes a crystalline handler with conductive elements extending therethrough, an image sensor chip disposed in a cavity of the handler, and a transparent substrate disposed over the cavity and bonded to both the handler and image sensor chip. The transparent substrate includes conductive traces that electrically connect the sensor chip's contact pads to the handler's conductive elements, so that off-chip signaling is provided by the substrate's conductive traces and the handler's conductive elements.
    Type: Grant
    Filed: November 21, 2011
    Date of Patent: August 5, 2014
    Assignee: Optiz, Inc.
    Inventor: Vage Oganesian
  • Patent number: 8778718
    Abstract: Disclosed are a method of manufacturing a dye sensitized solar battery and a solar battery assembling apparatus. The method includes: forming electrode pads on electrodes of respective solar battery sub modules; applying a conductive adhesive on the electrode; and overlapping the electrodes of the solar battery sub modules, applying a current to the electrode pads, and then heating and hardening the conductive adhesive.
    Type: Grant
    Filed: November 2, 2012
    Date of Patent: July 15, 2014
    Assignee: Electronics and Telecommunications Research Institute
    Inventor: Moo Jung Chu
  • Patent number: 8779483
    Abstract: Electronic devices may be provided with imaging modules that include plasmonic light collectors. Plasmonic light collectors may be configured to exploit an interaction between incoming light and plasmons in the plasmonic light collector to alter the path of the incoming light. Plasmonic light collectors may include one or more spectrally tuned plasmonic image pixels configured to preferentially trap light of a given frequency. Spectrally tuned plasmonic image pixels may include plasmonic structures formed form a patterned metal layer over doped silicon layers. Doped silicon layers may be interposed between plasmonic structures and a reflective layer. Plasmonic image pixels may be used to absorb and detect as much as, or more than, ninety percent of incident light at wavelengths ranging from the infrared to the ultraviolet. Plasmonic image pixels that capture light of different colors may be arranged in patterned arrays to form imager modules or imaging spectrometers for optofluidic microscopes.
    Type: Grant
    Filed: February 2, 2012
    Date of Patent: July 15, 2014
    Assignee: Aptina Imaging Corporation
    Inventors: Kenneth Edward Salsman, Ulrich Boettiger, Dmitry Bakin, Curtis W. Stith
  • Patent number: 8779567
    Abstract: In a semiconductor device including a semiconductor element and a wiring substrate on which the semiconductor element is mounted. The wiring substrate includes an insulating substrate and conductive wiring formed in the insulating substrate and electrically connected to the semiconductor element. The conductive wiring includes an underlying layer formed on the insulating substrate, a main conductive layer formed on the underlying layer, and an electrode layer covering side surfaces of the underlying layer and side surfaces and an upper surface of the main conductive layer. The underlying layer includes an adhesion layer being formed in contact with the insulating substrate and containing an alloy of Ti.
    Type: Grant
    Filed: May 23, 2013
    Date of Patent: July 15, 2014
    Assignee: Nichia Corporation
    Inventors: Takuya Noichi, Yuichi Okada
  • Patent number: 8772070
    Abstract: A method for manufacturing solid-state imaging device for collectively manufacturing a multiplicity of solid-state imaging devices at a wafer level, the method including: a step of reducing the thickness of a cover glass wafer (10) after providing a mask material (12) to the cover glass wafer (10) including frame-shaped spacers (5); a step of releasing the mask material (12) and laminating a first support wafer (14) through a lamination member (16); a step of positioning and bonding a silicon wafer (18) and the cover glass wafer (10), the silicon wafer (18) including a second support wafer (22) laminated on the back side through a lamination member (24); a step of dicing the cover glass wafer (10) into cover glasses (4) by a whetstone (26); and a step of dicing the silicon wafer (18) by a whetstone (28).
    Type: Grant
    Filed: September 2, 2009
    Date of Patent: July 8, 2014
    Assignee: FUJIFILM Corporation
    Inventor: Miyuki Watanabe
  • Patent number: 8753957
    Abstract: This invention relates to a method for producing solar cells, and photovoltaic panels thereof. The method for producing solar panels comprises employing a number of semiconductor wafers and/or semiconductor sheets of films prefabricated to prepare them for back side metallization, which are placed and attached adjacent to each other and with their front side facing downwards onto the back side of the front glass, before subsequent processing that includes depositing at least one metal layer covering the entire front glass including the back side of the attached wafers/sheets of films. The metallic layer is then patterned/divided into electrically isolated contacts for each solar cell and into interconnections between adjacent solar cells.
    Type: Grant
    Filed: April 2, 2009
    Date of Patent: June 17, 2014
    Assignee: Rec Solar Pte. Ltd.
    Inventors: Martin Nese, Erik Sauar, Andreas Bentzen, Paul Alan Basore
  • Patent number: 8748315
    Abstract: The present disclosure relates to a method of forming a back-side illuminated CMOS image sensor (BSI CIS). In some embodiments, the method comprises forming a plurality of photodetectors within a front-side of a semiconductor substrate. An implant is performed on the back-side of the semiconductor substrate to form an implantation region having a doping concentration that is greater in the center than at the edges of the semiconductor substrate. The back-side of the workpiece is then exposed to an etchant, having an etch rate that is inversely proportional to the doping concentration, which thins the semiconductor substrate to a thickness that allows for light to pass through the back-side of the substrate to the plurality of photodetectors. By implanting the substrate prior to etching, the etching rate is made uniform over the back-side of the substrate improving total thickness variation between the photodetectors and the back-side of the substrate.
    Type: Grant
    Filed: February 15, 2012
    Date of Patent: June 10, 2014
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: En-Ting Lee, Kun-El Chen, Yu-Sheng Wang, Chien-Chung Chen, Huai-Tei Yang
  • Patent number: 8723285
    Abstract: A photoelectric conversion device comprises an n-type surface region, a p-type region which is formed under the surface region, and an n-type buried layer which is formed under the p-type region, wherein the surface region, the p-type region, and the buried layer form a buried photodiode, and a diffusion coefficient of a dominant impurity of the surface region is smaller than a diffusion coefficient of a dominant impurity of the buried layer.
    Type: Grant
    Filed: January 8, 2010
    Date of Patent: May 13, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Tadashi Sawayama, Katsunori Hirota, Takanori Watanabe, Takeshi Ichikawa
  • Publication number: 20140116495
    Abstract: A bifacial solar cell module includes solar cells that are protected by front side packaging components and backside packaging components. The front side packaging components include a transparent top cover on a front portion of the solar cell module. The backside packaging components have a transparent portion that allows light coming from a back portion of the solar cell module to reach the solar cells, and a reflective portion that reflects light coming from the front portion of the solar cell module. The transparent and reflective portions may be integrated with a backsheet, e.g., by printing colored pigments on the backsheet. The reflective portion may also be on a reflective component that is separate from the backsheet. In that case, the reflective component may be placed over a clear backsheet before or after packaging.
    Type: Application
    Filed: October 25, 2012
    Publication date: May 1, 2014
    Applicant: SUNPOWER CORPORATION
    Inventor: SunPower Corporation
  • Patent number: 8710610
    Abstract: A solid-state imaging apparatus including pixels each including a photoelectric conversion element, and a light shielding layer covering the photoelectric conversion element is provided. For each of the photoelectric conversion elements, the light shielding layer includes a light shielding portion which shields a portion of incident light to the photoelectric conversion element, and an aperture which passes another portion of the incident light. The pixels include first and second pixels which have different areas on a planar view of the photoelectric conversion element. The area of the photoelectric conversion element in the first pixel is larger than the area of the photoelectric conversion element in the second pixel on the planar view. An area of the light shielding portion included in the first pixel is larger than an area of the light shielding portion included in the second pixel.
    Type: Grant
    Filed: June 23, 2011
    Date of Patent: April 29, 2014
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shoji Kono, Shin Kikuchi, Yuichiro Yamashita, Masaru Fujimura, Shinichiro Shimizu, Yu Arishima
  • Publication number: 20140110805
    Abstract: Embodiments relate to buried structures for silicon devices which can alter light paths and thereby form light traps. Embodiments of the lights traps can couple more light to a photosensitive surface of the device, rather than reflecting the light or absorbing it more deeply within the device, which can increase efficiency, improve device timing and provide other advantages appreciated by those skilled in the art.
    Type: Application
    Filed: October 18, 2012
    Publication date: April 24, 2014
    Applicant: INFINEON TECHNOLOGIES DRESDEN GMBH
    Inventor: THORALF KAUTZSCH
  • Patent number: 8703525
    Abstract: A solar cell includes; a substrate; a first electrode disposed on the substrate, and including a first groove formed therein, a semiconductor layer disposed on the first electrode, and including a second groove formed therein, and a second electrode disposed on the semiconductor layer and connected to the first electrode via the second groove, wherein a third groove passing through the first electrode, the semiconductor layer, and the second electrode is formed in a first region, a fourth groove passing through only the semiconductor layer and the second electrode is formed in a second region, and the first region and the second region are alternately disposed along a direction of extension of the third groove.
    Type: Grant
    Filed: June 3, 2010
    Date of Patent: April 22, 2014
    Assignees: Samsung SDI Co., Ltd., Samsung Display Co., Ltd.
    Inventor: Joong-Hyun Park
  • Patent number: 8686526
    Abstract: The invention is directed to providing a semiconductor device receiving a blue-violet laser, of which the reliability and yield are enhanced. A device element converting a blue-violet laser into an electric signal is formed on a front surface of a semiconductor substrate. An optically transparent substrate is attached to the front surface of the semiconductor substrate with an adhesive layer being interposed therebetween. The adhesive layer contains transparent silicone. Since the front surface of the device element is covered by the optically transparent substrate, foreign substances are prevented from adhering to the front surface of the device element. Furthermore, the adhesive layer is covered by the optically transparent substrate. This prevents the adhesive layer from being exposed to outside air, thereby preventing the degradation of the adhesive layer 6 due to a blue-violet laser.
    Type: Grant
    Filed: November 19, 2007
    Date of Patent: April 1, 2014
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Katsuhiko Kitagawa, Hiroyuki Shinogi, Shinzo Ishibe, Hiroshi Yamada
  • Publication number: 20140087513
    Abstract: A photovoltaic device and method include a crystalline substrate and an emitter contact portion formed in contact with the substrate. A back-surface-field junction includes a homogeneous junction layer formed in contact with the crystalline substrate and having a same conductivity type and a higher active doping density than that of the substrate. The homogeneous junction layer includes a thickness less than a diffusion length of minority carriers in the homogeneous junction layer. A passivation layer is formed in contact with the homogeneous junction layer opposite the substrate, which is either undoped or has the same conductivity type as that of the substrate.
    Type: Application
    Filed: October 22, 2012
    Publication date: March 27, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: TZE-CHIANG CHEN, BAHMAN HEKMATSHOARTABARI, DEVENDRA K. SADANA, DAVOOD SHAHRJERDI
  • Patent number: 8680634
    Abstract: Method and apparatus providing a wafer level fabrication of imager modules in which a permanent carrier protects imager devices on an imager wafer and is used to support a lens wafer.
    Type: Grant
    Filed: April 29, 2011
    Date of Patent: March 25, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Swarnal Borthakur, Rick Lake, Andy Perkins, Scott Churchwell, Steve Oliver
  • Patent number: 8674417
    Abstract: A solid-state imaging device including: a substrate; a light-receiving part; a second-conductivity-type isolation layer; a detection transistor; and a reset transistor.
    Type: Grant
    Filed: March 21, 2012
    Date of Patent: March 18, 2014
    Assignee: Sony Corporation
    Inventor: Isao Hirota
  • Publication number: 20140070348
    Abstract: Methods and apparatus for integrating a CMOS image sensor and an image signal processor (ISP) together using an interposer to form a system in package device module are disclosed. The device module may comprise an interposer with a substrate. An interposer contact is formed within the substrate. A sensor device may be bonded to a surface of the interposer, wherein a sensor contact is bonded to a first end of the interposer contact. An ISP may be connected to the interposer, by bonding an ISP contact in the ISP to a second end of the interposer contact. An underfill layer may fill a gap between the interposer and the ISP. A printed circuit board (PCB) may further be connected to the interposer by way of a solder ball connected to another interposer contact. A thermal interface material may be in contact with the ISP and the PCB.
    Type: Application
    Filed: September 7, 2012
    Publication date: March 13, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuo-Chung Yee, Chun Hui Yu
  • Patent number: 8669633
    Abstract: An assembly includes a first packaged device that contains a first image sensor having first fiducial marks thereon. On a portion of the first packaged device at a predetermined location relative to the first fiducial marks is adhesive, and a first connection body is fixed within the adhesive and registered at the predetermined location relative to the first fiducial marks. The first connection body is mated into the first counter hole formed in a plate at a predetermined location.
    Type: Grant
    Filed: July 25, 2011
    Date of Patent: March 11, 2014
    Assignee: Teledyne Dalsa, Inc.
    Inventor: Anton Petrus Maria van Arendonk
  • Publication number: 20140048897
    Abstract: Embodiments of a pixel including a substrate having a front surface and a photosensitive region formed in or near the front surface of the substrate. An isolation trench is formed in the front surface of the substrate adjacent to the photosensitive region. The isolation trench includes a trench having a bottom and sidewalls, a passivation layer formed on the bottom and the sidewalls, and a filler to fill the portion of the trench not filled by the passivation layer.
    Type: Application
    Filed: August 16, 2012
    Publication date: February 20, 2014
    Applicant: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Yin Qian, Hsin-Chih Tai, Gang Chen, Duli Mao, Vincent Venezia, Howard E. Rhodes
  • Patent number: 8648362
    Abstract: A solid state imaging device includes: a substrate; a photoelectric conversion unit that is formed on the substrate to generate and accumulate signal charges according to light quantity of incident light; a vertical transmission gate electrode that is formed to be embedded in a groove portion formed in a depth direction from one side face of the substrate according to a depth of the photoelectric conversion unit; and an overflow path that is formed on a bottom portion of the transmission gate to overflow the signal charges accumulated in the photoelectric conversion unit.
    Type: Grant
    Filed: February 28, 2012
    Date of Patent: February 11, 2014
    Assignee: Sony Corporation
    Inventor: Ryosuke Nakamura
  • Publication number: 20140035087
    Abstract: Methods of forming isolation structures are disclosed. A method of forming isolation structures for an image sensor array of one aspect may include forming a dielectric layer over a semiconductor substrate. Narrow, tall dielectric isolation structures may be formed from the dielectric layer. The narrow, tall dielectric isolation structures may have a width that is no more than 0.3 micrometers and a height that is at least 1.5 micrometers. A semiconductor material may be epitaxially grown around the narrow, tall dielectric isolation structures. Other methods and apparatus are also disclosed.
    Type: Application
    Filed: August 2, 2012
    Publication date: February 6, 2014
    Inventors: Chia-Ying Liu, Keh-Chiang Ku, Wu-Zhang Yang
  • Patent number: 8642444
    Abstract: Disclosed herein is a method of manufacturing a bonded substrate, including the steps of: forming a first bonding layer on a surface on one side of a semiconductor substrate; forming a second bonding layer on a surface on one side of a support substrate; adhering the first bonding layer and the second bonding layer to each other; a heat treatment for bonding the first bonding layer and the second bonding layer to each other; and thinning the semiconductor substrate from a surface on the other side of the semiconductor substrate to form a semiconductor layer.
    Type: Grant
    Filed: November 11, 2010
    Date of Patent: February 4, 2014
    Assignee: Sony Corporation
    Inventor: Nobutoshi Fujii
  • Patent number: 8637948
    Abstract: A photovoltaic device including a semiconductor substrate having a first surface and a second surface, the second surface being opposite to the first surface; a first passivation layer on the first surface; and a second passivation layer on the second surface, wherein each of the first passivation layer and the second passivation layer comprises an aluminum-based compound, is disclosed. A method of preparing a photovoltaic device, the method including: forming a semiconductor substrate to have a first surface and a second surface, the second surface being opposite to the first surface; forming an emitter region and a back surface field (BSF) region at the second surface; and forming a first passivation layer on the first surface and a second passivation layer on the second surface, wherein the first passivation layer and the second passivation layer are formed concurrently, is also disclosed.
    Type: Grant
    Filed: July 18, 2012
    Date of Patent: January 28, 2014
    Assignee: Samsung SDI Co., Ltd.
    Inventors: Hyun-Jong Kim, Czang-Ho Lee, Min Park, Kyoung-Jin Seo, Sang-Won Lee, Jun-Ki Hong, Byoung-Gook Jeong
  • Publication number: 20140020743
    Abstract: A method of manufacturing a solar cell comprising steps of: (a) preparing a semiconductor substrate; (b) forming a metal thin film by vapor deposition on the back side of the semiconductor substrate; (c) applying a thick film conductive paste on the front side of the semiconductor substrate; and (d) firing the metal thin film and the applied thick film conductive paste to form a thin film electrode and a thick film electrode respectively.
    Type: Application
    Filed: July 23, 2012
    Publication date: January 23, 2014
    Applicant: E I DU PONT DE NEMOURS AND COMPANY
    Inventor: TAKUYA KONNO
  • Publication number: 20140024170
    Abstract: A method includes forming top metal lines over a semiconductor substrate, wherein the semiconductor substrate is a portion of a wafer having a bevel. When the top metal lines are exposed, an etchant is supplied on the bevel, wherein regions of the wafer sprayed with the etchant has an inner defining line forming a first ring having a first diameter. A trimming step is performed to trim an edge portion of the wafer, wherein an edge of a remaining portion of the wafer has a second diameter substantially equal to or smaller than the first diameter.
    Type: Application
    Filed: July 17, 2012
    Publication date: January 23, 2014
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun-Ting Kuo, Kei-Wei Chen, Ying-Lang Wang, Kuo-Hsiu Wei
  • Patent number: 8633554
    Abstract: The present disclosure provides a micro-electro-mechanical systems (MEMS) device and a method for fabricating such a device. In an embodiment, a MEMS device includes a substrate, a dielectric layer above the substrate, an etch stop layer above the dielectric layer, and two anchor plugs above the dielectric layer, the two anchor plugs each contacting the etch stop layer or a top metal layer disposed above the dielectric layer. The device further comprises a MEMS structure layer disposed above a cavity formed between the two anchor plugs and above the etch stop layer from release of a sacrificial layer.
    Type: Grant
    Filed: February 1, 2013
    Date of Patent: January 21, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chia-Hua Chu, Yi Heng Tsai, Kai-Chih Liang, Chia-Pao Shu, Li-Cheng Chu, Kuei-Sung Chang, Hsueh-An Yang, Chung-Hsien Lin