Arrangement For Temperature Regulation (e.g., Cooling, Heating, Or Ventilating) (epo) Patents (Class 257/E31.131)
  • Patent number: 8981383
    Abstract: Embodiments of the invention describe substrates, used to form optical devices, which include high thermal conductivity intermediate layers. Said substrates comprise a bulk layer, an optical device layer comprising a first material, and an intermediate layer disposed between the bulk layer and the device layer comprising a second material having a higher thermal conductivity and a lower index of refraction than the first material. In the resulting devices, said intermediate layer functions as part of the device layer structure—i.e., provides optical or electrical power dissipation (i.e. thermal) functionality for the device formed from said substrate. Thus, optical devices do not necessarily need to utilize an add-on packaging solution for heat absorption when formed from substrate stacks according to embodiments of the invention.
    Type: Grant
    Filed: March 5, 2012
    Date of Patent: March 17, 2015
    Assignee: Aurrion, Inc.
    Inventors: Gregory Alan Fish, Anand Ramaswamy
  • Patent number: 8841768
    Abstract: A chip package is provided, the chip package including: first encapsulation structure; first passivation layer formed over first encapsulation structure and first electrically conductive layer formed over first passivation layer; at least one chip arranged over first electrically conductive layer and passivation layer wherein at least one chip contact pad contacts first electrically conductive layer; at least one cavity formed in first encapsulation structure, wherein at least one cavity exposes a portion of first passivation layer covering at least one chip contact pad; second encapsulation structure disposed over first encapsulation structure and covering at least one cavity, wherein a chamber region over at least one chip contact pad is defined by at least one cavity and second encapsulation structure; wherein second encapsulation structure includes an inlet and outlet connected to chamber region, wherein inlet and outlet control an inflow and outflow of heat dissipating material to and from chamber region
    Type: Grant
    Filed: July 23, 2012
    Date of Patent: September 23, 2014
    Assignee: Infineon Technologies AG
    Inventors: Carsten Von Koblinski, Michael Knabl, Ursula Meyer, Francisco Javier Santos Rodriguez, Alexander Breymesser, Andre Brockmeier
  • Patent number: 8742563
    Abstract: A component and a method for producing a component are disclosed. The component comprises an integrated circuit, a housing body, a wiring device overlapping the integrated circuit and the housing body, and one or more external contact devices in communication with the wiring device.
    Type: Grant
    Filed: November 29, 2010
    Date of Patent: June 3, 2014
    Assignee: Intel Mobile Communications GmbH
    Inventors: Thorsten Meyer, Harry Hedler, Markus Brunnbauer
  • Patent number: 8692348
    Abstract: An infrared detector 1 having a bolometer element 11 and a reference element 21 is provided with a bolometer thin film 22 supported on a surface of a substrate 10while spaced apart from the surface of the substrate 10, a metal film 23 for heat dissipation formed on a surface of the bolometer thin film 22 via an insulating film 31, wherein the surface of the bolometer thin film 22 faces the substrate 10, and a plurality of metal columns 25 connected thermally with the metal film 23 for heat dissipation and the substrate 10. Since heat generated from a photodetecting portion 22aby infrared rays is efficiently dissipated to the substrate 10 via the insulating film 31, the metal film 23 for heat dissipation, the metal columns 25, and a metal film 24 for heat dissipation on the side of the substrate, only temperature variation caused by variation in use environment can be measured accurately, and downsizing can be achieved while reducing the influence of temperature variation in use environment.
    Type: Grant
    Filed: March 16, 2009
    Date of Patent: April 8, 2014
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Jun Suzuki, Fumikazu Ojima, Ryusuke Kitaura
  • Publication number: 20140070355
    Abstract: An electronic device may include a temperature sensing semiconductor substrate, that may include a thermal sensor at an upper surface thereof, and a cooling semiconductor substrate having an upper surface coupled to a lower surface of the temperature sensing semiconductor substrate. The cooling semiconductor substrate may include a Peltier cooler. At least one of the temperature sensing semiconductor substrate and the cooling semiconductor substrate may have a cavity therein beneath the thermopile and aligned therewith.
    Type: Application
    Filed: September 13, 2012
    Publication date: March 13, 2014
    Applicant: STMicroelectronics Asia Pacific PTE LTD (Singapore)
    Inventor: PraveenKumar Radhakrishnan
  • Patent number: 8597984
    Abstract: A method of manufacturing a modular semiconductor subassembly: providing at least one semiconductor subassembly having a modular sidewall element of modular dimensions and a semiconductor substrate base element coupled to the modular sidewall element that has at least one semiconductor element with a layout sized to be accommodated by modular dimensions of the modular sidewall element. If a modular package protective cover is to be used: providing the modular package protective cover configured to accommodate the semiconductor subassembly in accordance with a modular design; securing the semiconductor subassembly in the modular package protective cover to create a modular package assembly; and mounting the modular package assembly to a core, with a base side of the semiconductor substrate base element in contact with the core; otherwise: mounting the at semiconductor subassembly to the core, with the base side of the semiconductor substrate base element in contact with the core.
    Type: Grant
    Filed: February 28, 2012
    Date of Patent: December 3, 2013
    Assignee: STMicroelectronics, Inc.
    Inventor: Craig J. Rotay
  • Patent number: 8569808
    Abstract: A semiconductor device with temperature control system. Embodiments of the device may include a MEMS chip including a first heater with a dedicated first temperature control loop and a CMOS chip including a second heater with a dedicated second temperature control loop. Each control loop may have a dedicated temperature sensor for controlling the thermal output of each heater. The first heater and sensor are disposed proximate to a MEMS device in the MEMS chip for direct heating thereof. The temperature of the MEMS chip and CMOS chip are independently controllable of each other via the temperature control loops.
    Type: Grant
    Filed: April 6, 2012
    Date of Patent: October 29, 2013
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tung-Tsun Chen, Chia-Hua Chu, Chung-Hsien Lin, Jui-Cheng Huang
  • Patent number: 8524549
    Abstract: A method of fabricating a thin-film transistor (TFT) substrate includes forming a gate electrode on a substrate; forming an insulating film on the gate electrode; forming an amorphous semiconductor pattern on the insulating film; and forming a source electrode separated from a drain electrode on the amorphous semiconductor pattern; forming a light-concentrating layer, which includes a protrusion, on the amorphous semiconductor pattern, the source electrode, and the drain electrode; and crystallizing at least part of the amorphous semiconductor pattern by irradiating light to the protrusion of the light-concentrating layer.
    Type: Grant
    Filed: July 27, 2011
    Date of Patent: September 3, 2013
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hyung-Jun Kim, Chang-Oh Jeong, Il-Yong Yoon
  • Publication number: 20130221468
    Abstract: A compact sensor module and methods for forming the same are disclosed herein. In some embodiments, a sensor die is mounted on a sensor substrate. A processor die can be mounted on a flexible processor substrate. In some arrangements, a thermally insulating stiffener can be disposed between the sensor substrate and the flexible processor substrate.
    Type: Application
    Filed: February 27, 2012
    Publication date: August 29, 2013
    Applicant: ANALOG DEVICES, INC.
    Inventor: David Frank Bolognia
  • Patent number: 8471349
    Abstract: The wiring arrangement length in a photoreceiving device is shortened. The photoreceiving device includes an amplifier for amplifying an output of the photoreceiving element and a photoreceiving element and they are mounted at a base member. A plurality of first bonding pads and a plurality of second bonding pads for connection to power supply are provided at both sides of a transmission path of an input or output signal of a photoreceiving element. Furthermore, at a position other than the parts arrangement surface of the base member, a plurality of first bonding pads are electrically connected to a plurality of second bonding pads.
    Type: Grant
    Filed: January 11, 2011
    Date of Patent: June 25, 2013
    Assignee: Fujitsu Optical Components Limited
    Inventors: Yukie Iga, Yasuhiro Yamauchi
  • Publication number: 20130104952
    Abstract: A thermoelectric device for use with solar cells or other heat sources. A substrate has a manufactured surface with a plurality of highland features and lowland features. Each highland feature defines a peak adjacent to which there is an interface of two different film regions (formed of two different metals, two different semiconductors, or one metal and one semiconductor). The two film regions diverge away from each other with increasing distance from the interface and terminate at distal end regions. In response to a temperature difference between the interface and the distal end regions, the device produces a voltage.
    Type: Application
    Filed: November 1, 2012
    Publication date: May 2, 2013
    Applicant: Cardinal Solar Technologies Company
    Inventor: Cardinal Solar Technologies Company
  • Patent number: 8395255
    Abstract: A semiconductor device includes: a cooling function component including an active region made of an impurity region and formed on a surface of a semiconductor layer, an N-type gate made of a semiconductor including an N-type impurity, a P-type gate made of a semiconductor including a P-type impurity, a first metal wiring connected to the N-type gate, the P-type gate and the active region, a second metal wiring connected to the P-type gate and the N-type gate, and a heat releasing portion connected to the second metal wiring for releasing heat to the outside.
    Type: Grant
    Filed: January 5, 2011
    Date of Patent: March 12, 2013
    Assignee: Sony Corporation
    Inventor: Rui Morimoto
  • Publication number: 20130049041
    Abstract: A thermal conductivity and phase transition heat transfer mechanism incorporates an active optical element. Examples of active optical elements include various phosphor materials for emitting light, various electrically driven light emitters and various devices that generate electrical current or an electrical signal in response to light. The thermal conductivity and phase transition between evaporation and condensation, of the thermal conductivity and phase transition heat transfer mechanism, cools the active optical element during operation. At least a portion of the active optical element is exposed to a working fluid within a vapor tight chamber of the heat transfer mechanism. The heat transfer mechanism includes a member that is at least partially optically transmissive to allow passage of light to or from the active optical element and to seal the chamber of the heat transfer mechanism with respect to vapor contained within the chamber.
    Type: Application
    Filed: August 30, 2011
    Publication date: February 28, 2013
    Inventors: David P. Ramer, Jack C. Rains, JR.
  • Publication number: 20130049018
    Abstract: An optical/electrical transducer device has housing, formed of a thermally conductive section and an optically transmissive member. The section and member are connected together to form a seal for a vapor tight chamber. Pressure within the chamber configures a working fluid to absorb heat during operation of the device, to vaporize at a relatively hot location as it absorbs heat, to transfer heat to and condense at a relatively cold location, and to return as a liquid to the relatively hot location. The transducer device also includes a wicking structure mounted within the chamber to facilitate flow of condensed liquid of the working fluid from the cold location to the hot location. At least a portion of the wicking structure comprises semiconductor nanowires, configured as part of an optical/electrical transducer within the chamber for emitting light through and/or driven by light received via the transmissive member.
    Type: Application
    Filed: August 30, 2011
    Publication date: February 28, 2013
    Inventors: David P. RAMER, Jack C. Rains, JR.
  • Patent number: 8350350
    Abstract: In an infrared sensor (1) having a bolometer element (11) and a reference element (21), the reference element (21) comprises a bolometer film (22), a substrate-side insulating film (31) formed on the substrate-side surface of the bolometer film (22), a heat dissipation film (23) made of amorphous silicon formed on the substrate-side surface of the bolometer film (22) with the substrate-side insulating film (31) interposed therebetween, and a plurality of heat dissipation columns (25) made of amorphous silicon thermally connected to the heat dissipation film (23) and a substrate (10), while the bolometer film (22) and substrate-side insulating film (31) are formed such as to extend over a side face of the heat dissipation film (23) intersecting a surface of the substrate (10). Thus configured infrared sensor (1) can efficiently reduce the influence of temperature changes in the environment in use, while being made smaller.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: January 8, 2013
    Assignee: Hamamatsu Photonics K.K.
    Inventors: Jun Suzuki, Fumikazu Ojima, Ryusuke Kitaura
  • Patent number: 8338902
    Abstract: An uncooled infrared image sensor according to an embodiments includes: a plurality of pixel cells formed in a first region on a semiconductor substrate; a reference pixel cell formed in a second region on the semiconductor substrate and corresponding to each row or each column of the pixel cells; a supporting unit formed for each of the pixel cell and supporting a corresponding pixel cell; and an interconnect unit formed for each reference pixel cell. Each of the pixel cells includes: a first infrared absorption film and a first heat sensitive element. The reference pixel cell includes: a second infrared absorption film and a second heat sensitive element, the second heat sensitive element having the same characteristics as characteristics of the first heat sensitive element. The third and fourth interconnects of the interconnect unit have the same electrical resistance as electrical resistance of the first and second interconnects of the supporting unit.
    Type: Grant
    Filed: March 17, 2011
    Date of Patent: December 25, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Honam Kwon, Hideyuki Funaki, Hiroto Honda, Hitoshi Yagi, Ikuo Fujiwara, Masaki Atsuta, Kazuhiro Suzuki, Keita Sasaki, Koichi Ishii
  • Publication number: 20120285530
    Abstract: The present invention relates to a solar cell assembly that includes a solar cell attached to a bonding pad and a cooling substrate, wherein the bonding pad is attached to a surface of the cooling substrate by a thermally conductive adhesive and electrically contacted to the bonding pad and cooling substrate by a bonding wire. Alternatively, the bonding pad is attached to a surface of the cooling substrate by a thermally and electrically conductive adhesive.
    Type: Application
    Filed: February 23, 2011
    Publication date: November 15, 2012
    Applicant: SOITEC SOLAR GMBH
    Inventors: Martin Ziegler, Van Riesen Sascha
  • Publication number: 20120280352
    Abstract: A semiconductor structure is provided and a method for manufacturing said structure. The semiconductor structure includes a thin film semiconductor having an active region and placed on a diamond substrate. The thin film semiconductor is preferably directly bonded to the diamond layer, or may be adhered thereto by a dielectric adhesion.
    Type: Application
    Filed: January 12, 2011
    Publication date: November 8, 2012
    Applicant: NOVATRANS GROUP SA
    Inventors: Eran Hochstadter, John F. Roulston
  • Patent number: 8304897
    Abstract: An electronic package 100 comprising a semiconductor device 105, a heat spreader layer 110, and a thermal interface material layer 115 located between the semiconductor device and the heat spreader layer. The thermal interface material layer includes a resin layer 120 having heat conductive particles 125 suspended therein. A portion of the particles are exposed on at least one non-planar surface 135 of the resin layer such that the portion of exposed particles 130 occupies a majority of a total area of a horizontal plane 140 of the non-planar surface.
    Type: Grant
    Filed: May 2, 2011
    Date of Patent: November 6, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Siva Prakash Gurrum, Paul J Hundt, Vikas Gupta
  • Patent number: 8252616
    Abstract: A package structure of photodiode and a forming method of the same are provided. The method includes providing a heat-dissipation plate; placing a circuit board on the heat-dissipation plate, the circuit board having an opening exposing a top surface of the heat-dissipation plate and a first contact pad located on a peripheral area of the opening; placing a carrier with a metal cladding surface into the opening, the carrier connecting the top surface of the heat-dissipation plate; placing a photodiode chip on the carrier wherein the bottom area of the photodiode chip is less than the metal cladding surface such that a portion of the metal cladding surface is exposed; and electrically connecting the exposed metal cladding surface to the first contact pad.
    Type: Grant
    Filed: October 14, 2010
    Date of Patent: August 28, 2012
    Assignee: Solapoint Corporation
    Inventor: Tai-Hui Liu
  • Patent number: 8232129
    Abstract: A method of constructing a solar cell panel is disclosed that includes providing a solar cell that has a front side and a back side, where the front side faces the sun during normal operation, heating a thermoplastic polyimide to at least its reflow temperature, flowing the thermoplastic polyimide onto the back side of the solar cell while heated to at least its reflow temperature, and cooling the thermoplastic polyimide to a temperature below its reflow temperature to bond the thermoplastic polyimide directly to the solar cell. The direct bonding of the thermoplastic polyimide to the solar cell is accomplished without an adhesive such as RTV adhesives. The method may also include bonding a substrate directly to the thermoplastic polyimide opposite the solar cell.
    Type: Grant
    Filed: December 16, 2010
    Date of Patent: July 31, 2012
    Assignee: The Boeing Company
    Inventor: Andrew Streett
  • Patent number: 8198628
    Abstract: A semiconductor structure that is to be heated. The structure includes a substrate for the front face deposition of a useful layer intended to receive components for electronics, optics or optoelectronics. The structure contains doped elements that absorb infrared radiation so as to substantially increase infrared absorption by the structure so that the front face reaches a given temperature when a given infrared power is supplied to the structure. At least one part of the doped elements have insufficient electrical activity or localization in the structure, such that they cannot disturb the operation of the components. In addition, a method of producing this structure and a method of forming a useful layer of semiconductor material on the structure.
    Type: Grant
    Filed: March 25, 2008
    Date of Patent: June 12, 2012
    Assignee: Soitec
    Inventors: Robert Langer, Hacène Lahreche
  • Patent number: 8145021
    Abstract: Disclosed is a cable for use in a concentrating photovoltaic module. The cable includes at least one strand wrapped with an optically pervious or reflective sheath. The pervious sheath is made of a material that exhibits a penetration rate of 90% and survives a temperature of at least 140 degrees Celsius. The reflective sheath is made of a material that exhibits a reflection rate of 95% and survives a temperature of at least 140 degrees Celsius. The cable is used to connect an anode of the concentrating photovoltaic module to a cathode of the same. The material of the reflective sheath may be isolating.
    Type: Grant
    Filed: January 13, 2010
    Date of Patent: March 27, 2012
    Assignee: Atomic Energy Council-Institute of Nuclear Research
    Inventors: Yi-Ping Liang, Kuo-Hsin Lin, Hwen-Fen Hong, Hwa-Yuh Shin, Cherng-Tsong Kuo
  • Publication number: 20120060895
    Abstract: A method and apparatus for protecting a string of solar cells from shading in a solar panel having a plurality of strings of solar cells are described. Electric current is shunted around any string of the solar cells having at least one shaded solar cell by shunting the electric current through electrical conductors and a bypass diode located in a perimeter margin of a substrate supporting the solar cells such that no matter which string has a shaded solar cell current through the string with the shaded solar cell is shunted through electrical conductors and a respective bypass diode located in the perimeter margin. This distributes dissipation of heat from respective bypass diodes that are associated with strings having at least one shaded solar cell, to different locations around the perimeter margin.
    Type: Application
    Filed: May 25, 2009
    Publication date: March 15, 2012
    Applicant: DAY4 ENERGY INC.
    Inventors: Leonid Borisovich Rubin, Valery M. Nebusov, Fariborz Fari Ordubadi
  • Publication number: 20120012155
    Abstract: In one aspect of the present invention, a solar receiver with an improved heat sink design will be described. The solar receiver includes a photovoltaic cell and a heat spreader plate having a frontside and an opposing backside. The photovoltaic cell is positioned on the frontside of the heat spreader plate. Multiple front and rear heat sink fins are attached to and extend out of the frontside and the backside of the heat spreader plate, respectively. In various implementations, the front heat sink fins are positioned adjacent to, above and below the photovoltaic cell.
    Type: Application
    Filed: September 23, 2011
    Publication date: January 19, 2012
    Applicant: SKYLINE SOLAR, INC.
    Inventors: Brian J. Ignaut, Robert L. MacDonald
  • Patent number: 8053854
    Abstract: Example embodiments include micro-heater arrays including first and second micro-heaters disposed perpendicular to or parallel with each other on a substrate and methods of fabricating pn junctions between first and second heating portions using the heat generated from the first and second heating portions, respectively, when applying a voltage to the micro-heater array. Accordingly, when forming pn junctions using micro-heaters, a high-quality pn junction may be fabricated on a glass substrate over a large area.
    Type: Grant
    Filed: September 23, 2008
    Date of Patent: November 8, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Junhee Choi, Sung Soo Park, Andrei Zoulkarneev, Jai Yong Han, Deuk Seok Chung
  • Patent number: 8044506
    Abstract: The invention provides a thermal-emitting memory module, a thermal-emitting module socket, and a computer system comprising the thermal-emitting memory module and the thermal-emitting module socket. An embodiment of the thermal-emitting module includes: a module substrate having electrically-conductive traces; and a semiconductor device disposed on the module substrate and coupled to the electrically-conductive traces, the module substrate including a thermal-emitting portion disposed in proximity of the semiconductor device without directly contacting the semiconductor device.
    Type: Grant
    Filed: July 29, 2008
    Date of Patent: October 25, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Young Yun, Soo-Kyung Kim, Kwang-Seop Kim, Ki-Hyun Ko, Sung-Joo Park
  • Publication number: 20110241154
    Abstract: In an infrared sensor (1) having a bolometer element (11) and a reference element (21), the reference element (21) comprises a bolometer film (22), a substrate-side insulating film (31) formed on the substrate-side surface of the bolometer film (22), a heat dissipation film (23) made of amorphous silicon formed on the substrate-side surface of the bolometer film (22) with the substrate-side insulating film (31) interposed therebetween, and a plurality of heat dissipation columns (25) made of amorphous silicon thermally connected to the heat dissipation film (23) and a substrate (10), while the bolometer film (22) and substrate-side insulating film (31) are formed such as to extend over a side face of the heat dissipation film (23) intersecting a surface of the substrate (10). Thus configured infrared sensor (1) can efficiently reduce the influence of temperature changes in the environment in use, while being made smaller.
    Type: Application
    Filed: December 22, 2009
    Publication date: October 6, 2011
    Applicant: Hamamatsu Photonics K.K.
    Inventors: Jun Suzuki, Fumikazu Ojima, Ryusuke Kitaura
  • Patent number: 8030719
    Abstract: There is provided a semiconductor package that includes a first semiconductor die mounted on a package substrate. The semiconductor package further includes a second semiconductor die mounted on the first semiconductor die and including a thermal sensing and reset protection circuit. The thermal sensing and reset protection circuit is configured to determine a temperature of the first semiconductor die and to provide a reset protection signal to the first semiconductor die when the temperature of the first semiconductor die is substantially equal to a preset temperature so as to protect the first semiconductor die from thermal runaway. The reset protection signal can cause the first semiconductor die to be in a sleep mode or a reset state.
    Type: Grant
    Filed: May 8, 2009
    Date of Patent: October 4, 2011
    Assignee: Mindspeed Technologies, Inc.
    Inventors: Xiaoming Li, Mishel Matioubian, Surinderjit Dhaliwal
  • Patent number: 8026567
    Abstract: A thermoelectric structure for cooling an integrated circuit (IC) chip comprises a first type superlattice layer formed on top of the IC chip connected to a first voltage, and a second type superlattice layer formed on the bottom of the IC chip connected to a second voltage, the second voltage being different from the first voltage, wherein an power supply current flows through the first and second type superlattice layer for cooling the IC chip.
    Type: Grant
    Filed: December 22, 2008
    Date of Patent: September 27, 2011
    Assignee: Taiwan Semiconductor Manufactuirng Co., Ltd.
    Inventors: Shih-Cheng Chang, Hsin-Yu Pan
  • Publication number: 20110197950
    Abstract: A photovoltaic module includes a solar module and a heat sink bonded with a solar unit in a vacuum heating pressing manner. The heat sink is used for dissipating thermal energy generated by the solar module. Through the structure, heat of the solar module can be dissipated more effectively, thereby increasing efficiency of photoelectric conversion. Besides, the structure of the photovoltaic module is simplified, a heat conduction interface material in the prior art is not required, and assembly can be performed in the vacuum heating pressing manner, thereby greatly simplifying the manufacturing procedure.
    Type: Application
    Filed: February 10, 2011
    Publication date: August 18, 2011
    Applicants: A2PEAK POWER CO., LTD, FORCEON TECH. CO., LTD
    Inventors: Ching Chieh Lin, Sin Wei Ho, Mei Hsiu Lin, Tzu Hsin Huang, Chun Hsien Chou, Yen Chen Chen
  • Publication number: 20110168247
    Abstract: Solar concentrator devices and techniques for the fabrication thereof are provided. In one aspect, a solar concentrator device is provided. The solar concentrator device comprises at least one solar converter cell; a heat sink; and a liquid metal between the solar converter cell and the heat sink, configured to thermally couple the solar converter cell and the heat sink during operation of the device. The solar converter cell can comprise a triple junction semiconductor solar converter cell fabricated on a germanium (Ge) substrate. The heat sink can comprise a vapor chamber heat sink. The liquid metal can comprise a gallium (Ga) alloy and have a thermal resistance of less than or equal to about five square millimeter degree Celsius per Watt (mm2° C./W).
    Type: Application
    Filed: March 23, 2011
    Publication date: July 14, 2011
    Applicant: International Business Machines Corporation
    Inventors: Supratik Guha, Theodore Gerard van Kessel, Yves C. Martin
  • Patent number: 7964958
    Abstract: A heatsink structure for solid-state image sensors includes a foil-like heatsink sheet made of a high heat conductivity material. The heatsink sheet has a first fixed portion fixed to a solid-state image sensor and a second fixed portion fixed to another member. The heatsink sheet also has a plurality of cutout portions formed along directions from the first fixed portion toward the second fixed portion. Thus, the heatsink structure can cool the solid-state image sensor while reducing any external-force loads applied to the solid-state image sensor with a relatively simple structure.
    Type: Grant
    Filed: February 20, 2008
    Date of Patent: June 21, 2011
    Assignee: Panasonic Corporation
    Inventors: Yukihiro Iwata, Shinya Ogasawara, Miyoko Irikiin
  • Patent number: 7956456
    Abstract: An electronic package comprising a semiconductor device, a heat spreader layer, and a thermal interface material layer located between the semiconductor device and the heat spreader layer. The thermal interface material layer includes a resin layer having heat conductive particles suspended therein. A portion of the particles are exposed on at least one non-planar surface of the resin layer such that the portion of exposed particles occupies a majority of a total area of a horizontal plane of the non-planar surface.
    Type: Grant
    Filed: February 27, 2008
    Date of Patent: June 7, 2011
    Assignee: Texas Instruments Incorporated
    Inventors: Siva Prakash Gurrum, Paul Joseph Hundt, Vikas Gupta
  • Patent number: 7952190
    Abstract: A method and apparatus for fabrication of microelectronic devices are shown. In an embodiment of the invention, a microelectronic device comprises a die, the die comprising a first side, a second side, and an edge; a first plate, the first plate coupled with the die; and a package, the die being coupled with the package.
    Type: Grant
    Filed: June 27, 2003
    Date of Patent: May 31, 2011
    Assignee: Intel Corporation
    Inventor: Richard D. Emery
  • Patent number: 7928564
    Abstract: A method for fabricating a multichip module package includes providing a first heat sink positioned for releasing heat from the package and providing a second heat sink positioned proximate the first heat sink. The heat sinks are thermally coupled and electrically isolated to and from one another. A first semiconductor device is attached to the first heat sink in thermal and electrical communication therewith and electrically insulated from the second heat sink. A second semiconductor device is attached to the second heat sink in thermal and electrical communication therewith and electrically insulated from the first heat sink.
    Type: Grant
    Filed: September 24, 2008
    Date of Patent: April 19, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Il Kwon Shim, Dario S. Filoteo, Jr., Tsz Yin Ho, Sebastian T. M. Soon
  • Patent number: 7911068
    Abstract: A component and a method for producing a component are disclosed. The component comprises an integrated circuit, a housing body, a wiring device overlapping the integrated circuit and the housing body, and one or more external contact devices in communication with the wiring device.
    Type: Grant
    Filed: July 13, 2006
    Date of Patent: March 22, 2011
    Assignee: Infineon Technologies AG
    Inventors: Thorsten Meyer, Harry Hedler, Markus Brunnbauer
  • Publication number: 20110041892
    Abstract: An invention proposes a heat sink system for large-size photovoltaic receivers of tower-type solar power stations with application of an array of heliostats intended to concentrate solar radiation on the photovoltaic receiver. The heat sink system is designed as a two-phase thermo-siphon and it can ensure a stable temperature on all photovoltaic cells installed on the large-size receiver with very small deviations of the temperatures from one photovoltaic cell to another.
    Type: Application
    Filed: August 21, 2009
    Publication date: February 24, 2011
    Inventors: Alexander Levin, Hanan Levin
  • Publication number: 20110030766
    Abstract: A solar energy utilizing apparatus includes: a fluid pipe forming a flow path of a heat medium and including a convex surface; and a solar cell formed on the convex surface of the fluid pipe. In a method of manufacturing a solar energy utilizing apparatus, a first substrate including a first surface and a second surface is formed. The first surface has a plurality of convex surfaces and the second surface has a plurality of concave surfaces. A plurality of solar cells are formed on the convex surfaces, respectively. A second substrate is formed, and the second substrate is bonded to the first substrate.
    Type: Application
    Filed: February 26, 2010
    Publication date: February 10, 2011
    Inventors: Hyung-bin Son, Jong-min Kim, Young-jun Park, Seung-nam Cha
  • Publication number: 20110012134
    Abstract: An image reading apparatus includes a light source that irradiates a document with light, the light source including a multilayer substrate and light emitting elements linearly arranged on a first surface of the multilayer substrate; and a light receiver that receives reflected light reflected from the document. The multilayer substrate has at least a pair of through holes each having an inner surface on which a reinforcement member is formed, the at least a pair of through holes being formed so that one of the light emitting elements is interposed therebetween. The reinforcement members contact wiring formed on the first surface of the multilayer substrate and wiring formed on a second surface of the multilayer substrate opposite the first surface.
    Type: Application
    Filed: May 18, 2010
    Publication date: January 20, 2011
    Applicant: FUJI XEROX Co., Ltd.
    Inventor: Hideo TAKEUCHI
  • Patent number: 7872338
    Abstract: A microelectromechanical device package with integral a heater and a method for packaging the microelectromechanical device are disclosed in this invention. The microelectromechanical device package comprises a first package substrate and second substrate, between which a microelectromechanical device, such as a micromirror array device is located. In order to bonding the first and second package substrates so as to package the microelectromechanical device inside, a sealing medium layer is deposited, and heated by the heater so as to bond the first and second package substrates together.
    Type: Grant
    Filed: November 7, 2008
    Date of Patent: January 18, 2011
    Assignee: Texas Instruments Incorporated
    Inventor: Terry Tarn
  • Patent number: 7851815
    Abstract: A light-emitting element, in particular a light-emitting diode, having at least one light-emitting chip crystal, in particular a semiconductor crystal, is described. At least free surfaces of the light-emitting chip crystal are covered with an inert material—liquid fluid—which is in direct contact with the light-emitting chip crystal.
    Type: Grant
    Filed: October 20, 2006
    Date of Patent: December 14, 2010
    Assignee: Noctron Holding S.A.
    Inventor: Georg Diamantidis
  • Patent number: 7839908
    Abstract: Provided is a device capable of oscillating a plurality of oscillation modes within a laser medium for obtaining a fundamental wave output which is easy in output scaling and high in luminance, thereby enabling a second harmonic conversion which is high in efficiency. The device includes: a laser medium (5) that is planar, has a waveguide structure in a thickness direction of a cross-section that is perpendicular to an optical axis (6), and has a cyclic lens effect in a direction perpendicular to the optical axis (6) and the thickness direction; a clad (4) that is bonded onto one surface of the laser medium (5); and heat sink (3) that is bonded onto one surface side of the laser medium (5) through the clad (4), and in the device, a laser oscillation includes a laser oscillation that oscillates in a waveguide mode of the laser medium (5), and a laser oscillation that oscillates in a plurality of resonator modes that are generated by a cyclic lens effect of the laser medium (5).
    Type: Grant
    Filed: March 30, 2005
    Date of Patent: November 23, 2010
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takayuki Yanagisawa, Yoshihito Hirano, Syuhei Yamamoto, Masao Imaki, Kiyohide Sakai, Yasuharu Koyata
  • Patent number: 7804148
    Abstract: An opto-thermal annealing mask stack layer includes a thermal dissipative layer located over a substrate. A reflective layer is located upon the thermal dissipative layer. A transparent capping layer, that may have a thickness from about 10 to about 100 angstroms, is located upon the reflective layer. The opto-thermal annealing mask layer may be used as a gate electrode within a field effect device.
    Type: Grant
    Filed: February 16, 2006
    Date of Patent: September 28, 2010
    Assignee: International Business Machines Corporation
    Inventors: Louis L. Hsu, Jack A. Mandelman, Chandrasekhar Narayan, Chun-Yung Sung
  • Patent number: 7745928
    Abstract: A heat dissipation plate having a lamination of a copper layer, a molybdenum layer and a graphite layer, and outer copper layers each provided on a surface of the lamination, is disclosed. And also a semiconductor device using the heat dissipation plate is disclosed.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: June 29, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tsuyoshi Hasegawa
  • Publication number: 20100155700
    Abstract: This invention discloses a thermoelectric structure for cooling an integrated circuit (IC) chip, the thermoelectric structure comprises a first type superlattice layer formed on top of the IC chip connected to a first voltage, and a second type superlattice layer formed on the bottom of the IC chip connected to a second voltage, the second voltage being different from the first voltage, wherein an power supply current flows through the first and second type superlattice layer for cooling the IC chip.
    Type: Application
    Filed: December 22, 2008
    Publication date: June 24, 2010
    Inventors: Shih Cheng Chang, Hsin-Yu Pan
  • Patent number: 7741160
    Abstract: Provided are semiconductor die flip chip packages and semiconductor die flip chip package components where certain properties of the packages/components are controlled to facilitate management of the package stresses. Also provided are fabrication methods for such packages and package components. For instance, the thickness of a die can be controlled such that the stress generated/experienced by the die is minimized. As such, the package stress is managed to suitable levels for incorporation of a low-K Si die and/or a thin package substrate. Further, a thin die can be attached to a heat spreader to increase the rigidity for easier handling during fabrication of the semiconductor die flip chip package.
    Type: Grant
    Filed: August 4, 2009
    Date of Patent: June 22, 2010
    Assignee: Altera Corporation
    Inventors: Wen-chou Vincent Wang, Yuan Li, Bruce Euzent, Vadali Mahadev
  • Patent number: 7736997
    Abstract: A flexible electronic device excellent in heat liberation characteristics and toughness and a production method for actualizing thereof in low cost and with satisfactory reproducibility are provided. A protection film is adhered onto the surface of a substrate on which surface a thin film device is formed. Successively, the substrate is soaked in an etching solution to be etched from the back surface thereof so as for the residual thickness of the substrate to fall within the range larger than 0 ?m and not larger than 200 ?m. Then, a flexible film is adhered onto the etched surface of the substrate, and thereafter the protection film is peeled to produce a flexible electronic device.
    Type: Grant
    Filed: March 11, 2005
    Date of Patent: June 15, 2010
    Assignee: NEC Corporation
    Inventor: Kazushige Takechi
  • Publication number: 20100141815
    Abstract: A semiconductor image sensor module and a method for manufacturing thereof as well as a camera and a method for manufacturing thereof are provided in which a semiconductor image sensor chip and an image signal processing chip are connected with a minimum parasitic resistance and parasitic capacity and efficient heat dissipation of the image signal processing chip and shielding of light are simultaneously obtained.
    Type: Application
    Filed: November 30, 2009
    Publication date: June 10, 2010
    Applicant: Sony Corporation
    Inventors: Ikuo YOSHIHARA, Masamitsu YAMANAKA
  • Patent number: RE41869
    Abstract: In the semiconductor device, a control power MOSFET chip 2 is disposed on the input-side plate-like lead 5, and the drain terminal DT1 is formed on the rear surface of the chip 2, and the source terminal ST1 and gate terminal GT1 are formed on the principal surface of the chip 2, and the source terminal ST1 is connected to the plate-like lead for source 12. Furthermore, a synchronous power MOSFET chip 3 is disposed on the output-side plate-like lead 6, and the drain terminal DT2 is formed on the rear surface of the chip 3 and the output-side plate-like lead 6 is connected to the drain terminal DT2. Furthermore, source terminal ST2 and gate terminal GT2 are formed on the principal surface of the synchronous power MOSFET chip 3, and the source terminal ST2 is connected to the plate-like lead for source 13. The plate-like leads for source 12 and 13 are exposed, and therefore, it is possible to increase the heat dissipation capability of the MCM 1.
    Type: Grant
    Filed: May 30, 2008
    Date of Patent: October 26, 2010
    Assignee: Renesas Electronics Corp.
    Inventors: Tetsuya Kawashima, Akira Mishima