Linearly Acting Parallel Connected Patents (Class 323/269)
  • Patent number: 11018588
    Abstract: There is provided a DC/DC converter that can eliminate the necessity of current sense resistors to thereby reduce the mounting area, improve the efficiency, and realize favorable transient characteristics. A multi-phase DC/DC converter with N phases (N is an integer equal to or greater than 2) is provided. A high-side transistor MH, a low-side transistor ML, and an inductor L are provided for each phase ?. Output power supply wiring connects a load side end of each of N inductors L1 to LN and a load. The output power supply wiring is branched from the load toward the load side ends of the N inductors L1 to LN. A coil current flowing through an inductor Li of an ith phase ?i (i=1, 2, . . . N) is detected based on a voltage drop Vsi of a branch portion bri corresponding to the phase ?i of the output power supply wiring.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: May 25, 2021
    Assignee: Sony Interactive Entertainment Inc.
    Inventor: Kazuki Sasao
  • Patent number: 10951021
    Abstract: A power conversion system includes one power conversion device and one or more power conversion devices. The power conversion device includes a power converter that controls output voltage to be a preset voltage to apply the preset voltage to a load on the basis of an output from a power supply. The power conversion device controls the power converter so that a detected value of the first voltage detected by a voltage detector becomes a preset voltage value. The power conversion devices each include a power converter that controls output current to be a preset current to supply the preset current to the load on the basis of an output from a power supply. The power conversion devices each controls operation of the power converter on the basis of the detected value of the first voltage. The power conversion device controls operation of the power converter by changing the first voltage.
    Type: Grant
    Filed: November 22, 2018
    Date of Patent: March 16, 2021
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Yutaka Kuboyama, Naoki Nishio
  • Patent number: 10826386
    Abstract: A multi-stage charge pump including a first stage configured to generate a first output voltage, a last stage configured to receive the first output voltage from the first stage and output a second output voltage, a switch configured to receive the second output voltage from the last stage, and a voltage regulator circuit configured to control the second output voltage of the last stage to maintain a substantially constant on-resistance of the switch.
    Type: Grant
    Filed: October 26, 2018
    Date of Patent: November 3, 2020
    Assignee: NXP B.V.
    Inventors: Xiaoqun Liu, Madan Mohan Reddy Vemula
  • Patent number: 10727791
    Abstract: An I-V conversion module includes: a current output type sensor, a pre-integral circuit, a charge transfer auxiliary circuit, and an I-V transformation circuit including an inverting amplifier. The current output type sensor is connected to an input end of the I-V transformation circuit through the pre-integral circuit. The charge transfer auxiliary circuit connects in parallel with the inverting amplifier. When both the pre-integral circuit and the charge transfer auxiliary circuit are open circuits, the pre-integral circuit pre-integrates the induction current output by the current output type sensor to store pre-integral charges. When both pre-integral circuit and the charge transfer auxiliary circuit are closed circuits, the pre-integral charges are transferred to the I-V transformation circuit. In these embodiments, both the time for establishing the I-V conversion module and power consumption can be reduced.
    Type: Grant
    Filed: August 7, 2018
    Date of Patent: July 28, 2020
    Assignee: SHENZHEN GOODIX TECHNOLOGY CO., LTD.
    Inventor: Mengwen Zhang
  • Patent number: 10720110
    Abstract: An electroluminescent display and a method of driving the same are disclosed. The electroluminescent display includes a display panel including a plurality of pixels electrically connected to a plurality of data lines and a plurality of gate lines. Each pixel includes a driving element adjusting a current of a light emitting element depending on a gate-to-source voltage, and a switching element supplying a second voltage to the driving element in response to a gate-on voltage of an emission control signal. The switching element is turned off in response to a gate-off voltage of the emission control signal during a real-time compensation time. A source voltage of the driving element is changed during the real-time compensation time.
    Type: Grant
    Filed: December 23, 2017
    Date of Patent: July 21, 2020
    Assignee: LG Display Co., Ltd.
    Inventors: Hwajun Jung, Youngsun Jang
  • Patent number: 10579084
    Abstract: A voltage regulator apparatus includes operational amplifier, first resistor, second resistor, driving transistor, amplifier circuit, and output circuit. The operational amplifier has first input terminal coupled to reference voltage, second input terminal, and output terminal. The first resistor has first terminal coupled to second input terminal. The second resistor is coupled between first resistor and ground level. The driving transistor has control terminal coupled to output terminal of operational amplifier and first terminal coupled to second terminal of first resistor. The amplifier circuit is coupled to output terminal of operational amplifier and configured to sense output voltage of voltage regulator apparatus to amplify the sensed voltage with specific gain to regulate a transistor of output circuit. The transistor has control terminal controlled by amplifier circuit. The output voltage is generated at first terminal of the transistor.
    Type: Grant
    Filed: November 6, 2018
    Date of Patent: March 3, 2020
    Assignee: MEDIATEK INC.
    Inventors: Kuan-Chun Chen, Chih-Hong Lou
  • Patent number: 10560018
    Abstract: Devices and methods are provided related to modulated power supplies. The device includes an inductor. When a load is to be supplied with power, a terminal of the inductor is coupled to the load. When the load is not to be supplied with power, terminals of the inductor may be coupled with each other.
    Type: Grant
    Filed: August 3, 2017
    Date of Patent: February 11, 2020
    Assignees: Infineon Technologies AG, pmdtechnotogies ag
    Inventors: Christoph Unterrieder, Franz Michael Darrer, Stefano Marsili
  • Patent number: 10558232
    Abstract: The present technology relates to a regulator circuit and a control method capable of coping with steep change in load. An output transistor provided between an input terminal and an output terminal, a differential amplifying unit that amplifies a difference between reference voltage and voltage fed back from the output transistor, a voltage feedback path, and a current feedback path are provided, in which the current feedback path includes a current source and a transistor. The transistor included in the current feedback path is formed of an NMOS, a gate is connected to an output terminal of the differential amplifying unit, a drain is connected to the current source, and a source is connected to an input terminal of the differential amplifying unit. The present technology is applicable to a regulator circuit.
    Type: Grant
    Filed: May 12, 2016
    Date of Patent: February 11, 2020
    Assignee: SONY CORPORATION
    Inventors: Daisuke Ide, Toshio Suzuki, Nobuhiko Shigyo
  • Patent number: 10254812
    Abstract: Systems, methods, and devices for providing power to low energy circuits include inrush circuits. Devices include a regulator that includes at least one driver device configured to generate a first current associated with a load comprising a low energy integrated circuit. Devices also include a bias generator configured to generate a second current to charge a load capacitor coupled with a power terminal of the low energy integrated circuit. Devices further include an enable circuit configured to enable the bias generator and disable the regulator responsive to a load voltage being below a threshold voltage, and further configured to enable the regulator to generate the first current and disable the bias generator responsive to the load voltage being above the threshold voltage.
    Type: Grant
    Filed: March 28, 2018
    Date of Patent: April 9, 2019
    Assignee: Cypress Semiconductor Corporation
    Inventors: Mohandas Sivadasan, Jayant Ashokkumar, Iulian Gradinariu, Abhisek Dey
  • Patent number: 10211202
    Abstract: A method of forming an integrated circuit comprises forming a first doped region and a second doped region in a substrate. The second doped region is formed separate from the first doped region by a first spacing. A dielectric layer is formed over the substrate, and a gate is formed over the dielectric layer. The gate is positioned having the first doped region on a first substrate side of the gate and the second doped region on a second substrate side of the gate, opposite the first substrate side of the gate. A third doped region is formed in the substrate separated from the first doped region by a second spacing. The method further comprises forming a fourth doped region in the substrate.
    Type: Grant
    Filed: January 22, 2018
    Date of Patent: February 19, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chewn-Pu Jou, Chien-Jung Wang
  • Patent number: 10203966
    Abstract: An application launcher and management framework (ALM framework) is provided for enabling and managing the execution of external applications (e.g., third party applications) on a network device. The ALM framework enables external applications to be executed and managed on a network device based upon configuration information specified for the external applications. In certain embodiments, the ALM framework enables an external application to be executed within the network device's network operating system (NOS) as if the application was provided as part of the NOS. By enabling the external application to be integrated with the network device's NOS, the ALM framework enables several services provided by the NOS to be made available to the external application.
    Type: Grant
    Filed: October 28, 2016
    Date of Patent: February 12, 2019
    Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
    Inventors: Geng Tian, James J. Chen
  • Patent number: 10199931
    Abstract: A device and method for hybrid feedback control of a switch-capacitor multi-unit voltage regulator are presented. A multi-unit switched-capacitor (SC) core includes a plurality of SC converter units, each unit with a capacitor and a plurality of switches controllable by a plurality of switching signals. Power switch drivers provide a switching signal to each SC converter unit. A secondary proactive loop circuit includes a feedback control circuit configured to control one or more of the plurality of switches. A comparator is configured to compare the regulator output voltage with a reference voltage and provide a comparator trigger signal. Ripple reduction logic is configured to receive the comparator trigger signal and provide an SC unit allocation signal. A multiplexer is configured to receive a first clock signal, a second clock signal, and the SC unit allocation signal and provide a signal to the power switch drivers.
    Type: Grant
    Filed: February 26, 2016
    Date of Patent: February 5, 2019
    Assignee: President and Fellows of Harvard College
    Inventors: Gu-Yeon Wei, Tao Tong, David Brooks, Saekyu Lee
  • Patent number: 10198015
    Abstract: A digital LDO regulator includes: a pulse control circuit for generating a proportional control signal based on an error code, generating an integral control signal that toggles during a first section, which includes an initialization section and an integration section, based on the proportional control signal, and generating a state information signal that defines a steady state section, the initialization section, and the integration section; a proportional control circuit for outputting a first drive signal by multiplying the error code by a proportional gain factor based on the proportional control signal; an integral control circuit for outputting a second drive signal by multiplying the error code by an integral gain factor based on the state information signal and the integral control signal; and a driver for adjusting the output voltage in response to the first drive signal and the second drive signal.
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: February 5, 2019
    Assignees: SK Hynix Inc., THE TRUSTEES OF COLUMBIA UNIVERSITY IN THE CITY OF NEW YORK
    Inventors: Hyun-Ju Ham, Jong-Hwan Kim, Min-Goo Seok, Do-Yun Kim, Sung Justin Kim
  • Patent number: 10156860
    Abstract: Embodiments described herein present a new LDO design that eliminates the need for the sleep bias circuitry included in other systems. Further, the new LDO design can be biased with a small fraction of the operating current enabling the LDO to wake up substantially faster than previous LDO designs that include separate sleep circuitry. In some cases, the LDO can instantly (or faster than other LDOs) transition from a sleep mode to an operating mode enabling improved operation compared to prior LDOs. Furthermore, the new LDO design maintains a non-breakdown voltage across the transistors reducing the need to enter sleep mode to prevent transistors of the LDO from entering a breakdown region.
    Type: Grant
    Filed: March 30, 2016
    Date of Patent: December 18, 2018
    Assignee: Skyworks Solutions, Inc.
    Inventor: Bo Zhou
  • Patent number: 10156861
    Abstract: An electronic device may include: a load and a voltage regulator coupled to the load and configured to provide a load current, where the voltage regulator includes a first and a second pass device coupled in parallel and configured to operate simultaneously. A method may include providing current to a load using a first and a second pass device coupled in parallel and configured to operate simultaneously, where the first device provides a first current corresponding to a high-frequency component and the second device provides a second current corresponding to a low-frequency component; in response to a decrease in a low-frequency component, causing the second current to decrease and causing the low-frequency component to increase; and in response to an increase in the low-frequency component, causing the second current to increase and causing the low-frequency component to decrease.
    Type: Grant
    Filed: July 19, 2016
    Date of Patent: December 18, 2018
    Assignee: NXP USA, Inc.
    Inventors: Ricardo Coimbra, Javier Mauricio Olarte Gonzalez, Marcos Mauricio Pelicia
  • Patent number: 10095253
    Abstract: An electronic apparatus comprises several series-connected loads powered by a high voltage power source. To provide voltage regulation for each load, a ladder circuit is described. To automatically balance the voltage at output, one or more voltage-control-oscillators are included.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: October 9, 2018
    Assignee: PEERNOVA, INC.
    Inventors: Nick Whidden, Benjamin Scott Gorlick
  • Patent number: 10067520
    Abstract: A linear power supply circuit includes a first output transistor of a P-channel type or pnp type which is connected between an input terminal to which an input voltage is input and an output terminal from which an output voltage is output; a first differential amplifier configured to amplify a difference between the output voltage or a feedback voltage according to the output voltage and a predetermined first reference voltage and output a first amplification voltage; a second differential amplifier configured to amplify a difference between the input voltage or a first monitor voltage according to the input voltage and the output voltage or a second monitor voltage according to the output voltage and output a second amplification voltage; and a first driver configured to generate a control voltage of the first output transistor according to the first amplification voltage and the second amplification voltage.
    Type: Grant
    Filed: April 6, 2016
    Date of Patent: September 4, 2018
    Assignee: Rohm Co., Ltd.
    Inventors: Kotaro Iwata, Hiroki Inoue, Zhencheng Jin
  • Patent number: 10008931
    Abstract: According to one embodiment, in a semiconductor integrated circuit, a first input terminal of an error amplifier is electrically connected to a third node between a second node and a reference potential. A second input terminal of the error amplifier is electrically connected to a reference voltage. An output terminal of the error amplifier is electrically connected to a gate of an output transistor. A first input terminal of a comparator is electrically connected to a fourth node between the second node and the reference potential. A second input terminal of the comparator is electrically connected to the reference voltage. One end of a coupling capacitance is electrically connected to an output terminal of the comparator. A gate of an auxiliary transistor is electrically connected to the other end of the coupling capacitance. A drain of the auxiliary transistor is electrically connected to the second node.
    Type: Grant
    Filed: September 6, 2016
    Date of Patent: June 26, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Hiroyuki Ideno, Hidefumi Kushibe
  • Patent number: 9964986
    Abstract: An apparatus includes an integrated circuit (IC). The IC includes a regulator to receive a plurality of input voltages and to provide a regulated output voltage to a load. The regulator includes a plurality of voltage regulators that receive the plurality of input voltages and provide the regulated output voltage as an output of the regulator. The IC further includes a controller that controls the regulator by using a voltage regulator in the plurality of voltage regulators to generate the regulated output voltage from the plurality of input voltages.
    Type: Grant
    Filed: December 29, 2015
    Date of Patent: May 8, 2018
    Assignee: Silicon Laboratories Inc.
    Inventors: Timothy T. Rueger, Praveen Kallam, Nicholas M. Atkinson
  • Patent number: 9876008
    Abstract: An integrated circuit comprises a first doped region and a second doped region in a substrate. The second doped region is separated from the first doped region by a first spacing. The integrated circuit further comprises a dielectric layer over the substrate and a gate over the dielectric layer. The gate is positioned having the first doped region on a first substrate side of the gate and the second doped region on a second substrate side of the gate opposite the first substrate side of the gate. The integrated circuit also comprises a third doped region in the substrate separated from the first doped region by a second spacing. The integrated circuit further comprises a fourth doped region in the substrate. The gate and the third doped region are coupled with a first voltage supply, and the fourth doped region is coupled with a second voltage supply.
    Type: Grant
    Filed: August 13, 2014
    Date of Patent: January 23, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chewn-Pu Jou, Chien-Jung Wang
  • Patent number: 9863981
    Abstract: A circuit and a method for sensing a current flowing from a supply voltage into an electric load are presented. The current sensing circuit comprises a first circuit branch connected between the supply voltage and the electric load, a second circuit branch connected between the supply voltage and ground, and an equalization circuit for equalizing a first voltage drop across a first resistive element and a second voltage drop across a second resistive element and for generating an indication of a current flowing through the second circuit branch.
    Type: Grant
    Filed: August 23, 2016
    Date of Patent: January 9, 2018
    Assignee: Dialog Semiconductor (UK) Limited
    Inventor: Thomas Jackum
  • Patent number: 9819146
    Abstract: The invention concerns a device for controlling at least one diode 2, the control device comprising an electrical card 4 comprising a printed circuit 5 on which the following are mounted: a diode 2, a front component 7 and a storage capacitor 9 connected in such a way as to form a circuit loop 17 extending substantially in a thickness of the electrical card 4.
    Type: Grant
    Filed: April 10, 2014
    Date of Patent: November 14, 2017
    Assignee: Brightloop
    Inventors: Florent Liffran, Olivier Rabot
  • Patent number: 9793706
    Abstract: Presented systems and methods can facilitate efficient switching and protection in electronic systems. A system can comprise: an input operable to receive a signal; an adjustable component configurable to operate in a first mode which includes a low resistance and the component configurable to operate in a second mode which includes a current limiting operation in which the second mode enables continued operation in conditions that are unsafe for operation in the first mode; and an output operable to forward a signal. The adjustable component can be configurable to turn off if unsafe to operate in either the first mode or second mode. The first mode can include a relatively large component configuration with a relatively low drain to source on resistance. Utilizing a small component configuration in the second mode can include a relatively increased gate to source voltage compared to a large component configuration in the second mode.
    Type: Grant
    Filed: April 22, 2013
    Date of Patent: October 17, 2017
    Assignee: Vishay-Siliconix
    Inventors: Kyle Terrill, Trang Vu
  • Patent number: 9748845
    Abstract: An efficient power supply with fast, wideband response has been disclosed. In one implementation, two switching regulators with different frequency responses are combined to provide wideband, efficient power.
    Type: Grant
    Filed: November 2, 2013
    Date of Patent: August 29, 2017
    Inventor: Sridhar Kotikalapoodi
  • Patent number: 9684325
    Abstract: In certain aspects, a method for voltage regulation includes adjusting, using a feedback circuit, a resistance of a first pass element in a direction that reduces a difference between a reference voltage and a feedback voltage, wherein the first pass element is coupled between an input and an output of a voltage regulator, and the feedback voltage is equal to or proportional to a voltage at the output of the voltage regulator. The method also includes adjusting a bias voltage of the feedback circuit in a direction that reduces the difference between the reference voltage and the feedback voltage.
    Type: Grant
    Filed: January 28, 2016
    Date of Patent: June 20, 2017
    Assignee: QUALCOMM Incorporated
    Inventor: Todd Morgan Rasmus
  • Patent number: 9677533
    Abstract: An apparatus operates at least one light-emitting diode in the form of a laser diode. The light-emitting diode is interconnected in series with the load section of a controllable semiconductor element and a current measuring resistor between a first supply voltage terminal and a second supply voltage terminal. The supply voltage terminals are the output connections of a voltage-regulating circuit in the form of a DC voltage boost converter which provides a supply voltage), and wherein a current-regulating circuit is provided for the current through the at least one light-emitting diode, whose actuator is the controllable semiconductor element.
    Type: Grant
    Filed: August 21, 2014
    Date of Patent: June 13, 2017
    Assignee: Continental Automotive GmbH
    Inventor: Stephan Bolz
  • Patent number: 9610124
    Abstract: A medical laser using solely an electronic shutter circuit for controlling the laser output, without any mechanical shutter mechanism, is provided for use in clinical applications. The medical laser has several advantages compared to medical lasers with mechanical shutters. These advantages can be defined in terms of the speed of the electronic shutter, increased reliability, increased safety, smaller and less expense. The medical laser according to the invention will shut the laser down in less than 100 microseconds making it far superior to what would be possible with a typical mechanical shutter which would take at least 10 ms to disable the laser. Safety and reliability is a result of an electronic shutter circuit with at least two current sensors, at least two photodetectors and a set of one, two or three fast electronic safety switches.
    Type: Grant
    Filed: March 24, 2012
    Date of Patent: April 4, 2017
    Assignee: Precision Medical Optics, LLC
    Inventors: David H Mordaunt, Charles M East
  • Patent number: 9590487
    Abstract: Disclosed are a method and circuit for reducing a ripple of a current output by a current source. The circuit for reducing a ripple of a current output by a current source comprises a tube with adjustable impedance and a control circuit.
    Type: Grant
    Filed: December 10, 2013
    Date of Patent: March 7, 2017
    Assignee: INVENTRONICS (HANGZHOU), INC.
    Inventors: Xiaoli Yao, Liang'an Ge
  • Patent number: 9564808
    Abstract: An electric power conversion device includes a plurality of cell converters connected in cascade and including main circuits, drive circuits, and self-feeding devices for supplying power to the drive circuits by being supplied with power from the main circuits. The drive circuit is supplied with power via a first feed line from the self-feeding device in the corresponding cell converter, and supplied with power from the self-feeding device in another cell converter via a second feed line on which an insulation input/output circuit is provided. When the self-feeding device is abnormal, the drive circuit is supplied with power from the self-feeding device in the other cell converter, whereby the electric power conversion device continuously provides a desired output.
    Type: Grant
    Filed: September 2, 2013
    Date of Patent: February 7, 2017
    Assignees: Mitsubishi Electric Corporation, Toshiba Mitsubishi-Electric Industrial Systems Corporation
    Inventors: Kimiyuki Koyanagi, Takushi Jimichi, Satoshi Azuma, Yasuhiko Hosokawa, Shinzo Tamai, Sadao Funahashi, Kotaro Higashi
  • Patent number: 9552008
    Abstract: A voltage regulator circuit includes: an output transistor that controls an output voltage by making an output current flow between first and second electrodes in accordance with a first differential voltage, which is a difference between first and second voltages of the first and third electrodes; an operational amplifier that controls the second voltage such that the output voltage comes to be at a target level; an initiation circuit that maintains the second voltage at the third voltage such that the output transistor is off before initiation of the voltage regulator circuit and that allows the second voltage to be controlled by the operational amplifier after initiation of the voltage regulator circuit; and a current output circuit that outputs an adjustment current from the third electrode or to the third electrode such that the first differential voltage becomes larger when the output voltage is less than a prescribed level.
    Type: Grant
    Filed: August 23, 2016
    Date of Patent: January 24, 2017
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Yusuke Shimamune
  • Patent number: 9535478
    Abstract: A power supply management device includes: a signal-output-unit for outputting, for each of a plurality of power-supply-lines for which voltage supply is started in a predetermined order, a signal indicating that a voltage of the power-supply-line has reached a given level; and a voltage-shut-off-circuit for short-circuiting one of the power-supply-lines for which voltage supply is started second or later, to a portion at a voltage level lower than a level of a voltage supplied to each of the power-supply-lines, at or before a time point of start of voltage supply to one of the power-supply-lines for which voltage supply is started first, and releasing the one power-supply-line from being short-circuited in accordance with the signal indicating that a voltage of one of the power-supply-lines for which voltage supply is started immediately before voltage supply to the one power-supply-line is started has reached a given level.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: January 3, 2017
    Assignee: FUJITSU LIMITED
    Inventor: Michihiro Ochiai
  • Patent number: 9524638
    Abstract: A method and apparatus for performing a function in a mobile device are disclosed. A media sound from a sound output device external to the mobile device is captured and a sound feature is extracted from the captured media sound. A function to be performed in the mobile device is determined by identifying at least one reference sound feature in a set of reference sound features based on the extracted sound feature, each reference sound feature in the set of reference sound features being associated with at least one of a plurality of media sounds and at least one of a plurality of functions. Further, the determined function is performed in the mobile device.
    Type: Grant
    Filed: January 28, 2013
    Date of Patent: December 20, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Taesu Kim, Kyu Woong Hwang, Minho Jin
  • Patent number: 9484069
    Abstract: An auxiliary power supply device can include a first power storage unit, a first charging circuit to receive input power and charge the first power storage unit, a second power storage unit having lower power supply speed than the first power storage unit and longer power supply time than the first power storage unit, a second charge circuit to receive input power and charge the second power storage unit, and a switching unit to supply the stored power of the first power storage unit to external devices for a predetermined time when a sudden power-off occurs and supply stored power of the second power storage unit to the external devices after the predetermined time elapses.
    Type: Grant
    Filed: February 2, 2015
    Date of Patent: November 1, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In Bo Shim, Jongjoo Lee
  • Patent number: 9438221
    Abstract: Switch devices with a first switching path and a second switching path are provided in some embodiments. When a voltage drop across the first switching path exceeds a predetermined voltage, the second switch may be activated.
    Type: Grant
    Filed: April 3, 2014
    Date of Patent: September 6, 2016
    Assignee: Infineon Technologies AG
    Inventors: Michael Asam, Veli Kartal
  • Patent number: 9389626
    Abstract: A low-drop-output type voltage regulator may include an error amplifier providing a gate signal depending on a voltage difference between a reference voltage and a feedback voltage, a semiconductor switch adjusting a current between an input terminal receiving a battery voltage and a ground, in response to the gate signal, a feedback circuit dividing and detecting a detection voltage in a detection node between the semiconductor switch and the ground and providing the feedback voltage, a voltage sensor sensing the battery voltage, and a feedback voltage controller adjusting a level of the feedback voltage depending on the sensed battery voltage.
    Type: Grant
    Filed: March 27, 2015
    Date of Patent: July 12, 2016
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Yoo Hwan Kim, Jong Myeong Kim, Hyun Hwan Yoo, Yoo Sam Na, Dae Seok Jang, Hyun Jin Yoo
  • Patent number: 9337641
    Abstract: An embodiment high efficiency power regulator comprises a three-terminal converter and a protection device. The three-terminal converter comprises a first terminal coupled to a positive terminal of an input voltage bus, a second terminal coupled to a positive terminal of an output voltage bus and a third terminal coupled to the protection device. The protection device comprises an inrush current limiting element connected in series with a reverse polarity protection device.
    Type: Grant
    Filed: April 15, 2014
    Date of Patent: May 10, 2016
    Assignee: Futurewei Technologies, Inc.
    Inventors: Hengchun Mao, Yan-Fei Liu, Renhua Wu
  • Patent number: 9276475
    Abstract: A switched mode assisted linear (SMAL) amplifier/regulator architecture can be configured to supply regulated power to a dynamic load, such as an RF power amplifier. Embodiments of a SMAL regulator can include a linear amplifier and a switched mode converter parallel coupled at a supply node, and configured such that the amplifier sets load voltage, while the amplifier and the switched converter are cooperatively controlled to supply load current. The amplifier can include separate feedback loops: an external relatively lower speed feedback loop for controlling signal path bandwidth, and an internal relatively higher speed feedback loop for controlling output impedance bandwidth of the linear amplifier. The linear amplifier can be AC coupled to the supply node, and the switched converter can be configured with a capacitive charge control loop that controls the switched converter to effectively control the amplifier to provide capacitive charge control.
    Type: Grant
    Filed: August 9, 2013
    Date of Patent: March 1, 2016
    Assignee: Texas Instruments Incorporated
    Inventors: Carsten Barth, John Hoversten, Steven Berg, Vahid Yousefzadeh, Arie Van Staveren, Bert Helleman
  • Patent number: 9236732
    Abstract: Provided is a voltage regulator capable of suppressing an overshoot with low current consumption. A comparator of an overshoot detection circuit is activated only when a power supply fluctuation occurs, and the comparator outputs a signal for reducing an overshoot occurring in an output voltage. In a steady state, the comparator of the overshoot detection circuit is turned off to prevent the current from being consumed.
    Type: Grant
    Filed: September 20, 2013
    Date of Patent: January 12, 2016
    Assignee: SEIKO INSTRUMENTS INC.
    Inventors: Takashi Matsuda, Fumimasa Azuma
  • Patent number: 9177617
    Abstract: Disclosed are methods, circuits, apparatuses and systems for providing power to a dynamic load such as a non-volatile memory array. According to embodiments, a voltage source may be adapted to generate and output a supply current at substantially a target voltage through a regulating transistor whose channel is in series between an output terminal of said charge pump and an input terminal of said NVM array. A discharge circuit branch coupled to an output terminal of the regulating transistor may be adapted to drain away current from the regulating transistor output terminal when a voltage at the regulating transistor output terminal exceeds a first defined threshold voltage. A bulk regulating circuit branch coupled to a bulk of the regulating transistor may be adapted to reduce a bulk-voltage of the regulating transistor when a voltage at the regulating transistor output terminal exceeds a defined threshold voltage.
    Type: Grant
    Filed: October 8, 2013
    Date of Patent: November 3, 2015
    Assignee: CYPRESS SEMICONDUCTOR CORPORATION
    Inventor: Alexander Kushnarenko
  • Patent number: 9152163
    Abstract: This disclosure describes techniques for regulating a kILIS factor (i.e., a load current-to-sensing current ratio) of a current sensing power metal-oxide-semiconductor field-effect transistor (MOSFET). The techniques may include generating a reference voltage based on a configurable function that defines the reference voltage as a function of two or more main terminal voltages which are obtained at two or more different locations on a metallization that forms a main terminal of a current sensing power MOSFET, and regulating a sensing terminal of the current sensing power MOSFET at a voltage that is determined based on the reference voltage. Using a configurable function of two or more main terminal voltages to regulate a sensing terminal of a current sensing power MOSFET may allow the voltage at which the sensing terminal is regulated to be trimmed in order to improve the accuracy of the kILIS factor produced by the current sensing power MOSFET.
    Type: Grant
    Filed: May 15, 2014
    Date of Patent: October 6, 2015
    Assignee: Infineon Technologies Austria AG
    Inventors: Simone Fabbro, Emiliano Puia, Giacomo Cascio
  • Patent number: 9148101
    Abstract: At least one implementation relates to a method that includes receiving a bias voltage provided by a low-dropout voltage regulator (LDO) error amplifier; supplying a feedback voltage to the LDO error amplifier; supplying a power signal to a load; and providing a control signal to enable or disable the load and enable or disable the LDO error amplifier.
    Type: Grant
    Filed: January 29, 2013
    Date of Patent: September 29, 2015
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Roberto Nonis, Nicola Da Dalt
  • Patent number: 9126495
    Abstract: A reverse polarity protection circuit includes a p-channel MOSFET, an n-channel MOSFET, zener diodes, a coil that suppresses a backward flow of an electric current, a resistor that retains a voltage difference between a source of the p-channel MOSFET and a drain of the n-channel MOSFET, a resistor that protects the circuit if short-circuit destruction of the p-channel MOSFET occurs, a resistor that protects the circuit if short-circuit destruction of the n-channel MOSFET occurs, an electrolytic capacitor that suppresses fluctuation in an input voltage to a power supply control IC, a battery that supplies a voltage to an ECU, and the power supply control IC that generates a voltage for causing an IC in the ECU to operate.
    Type: Grant
    Filed: August 1, 2012
    Date of Patent: September 8, 2015
    Assignee: Hitachi Automotive Systems, Ltd.
    Inventors: Yasushi Sugiyama, Takuya Mayuzumi, Yasuhiko Okada, Kiyoomi Kadoya
  • Patent number: 9088176
    Abstract: A power management unit for improving power efficiency of an electronic device. The power management unit includes a first and a second stage power regulator and a control circuitry. The first stage power regulator includes a switching regulator to efficiently adjust an input voltage based on a feedback signal. The adjusted input voltage provides the second stage power regulator that includes low dropout voltage regulators with an input voltage close to its output. Thus, power dissipation in the second stage is reduced by reducing the voltage differential between the input and desired output voltages. The second stage turns on/off power to units of the electronic device. The control circuitry generates the feedback signal based on dropout voltages of the low dropout voltages, the desired output voltage and the adjusted input voltage. The largest dropout voltage is selected and adds it to the desired output voltage to generate the feedback signal.
    Type: Grant
    Filed: December 17, 2007
    Date of Patent: July 21, 2015
    Assignee: NVIDIA CORPORATION
    Inventors: Neil Hendin, Zahid Najam
  • Patent number: 9059698
    Abstract: An integrated circuit device includes an external power supply input configured to be coupled to an external power supply and a digital circuit, such as a clock signal generator circuit, that generates noise at a power supply input thereof. The device further includes a replica load circuit and a power supply circuit coupled to the external power supply input, to a power supply input of the digital circuit and to a power supply input of the replica load circuit. The power supply circuit is configured to selectively couple the external power supply node to the power supply input of the digital circuit responsive to a voltage at the power supply input of the replica load circuit. The replica load circuit may be configured to provide a load that varies responsive to a voltage at the power supply input of the digital circuit.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: June 16, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Su-yeon Doo, Seung-jun Bae, Kwang-il Park, Young-soo Sohn
  • Patent number: 9035631
    Abstract: The phase margin compensation method according to an exemplary embodiment of the present invention includes: outputting reference voltage (Vout2); outputting a first reference voltage (Vout1) actually supplied to the target circuit; comparing the reference voltage (Vout2) with the first reference voltage (Vout1) by the comparator; counting any section of an output signal (pulse signal) from the comparator by a predetermined frequency by the duty cycle calculator; and controlling a phase margin of a frequency of output voltage supplied to the target circuit by controlling buffer current based on the duty cycle ratios and the output bit information fed back from the duty cycle calculator.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: May 19, 2015
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventor: Soo Woong Lee
  • Publication number: 20150130427
    Abstract: A device is configured to provide low dropout regulation. An amplifier stage includes a first transistor electrically connected to an output of the device, and a second transistor. A current mirror includes a third transistor electrically connected to the second transistor, and a fourth transistor electrically connected to the third transistor. The auxiliary current source has a control terminal electrically connected to a gate electrode of the fourth transistor. The pull down stage includes a fifth transistor having a gate electrode electrically connected to a drain electrode of the first transistor, and a sixth transistor having a gate electrode electrically connected to the gate electrode of the fourth transistor. The pull up transistor has a gate electrode electrically connected to a drain electrode of the fifth transistor. The first capacitor has a first terminal electrically connected to the gate electrode of the first transistor.
    Type: Application
    Filed: November 14, 2013
    Publication date: May 14, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chung-Cheng Chou, Po-Hao Lee
  • Publication number: 20150130292
    Abstract: A voltage converter includes a high voltage regulator, a buck converter and a dual input linear regulator unit. The high voltage regulator converts a rectified voltage to a first load voltage. The rectified voltage is rectified from an input voltage. The buck converter generates an output voltage having a first level based on the rectified voltage during a stabilizing period and provides a transition detection signal that is enabled when the output voltage transitions to the first level. The stabilizing period is successive to an initializing period. The dual input linear regulator unit receives the first load voltage, the output voltage and a reference voltage, generates a second load voltage based on the first load voltage during the initializing period, and generates the second load voltage based on the output voltage during the stabilizing period.
    Type: Application
    Filed: November 13, 2014
    Publication date: May 14, 2015
    Inventors: Pyung-Woo YEON, Myeong-Lyong KO, Kyung-Goo MOH, Sung-Woo MOON, Filippo NERI
  • Patent number: 9030176
    Abstract: A semiconductor integrated circuit includes a plurality of output transistors each controlling the magnitude of an output voltage relative to the magnitude of a load current according to a control value indicated by an impedance control signal applied to a control terminal, a voltage monitor circuit outputting an output voltage monitor value indicating a voltage value of the output voltage, and a control circuit controlling the magnitude of the control value according to the magnitude of an error value between a reference voltage indicating a target value of the output voltage and the output voltage monitor value, and controls based on the control value whether any of such transistors be brought to a conducting state. The control circuit increases a change step of the control value relative to the error value during a predetermined period according to prenotification signals for notifying a change of the load current in advance.
    Type: Grant
    Filed: November 12, 2012
    Date of Patent: May 12, 2015
    Assignee: Renesas Electronics Corporation
    Inventors: Masafumi Onouchi, Kazuo Otsuga, Yasuto Igarashi, Sadayuki Morita, Koichiro Ishibashi, Kazumasa Yanagisawa
  • Patent number: 9024593
    Abstract: A power supply unit includes a boost converter having an input node and output node. The output node is coupled to a high-side of an H-bridge that is for supplying power to a capacitive load that is coupled to a first node and to a second node of the H-bridge. A first diode is coupled in forward direction between the first node of the H-bridge and the input node of the boost converter. A second diode is coupled in forward direction between the second node of the H-bridge and the input node of the boost converter.
    Type: Grant
    Filed: April 13, 2012
    Date of Patent: May 5, 2015
    Assignee: Texas Instruments Deutschland GmbH
    Inventors: Thomas Keller, Joerg E. Goller, Erich J. Bayer
  • Patent number: 8981741
    Abstract: A voltage regulator has an input terminal for receiving a supply voltage and an output terminal for providing a regulated voltage and a regulated current. Furthermore, the voltage regulator includes a regulator for generating the regulated voltage and the regulated current according to a regulation of the supply voltage. The regulator includes a plurality of regulation branches arranged between the input terminal and the output terminal, each one for providing an output voltage used for obtaining the regulated voltage and for providing an output current contributing to define the regulated current. The regulation branches are partitioned into a plurality of subsets each one including components adapted to operate within a corresponding maximum voltage different from the maximum voltage of the other subsets. In addition, the regulator includes a selector for selectively enabling the regulation branches according to an indicator of the supply voltage.
    Type: Grant
    Filed: February 19, 2013
    Date of Patent: March 17, 2015
    Assignee: STMicroelectronics S.r.l.
    Inventors: Antonino Conte, Carmelo Ucciardello, Gianbattista Logiudice