Abstract: A low dropout (LDO) regulator operates in wide input range. The LDO includes an N-type pass transistor and a P-type pass transistor for supplying power to the output terminal. The P-type pass transistor is connected with N-type pass transistor in parallel. Two error amplifiers control the gate terminals of the N-type pass transistor and P-type pass transistor to generate a first output voltage and a second output voltage. Thus, the first output voltage is generated when the input voltage is higher than a threshold voltage, and the second output voltage is generated when the input voltage is lower than the threshold voltage.

Abstract: A voltage regulator circuit has a standby amplifier with an output coupled to a gate of an output transistor. An active amplifier has an output coupled to the gate of the output transistor and to a gate of a replica follower transistor. A voltage regulated output is coupled to a source of the output transistor.

Abstract: A switching resistance linear regulator. The regulator comprises an output terminal producing a regulated output voltage, a first comparator, a second comparator, a first sourcing circuit coupled to the output terminal, and a first sinking circuit coupled to the output terminal. The first comparator compares a feedback signal representative of the output voltage and a first sourcing reference signal that is less than a reference signal. The second comparator compares the feedback signal and a first sinking reference signal that is greater than the reference signal. The first sourcing circuit is configured to be responsive to the first comparator by sourcing a first current to the output terminal. The first sinking circuit is configured to be responsive to the second comparator by sinking a second current from the output terminal.

Abstract: A low dropout (LDO) voltage regulator having more than one LDO modules, each LDO module having a frequency response adapted to a certain range of output frequency. The LDO voltage regulator can provide a gain over a broad range of operating frequency by combining output current from each LDO module and providing the combined current at an output of the LDO voltage regulator. The LDO voltage regulator further comprises a load monitor coupled to the LDO modules for disabling some of the LDO modules to reduce power consumption of the LDO voltage regulator.

Abstract: A power supply circuit includes two pass transistors that conduct current from a voltage supply terminal to an output terminal. One of the pass transistors is smaller whereas the other is larger. Current through the smaller transistor is controlled by the voltage control loop such that the voltage on the output terminal is regulated to a predetermined voltage. Current through the larger transistor is controlled by a high gain current control loop such that the current flowing through the larger transistor is a multiple of the current flowing through the smaller pass transistor. By reducing current flow in the smaller transistor, the power supply rejection ratio (PSRR) of the power supply circuit is improved for frequencies up to 100 kHz. Die space occupied by the two pass transistors is reduced in comparison to the amount of pass transistor die space in a conventional power supply circuit of similar performance.

Abstract: Multiple voltage regulators for use with a single load. The present invention allows power to be supplied to an electrical load using multiple voltage regulators based on the operating environment of the load. In one embodiment, a primary voltage regulator that is built of relatively low capacity and relatively high efficiency components is used to supply power from a limited power source. A secondary voltage regulator built of higher capacity and possibly lower efficiency components is used when power is from a less limited source. In one embodiment, a tertiary voltage regulator is used that is built of possibly higher capacity and lower efficiency components to provide even more power. It is important to note that use of voltage regulators as described herein does not require that higher capacity voltage regulators be less efficient than lower capacity voltage regulators.

Abstract: A PMU that includes LDOs is provided. The PMU also includes, for each LDO, a corresponding reference circuit that provides a reference voltage for the LDO. Further, the PMU includes a central bias circuit that provides a reference current to each of the voltage reference circuits. Each reference circuit includes a delay circuit, a counter, a binary-weighted resistor ladder, and switches coupled to the resistor ladder. In each reference circuit, the resistor ladder provides the corresponding reference voltage from the received reference current. Further, the counter controls the switches to “step up” the reference voltage in a well-defined manner during the power-up sequence. The reference voltage is stepped up from a minimum voltage to a final reference voltage by one least significant bit at each clock pulse. Also, the delay circuits are employed to control when each reference voltage begins to increase from the minimum voltage.

Abstract: A power supply circuit includes first and second power supply circuits. The first power supply circuit has a first voltage generation circuit and the second power supply circuit has a second voltage generation circuit and an operational amplifier. When a load is in a low power consumption mode, only the first power supply circuit operates to output a first voltage to the load. When the load is in a normal operation mode, the second power supply circuit also operates to output a desired power supply voltage based on a reference voltage generated by the second voltage generation circuit. In this case, the operational amplifier controls not only the second power supply circuit but also the first power supply circuit. Thus, a desired power supply voltage is output to the load regardless of whether the first voltage is greater than the desired power supply voltage.

Abstract: A voltage regulator includes first and second transistors arranged in parallel and configured to regulate current flow to an output node, and a sensing circuit configured to sense a voltage level at the output node and provide a signal proportional thereto. the regulator also includes a control circuit configured to receive the signal from the sensing circuit and provide control signals at control terminals of the first and second transistors such that voltage at the output node is maintained substantially at a selected level. The control circuit further configured to hold the second transistor in an off state while a demand for current at the output node remains below an output threshold. The second transistor is configured to control a large portion of load current above the output threshold. The regulator may also include a current bypass circuit configured to shunt leakage current of the second transistor to ground, away from the sensing circuit.

Abstract: Apparatus is configured for producing an output signal indicating an operating status of a monitored circuit. An input signal relating to the monitored circuit is received at an input node. A pulse train generator, coupled to the input node, is configured for generating a pulse train of a prescribed repetition rate at a duty cycle alternated between first and second duty cycle values at a prescribed frequency. The duty cycle and frequency are indicative of operating status of the monitored circuit.

Abstract: An apparatus, which controls the temperature of a secondary battery formed by combination of a plurality of single cells or a plurality of battery modules each made by series connection of multiple single cells, prevents variations in the temperature or voltage of the single cells or the battery modules, which could otherwise be caused when the secondary battery is heated. A temperature control section controls the quantity of heat by means of which a heater heats a secondary battery formed by combination of a plurality of battery modules made by series connection of multiple single cells. The temperature control section detects a rate of temporal changes in an open circuit voltage of the secondary battery. When a detected rate of temporal changes in open circuit voltage has exceeded a predetermined threshold voltage value, the heater is controlled to thus diminish the quantity of heat used for heating the secondary battery.

Abstract: A multiple-output power device has a plurality of regulators for outputting regulated voltages; a plurality of power terminals for supplying an input voltage to the respective regulators; and a plurality of output terminals for outputting regulated output voltages from the plurality of regulators to the outside.

Abstract: In a converter device, an N-type FET is connected in series between an input terminal and an output terminal and an N-type FET is connected between the side of the output terminal of the N-type FET1 and a ground terminal. A smoothing circuit and a comparator circuit are connected to the side of the output terminal of the circuits. The output side of the comparator circuit is connected to an H/S driver circuit controlling the N-type FET1 through an inverter and directly connected to an L/S driver circuit controlling the N-type FET2. A reference voltage correction circuit is included in the comparator circuit, and the comparator circuit outputs an appropriate switching control signal by comparing a correction reference voltage, obtained through comparison of a divider voltage in accordance with the time average value of an output voltage with a reference voltage, with the divider voltage.

Abstract: The present invention relates to a switched mode power supply with programmable digital control and to a power supply system comprising a plurality of switched mode power supplies. The input terminals and the output terminals of the switched mode power supply system are separated by an insulation barrier, and the switched mode power supply comprises a conversion stage having at least one switching element. The switching element of the conversion stage, as well as any switching elements of a possible pre-regulator, is digitally controlled by a programmable digital circuit. In one embodiment of the switched mode power supply, the programmable digital circuit is located on the primary side of the insulation barrier.

Abstract: A dual output voltage regulator circuit is disclosed. The output voltage regulator has a first FET and a second FET. A current source responsive to the regulated output voltage provides a current drive to the gate of the first FET in a first mode of operation and to the gate of the second FET in a second mode of operation. Further, the circuit employs switches for switchably selecting between the first mode of operation and the second mode of operation.

Abstract: A light-load power transistor and a heavy-load power transistor are connected in parallel between an input voltage and an output voltage. The light-load power transistor has a smaller current driving capability, i.e. a smaller dimension of a current path. During a light-load mode, only is the light-load power transistor activated to reduce the current consumption caused by an error amplifier, thereby enhancing the efficiency. When a detection current signal is higher than a threshold current signal, the heavy-load power transistor is additionally activated through a gate control circuit by a mode selection circuit, thereby achieving a sufficient current driving capability.

Abstract: A body diode comparator circuit for a synchronous rectified FET driver including a sample circuit and a comparator. The FET driver has a phase node coupled between a pair of upper and lower switching FETs and is responsive to a PWM signal having first and second phases for each cycle. The sample circuit samples an initial voltage of the phase node during the first phase of the PWM signal and provides a sum voltage indicative of the initial phase voltage added to the voltage level of the phase node during the second phase of the PWM signal. The comparator compares the sum voltage with a predetermined reference voltage and provides an output indicative of an activation state of the lower FET during the second phase of the PWM signal. The FET driver turns on the upper FET when the comparator indicates that the lower FET is off.

Abstract: A control method for the parallel-connected power converters includes a control circuit comprising a voltage feedback circuit and a current feed-forward circuit. The voltage feedback circuit, consisting of a voltage regulated control circuit and a waveform control circuit, is used to control the power converter's output voltage with constant amplitude and low total harmonic distortion. By adjusting the gain of waveform control circuit, it can regulate the current distribution among the parallel-connected power converters. The current feed-forward circuit separates the power converter's output current into the fundamental component and the harmonic component, and amplifies them by different gain. The amplified fundamental component acts as a fundamental resistor to suppress the circulating current among the parallel-connected power converters, and the amplified harmonic component acts as a harmonic damper for preventing from high frequency oscillation generated by the L-C filter.

Abstract: In a packaged integrated circuit, the package inductance limits the rate at which off-chip current may be varied in response to a change in on-chip current demand of the integrated circuit. The present invention provides an on-chip voltage regulator circuit for regulating multi-cycle voltage fluctuations of an integrated circuit associated with changes in current demand of the integrated circuit. The voltage regulator sources current to prevent an undervoltage conditions and sinks current to prevent an overvoltage condition.

Abstract: A data converter is implemented as an integrated circuit device (100). The converter comprises signal processing circuitry (120-170) which produces an output signal (OUT) in dependence upon a received input signal (D1-Dm). Production of the output signal (OUT) is initiated at a time determined by a timing signal (CLK) and is completed at a time which is delayed by a delay time with respect to the timing signal (CLK). A delay-contributing portion (130, 150, 160) makes a contribution to the delay time that is affected by variations in a power supply voltage (VDD) applied thereto. An internal supply voltage regulator (110) derives a regulated internal power supply voltage (VDD(REG)) from an external power source voltage (VDD), and applies this voltage to the delay-contributing portion (130, 150, 160) to fix its contribution to the delay time at some value independent of variations in the external power source voltage.

Abstract: A power supply for a television apparatus comprises a source of energizing potential (5.2V) fed to first and second control transistors (Q26403, Q26404). The first control transistor outputs a first source, while the second control transistor outputs a second source. The two control transistors are controlled by a feedback type voltage regulator (U26404) so that the sources track each other. The feedback voltage regulator is controlled by the second source. A storage capacitor (C26466) is coupled to the first source through an isolating resistor (R26462).

Abstract: A current control circuit forces current sharing among paralleled power converters. Each power converter has an associated current control circuit, which includes a current amplifier and a coupling circuit. The current amplifier outputs a feedback signal to a voltage regulation error amplifier when the power converter output current falls below a predetermined threshold level. The error amplifier causes an increase in the power converter output voltage, forcing an increase in output current. Therefore, each power converter in a paralleled arrangement is regulated to provide a minimum level of output current, based on a predetermined threshold value.

Abstract: In a packaged integrated circuit, the package inductance limits the rate at which off-chip current may be varied in response to a change in on-chip current demand of the integrated circuit. The present invention provides an on-chip voltage regulator circuit for regulating multi-cycle voltage fluctuations of an integrated circuit associated with changes in current demand of the integrated circuit. The voltage regulator sources current to prevent an undervoltage conditions and sinks current to prevent an overvoltage condition.

Abstract: An extended range power supply system includes a power source for providing operational power with a power supply circuit connecting with the power source for regulating the operational power. A current sensing circuit is connected with the power supply circuit, the current sensing circuit including a plurality of current sensing elements, each sensing element configured for a selected output range, with each sensing element individually operatively activated, and each sensing element providing a feedback signal. A control loop compensation circuit is connected with the current sensing circuit for receiving the feedback signal and with the power supply circuit to provide an error signal. The control loop compensation circuit includes a like plurality of control loop compensation components, each operatively associated with one current sensing element for receiving a feedback signal.

Abstract: An integrated circuit with a D.C./D.C. internal voltage regulator, including at least two power stages of the regulator, having respective terminals of connection to a supply voltage connected to distinct pads of the integrated circuit, and a single control stage.

Abstract: A voltage regulator system includes a plurality of individual voltage regulators that are compounded to provide both high output current capability and low quiescent current at low load currents.

Abstract: An apparatus for providing regulated power to a microelectronic device is disclosed. The apparatus includes an array of power regulators that are coupled together and which are configured to provide power to various portions of the microelectronic device. The array includes filters to determine a frequency of power demanded by the device and transistors configured to provide power in the demanded frequency range.

Abstract: A mixed-signal integrated circuit device (100) such as a digital-to-analog converter comprises signal processing circuitry (120-170) operable to produce an output signal (OUT) in dependence upon a received input signal (D1-Dm). Production of the output signal (OUT) is initiated at a time determined by a timing signal (CLK) and is completed at a time which is delayed by a delay time with respect to said timing signal (CLK). The signal processing circuitry (120-170) comprises at least one delay-contributing portion (120, 130, 150, 160) which makes a contribution to the delay time that is affected by variations in a power supply voltage (VDD) applied to the delay-contributing portion concerned. The integrated circuit device (100) is provided with at least one internal supply voltage regulator (110) for connection when the device is in use to a power source external of the device (100) to receive therefrom an external power source voltage (VDD).

Abstract: A method and apparatus for reducing ripple current in a projector lamp comprising an electrical network comprising input terminals A and C, and output terminals B and D, including a first inductive element and a second inductive element, each inductive element having a first terminal and a second terminal, with the second terminal of the first inductive element electrically connected with the second terminal of the second inductive element at output terminal B, with the first terminal of the first inductive element connected to input terminal A, and the first terminal of the second inductive element connected to input terminal C; and a means for impressing a first source of switching potential from an external source at input terminal A, and a second source of switching potential from the external source out-of-phase with the first source of switching potential, at input terminal C such that a ripple current across the output terminals B and D is minimum.

Abstract: The voltage regulating circuit, in particular for semiconductor memories, has a reference-voltage generator for generating a reference voltage, an in-phase element for providing a regulated voltage, and an error amplifier for forming a control loop. The in-phase element has a plurality of transistors which are permanently connected to one another on the control side and the load terminals of which are disconnectably connected, in dependence on the required drive strength, to a terminal that outputs the regulated voltage. The voltage regulating circuit is particularly suitable for supplying the voltage for embedded DRAM memories with an application-dependent storage capacity.

Abstract: A voltage generator for producing an internal supply voltage has a standby voltage generator and a voltage generator for normal operation that are controlled in common by a reference voltage. In addition, a comparator stage is provided whose switching threshold is set lower than the reference voltage by using a voltage divider that is connected to the reference voltage. The additional comparator stage thus activates the voltage generator for normal operation when the internally produced voltage falls below its switching threshold so that the internal supply voltage is stabilized.

Abstract: An apparatus and method for a regulator circuit includes multiple amplifier circuits, multiple bias stages, and a shunt stage. Each bias stage includes a set of MOS transistors with respective resistance circuits that are arranged to bias the shunt stage. The shunt stage includes a set of MOS transistor that are arranged to regulate a potential provided by a source circuit when active. Each amplifier circuit forms a regulation loop with a respective MOS transistor of the bias stage and a MOS transistor of the shunt stage. The multiple regulation loops provide redundancy. The regulation loops do not conflict with each other. Failures or defects within one of the regulation loops does not affect the remaining regulation loops in such a way that over-voltage results from the failure. The regulator prevents an over-voltage when at least one of the regulation loops is operable.

Abstract: An apparatus for controlling start up of supply voltages received from a power supply responding to control by a feedback signal includes: (a) first error amplifiers receiving a supply voltage at a first terminal, receiving a reference voltage at a second terminal and providing a first error signal to a switch indicating difference between the signals at the terminals; and (b) second error amplifiers having a first node coupled with the switch and for receiving the supply voltage and a second node receiving a reference voltage; the first node receives a sum of the first error signal and the supply voltage when the switch is in a first orientation, and receives the supply voltage when the switch is in a second orientation; each second error amplifier provides a second error signal indicating a difference between signals received at the nodes that is the feedback signal for controlling the power supply.

Abstract: A method and apparatus for regulating a DC power supply, adaptable for use with a motion sensor switch, by limiting the leakage to ground current of the power supply to comply with U.L. Standards while also enabling the DC power supply to provide a stable DC output voltage which is essentially unaffected by changes in magnitude of the AC supply voltage or changes in ambient temperature. The method and apparatus employs first and second transistors, in which the base and collector of the first transistor and the base and collector of the second transistor are coupled to receive a voltage based on the AC supply voltage, and the emitter of both the first and second transistors are coupled to drive an output circuit of the DC power supply. The emitter of the second transistor is also coupled via a first resistor to the base of the first transistor, and the collector of the second transistor is also coupled via a second resistor to the base of the first transistor.

Abstract: A voltage regulator circuit comprises a reference voltage circuit for generating a reference voltage, an error amplifying circuit for receiving the reference voltage from the reference voltage circuit and comparing the reference voltage with a given voltage resulting from dividing the output voltage of an output terminal by a pair of resistors connected in series, and an output transistor portion having two or more switchable transistors different in driving capability. A switching circuit drives a selected one of the switchable transistors in accordance with a result of the comparison by the error amplifying circuit to thereby limit overshoot of the output voltage.

Abstract: A constant voltage circuit robust to the input voltage lowering is disclosed. The invention is applied to a constant voltage circuit fed with an input voltage through first and second power conductors for transferring the input voltage to a load as an output voltage through an output transistor. An inventive constant voltage circuit is provided with a substitute circuit, responsive to a detection of the lowing of the input voltage to a predetermined voltage, for providing a substitute output path that is connected in parallel with the output transistor. Doing this minimize the degree of lowering of the second voltage due to the lowering of said first voltage. The output transistor may be nay of NPN and PNP transistors and P-type and N-type MOS FETs.

Abstract: A voltage generator for producing an internal supply voltage has a standby voltage generator and a voltage generator for normal operation that are controlled in common by a reference voltage. In addition, a comparator stage is provided whose switching threshold is set lower than the reference voltage by using a voltage divider that is connected to the reference voltage. The additional comparator stage thus activates the voltage generator for normal operation when the internally produced voltage falls below its switching threshold so that the internal supply voltage is stabilized.

Abstract: A voltage regulator system includes a plurality of individual voltage regulators that are compounded to provide both high output current capability and low quiescent current at low load currents.

Abstract: To accomplish low power consumption of a semiconductor memory device, an internal voltage generating apparatus of the present invention applies an internal power voltage having the lower potential level as an operation voltage of a chip. By differentiating the internal power voltage for each of a peripheral circuit and a core circuit within a DRAM to use them as an operational voltage of the cell, i.e., by supplying the lowered internal power voltage to the core circuit unit, the reliability of the cell and noise characteristic is improved.

Abstract: The performance of the main regulatory transistor of an on-chip voltage regulator circuit is enhanced when the main transistor is appropriately biased during start up. In an example embodiment, a voltage regulator circuit includes a thin gate oxide transistor as the main regulatory transistor and an operational amplifier that is referenced to a midlevel operating voltage. During start-up, the potential voltage difference is large enough to necessitate the disconnection of the main transistor from the operational amplifier. A voltage divider ladder circuit is used to maintain the gate voltage of the main transistor at the midlevel voltage while a smaller thick gate oxide transistor is used to maintain loop stability and to withstand voltage transients.

Abstract: An apparatus for providing regulated power to a microelectronic device is disclosed. The apparatus includes an array of power regulators that are coupled together and which are configured to provide power to various portions of the microelectronic device. The array includes filters to determine a frequency of power demanded by the device and transistors configured to provide power in the demanded frequency range.

Abstract: A regulator system for supplying power to a microelectronic device is disclosed. The system includes an array of a plurality of regulators, where each regulator provides a portion of power required to operate the device. The system may further include an intermediate power regulator that supplies power to the array of regulators.

Abstract: A method and apparatus for regulating a DC power supply, adaptable for use with a motion sensor switch, by limiting the leakage to ground current of the power supply to comply with U.L. Standards while also enabling the DC power supply to provide a stable DC output voltage which is essentially unaffected by changes in magnitude of the AC supply voltage or changes in ambient temperature. The method and apparatus employs first and second transistors, in which the base and collector of the first transistor and the base and collector of the second transistor are coupled to receive a voltage based on the AC supply voltage, and the emitter of both the first and second transistors are coupled to drive an output circuit of the DC power supply. The emitter of the second transistor is also coupled via a first resistor to the base of the first transistor, and the collector of the second transistor is also coupled via a second resistor to the base of the first transistor.

Abstract: A rail tracking system and method for providing precise tracking of voltage levels to a dual supply voltage Integrated Circuit. A switch mode DC-DC voltage regulator is used to derive the lower of the two voltage levels from the higher level. The switch mode regulator employs a pulse width modulator (PWM) to derive the lower voltage level. A separate supply source is utilized to power the PWM and the timing of the supply voltage is such that the PWM has reached steady state before the higher voltage level is provided to the regulator.

Abstract: In a circuit configuration for generating a stabilized power supply voltage, an in-phase regulator LR and a switched-mode regulator SR are connected in parallel to one another and are between terminal A1 where the input voltage is supplied and terminal A2 where stabilized output voltage UA is obtained. The regulators are adjusted so that in the normal case, the output voltage of switched-mode regulator SR is slightly higher than that of in-phase regulator LR.

Abstract: The performance of the main regulatory transistor of an on-chip voltage regulator circuit is enhanced when the main transistor is appropriately biased during start up. In an example embodiment, a voltage regulator circuit includes a thin gate oxide transistor as the main regulatory transistor and an operational amplifier that is referenced to a midlevel operating voltage. During start-up, the potential voltage difference is large enough to necessitate the disconnection of the main transistor from the operational amplifier. A voltage divider ladder circuit is used to maintain the gate voltage of the main transistor at the midlevel voltage while a smaller thick gate oxide transistor is used to maintain loop stability and to withstand voltage transients.

Abstract: Power supply circuit of an electronic component in a test machine and intended to provide the component with a supply current in a given range under a nominal polarization voltage. The power supply circuit includes two identical elementary circuits each able to provide a supply current in half the given range on respective output terminals thereof which are connected in parallel. The elementary circuits each include a regulation circuit for maintaining on the electronic component a polarization voltage equal to the nominal polarization voltage, and a power circuit which is controlled by the regulation circuit to provide the supply current in half the given range. The regulation circuit of a first elementary circuit also controls the power circuit of the second elementary circuit, the power circuit of the second circuit being disconnected from the regulation circuit of the second elementary circuit.

Abstract: A rail tracking system and method for providing precise tracking of voltage levels to a dual supply voltage Integrated Circuit. A switch mode DC—DC voltage regulator is used to derive the lower of the two voltage levels from the higher level. The switch mode regulator employs a pulse width modulator (PWM) to derive the lower voltage level. A separate supply source is utilized to power the PWM and the timing of the supply voltage is such that the PWM has reached steady state before the higher voltage level is provided to the regulator.

Abstract: A selective call receiver (100) operating from a battery (102), includes a battery monitor (114), a radio receiver (108), a regulator (104), a capacitor (105) coupled to the regulator and the radio receiver, and a processor (116) for controlling the foregoing elements. The processor is adapted to determine from the battery monitor an energy level of the battery, configure the regulator to supply a first limited current to the radio receiver and the capacitor for a first predetermined time when the energy level is above a predetermined threshold, or configure the regulator to supply a second limited current to the radio receiver and the capacitor for a second predetermined time when the energy level is at or below the predetermined threshold. After configuring the regulator, the processor is then adapted to enable the regulator to charge the capacitor and to power the radio receiver.

Abstract: The invention provides polyphase synchronous switching regulator circuits that include N power stages connected in parallel, with each stage synchronized to a timing control signal that is 360.degree./N out of phase from one another. Each power stage supplies current I.sub.OUT /N to the load. Current-mode and voltage-mode control implementations are described that provide efficient, low voltage, high current synchronous switching regulator circuits that have low input ripple current, low EMI, high slew-rate capability and low output ripple.