Abstract: Disclosed are methods, circuits, apparatuses and systems for providing power to a dynamic load such as a non-volatile memory array. According to embodiments, a voltage source may be adapted to generate and output a supply current at substantially a target voltage through a regulating transistor whose channel is in series between an output terminal of said charge pump and an input terminal of said NVM array. A discharge circuit branch coupled to an output terminal of the regulating transistor may be adapted to drain away current from the regulating transistor output terminal when a voltage at the regulating transistor output terminal exceeds a first defined threshold voltage. A bulk regulating circuit branch coupled to a bulk of the regulating transistor may be adapted to reduce a bulk-voltage of the regulating transistor when a voltage at the regulating transistor output terminal exceeds a defined threshold voltage.

Abstract: This disclosure describes techniques for regulating a kILIS factor (i.e., a load current-to-sensing current ratio) of a current sensing power metal-oxide-semiconductor field-effect transistor (MOSFET). The techniques may include generating a reference voltage based on a configurable function that defines the reference voltage as a function of two or more main terminal voltages which are obtained at two or more different locations on a metallization that forms a main terminal of a current sensing power MOSFET, and regulating a sensing terminal of the current sensing power MOSFET at a voltage that is determined based on the reference voltage. Using a configurable function of two or more main terminal voltages to regulate a sensing terminal of a current sensing power MOSFET may allow the voltage at which the sensing terminal is regulated to be trimmed in order to improve the accuracy of the kILIS factor produced by the current sensing power MOSFET.

Abstract: At least one implementation relates to a method that includes receiving a bias voltage provided by a low-dropout voltage regulator (LDO) error amplifier; supplying a feedback voltage to the LDO error amplifier; supplying a power signal to a load; and providing a control signal to enable or disable the load and enable or disable the LDO error amplifier.

Abstract: A reverse polarity protection circuit includes a p-channel MOSFET, an n-channel MOSFET, zener diodes, a coil that suppresses a backward flow of an electric current, a resistor that retains a voltage difference between a source of the p-channel MOSFET and a drain of the n-channel MOSFET, a resistor that protects the circuit if short-circuit destruction of the p-channel MOSFET occurs, a resistor that protects the circuit if short-circuit destruction of the n-channel MOSFET occurs, an electrolytic capacitor that suppresses fluctuation in an input voltage to a power supply control IC, a battery that supplies a voltage to an ECU, and the power supply control IC that generates a voltage for causing an IC in the ECU to operate.

Abstract: A power management unit for improving power efficiency of an electronic device. The power management unit includes a first and a second stage power regulator and a control circuitry. The first stage power regulator includes a switching regulator to efficiently adjust an input voltage based on a feedback signal. The adjusted input voltage provides the second stage power regulator that includes low dropout voltage regulators with an input voltage close to its output. Thus, power dissipation in the second stage is reduced by reducing the voltage differential between the input and desired output voltages. The second stage turns on/off power to units of the electronic device. The control circuitry generates the feedback signal based on dropout voltages of the low dropout voltages, the desired output voltage and the adjusted input voltage. The largest dropout voltage is selected and adds it to the desired output voltage to generate the feedback signal.

Abstract: An integrated circuit device includes an external power supply input configured to be coupled to an external power supply and a digital circuit, such as a clock signal generator circuit, that generates noise at a power supply input thereof. The device further includes a replica load circuit and a power supply circuit coupled to the external power supply input, to a power supply input of the digital circuit and to a power supply input of the replica load circuit. The power supply circuit is configured to selectively couple the external power supply node to the power supply input of the digital circuit responsive to a voltage at the power supply input of the replica load circuit. The replica load circuit may be configured to provide a load that varies responsive to a voltage at the power supply input of the digital circuit.

Abstract: The phase margin compensation method according to an exemplary embodiment of the present invention includes: outputting reference voltage (Vout2); outputting a first reference voltage (Vout1) actually supplied to the target circuit; comparing the reference voltage (Vout2) with the first reference voltage (Vout1) by the comparator; counting any section of an output signal (pulse signal) from the comparator by a predetermined frequency by the duty cycle calculator; and controlling a phase margin of a frequency of output voltage supplied to the target circuit by controlling buffer current based on the duty cycle ratios and the output bit information fed back from the duty cycle calculator.

Abstract: A voltage converter includes a high voltage regulator, a buck converter and a dual input linear regulator unit. The high voltage regulator converts a rectified voltage to a first load voltage. The rectified voltage is rectified from an input voltage. The buck converter generates an output voltage having a first level based on the rectified voltage during a stabilizing period and provides a transition detection signal that is enabled when the output voltage transitions to the first level. The stabilizing period is successive to an initializing period. The dual input linear regulator unit receives the first load voltage, the output voltage and a reference voltage, generates a second load voltage based on the first load voltage during the initializing period, and generates the second load voltage based on the output voltage during the stabilizing period.

Abstract: A device is configured to provide low dropout regulation. An amplifier stage includes a first transistor electrically connected to an output of the device, and a second transistor. A current mirror includes a third transistor electrically connected to the second transistor, and a fourth transistor electrically connected to the third transistor. The auxiliary current source has a control terminal electrically connected to a gate electrode of the fourth transistor. The pull down stage includes a fifth transistor having a gate electrode electrically connected to a drain electrode of the first transistor, and a sixth transistor having a gate electrode electrically connected to the gate electrode of the fourth transistor. The pull up transistor has a gate electrode electrically connected to a drain electrode of the fifth transistor. The first capacitor has a first terminal electrically connected to the gate electrode of the first transistor.

Abstract: A semiconductor integrated circuit includes a plurality of output transistors each controlling the magnitude of an output voltage relative to the magnitude of a load current according to a control value indicated by an impedance control signal applied to a control terminal, a voltage monitor circuit outputting an output voltage monitor value indicating a voltage value of the output voltage, and a control circuit controlling the magnitude of the control value according to the magnitude of an error value between a reference voltage indicating a target value of the output voltage and the output voltage monitor value, and controls based on the control value whether any of such transistors be brought to a conducting state. The control circuit increases a change step of the control value relative to the error value during a predetermined period according to prenotification signals for notifying a change of the load current in advance.

Abstract: A power supply unit includes a boost converter having an input node and output node. The output node is coupled to a high-side of an H-bridge that is for supplying power to a capacitive load that is coupled to a first node and to a second node of the H-bridge. A first diode is coupled in forward direction between the first node of the H-bridge and the input node of the boost converter. A second diode is coupled in forward direction between the second node of the H-bridge and the input node of the boost converter.

Abstract: A voltage regulator has an input terminal for receiving a supply voltage and an output terminal for providing a regulated voltage and a regulated current. Furthermore, the voltage regulator includes a regulator for generating the regulated voltage and the regulated current according to a regulation of the supply voltage. The regulator includes a plurality of regulation branches arranged between the input terminal and the output terminal, each one for providing an output voltage used for obtaining the regulated voltage and for providing an output current contributing to define the regulated current. The regulation branches are partitioned into a plurality of subsets each one including components adapted to operate within a corresponding maximum voltage different from the maximum voltage of the other subsets. In addition, the regulator includes a selector for selectively enabling the regulation branches according to an indicator of the supply voltage.

Abstract: A battery pack includes: a battery unit in which a plurality of battery modules with a plurality of secondary batteries connected in series to each other is connected in parallel to each other so that output current; and a battery management unit. The battery management unit calculates a first allowable current value of each of the plurality of battery modules and calculates second allowable current values of the other battery modules based on the first allowable current value of one battery module from the plurality of battery modules. The battery management unit calculates a value corresponding to the sum of the first allowable current value used as the reference and the respective second current values as an allowable current value when each of the second allowable current values is equal to or smaller than the first allowable current value of the corresponding battery module.

Abstract: A linear voltage regulator is disclosed. The linear voltage regulator includes an amplifier. The linear voltage regulator also includes a plurality of power devices. At least one of the power devices is electrically coupled to the amplifier. A switch is configured to control at least one power device of the plurality of power devices and a delay component is configured to trigger the switch.

Abstract: A dual mode voltage regulator according to one embodiment includes a passive regulator circuit, a switching regulator circuit, and a controller circuit configured to determine parameters of an external select input. The controller is configured to selectively couple, on a cold boot up, either the passive regulator circuit or the switching regulator circuit between an input voltage port and an output load based on the determination of parameters.

Abstract: An apparatus is configured to provide a voltage rising at the output with a programmable slew rate. The apparatus comprises a ramp-up control circuit module for supplying an increasing output voltage that is output to a load circuit. The ramp-up control circuit comprises an amplifier that receives the output of a plurality of selectable mirrored current sources that build up voltage across a capacitor for programming a selected linear slew rate for the increasing output voltage. The apparatus further comprises a glitch filter circuit for stabilizing the increasing output voltage so as to minimize glitches, including current and voltage stress, in the output voltage.

Abstract: A low drop-out (LDO) voltage regulator which parallels a second pass device to a first pass device, where the second pass device has in series a small resistor. The small value resistor is a substitute for bond wires or capacitors with very low equivalent series resistances (ESR). A fast feedback loop is coupled to the junction of the second pass device and the small resistor and provides, via a Miller capacitor, a feedback signal to the amplifier of the voltage regulator. The added second pass device returns circuit stability by moving the fast-loop high frequency zero node back within the bandwidth of the circuit.

Abstract: A switching regulator includes a multiphase converter which includes a plurality of main phases configured to covert a power supply voltage to a lower voltage for application to an electronic device at different load conditions. The switching regulator also includes an auxiliary phase configured to operate in a pulse frequency modulation mode during a light load condition so that power is supplied to the electronic device by at least the auxiliary phase during the light load condition.

Abstract: An IC provides tracking between multiple regulated voltages. The IC includes, a voltage reference circuit, a voltage multiplier circuit, and first and second voltage regulator circuits. The voltage reference circuit generates a first reference voltage. The first voltage regulator circuit generates, at a first terminal of a first output transistor, a first regulated voltage that is based on the first reference voltage. The voltage multiplier circuit generates a second reference voltage from an equivalent of the first reference voltage. The second voltage regulator circuit generates, at a first terminal of a second output transistor, a second regulated voltage that is based on the second reference voltage. At least one terminal of the second output transistor is capacitively coupled to the first terminal of the first output transistor.

Abstract: A voltage regulator apparatus includes a first power transistor and a second power transistor connected in parallel to each other between a first power source and a second power source, and a control unit for turning on the first power transistor and the second power transistor. An aspect ratio of the first power transistor is smaller than an aspect ratio of the second power transistor. The control unit turns on the second power transistor in a predetermined period of time after the first power transistor is turned on.

Abstract: Provided is an apparatus comprising a DCDC converter having a plurality of converter modules each configured to convert current from a first voltage level to another voltage form. In accordance with an embodiment of the disclosure, the converter modules are configured to be dynamically enabled or disabled such that only each converter module that has been enabled converts current for an output of the DCDC converter. Any inefficiency that would have been introduced by converter modules that are not needed are mitigated or eliminated altogether. The effect is that efficiency can be improved during low load conditions when there is no need to enable all of the converter modules.

Abstract: An integrated circuit device has a digital device operating at an internal core voltage; a linear voltage regulator; and an internal switched mode voltage regulator controlled by the digital device and receiving an external supply voltage being higher than the internal core voltage through at least first and second external pins and generating the internal core voltage, wherein the internal switched mode voltage regulator is coupled with at least one external component through at least one further external pin of the plurality of external pins.

Abstract: A regulator includes a first amplifier, a second amplifier, a current control circuit, a first P-type metal-oxide-semiconductor transistor, a second P-type metal-oxide-semiconductor transistor, and a feedback circuit. The current control circuit includes a controller and at least one switch, and a second terminal of the first P-type metal-oxide-semiconductor transistor is coupled to a second terminal of the second P-type metal-oxide-semiconductor transistor. The regulator utilizes the controller to turn off the at least one switch during operation of the regulator in a light load mode, and the regulator utilizes the controller to turn on the at least one switch in turn when the regulator changes from the light load mode to a heavy load mode. Thus, the regulator can quickly recover a load current in the heavy load mode.

Abstract: Techniques and circuits are described by which analog circuits may be quickly driven to desired states at startup in a fast and accurate manner.

Abstract: A proposed inrush control circuit may work in the presence of supply noise. A linear regulator in bypass mode may be designed for inrush current control, but may be susceptible to irregularities from increased supply noise. The circuit may include a splitting of the bypass power MOS that are switched on with some delay during the power on to control the initial power-on inrush current.

Abstract: The invention relates to power supplies where the output current is controllable. In prior art, there is a problem to provide both high rate of change in the current output and high efficiency. The solution of the present invention is based on combining current elements, whereby the current is controlled by switching the outputs of the current elements. The current elements can be implemented with e.g. buck converters, whereby the power dissipation is small.

Abstract: Described is an apparatus comprising: an output stage having an input supply node to receive an input power supply and an output node to provide an output supply to a load; an amplifier to control current strength of the output stage according to the output supply and a reference voltage; and a hysteresis unit to monitor the output supply and operable to control the current strength of the output stage according to a voltage level of the output supply. Described is another apparatus which comprises: a plurality of charge pumps to adjust current strength of the output stage; and a logic unit to monitor the output supply and operable to control the plurality of charge pumps according to a voltage level of the output supply and one or more reference voltages.

Abstract: A voltage regulator is provided having one or more discharger circuits that compensate for low on-chip output capacitance and a slow loop response time. In one embodiment, the voltage regulator includes an output transistor coupled to an output voltage line, an output voltage sensing arrangement coupled to the output voltage line for producing an output feedback voltage, and an error amplifier coupled to the output feedback voltage, the output transistor, and a reference voltage for applying feedback control to the output transistor. A first discharger circuit is coupled to the output voltage line and to a reference potential, the first discharger circuit being triggered by a steep-rise overvoltage condition. In another embodiment, a combination of fast and slow discharger circuits is used to improve the load step response—i.e., to stop the output voltage from jumping too high and to pull it back to stable value very quickly, such that the load circuits are protected.

Abstract: The invention discloses a voltage regulating apparatus, which includes: a linear regulator generating a first error signal; a switching regulator generating a first and a second PWM signals; a selecting unit coupled to the linear and switching regulators, receiving the first error signal and the second PWM signal, and outputting a regulating signal; a first power transistor coupled to the switching regulator and receiving the first PWM signal; and a second power transistor coupled to the selecting unit and receiving the regulating signal; wherein the voltage regulating apparatus can be put either in a linear mode of operation if the first error signal is selected as the regulating signal, or in a switching mode of operation if the second PWM signal is selected as the regulating signal.

Abstract: An amplifier drives the gate of a master source follower and of at least one slave source follower to form a low-dropout (LDO) regulator. Alternatively, a charge pump drives the master source follower to form the regulator. Additional slave source followers may be used in conjunction with the charge pump and the master source follower to improve the regulator performance.

Abstract: A voltage regulator circuit comprises active and standby amplifiers, first and second transistors, and a capacitor. The active amplifier has a negative input connected to a first reference voltage, and the standby amplifier has a negative input connected to a second reference voltage. The first reference voltage is greater than the second reference voltage. The first transistor has a gate connected to an output of the active amplifier and a drain connected to a voltage regulated output, and the second transistor has a gate connected to an output of the standby amplifier and a drain connected to the voltage regulated output. The capacitor is connected between a chip enable signal and the voltage regulated output.

Abstract: Circuits, methods, and apparatus that reduce the power required to drive transistors in switching power supply regulators under various load conditions. One example provides a power supply regulator having multiple parallel transistors in order to reduce series on resistance. When the regulator is lightly loaded, a reduced number of devices are driven by the regulator. That is, one or more devices are not driven, rather their gates are held at a voltage such that the devices remain in the off or non-conductive state. When the regulator is more heavily loaded, more or all of the devices are driven.

Abstract: Mechanisms are provided for either power gating or bypassing a voltage regulator. Responsive to receiving an asserted power gate signal to power gate the output voltage of the voltage regulator, at least one of first control circuitry power gates the output voltage of a first circuit or second control circuitry power gates the output voltage of a second circuit such that substantially no voltage to is output by the first circuit to a primary output node. Responsive to receiving an asserted bypass signal to bypass the output voltage of the voltage regulator, at least one of the first control circuitry bypasses the output voltage of the first circuit or the second control circuitry bypasses the output voltage of a second circuit such that substantially the voltage of a voltage source is output by the first circuit to the primary output node.

Abstract: An electrical circuit for manipulating at least one of a voltage and a current on a bus wire comprises a first switch having a first gate, a first source, and a first potential reduction unit. The first potential reduction unit is suitable for lowering a potential difference between the first gate and the first source of the first switch, wherein the lowering of the potential difference is caused by a shutting-off of a first control voltage.

Abstract: In one embodiment, an integrated circuit (e.g., FPGA) has two voltage regulators sharing stability and filter capacitors. A switch is located between each plate of each capacitor and a common voltage reference (e.g., ground) such that one of the two voltage regulators can be selectively connected to ground via the stability and filter capacitors.

Abstract: A method for operating an electric power generating system (EPGS) includes, in one aspect, detecting current limiting conditions in the SSPC, wherein the SSPC includes a main solid state switch in series with an output filter that includes a first solid state switch, and wherein a decoupling filter comprises a second solid state switch. Another aspect includes, based on the detection of the current limiting conditions in the SSPC, opening the first solid state switch and the second solid state switch; detecting an absence of current limiting conditions in the SSPC; and, based on the detection of the absence of current limiting conditions in the SSPC, closing the first solid state switch and the second solid state switch, and powering a direct current (DC) load by a generator of the EPGS via the output filter and the SSPC.

Abstract: A substantially unconditionally stable LOD regulator includes has first and second current paths. The first current path provides a reference current. The second current path receives an input voltage for developing a differential current with respect to the reference current based on the input voltage. The second current path has a sense resistor for sensing the differential current. A first current source biases the first and second current paths. A third current path senses the differential current and develops the input voltage in response thereto to control the differential current. A second current source biases the second current path. A first voltage follower circuit receives a first voltage on a first side of the sense resistor to provide an analog voltage output, and a second voltage follower circuit receives a second voltage on a second side of the sense resistor to provide a digital voltage output.

Abstract: A semiconductor integrated circuit includes a plurality of output transistors each controlling the magnitude of an output voltage relative to the magnitude of a load current according to a control value indicated by an impedance control signal applied to a control terminal, a voltage monitor circuit outputting an output voltage monitor value indicating a voltage value of the output voltage, and a control circuit controlling the magnitude of the control value according to the magnitude of an error value between a reference voltage indicating a target value of the output voltage and the output voltage monitor value, and controls based on the control value whether any of such transistors be brought to a conducting state. The control circuit increases a change step of the control value relative to the error value during a predetermined period according to prenotification signals for notifying a change of the load current in advance.

Abstract: A power regulation scheme includes a first voltage regulation portion having a first voltage regulator, a second voltage regulator, and a switching system. The first voltage regulation portion is connected in parallel with a second voltage regulation portion. The second voltage regulation portion regulates an input voltage if an open condition occurs within the first voltage regulation portion. The switching system forces the second voltage regulator to regulate the input voltage if a short condition occurs within the first voltage regulator.

Abstract: A power regulator circuit automatically disables an internal pass transistor when a detection circuit detects the presence of an external pass device. The internal pass transistor is made in an integrated circuit along with a detection circuit and a switch for disabling the internal pass transistor. The detection circuit detects a presence of an external pass device external to the integrated circuit. The switch automatically disables the internal pass transistor when the detection circuit detects the presence of the external pass device. The detection circuit has a comparator for comparing a signal on an outside connection of the integrated circuit and a latch to operate the switch. The comparator compares a voltage on an outside connection of the integrated circuit against a reference after power up of the regulator and can delay operation of the comparison until a predetermined time after power up. An integrated circuit can contain the power regulator circuit and the internal pass transistor.

Abstract: Circuits and methods for paralleling voltage regulators are provided. Improved current sharing and regulation characteristics are obtained by coupling control terminals of the voltage regulators together which results in precise output voltages and proportional current production. Distributing current generation among multiple paralleled voltage regulators improves heat dissipation and thereby reduces the likelihood that the current produced by the voltage regulators will be temperature limited.

Abstract: Series switches for power delivery. A regulator operated as a current source is arranged in parallel with a switched capacitor divider. A switched capacitor divider is configured in series with a plurality of linear regulators with each regulating one of a plurality of voltage outputs from the switched capacitor divider. In another embodiment, a series switch bridge has a first pair of switches connected in series with a second pair of switches across a voltage input, each switch within a pair of switches is switched in-phase with the other while the first pair of switches is switched out of phase with the second pair of switches. A balancing capacitor is coupled across one switch in both the first and second pair to be in parallel when either of the pair of switches is closed to reduce a charge imbalance between the switches.

Abstract: A system and method are disclosed for regulating a generator controlled power signal. An exemplary embodiment of the system may include both a digital voltage regulator and an analog voltage regulator and a selector switch configured to switch modulation control between the digital and analog voltage regulators. A watchdog detection circuit may be included for detecting an upsetting event in the digital voltage regulator and may trigger switching of the generator excitation input voltage modulation from the digital voltage regulator to the analog voltage regulator. An exemplary embodiment of the method may include modulating the generator excitation input voltage using the digital voltage regulator, detecting an occurrence of an upsetting event in the digital voltage regulator, disabling the digital voltage regulator, and switching modulation of the generator excitation input voltage to the analog voltage regulator.

Abstract: A low drop-out (LDO) voltage regulator which parallels a second pass device to a first pass device, where the second pass device has in series a small resistor. The small value resistor is a substitute for bond wires or capacitors with very low equivalent series resistances (ESR). A fast feedback loop is coupled to the junction of the second pass device and the small resistor and provides, via a Miller capacitor, a feedback signal to the amplifier of the voltage regulator. The added second pass device returns circuit stability by moving the fast-loop high frequency zero node back within the bandwidth of the circuit.

Abstract: A power regulation scheme includes a first voltage regulation portion connected in parallel with a second voltage regulation portion that regulates a voltage if an open condition occurs within the first voltage regulation portion. Each voltage regulation portion may include a first voltage regulator connected in series with a second voltage regulator that regulates the voltage if a short condition occurs within the first voltage regulator. Each voltage regulation portion may utilize a switching element to route an output voltage of the first voltage regulator past the second voltage regulator if the output voltage has been regulated and/or to force the output voltage to be regulated by the second voltage regulator if the output voltage has not been regulated.

Abstract: A series regulator circuit includes one or more transistors each having a channel with one end coupled to an input node to receive an input voltage and another end coupled to an output node, and having a control node to receive a control voltage, a control circuit configured to adjust the control voltage in response to a voltage of the output node such that the voltage of the output node is set equal to a voltage setting selected by an output voltage setting signal, and a switch circuit configured to change an operating condition, excluding the control voltage, of the one or more transistors in conjunction with a change in the voltage setting of the output node.

Abstract: An integrated electronic device includes circuitry for providing a system supply voltage from a primary power supply. The circuitry has a high power (HP) stage coupled to the primary power supply and having an output node coupled to a supply system node for providing a HP system supply voltage level and a HP output current such that the HP stage is configured to be active in a full power mode, and a low power (LP) stage coupled to the primary power supply and to the supply system node through a voltage follower for providing a LP supply voltage level and an LP output current such that the LP stage is configured to be active in a low power mode.

Abstract: The present invention discloses a linear regulator and a voltage regulation method. The method comprises: providing a power transistor for converting a supply voltage to an output voltage to a load according to the conduction condition of the power transistor; controlling the conduction condition of the power transistor according to a comparison between a feedback signal relating to the output voltage and a reference voltage; obtaining a signal relating to a load condition; and controlling the conduction capability of the power transistor according to the signal relating to the load condition.

Abstract: In one embodiment the present invention includes a voltage regulator circuit comprising a voltage to current converter. The voltage to current converter is coupled to provide a current to maintain an output voltage under changing load conditions. A transconductance of the voltage to current converter is independent of the output current and therefore improves stability for the voltage regulator across load conditions.

Abstract: A startup circuit for starting up a self-supplied voltage regulator which initiates startup by applying a voltage from a voltage supply to the startup circuit thus causing a voltage at an output node to rise. This rise will start the operation of the differential amplifier of the voltage regulator. When the voltage at the output node has reached the desired final output voltage, the startup circuit disconnects from the voltage regulator. The criterion for switching off the startup circuit is determined by a comparator which compares the output current capability of the voltage regulator with its output current plus the startup current. Inputs to the differential amplifier, such as the reference voltage, derive their power from the output node.