Parallel Connected Patents (Class 323/272)
  • Patent number: 11569748
    Abstract: An interleaved power converter includes a control circuit and multiple phase-shifted subconverters each having at least one power switch. The control circuit is coupled to the subconverters for controlling the power switches to balance currents in the subconverters over multiple periods. The control circuit includes a current compensator configured to determine a first duty cycle multiple times over the multiple periods, generate a PWM control signal having a present value of the first duty cycle for controlling the power switch of one of the subconverters during a period, determine a second duty cycle based on the present value of the first duty cycle and a previous value of the first duty cycle, and generate another PWM control signal having the second duty cycle for controlling the power switch of another one of the subconverters during the period. Other example power converters and control circuits are also disclosed.
    Type: Grant
    Filed: November 17, 2021
    Date of Patent: January 31, 2023
    Assignee: Astec International Limited
    Inventors: Yancy Fontanilla Boncato, Ronnie Bachiller Gozun
  • Patent number: 11552554
    Abstract: Provided are electrical circuits and methods for power factor correction. An example method includes receiving, by converter, an input voltage at a fundamental frequency and generating an output voltage; generating, based on the output voltage, a first measurement signal; subtracting a first reference signal from the first measurement signal to obtain a first error signal; generating an adaptive current sense signal, generating a reference voltage based on the input voltage, subtracting the reference voltage from the current sense signal thus generating a second measurement signal to control the current measurement; subtracting the second measurement signal from the input voltage to obtain a difference signal, wherein the difference signal is largely minimized by removing overtones of the fundamental frequency; generating, based on the difference signal, a second error signal; using a sum of the second error signal as a first order correction to the first error signal to regulate the converter.
    Type: Grant
    Filed: April 22, 2021
    Date of Patent: January 10, 2023
    Inventor: Robert S. Wrathall
  • Patent number: 11515792
    Abstract: The present embodiments relate generally to DC-DC converters and more particularly to a scheme for providing current sharing between parallel converters in a multiphase configuration. In some embodiments, a cycle-by-cycle instant correction to the compensation signal offset is provided based on the current share error between the paralleled converters so as to achieve improved instant current share performance.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: November 29, 2022
    Assignee: Renesas Electronics America Inc.
    Inventors: Xiaodong David Zhan, Prabhjot Singh, Long Robin Yu
  • Patent number: 11462997
    Abstract: A direct-current (DC) converter for a permanent-magnet (PM) alternator for a vehicle, the DC converter including one or more pairs of step-down converters that are electrically in parallel operating at a fundamental switching frequency, wherein the two step-down converters in each pair are arranged to be switched out of phase, and wherein the two step-down converters in each pair are arranged adjacent to each other to mitigate conducted electromagnetic interference (EMI).
    Type: Grant
    Filed: September 2, 2019
    Date of Patent: October 4, 2022
    Assignee: MILSPEC TECHNOLOGIES PTY LTD
    Inventors: Donald Grahame Holmes, Patrick McGoldrick, Andrew McIver, Noel Gordon, Bradley Hewitt
  • Patent number: 11431246
    Abstract: A power converter with an automatic balance mechanism of a flying capacitor is provided. The flying capacitor and a first terminal of an output inductor are connected to a switch circuit. Two terminals of an output capacitor are respectively connected to a second terminal of the output inductor and grounded. Two input terminals of an error amplifier are respectively connected to a node between the output capacitor and the output inductor, and coupled to a reference voltage. The error amplifier outputs an error amplified signal according to a voltage of the node and the reference voltage. A comparator circuit receives a ramp signal. A slope of the ramp signal is proportional to a voltage of the flying capacitor. The comparator circuit compares the ramp signal with the error amplified signal to output a comparison signal. The driving circuit drives the switch circuit according to the comparison signal.
    Type: Grant
    Filed: September 10, 2020
    Date of Patent: August 30, 2022
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventor: Fu-Chuan Chen
  • Patent number: 11430606
    Abstract: An inductor is disclosed, including a first wire, a non-conductive material, and a shell. The non-conductive material may cover the first wire, with a portion of each end of the first wire uncovered. The shell may include a top portion and a bottom portion and include at least one magnetized layer and at least one gap between the first portion and the second portion. The shell may also surround a portion of the non-conductive material.
    Type: Grant
    Filed: August 24, 2017
    Date of Patent: August 30, 2022
    Assignee: Apple Inc.
    Inventors: David P. Cappabianca, Joseph T. DiBene, II, Shawn Searles, Le Wang, Yizhang Yang, Sean Cian O'Mathuna, Santosh Kulkarni, Paul McCloskey, Zoran Pavlovic, William Lawton, Graeme Maxwell, Joseph O'Brien, Hugh Charles Smiddy
  • Patent number: 11428719
    Abstract: A measurement circuit comprises an electronic circuit, multiple measurement channels, and a combining circuit. The electronic circuit includes a first terminal, a second terminal, and a non-resistive circuit element. Each of the multiple measurement channels includes a differential input connected to the electronic circuit. The differential inputs of the multiple measurement channels are connected in series and include a differential input coupled to the non-resistive circuit element. One input of a differential input of a first measurement channel of the multiple measurement channels is connected to the first terminal of the electronic circuit and one input of a differential input of a second measurement channel of the multiple measurement channels is connected to the second terminal of the electronic circuit. The combining circuit receives multiple outputs from the multiple measurement channels and produce a composite output signal.
    Type: Grant
    Filed: January 10, 2020
    Date of Patent: August 30, 2022
    Assignee: Analog Devices International Unlimited Company
    Inventors: Joseph L. Sousa, Micah Galletta O'Halloran, Andrew Joseph Thomas
  • Patent number: 11409312
    Abstract: One or more embodiments relate to a multi-phase voltage regulator with AVP or droop configured to implement a non-linear load line. According to certain aspects, the non-linear load line can have a non-linear or zero slope in a first current/voltage region and a constant non-zero slope in second current/voltage region. In embodiments, the non-linear or zero slope region can specify that for any value of output current in that region, the output voltage will be the same predetermined value. The non-zero slope region can specify that for any value of the output current in that region, output current will be multiplied by a constant non-zero droop resistance value.
    Type: Grant
    Filed: April 23, 2020
    Date of Patent: August 9, 2022
    Assignee: RENESAS ELECTRONICS AMERICA INC.
    Inventors: Travis Guthrie, Jim Toker, Shea Petricek
  • Patent number: 11402414
    Abstract: A circuit and method for current sensing in DC-DC converters having coupled inductors is disclosed. A DC-DC converter includes a first and second inductors coupled to first and second switching nodes, respectively. The DC-DC converter further includes a current sensing circuit. The current sensing circuit includes a first current sensing circuit coupled to the first switching node and having a first sense node, and further includes a second sensing circuit coupled to the second switching node and having a second sense node. The circuit further includes a first capacitor coupled between the first sensing circuit and the second sensing circuit.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: August 2, 2022
    Assignee: Apple Inc.
    Inventor: Jonathan F. Bolus
  • Patent number: 11387734
    Abstract: Aspects of the disclosure provide for a circuit. In at least some examples, the circuit includes a high-side power transistor, a low-side power transistor, a first transistor, a second transistor, and a third transistor. The high-side transistor is adapted to couple between an input node and a switch node. The low-side transistor is coupled between the switch node and ground. The first transistor is adapted to couple between a first node and the switch node. The second transistor is coupled between the first node and an output node. The third transistor is coupled between the first node and ground.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: July 12, 2022
    Assignee: Texas Instruments Incorporated
    Inventors: Riazdeen Buhari, Roy Alan Hastings, Nghia Trong Tang
  • Patent number: 11381087
    Abstract: A smart grid system includes a current sensor, and plural power conversion devices coupled to an AC grid. The current sensor measures a total current flowed through the AC grid, thereby providing a measured current value. The power conversion devices include a master power conversion device and plural slave power conversion devices. The master power conversion device receives the measured current value, thereby controlling an output power of the master power conversion device and providing a first duty cycle signal according to the measured current value. A first one of the slave power conversion devices which is coupled to the master power conversion device receive the first duty cycle signal, thereby controlling an output power of the first one of the slave power conversion devices according to the first duty cycle signal. The master power conversion device and the slave power conversion devices are communicated via a daisy chain connection.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: July 5, 2022
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Sin-Hong Chen, Tsung-Han Tsai, Xin-Hung Lin
  • Patent number: 11374497
    Abstract: An apparatus comprises a plurality of voltage sources, one or more processors embedded with the plurality of voltage sources, and memory storing processor executable instructions that, when executed by the one or more processors, cause the apparatus to modify duty cycles of the voltage sources, and to modify timing for each phase of a multiphase cycle. In some cases, the apparatus: transfers, for each phase of the multiphase cycle, power from a different source of a plurality of sources to a load; determines, for each phase of the multiphase cycle, an input voltage associated with the transferred power, an output voltage associated with the transferred power, and current from the source associated with the transferred power; determines a duty cycle associated with the source; modifies duty cycles of the voltage sources; and modifies timing for each phase of the multiphase cycle.
    Type: Grant
    Filed: June 28, 2021
    Date of Patent: June 28, 2022
    Assignee: UPLIFT SOLAR CORP.
    Inventor: Eric Dupont Becnel
  • Patent number: 11362590
    Abstract: One or more embodiments relate to a current limit mode control circuit for a buck-boost converter which can provide a stable switching of the converter by operating the converter in a current limit mode during an overcurrent condition, performing fewer state transitions while in the current limit mode, and/or by clamping (reducing to a lower value) the output of an error amplifier in the current limit mode for controlling a pulse width modulation (PWM) signal that drives the switching transistors.
    Type: Grant
    Filed: February 7, 2020
    Date of Patent: June 14, 2022
    Assignee: RENESAS ELECTRONICS AMERICA INC.
    Inventors: Michael Jason Houston, Allan Warrington
  • Patent number: 11342738
    Abstract: One example includes a power generator protection system. The system includes a circuit breaker configured, when triggered, to provide an open circuit in a power line configured to conduct a current between a power grid point-of-interconnect (POI) and a power generator system. The system also includes a programmable controller configured to monitor the current and to generate a dynamic current threshold based on the current. The programmable controller can further be configured to compare the current with the dynamic current threshold and to trigger the circuit breaker based on a difference of the current relative to the dynamic current threshold to set an arc flash incident energy level of the power generator system at or below a predetermined safety level.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: May 24, 2022
    Assignee: FLORIDA POWER & LIGHT COMPANY
    Inventors: Jon D. Lawrence, Joseph M. Arthur
  • Patent number: 11329569
    Abstract: A power conversion system includes a power conversion circuit and a start-up circuit. The power conversion circuit includes an output capacitor, a first switching unit, a second switching unit, a flying capacitor and a magnetic element. The second switching unit includes two switch groups. The flying capacitor is connected between a first terminal and a second terminal of the power conversion circuit. The magnetic element includes two first windings that are electromagnetically coupled with each other. A first one of the two first windings is electrically connected between one switch group and the second terminal of the power conversion circuit. A second one of the two first windings is electrically connected between the other switch group and the second terminal of the power conversion circuit. The start-up circuit includes a third winding and an inductor. The third winding is electromagnetically coupled with the first windings.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: May 10, 2022
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Da Jin, Yahong Xiong, Qinghua Su
  • Patent number: 11323019
    Abstract: A switched mode power supply converter comprises a circuit pulse matching circuit configured to negate output voltage disturbance or noise during switching operation of a power conversion. The current pulse matching circuit input is driven by, or from, a power converter switch node of the switched mode power supply converter. The current pulse matching circuit comprises a rate-of-voltage change detection circuit driven by the power converter switch node.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: May 3, 2022
    Assignee: UNIVERSITY OF LIMERICK
    Inventors: Eamon O'Malley, Patrick Meehan, Karl Rinne
  • Patent number: 11295691
    Abstract: A current limiting circuit, comprising a switching circuit and a voltage stabilizing circuit. The switching circuit is separately connected to a voltage input terminal VIN and a voltage output terminal VOUT, and used for transmitting an input voltage to the voltage output terminal VOUT from the voltage input terminal VIN; and the voltage stabilizing circuit is separately connected to the switching circuit, the voltage input terminal VIN, and the voltage output terminal VOUT, used for controlling an output current to reduce together with the switching circuit when the output current of the voltage output terminal VOUT is increased and the output current is less than a preset output current, and further used for controlling the output current to be zero together with the switching circuit when the output current of the voltage output terminal VOUT is greater than or equal to the preset output current.
    Type: Grant
    Filed: January 10, 2019
    Date of Patent: April 5, 2022
    Assignee: HKC CORPORATION LIMITED
    Inventor: Liang Zhang
  • Patent number: 11283433
    Abstract: A method for the PWM actuation of more than one HV component for converting the power required by the HV components, in which each HV component is actuated by means of an individual PWM control circuit, and to a device for carrying out the method, wherein individual PWM control circuits are provided for the PWM actuation of 2 . . . n HV components, and wherein means are provided for asymmetrically splitting the phase shifts of the individual PWM actuation provided by the PWM circuitry.
    Type: Grant
    Filed: November 13, 2020
    Date of Patent: March 22, 2022
    Assignee: WEBASTO SE
    Inventors: Paul Leinsle, Jürgen Scherschmidt, Markus Prepens
  • Patent number: 11264833
    Abstract: A device may include a rectifier circuit providing a rectified DC signal, a rechargeable energy-storage element, and a power-management integrated circuit (PMIC). The PMIC may include a charging circuit for the rechargeable energy-storage element; a current-sensing circuit that measures a current provided by the rectified DC signal; a programmable current limit; a voltage-sensing circuit that measures a voltage on the rechargeable energy-storage element; and a controller that regulates the current provided to a DC output of the PMIC. the DC output of the PMIC may be regulated based at least in part on the current provided by the rectified DC signal; the programmable current limit; and the voltage on the rechargeable energy-storage element. The DC output of the PMIC may provide energy to a plurality of other energy-consuming subsystems on the device and to the charging circuit for the rechargeable energy-storage element.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: March 1, 2022
    Assignee: Google LLC
    Inventors: Daniel Adam Warren, Eric Marschalkowski, William Alan Saperstein
  • Patent number: 11245323
    Abstract: The present invention discloses a multi-phase power supply dynamic response control circuit and a control method. When a rapid rise of the load is detected, an output PWM signal is temporarily adjusted to enter a second operation mode from a first operation mode to supplement energy to the load and prevent the output voltage from decreasing. The present invention requires little modification to the existing circuit, and adopts simple, explicit and efficient detection method, realizing rapid dynamic response by providing sufficient energy for the load when the load current is suddenly increased.
    Type: Grant
    Filed: June 24, 2021
    Date of Patent: February 8, 2022
    Assignee: SHANGHAI BRIGHT POWER SEMICONDUCTOR CO., LTD.
    Inventor: Shun-Gen Sun
  • Patent number: 11245333
    Abstract: Provided is a power conversion device using a magnetic coupling reactor and being capable of reducing the number of parts and reducing the size of not only the magnetic coupling reactor but also an input capacitor. The magnetic coupling reactor is connected between a semiconductor switch element group, which executes power conversion, and the input capacitor. The coupling factor of two reactors in the magnetic coupling reactor is kept to a value equal to or less than a set value, for example, 0.8. The set value takes into consideration an area in which a ripple current of the input capacitor increases rapidly in response to a rise in coupling factor. The ripple current flowing in the input capacitor is reduced by thus setting the coupling factor.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: February 8, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventor: Mao Kawamura
  • Patent number: 11233454
    Abstract: Apparatus and associated methods relate to implementing an auto-inductance-detection architecture to reconstruct current monitor output (IMON) when a low-side switch in a power stage is on. In an illustrative example, an IMON generation circuit may include a variable resistor. A close loop control (e.g., OTA, switches, and variable resistor) may be configured to adjust a resistance value of the variable resistor automatically. The IMON generation circuit may also include a low pass filter coupled to a switching node of the power stage to receive a corresponding signal and provide a DC value. The difference between the corresponding signal and the DC value may be configured to enable or disable the close loop control. By providing the close loop control, the IMON generation circuit may advantageously perform auto-inductance detection (AID) and provide a more accurate IMON reconstruction method.
    Type: Grant
    Filed: April 28, 2020
    Date of Patent: January 25, 2022
    Assignee: ALPHA AND OMEGA SEMICONDUCTOR INTERNATIONAL LP
    Inventor: Xiangcheng Wang
  • Patent number: 11228248
    Abstract: In one form, a multiphase controller for controlling a plurality of phases using a corresponding plurality of phase controllers includes a plurality of inputs, each for receiving a respective current monitor signal, an averaging circuit for generating an averaged signal representative of an average of current monitor signals received from said plurality of inputs, wherein each phase controller generates an error voltage in response to said averaged signal and said respective current monitor signal, controls a drive signal in response to said error voltage and a control voltage, and provides a digital signal representative of a difference between said error voltage and said control voltage. The multiphase controller provides an adjustment signal representative of said digital signal divided by a corresponding output current for each phase controller, and said adjustment signal adjusts a corresponding error voltage.
    Type: Grant
    Filed: October 1, 2020
    Date of Patent: January 18, 2022
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Alessandro Zafarana
  • Patent number: 11221400
    Abstract: A photomultiplier pixel cell includes a photon detector coupled to detect an incident photon. A quenching circuit is coupled to quench an avalanche current in the photon detector. An enable circuit is coupled to the photon detector to enable and disable the photon detector in response to an enable signal. A buffer circuit is coupled to the photon detector to generate a digital output signal having a pulse width interval in response to the avalanche current triggered in the photon detector. A first one of a plurality of inputs of a digital-to-analog converter is coupled to the buffer circuit to receive a digital output signal. The digital-to-analog converter is coupled to generate an analog output signal having a magnitude that is responsive to a total number of digital output signals received concurrently within the pulse width interval at each one of the plurality of inputs of the digital-to-analog converter.
    Type: Grant
    Filed: March 27, 2018
    Date of Patent: January 11, 2022
    Assignee: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Eric A. G. Webster, Olivier Bulteel
  • Patent number: 11223237
    Abstract: An apparatus comprises a rectifier configured to convert an alternating current voltage into a direct current voltage, wherein the alternating current voltage is generated by a receiver coil configured to be magnetically coupled to a transmitter coil of a wireless power transfer system, a high efficiency power converter connected to the rectifier, the high efficiency power converter comprising a first stage and a second stage connected in cascade and a controller configured to detect a plurality of operating parameters and generate a control signal applied to a control loop of the first stage.
    Type: Grant
    Filed: September 24, 2019
    Date of Patent: January 11, 2022
    Assignee: NuVolta Technologies (Hefei) Co., Ltd.
    Inventors: Zeng Li, Junxiao Chen, Jinbiao Huang, Xintao Wang
  • Patent number: 11204614
    Abstract: A current balance circuit including a current sensing front end for sensing an output signal from each of a plurality of switching regulators and a current sensor for receiving the sensed output signal and converting the sensed signal into a sensed current signal. The current balance circuit further includes a current averaging circuit for receiving the sensed output signals and determining an average current output for the plurality of switching regulators and a current difference circuit for receiving the average current value and the sensed current signals and determining a current difference for each of the plurality of switching regulators. A calibration circuit is included for receiving the current differences and calculating a calibration value corresponding to each of the plurality of switching regulators which provides an indication of how to adjust a current output of the plurality of switching regulators to balance the current across the plurality of switching regulators.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: December 21, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Ying-Chih Hsu, Alan Roth, Eric Soenen
  • Patent number: 11196345
    Abstract: An interleaved power converter includes a control circuit and multiple phase-shifted subconverters each having at least one power switch. The control circuit is coupled to the subconverters for controlling the power switches to balance currents in the subconverters over multiple periods. The control circuit includes a current compensator configured to determine a first duty cycle multiple times over the multiple periods, generate a PWM control signal having a present value of the first duty cycle for controlling the power switch of one of the subconverters during a period, determine a second duty cycle based on the present value of the first duty cycle and a previous value of the first duty cycle, and generate another PWM control signal having the second duty cycle for controlling the power switch of another one of the subconverters during the period. Other example power converters and control circuits are also disclosed.
    Type: Grant
    Filed: July 28, 2020
    Date of Patent: December 7, 2021
    Assignee: Astec International Limited
    Inventors: Yancy Fontanilla Boncato, Ronnie Bachiller Gozun
  • Patent number: 11171562
    Abstract: Multi-sense point voltage regulator systems are provided for usage in conjunction with power-regulated devices, such as system-on-chip and microcontroller unit devices. In embodiments, the multi-sense point voltage regulator system includes a multiplexer selector circuit and a voltage regulator. The multiplexer selector circuit is configured to: (i) monitor a local voltages at multiple sense points within an integrated circuit (IC) die circuit structure; and (ii) generate a feedback voltage indicative of a lowest one of the monitored local voltages. The voltage regulator is configured to generate a regulated power supply output voltage as a function of a differential between the feedback voltage and the reference voltage, with the regulated power supply output voltage provided to the IC die circuit structure to drive operation thereof.
    Type: Grant
    Filed: July 7, 2020
    Date of Patent: November 9, 2021
    Assignee: NXP USA, INC.
    Inventors: Andre Luis Vilas Boas, Marcelo Fukui, Andre Gunther
  • Patent number: 11147132
    Abstract: A method of controlling a switching converter having a plurality of interleaved parallel branches, can include controlling conduction phases of power switches of the plurality of interleaved parallel branches to be overlapped when a load changes from a light load to a heavy load, in order to improve dynamic response performance of the switching converter. A control circuit for a switching converter with a plurality of interleaved parallel branches, can control conduction phases of power switches of the interleaved parallel branches to be overlapped when a load changes from a light load to a heavy load, in order to improve dynamic response performance of the switching converter.
    Type: Grant
    Filed: September 9, 2019
    Date of Patent: October 12, 2021
    Assignee: Silergy Semiconductor Technology (Hangzhou) LTD
    Inventors: Fusong Huang, Kailang Hang
  • Patent number: 11139658
    Abstract: A power conversion system has a plurality of power tracking converters connected in parallel to an output of an energy source such as a solar system. A communication system between the converters implements a sequence of operation of the converters, such that in response to a communication signal from a preceding converter in the sequence, each converter performs tuning of its power tracking function and then provides a communication signal to the next converter in the sequence. Each converter for example functions as a maximum power point tracking system. The system may be made from a set of smaller units so that different systems may be formed from a small set of standard components. By operating the converters in a sequence, conflict between the converters and instability is avoided.
    Type: Grant
    Filed: May 8, 2018
    Date of Patent: October 5, 2021
    Assignee: SIGNIFY HOLDING B.V.
    Inventors: Priya Ranjan Mishra, Goutam Maji
  • Patent number: 11128132
    Abstract: A system includes a first input line for a first voltage source, wherein the first input line is connected to a first output. A second input line is included for a second voltage source, wherein the second input line is connected to a second output and is in parallel with the first input line. A first series pass element is connected in series with the first input line, and a second series pass element is connected in series with the second input line. A controller is operatively connected to the first series pass element and to the second series pass element to throttle at least one of the first series pass element and the second series pass element to balance output current in the first and second outputs.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: September 21, 2021
    Assignee: Hamilton Sundstrand Corporation
    Inventors: Michael A. Wilson, Steven A. Avritch
  • Patent number: 11108322
    Abstract: A multi-phase switch-mode power supply to control an output in two possible modes is disclosed. A first mode can be applied for normal load conditions. In the first mode, control is achieved using an error signal based on a difference between an output voltage and a set voltage level. In heavy load conditions a load attempts to draw too more power than the switch-mode power supply can provide. As a result, control of the output voltage is lost and the current of each phase becomes saturated at a limit. When this condition is detected, a second mode can be applied. In the second mode, control is achieved using an error signal based on a difference between an output current and a set current level. The set current level is chosen so that the current of each phase is no longer saturated and control of the output current is maintained.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: August 31, 2021
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Han Zou
  • Patent number: 11099588
    Abstract: A power combining technique includes receiving a first voltage at a first input and a second voltage at a second input. The power combining technique further includes combining, with at least two power converters, power received from the first and second inputs into a single power rail. A power balancing technique further includes controlling the at least two power converters such that a first one of the power converters outputs an amount of current to the single power rail that is proportional to and/or equal to the amount of current output by another of the power converters.
    Type: Grant
    Filed: June 2, 2020
    Date of Patent: August 24, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Jeffrey Anthony Morroni
  • Patent number: 11095224
    Abstract: In a current equalization circuit, where a first inductor is connected to a first resistor, a second inductor is connected to both the first inductor and a second resistor, the input end of the first resistor and the input end of the second resistor are respectively connected to a first input end and a second input end of an error detection sub-circuit, a first output end of the error detection sub-circuit is connected to a first error adjustment sub-circuit, a second output end of the error detection sub-circuit is connected to a second error adjustment sub-circuit, the first error adjustment sub-circuit adjusts an input current of the first inductor based on a voltage signal from the error detection sub-circuit, and the second error adjustment sub-circuit adjusts an input current of the second inductor based on a voltage signal from the error detection sub-circuit.
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: August 17, 2021
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Dongqi Huang, Shaoqing Dong
  • Patent number: 11094807
    Abstract: A power MOS stage includes a first power MOS device and a second power MOS devices connected in parallel between a first node and a second node, the first power MOS device having a first voltage rating and the second power MOS device having a second voltage rating that is lower than the first voltage rating. A driver circuit is configured to drive control nodes of the first and second power MOS devices in a sequential manner when actuating the power MOS stage by actuating the first power MOS device before actuating the second power MOS device. The control nodes of the first and second power MOS devices are further driven in a sequential manner when deactuating the power MOS stage by deactuating the second power MOS device before deactuating the first power MOS device.
    Type: Grant
    Filed: September 5, 2019
    Date of Patent: August 17, 2021
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alberto Cattani, Alessandro Gasparini
  • Patent number: 11081962
    Abstract: An apparatus comprises a plurality of voltage sources, one or more processors embedded with the plurality of voltage sources, and memory storing processor executable instructions that, when executed by the one or more processors, cause the apparatus to modify duty cycles of the voltage sources, and to modify timing for each phase of a multiphase cycle. In some cases, the apparatus: transfers, for each phase of the multiphase cycle, power from a different source of a plurality of sources to a load; determines, for each phase of the multiphase cycle, an input voltage associated with the transferred power, an output voltage associated with the transferred power, and current from the source associated with the transferred power; determines a duty cycle associated with the source; modifies duty cycles of the voltage sources; and modifies timing for each phase of the multiphase cycle.
    Type: Grant
    Filed: November 20, 2020
    Date of Patent: August 3, 2021
    Assignee: UPLIFT SOLAR CORP.
    Inventor: Eric Dupont Becnel
  • Patent number: 11073886
    Abstract: In an embodiment, a system for balancing input current for power supplies a voltage detector configured to detect an input voltage to a power supply of a plurality of different power supplies. The system further includes one or more circuit elements configured to adjust one or more properties of the one or more circuit elements based at least in part on the detected input voltage in an attempt to maintain a consistent current input across the plurality of different power supplies.
    Type: Grant
    Filed: October 11, 2018
    Date of Patent: July 27, 2021
    Assignee: Facebook, Inc.
    Inventors: Mingchun Xu, Michael Timothy Kauffman
  • Patent number: 11042136
    Abstract: A computer device configured to monitor control signals from more than one adjustment system indicating a need to adjust operation of at least one energy storage; convert the control signals into current values; compare the control signals and select the one with the smallest current value; and control operation of at least one control device configured to regulate the current of the energy storage based on the selection by dispatching an adjustment signal by internet based communication.
    Type: Grant
    Filed: December 11, 2018
    Date of Patent: June 22, 2021
    Assignee: Liikennevirta Oy/Virta Ltd
    Inventor: Jussi Ahtikari
  • Patent number: 11031869
    Abstract: A dual mode switching regulator includes a PWM/PFM control architecture with PFM frequency foldback based on extending switching cycle off time TOFF. A controller includes a PWM/PFM clock generator that, in response to assertion of a TOFF control signal, extends the nominal PWM switching cycle off-time TOFFnom for an extended off-time TOFFext (variable), so that switching cycle off-time is [TOFFnom+TOFFext]. A TOFF modulator generates the TOFF control signal based on generating a TOFF control voltage from an ITOFF control current equal to [IPWM-IPFM], generated by sourcing an IPWM reference current, and, in response to a PFM load condition, sinking an IPFM control current. The TOFF control signal is asserted when the TOFF control voltage is not substantially equal to a TOFF reference voltage at the end of TOFFnom, to cause the PWM/PFM clock generator to extend switching cycle off-time to [TOFFnom+TOFFext], with the duration of TOFFext determining PFM switching frequency.
    Type: Grant
    Filed: January 16, 2020
    Date of Patent: June 8, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Tawen Mei, David Zakharian, Karen Chan
  • Patent number: 10985645
    Abstract: The present disclosure provides an alternatingly-switched parallel circuit, an integrated power module and an integrated power package. The alternatingly-switched parallel circuit includes a first bridge arm and a second bridge arm at least partly formed in a chip containing a plurality of first cell groups and a plurality of second cell groups. The plurality of first cell groups are configured to form the first upper bridge-arm switch and the plurality of second cell groups are configured to form the second upper bridge-arm switch, or the plurality of first cell groups are configured to form the first lower bridge-arm switch and the plurality of second cell groups are configured to form the second lower bridge-arm switch. The plurality of first cell groups and the plurality of second cell groups are switched on and off alternatingly.
    Type: Grant
    Filed: February 24, 2020
    Date of Patent: April 20, 2021
    Assignee: Delta Electronics (Shanghai) CO., LTD
    Inventors: Chaofeng Cai, Le Liang, Yan Chen, Xiaoni Xin
  • Patent number: 10985654
    Abstract: A switching regulator configured to generate a level-controlled output voltage from an input voltage, the switching regulator includes an inductor, an output capacitor configured to generate the level-controlled output voltage based on a current flowing through the inductor, at least two flying capacitors, and a plurality of switches configured to form electrical connections when the switching regulator operates in a first operating mode to, alternately charge each of the at least two flying capacitors using the input voltage, and provide a first boosted voltage to the inductor using a charged flying capacitor among the at least two flying capacitors.
    Type: Grant
    Filed: September 18, 2019
    Date of Patent: April 20, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Takahiro Nomiyama, Seung-chan Park, Jong-beom Baek
  • Patent number: 10978949
    Abstract: A DC-DC power converter including switched inductance circuits arranged in parallel is described. Operation includes determining a commanded current and activation commands for the switched inductance circuits based upon the commanded current. This includes executing the activation commands and monitoring current in the switched inductance circuits. An average measured current is determined for each of the switched inductance circuits, and a modified activation command is determined for each of the switched inductance circuits based upon the average measured current. A time portion of the modified activation command that exceeds an end time point of a subsequent time period is determined, and the modified activation commands for the switched inductance circuits are executed, including forward-shifting that time portion of the modified activation command for each of the switched inductance circuits that exceeds the end time point.
    Type: Grant
    Filed: May 8, 2019
    Date of Patent: April 13, 2021
    Assignee: GM Global Technology Operations LLC
    Inventors: Brent S. Gagas, Brian A. Welchko
  • Patent number: 10978950
    Abstract: Provided is multi-phase interleaving control in a power supply device. In power control by the power supply device where the dead beat control is applied to the multi-phase interleaving, combined current of the multi-phase current values is used as control current in the multi-phase control based on the multi-phase interleaving, thereby achieving control independent of the number of the detectors and the control system independent of the number of phases, and further, this control current is used to perform constant current control, so as to prevent overshooting and undershooting. The power supply device has multi-phase interleaving control that performs multi-phase control using a plurality of phase current values, provided with an LC chopper circuit constituting a step-down chopper circuit that operates according to the multi-phase control of multi-phase interleaving, and a controller for performing step response control according to the multi-phase control of the LC chopper circuit.
    Type: Grant
    Filed: February 23, 2017
    Date of Patent: April 13, 2021
    Assignee: KYOSAN ELECTRIC MFG. CO., LTD.
    Inventors: Itsuo Yuzurihara, Ryosuke Ohma, Hiroshi Kunitama, Yu Hosoyamada
  • Patent number: 10958175
    Abstract: A phase-redundant voltage regulator can include multiple regulator phases connected in parallel between a common regulator input and a common regulator output. Each regulator phase includes a voltage regulator that receives an input voltage and drives a respective output voltage. The voltage regulator also includes a plurality of linear regulators, each having a linear ORing device electrically connected between the regulator output of a respective regulator and an output of the linear regulator. The voltage regulator also includes an amplifier having inputs electrically connected to a remote voltage sense input and to a reference voltage input. An output of the voltage regulator is electrically connected to an input of the linear ORing device. The amplifier controls the linear ORing device to drive a voltage on the output of the linear regulator equivalent to a voltage on the reference voltage input.
    Type: Grant
    Filed: December 19, 2019
    Date of Patent: March 23, 2021
    Assignee: International Business Machines Corporation
    Inventors: Patrick Egan, Michael Lee Miller
  • Patent number: 10951118
    Abstract: A voltage regulator circuit included in a computer system may include multiple phase circuits each coupled to a regulated power supply node via a corresponding inductor. The phase circuits may modify a voltage level of the regulated power supply node using respective control signals generated by a digital control circuit that processes multiple data bits. An analog-to-digital converter circuit may compare the voltage level of the regulated power supply node to multiple reference voltage levels and sample the resultant comparisons to generate the multiple data bits.
    Type: Grant
    Filed: May 18, 2020
    Date of Patent: March 16, 2021
    Assignee: Apple Inc.
    Inventors: Sanjay Pant, Fabio Gozzini, Hubert Attah, Jonathan F. Bolus, Wenxun Huang
  • Patent number: 10917009
    Abstract: An autozeroed comparator controls a frequency fsw of the input voltage inputted to a DC/DC converter. A digital frequency synchronization circuit is connected to the autozeroed comparator so as to form a phase locked loop, wherein the DES circuit controls the hysteretic window of the autozeroed comparator so as to lock fsw to a clock reference frequency. A plurality of slave phase circuits may be connected to the master phase circuit including the DFS circuit and the autozeroed comparator. Duty cycle calibration circuits adjust a duty cycle signal applied to each of the slave phase circuits, in response to average current measured in the slave phase circuits, so that each slave phase circuit is synchronized with the master phase circuit. A 6 A 90.5% peak efficiency 4-phase hysteretic quasi-current-mode buck converter is provided with constant frequency and maximum ±1.5% current mismatch between the slave phases and the master phase.
    Type: Grant
    Filed: August 9, 2017
    Date of Patent: February 9, 2021
    Assignees: CALIFORNIA INSTITUTE OF TECHNOLOGY, ARIZONA BOARD OF REGENTS ON BEHALF OF ARIZONA STATE UNIVERSITY
    Inventors: Philippe C. Adell, Ming Sun, Bertan Bakkaloglu
  • Patent number: 10911036
    Abstract: An accelerating discharge device includes a first parallel inductive element, a second parallel inductive element, a first capacitor, a noise suppression element, a one-way element, a first discharge circuit, a second discharge circuit, a first switch element, and a second switch element. The first parallel inductive element generates a first control voltage according to a first input voltage. The second parallel inductive element generates a second control voltage according to a second input voltage. The first switch element selectively couples the first parallel inductive element through the second discharge circuit to a ground according to the first control voltage. The second switch element selectively couples the second parallel inductive element through the second discharge circuit to the ground according to the second control voltage.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: February 2, 2021
    Assignee: ACER INCORPORATED
    Inventor: Tzu-Tseng Chan
  • Patent number: 10903738
    Abstract: A voltage converter circuit comprises a charge pump circuit, a pulse width modulation (PWM) filter stage circuit, and a control circuit. The charge pump circuit includes multiple switching transistors arranged as a switching bridge including a first bridge portion connected to a second bridge portion; a midpoint capacitor connected to a circuit node coupling the first bridge portion and the second bridge portion; and a first flying capacitor coupled to the first bridge portion and the second bridge portion. The PWM filter stage circuit is coupled to the charge pump circuit and a first input/output terminal and includes a first inductor coupled to the first flying capacitor and the second bridge portion of the switching bridge. The control circuit is configured to control activation of switching transistors of the switching bridge to generate a regulated voltage at the first input/output terminal.
    Type: Grant
    Filed: April 1, 2019
    Date of Patent: January 26, 2021
    Assignee: Analog Devices International Unlimited Company
    Inventors: Jindong Zhang, Jian Li
  • Patent number: 10903737
    Abstract: Provided is a power circuit in which a first input terminal is connected to a first end of a second inductor, a second end of the second inductor is connected to a first end of a first reactor, the second end of the second inductor is connected to a first end of a second reactor, the first input terminal is connected to a first end of a first inductor, a second end of the first inductor is connected to a first end of a bypass capacitor, a second end of the bypass capacitor is connected to a second output terminal, the first inductor and the second inductor are magnetically coupled to each other, and a control circuit performs switching control over first and second switching elements, using an interleaving method.
    Type: Grant
    Filed: April 26, 2018
    Date of Patent: January 26, 2021
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Noriaki Takeda, Taiki Nishimoto
  • Patent number: 10897198
    Abstract: A voltage conversion apparatus includes a power supply circuit with a first switch, a voltage conversion circuit, and a protective circuit with a detection circuit. The first switch transmits a power to generate an input voltage. The voltage conversion circuit generates a first voltage. A second switch of the voltage conversion circuit receives the input voltage. A third switch of the voltage conversion circuit is coupled between the second switch and a ground terminal. The detection circuit generates a first control signal based on the first voltage, a second voltage that corresponds to the first voltage, and a reference voltage. When a voltage value of an error signal is less than the reference voltage, the detection circuit outputs the first control signal to turn off the first switch. The voltage value of the error signal corresponds to a voltage difference between the first voltage and the second voltage.
    Type: Grant
    Filed: September 11, 2018
    Date of Patent: January 19, 2021
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Tao Chen, Xiao-Feng Zhou, Ching-Ji Liang