Parallel Connected Patents (Class 323/272)
  • Patent number: 11909384
    Abstract: A protected direct-drive depletion-mode (D-mode) GaN semiconductor half-bridge power module is disclosed. Applications include high power inverter applications, such as 100 kW to 200 kW electric vehicle traction inverters, and other motor drives. The high-side switch is a normally-on D-mode GaN semiconductor power switch Q1 in series with a normally-off LV Si MOSFET power switch M1 and the low-side switch is a normally on D-mode GaN semiconductor power switch Q2. The gates of both Q1 and Q2 are directly driven. M1 in series with Q1 provides a high-side switch which is a normally-off device for start-up and fail-safe protection. M1 may also be used for current sensing and overcurrent protection. For example, a control circuit determines an operational mode of M1 responsive to a UVLO signal and a voltage sense signal indicative of an overcurrent event. Examples of single phase and three-phase half-bridge modules and driver circuits are described.
    Type: Grant
    Filed: May 11, 2022
    Date of Patent: February 20, 2024
    Inventor: Di Chen
  • Patent number: 11896827
    Abstract: An electrotherapeutic device for treating a visual disease using microcurrent stimulation is provided. The device includes a signal generator in which a waveform controller digitally controls a waveform signal source so as to generate a waveform in which one or more waveform parameters (e.g., pulse width, pulse period, pulse position, pulse coding, peak current amplitude, duty cycle, and/or pulse shape) are varied in accordance with a protocol for treating a visual disease. The device also includes an applicator connected to the signal generator and configured to apply the waveform to at least one stimulation point within an eye region.
    Type: Grant
    Filed: March 16, 2017
    Date of Patent: February 13, 2024
    Assignee: MacuMira Medical Devices Inc.
    Inventor: George D. O'Clock
  • Patent number: 11901815
    Abstract: Disclosed are a voltage compensation method and device of a voltage reducing circuit. The voltage compensation method includes: determining a capacitance value of each capacitor and a resistance value of each resistor in a voltage compensation circuit according to a voltage compensation expectation of the voltage reducing circuit; determining each zero and each pole of a transfer function of the voltage compensation circuit according to the capacitance value of each capacitor and the resistance value of each resistor; setting each capacitor and the resistor not in direct connection with the capacitor in series to have a positive temperature coefficient, and setting the resistor in direct connection with the capacitor in series to have a negative temperature coefficient; and compensating voltage for the voltage reducing circuit by using the voltage compensation circuit to output a rated voltage.
    Type: Grant
    Filed: July 31, 2019
    Date of Patent: February 13, 2024
    Assignee: INSPUR SU ZHOU INTELLIGENT TECHNOLOGY CO., LTD.
    Inventors: Yingchao Li, Dali Li
  • Patent number: 11863075
    Abstract: A multi-phase boost converting apparatus includes a multi-phase boost converter and a passive lossless snubber, wherein the passive lossless snubber includes a first resonant capacitor, a second resonant capacitor, an output-end first unidirectional conduction component, an output-end second unidirectional conduction component, an input-end first unidirectional conduction component, an input-end second unidirectional conduction component and a resonant inductor.
    Type: Grant
    Filed: January 11, 2022
    Date of Patent: January 2, 2024
    Assignee: ASIAN POWER DEVICES INC.
    Inventor: Tsung-Liang Hung
  • Patent number: 11860218
    Abstract: An electronic monitoring circuit for detecting a variation in the power or current absorbed by an electronic circuit under test is disclosed. The circuit includes an input terminal adapted to receive a pulse-width modulation control signal, a resistor having a first terminal connected to the input terminal, and a capacitor having a first terminal connected to a second terminal of the resistor. The output terminal is adapted to generate an output signal as a function of the value of the voltage drop at the ends of the capacitor, said output signal being representative of a variation of the pulse width of the pulse-width modulation control signal. The variation of the pulse width is a function of the power or current absorbed by the electronic circuit under test.
    Type: Grant
    Filed: July 24, 2020
    Date of Patent: January 2, 2024
    Assignee: ELDOR CORPORATION S.P.A.
    Inventors: Ciro Scaramucci, Giovanni Silvestri, Pasquale Forte
  • Patent number: 11818815
    Abstract: A method of controlling a switching converter having a plurality of interleaved parallel branches, can include controlling conduction phases of power switches of the plurality of interleaved parallel branches to be overlapped when a load changes from a light load to a heavy load, in order to improve dynamic response performance of the switching converter. A control circuit for a switching converter with a plurality of interleaved parallel branches, can control conduction phases of power switches of the interleaved parallel branches to be overlapped when a load changes from a light load to a heavy load, in order to improve dynamic response performance of the switching converter.
    Type: Grant
    Filed: September 14, 2021
    Date of Patent: November 14, 2023
    Assignee: Silergy Semiconductor Technology (Hangzhou) LTD
    Inventors: Fusong Huang, Kailang Hang
  • Patent number: 11803203
    Abstract: An apparatus for measuring a current being supplied to a load includes a first pass transistor to couple a first sense resistance to the load when the first pass transistor is enabled and a second pass transistor to couple a second sense resistance to the load when the second pass transistor is enabled. An error amplifier determines a difference between a voltage being supplied to the load and a reference voltage and to supplies an error amplifier output signal according to the difference. A switch couples the error amplifier output signal to a gate of the first pass transistor or to a gate of the second pass transistor. Control logic controls the switch according to a value of the current being supplied to the load. The voltage being supplied to the load is controlled using the error amplifier output signal that is selectively coupled to the gate of the first pass transistor or the gate of the second pass transistor.
    Type: Grant
    Filed: September 13, 2021
    Date of Patent: October 31, 2023
    Assignee: Silicon Laboratories Inc.
    Inventors: Franco Maggi, Peter Pap
  • Patent number: 11791662
    Abstract: A wireless power receiver according to some embodiments includes an integrated circuit which includes: a full-bridge rectifier coupled to receive wireless power from a receiver coil; a wireless receiver controller coupled to control the full-bridge rectifier; a pass device coupled between the full-bridge rectifier and an output; and a configurable controller coupled to the switch, the configurable controller configurable as a LDO controller or a Buck controller. A second controller can be coupled to the configurable controller that interfaces to an external Buck low-side transistor if the configurable controller is the Buck controller and provides GPIO if the configurable controller is the LDO controller. A third controller can be coupled to the full-bridge rectifier, which operates as a full-bridge sync rectifier driver multiplexer to select an external driver for one or more of the rectifier transistors. Other features are also provided.
    Type: Grant
    Filed: September 27, 2022
    Date of Patent: October 17, 2023
    Assignee: Integrated Device Technology, Inc.
    Inventors: Rui Liu, Jiangjian Huang
  • Patent number: 11750100
    Abstract: A controller for a multiphase switching converter has a set generation circuit, a frequency divider, and a plurality of sub control circuits. The set generation circuit provides a set signal based on an output voltage and a total current flowing through the plurality of switching circuits. The frequency divider provides a plurality of frequency division signals based on the set signal. The plurality of sub control circuits provides a plurality of switching control signals to control the plurality of switching circuits respectively. Such that when the total current is larger than a current reference, one of the plurality of switching circuits maintains off temporarily, until the total current is less than the current reference, then the one of the plurality of switching circuits are turned on based on the output voltage and a voltage reference.
    Type: Grant
    Filed: December 20, 2021
    Date of Patent: September 5, 2023
    Assignee: Chengdu Monolithic Power Systems Co., Ltd.
    Inventors: Lijie Jiang, Binci Xu, Chao Liu
  • Patent number: 11742757
    Abstract: A power supply system includes a voltage application source, and a switched mode power supply having an output coupled to the voltage application source through a first path and through a second path different from the first path. A first node is coupled to the output of the switched mode power supply, the switched mode power supply being configured to couple the first node to the voltage application source through the first path in a first operating mode and through the second path in a different second operating mode. A digital regulator is coupled to the first node. A digital circuit is coupled to an output of the digital regulator. An analog regulator is coupled to the first node and an analog circuit coupled to an output of the analog regulator.
    Type: Grant
    Filed: February 9, 2022
    Date of Patent: August 29, 2023
    Assignees: STMicroelectronics (Alps) SAS, STMicroelectronics S.r.l.
    Inventors: Francois Druilhe, Patrik Arno, Alessandro Inglese, Michele Alessandro Carrano
  • Patent number: 11736004
    Abstract: A method for reducing EMI for a frequency-modulated DC-DC converter includes pre-regulating an input voltage of the frequency-modulated DC-DC converter, so that the frequency-modulated DC-DC converter changes an operating frequency of the frequency-modulated DC-DC converter to stabilize an output voltage of the frequency-modulated DC-DC converter, so as to achieve a desired frequency extension.
    Type: Grant
    Filed: May 28, 2021
    Date of Patent: August 22, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Chuipong Liu, Hungpiu Poon
  • Patent number: 11736017
    Abstract: A power converter circuit that includes multiple phase circuits may employ coupled inductors to generate a particular voltage level on a regulated power supply node. Based on a comparison of a voltage level of the regulated power supply node and a reference voltage, the power converter circuit may initiate an active period, during which the phase circuits source respective currents to the regulated power supply node via corresponding coils included in the coupled inductor. After a time period has elapsed following an initiation of the active period, the operation of the phase circuits is adjusted so that the respective currents flowing in the coils of the coupled inductor are out of phase.
    Type: Grant
    Filed: September 22, 2021
    Date of Patent: August 22, 2023
    Assignee: Apple Inc.
    Inventors: Chongli Cai, Hao Zhou, Jay B. Fletcher
  • Patent number: 11736008
    Abstract: The present invention relates to a multi-power supply device capable of controlling a sequence, and more particularly, to a multi-power supply device capable of controlling a sequence for a circuit in which two or more power sources are supplied from the outside and when one of the power sources has a problem so that the power is not supplied to an internal block, an internal voltage is stably supplied from another power source.
    Type: Grant
    Filed: February 16, 2023
    Date of Patent: August 22, 2023
    Assignee: Power LSI Co. ltd
    Inventors: Won Tae Lee, Won Ji Lee, Chang Sik Shin, Chuen Sik Jung, Gyu Won Lee
  • Patent number: 11714439
    Abstract: A supply circuit has a first and a second terminal for connecting an accumulator, a third and a fourth terminal for connecting at least one battery, and an output terminal. A voltage regulator is connected to the first terminal on the input side and to a fifth terminal on the output side. An undervoltage detection circuit is adapted to activate the voltage regulator when a voltage at the first terminal is greater than a threshold voltage. A reverse polarity protection device is coupled between the third terminal and the output terminal. A blocking diode is coupled between the fifth terminal and the output terminal.
    Type: Grant
    Filed: March 11, 2022
    Date of Patent: August 1, 2023
    Assignee: charismaTec OG
    Inventors: Dieter Lutzmayr, Sandra Slavinec
  • Patent number: 11695338
    Abstract: Disclosed is a semiconductor integrated circuit for a regulator for forming a low current consumption type DC power supply device. The semiconductor integrated circuit includes an output transistor, a control circuit, an operation control transistor and a soft start circuit. The output transistor is connected between an output terminal and a voltage input terminal to which a DC voltage is input. The control circuit controls the output transistor according to a feedback voltage of an output. The operation control transistor controls an operation state of the control circuit. The soft start circuit gradually changes a voltage applied to a control terminal of the operation control transistor and delays activation of the control circuit at a time of applying a power supply voltage to the voltage input terminal.
    Type: Grant
    Filed: August 12, 2021
    Date of Patent: July 4, 2023
    Assignee: MITSUMI ELECTRIC CO., LTD.
    Inventors: Yoichi Takano, Chuhei Terada
  • Patent number: 11687104
    Abstract: In certain aspects, a system includes an amplifying circuit having an input and an output, wherein the input of the amplifying circuit is coupled to a gate of a pass transistor of a low dropout (LDO) regulator. The system also includes a metal-oxide-semiconductor (MOS) capacitor coupled between the output of the amplifying circuit and the input of the amplifying circuit.
    Type: Grant
    Filed: March 25, 2021
    Date of Patent: June 27, 2023
    Assignee: QUALCOMM INCORPORATED
    Inventors: Kuan Chuang Koay, Hua Guan, Jize Jiang
  • Patent number: 11682900
    Abstract: A system includes a first power stage circuit having a first PWM input, a first voltage input and a first power output. The first power stage circuit is configured to provide a first current at the first power output responsive to a PWM signal at the first PWM input, and configured to receive a voltage at the first voltage input. The system includes a second power stage circuit having a second PWM input, a second voltage input and a second power output. The second voltage input is coupled to the first voltage input, and the second power stage circuit is configured to provide a second current at the second power output responsive to the PWM signal at the second PWM input. The second power stage circuit is configured to receive the voltage at the second voltage input, the voltage representing an average of the first current and the second current.
    Type: Grant
    Filed: June 4, 2021
    Date of Patent: June 20, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Rajesh Venugopal, Matthew John Ascher Schurmann, Preetam Charan Anand Tadeparthy, Rengang Chen
  • Patent number: 11682974
    Abstract: A multi-phase current mode hysteretic modulator implements phase current balancing among the multiple power stages using slope-compensated emulated phase current signals and individual phase control signal for each phase. In some embodiments, the slope-compensated emulated phase current signals of all the phases are averaged and compared to the slope-compensated emulated phase current signal of each phase to generate a phase current balance control signal for each phase. The phase current balance control signal is combined with the voltage control loop error signal to generate a phase control signal for each phase where the phase control signals are generated for the multiple phases to control the phase current delivered by each power stage.
    Type: Grant
    Filed: September 22, 2021
    Date of Patent: June 20, 2023
    Assignee: Alpha and Omega Semiconductor International LP
    Inventors: Rhys S. A. Philbrick, Steven P. Laur, Nicholas I. Archibald
  • Patent number: 11678416
    Abstract: A load control device for regulating an average magnitude of a load current conducted through an electrical load may operate in different modes. The load control device may comprise a control circuit configured to activate an inverter circuit during an active state period and deactivate the inverter circuit during an inactive state period. In one mode, the control circuit may adjust the average magnitude of the load current by adjusting the inactive state period while keeping the active state period constant. In another mode, the control circuit may adjust the average magnitude of the load current by adjusting the active state period while keeping the inactive state period constant. In yet another mode, the control circuit may keep a duty cycle of the inverter circuit constant and regulate the average magnitude of the load current by adjusting a target load current conducted through the electrical load.
    Type: Grant
    Filed: March 28, 2022
    Date of Patent: June 13, 2023
    Assignee: Lutron Technology Company LLC
    Inventor: Steven J. Kober
  • Patent number: 11671003
    Abstract: A multi-phase control circuit and a temperature balance control method thereof The temperature balance control method of the multi-phase control circuit includes the steps of: acquiring a first temperature signal reflecting a representative temperature among a plurality of power stages, then acquiring a plurality of second temperature signals reflecting a respective temperature of each of the plurality of power stages; and adjusting a pulse width and/or frequency of a pulse width modulation signal of at least one of the plurality of power stages according to a comparison result between the first temperature signal and the second temperature signal so as to balance the temperatures of the plurality of power stages.
    Type: Grant
    Filed: November 8, 2021
    Date of Patent: June 6, 2023
    Assignee: SHANGHAI BRIGHT POWER SEMICONDUCTOR CO., LTD.
    Inventors: Li-Qiang Hu, Shun-Gen Sun
  • Patent number: 11664727
    Abstract: An apparatus for providing electric power to a load includes a power converter that accepts electric power in a first form and provides electric power in a second form. The power converter comprises a control system, a first stage, and a second stage in series. The first stage accepts electric power in the first form. The control system controls operation of the first and second stage. The first stage is either a switching network or a regulating network. The second stage is a regulating circuit when the first stage is a switching network, and a switching network otherwise.
    Type: Grant
    Filed: May 26, 2020
    Date of Patent: May 30, 2023
    Assignee: pSemi Corporation
    Inventors: David Giuliano, Gregory Szczeszynski
  • Patent number: 11658577
    Abstract: A semiconductor device includes a plurality of voltage regulators arranged in a field programmable array and a power array controller coupled to the plurality of voltage regulators. The power array controller is configured to control the plurality of voltage regulators to output power to a plurality of power rails. Each power rail provides a respective rail current at a respective rail voltage. The power array controller is configured to for each of the plurality of power rails, determine the respective rail current associated with the respective power rail, select a subset of voltage regulators according to at least the respective rail current, and enable the subset of voltage regulators to generate the respective rail voltage and provide the respective rail current collectively.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: May 23, 2023
    Assignee: QUALCOMM Incorporated
    Inventors: Peng Zou, Gang Ren, Syrus Ziai, Curtis Roger McAllister
  • Patent number: 11644880
    Abstract: A method, device, and system for balancing a supply current in a Power Supply Units (PSUs). The system includes a plurality of PSUs connected in parallel to a power bus. The method includes detecting a falling edge in a common Load Share (LS) signal and, in response to detecting the falling edge of the LS signal, enabling a field effect transistor (FET) and starting a timer. Prior to starting the timer, a time trigger is determined for the timer based on a current output level of a power source in the PSU. The method includes outputting a current at the current output level for the duration of the time trigger and, at the time trigger, releasing the FET and resetting the timer. The PSU includes a processor that monitors the LS signal. The LS signal determines a timing for outputting current by the PSU.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: May 9, 2023
    Assignee: Dell Products L.P.
    Inventors: Thomas R. Thibodeau, Haijin Zhang, Cui Xizhi
  • Patent number: 11637493
    Abstract: Provided are electrical circuits and methods for power factor correction. An example method includes receiving, by converter, an input voltage at a fundamental frequency and generating an output voltage; generating, based on the output voltage, a first measurement signal; subtracting a first reference signal from the first measurement signal to obtain a first error signal; generating an adaptive current sense signal, generating a reference voltage based on the input voltage, subtracting the reference voltage from the current sense signal thus generating a second measurement signal to control the current measurement; subtracting the second measurement signal from the input voltage to obtain a difference signal, wherein the difference signal is largely minimized by removing overtones of the fundamental frequency; generating, based on the difference signal, a second error signal; using a sum of the second error signal as a first order correction to the first error signal to regulate the converter.
    Type: Grant
    Filed: January 31, 2022
    Date of Patent: April 25, 2023
    Inventor: Robert S. Wrathall
  • Patent number: 11632048
    Abstract: A voltage regulator includes an output node, a control circuit, and a power stage. The control circuit is configured to receive a power state signal from a load circuit coupled to the output node, and output a control signal based on the power state signal. The power stage includes a plurality of phase circuits coupled to the output node and is configured to enable a phase circuit of the plurality of phase circuits responsive to the control signal.
    Type: Grant
    Filed: February 24, 2020
    Date of Patent: April 18, 2023
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC NANJING COMPANY, LIMITED
    Inventors: Haohua Zhou, Tze-Chiang Huang, Mei Hsu, Yun-Han Lee
  • Patent number: 11611277
    Abstract: A soft-start method for a switching regulator is provided. In the soft-start method, a first gate drive signal for limiting an inrush current is provided, by a control circuit, to a switching circuit in a first soft-start stage. After the control circuit determines that a mode switching condition is satisfied according to an output voltage and an output current, a second drive signal for increasing a rise rate of an output voltage is provided to the switching circuit so that the output voltage increases with a faster rise rate and reaches a predetermined voltage at a second soft-start stage.
    Type: Grant
    Filed: September 30, 2020
    Date of Patent: March 21, 2023
    Assignee: AIROHA TECHNOLOGY CORP.
    Inventor: Kuei-Ju Chiang
  • Patent number: 11606037
    Abstract: A detection circuit for a switching converter, whereby: the detection circuit is coupled in parallel with an output capacitor of the switching converter, and is configured to provide a detection branch coupled in parallel with the output capacitor during a first period of a switching cycle, in order to detect an output voltage of the switching converter; and an output voltage detection signal is generated according to the detected output voltage during a second period of the switching cycle. A switching converter can include the detection circuit and an integrated circuit.
    Type: Grant
    Filed: January 12, 2021
    Date of Patent: March 14, 2023
    Assignee: Silergy Semiconductor Technology (Hangzhou) LTD
    Inventor: Longqi Wang
  • Patent number: 11599182
    Abstract: An information handling system includes a PSU current level combiner, a current level indication splitter, and a load element. The PSU current level combiner receives a PSU current level indication from each of a plurality of PSUs, and provides a system current level indication that indicates a total amount of current supplied by the PSUs. Each PSU current level indication is a current signal and wherein a current level of each PSU current level indication is proportional to the amount of current supplied by the associated PSU. The system current level indication is a current signal. A current level of the system current level indication is proportional to the total amount of current. The system current level indication splitter receives the system current level indication, and provides copies of the system current level indication.
    Type: Grant
    Filed: November 11, 2020
    Date of Patent: March 7, 2023
    Assignee: Dell Products L.P.
    Inventor: John E. Jenne
  • Patent number: 11588404
    Abstract: The disclosure relates to a semiconductor device and a step-down multi-phase DC/DC converter. A DC/DC converter having higher load response performance and efficiency is provided. The step-down multi-phase DC/DC converter includes multiple output-stage circuits, which generate multiple switch voltages in rectangular waves by means of switching an input voltage, and an output voltage is obtained by means of rectifying and smoothing the multiple switch voltages. An error voltage is generated on the basis of a feedback voltage corresponding to the output voltage and a reference voltage, multiple feedback pulsating voltages variant with the multiple switch voltages are generated on the basis of the feedback voltage, and an on timing sequence including multiple on timings is generated according to the generated voltages. The multiple output circuits are switch-driven sequentially according to the on timing sequence, so as to set phase differences for the switch-driving.
    Type: Grant
    Filed: June 14, 2021
    Date of Patent: February 21, 2023
    Assignee: Rohm Co., Ltd.
    Inventor: Osamu Yanagida
  • Patent number: 11581811
    Abstract: A multi-phase parallel converter can include: sampling circuits corresponding to power stage circuits to form a plurality of phases of the multi-phase parallel converter, where each sampling circuit samples an inductor current of a corresponding power stage circuit, and generates a sense signal; a current-sharing circuit that generates a current-sharing control signal according to a superimposed signal that is generated by adding the sense signal to a bias voltage signal; switching control circuits corresponding to the power stage circuits, where each switching control circuit receives the current-sharing control signal, and controls a switching operation of a corresponding power stage circuit; and a bias voltage generator that generates the bias voltage signal to gradually increase/decrease when a selected phase is to be disabled/enabled.
    Type: Grant
    Filed: January 30, 2019
    Date of Patent: February 14, 2023
    Assignee: Silergy Semiconductor Technology (Hangzhou) LTD
    Inventors: Kailang Hang, Liangwei Sun
  • Patent number: 11569748
    Abstract: An interleaved power converter includes a control circuit and multiple phase-shifted subconverters each having at least one power switch. The control circuit is coupled to the subconverters for controlling the power switches to balance currents in the subconverters over multiple periods. The control circuit includes a current compensator configured to determine a first duty cycle multiple times over the multiple periods, generate a PWM control signal having a present value of the first duty cycle for controlling the power switch of one of the subconverters during a period, determine a second duty cycle based on the present value of the first duty cycle and a previous value of the first duty cycle, and generate another PWM control signal having the second duty cycle for controlling the power switch of another one of the subconverters during the period. Other example power converters and control circuits are also disclosed.
    Type: Grant
    Filed: November 17, 2021
    Date of Patent: January 31, 2023
    Assignee: Astec International Limited
    Inventors: Yancy Fontanilla Boncato, Ronnie Bachiller Gozun
  • Patent number: 11552554
    Abstract: Provided are electrical circuits and methods for power factor correction. An example method includes receiving, by converter, an input voltage at a fundamental frequency and generating an output voltage; generating, based on the output voltage, a first measurement signal; subtracting a first reference signal from the first measurement signal to obtain a first error signal; generating an adaptive current sense signal, generating a reference voltage based on the input voltage, subtracting the reference voltage from the current sense signal thus generating a second measurement signal to control the current measurement; subtracting the second measurement signal from the input voltage to obtain a difference signal, wherein the difference signal is largely minimized by removing overtones of the fundamental frequency; generating, based on the difference signal, a second error signal; using a sum of the second error signal as a first order correction to the first error signal to regulate the converter.
    Type: Grant
    Filed: April 22, 2021
    Date of Patent: January 10, 2023
    Inventor: Robert S. Wrathall
  • Patent number: 11515792
    Abstract: The present embodiments relate generally to DC-DC converters and more particularly to a scheme for providing current sharing between parallel converters in a multiphase configuration. In some embodiments, a cycle-by-cycle instant correction to the compensation signal offset is provided based on the current share error between the paralleled converters so as to achieve improved instant current share performance.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: November 29, 2022
    Assignee: Renesas Electronics America Inc.
    Inventors: Xiaodong David Zhan, Prabhjot Singh, Long Robin Yu
  • Patent number: 11462997
    Abstract: A direct-current (DC) converter for a permanent-magnet (PM) alternator for a vehicle, the DC converter including one or more pairs of step-down converters that are electrically in parallel operating at a fundamental switching frequency, wherein the two step-down converters in each pair are arranged to be switched out of phase, and wherein the two step-down converters in each pair are arranged adjacent to each other to mitigate conducted electromagnetic interference (EMI).
    Type: Grant
    Filed: September 2, 2019
    Date of Patent: October 4, 2022
    Assignee: MILSPEC TECHNOLOGIES PTY LTD
    Inventors: Donald Grahame Holmes, Patrick McGoldrick, Andrew McIver, Noel Gordon, Bradley Hewitt
  • Patent number: 11430606
    Abstract: An inductor is disclosed, including a first wire, a non-conductive material, and a shell. The non-conductive material may cover the first wire, with a portion of each end of the first wire uncovered. The shell may include a top portion and a bottom portion and include at least one magnetized layer and at least one gap between the first portion and the second portion. The shell may also surround a portion of the non-conductive material.
    Type: Grant
    Filed: August 24, 2017
    Date of Patent: August 30, 2022
    Assignee: Apple Inc.
    Inventors: David P. Cappabianca, Joseph T. DiBene, II, Shawn Searles, Le Wang, Yizhang Yang, Sean Cian O'Mathuna, Santosh Kulkarni, Paul McCloskey, Zoran Pavlovic, William Lawton, Graeme Maxwell, Joseph O'Brien, Hugh Charles Smiddy
  • Patent number: 11431246
    Abstract: A power converter with an automatic balance mechanism of a flying capacitor is provided. The flying capacitor and a first terminal of an output inductor are connected to a switch circuit. Two terminals of an output capacitor are respectively connected to a second terminal of the output inductor and grounded. Two input terminals of an error amplifier are respectively connected to a node between the output capacitor and the output inductor, and coupled to a reference voltage. The error amplifier outputs an error amplified signal according to a voltage of the node and the reference voltage. A comparator circuit receives a ramp signal. A slope of the ramp signal is proportional to a voltage of the flying capacitor. The comparator circuit compares the ramp signal with the error amplified signal to output a comparison signal. The driving circuit drives the switch circuit according to the comparison signal.
    Type: Grant
    Filed: September 10, 2020
    Date of Patent: August 30, 2022
    Assignee: ANPEC ELECTRONICS CORPORATION
    Inventor: Fu-Chuan Chen
  • Patent number: 11428719
    Abstract: A measurement circuit comprises an electronic circuit, multiple measurement channels, and a combining circuit. The electronic circuit includes a first terminal, a second terminal, and a non-resistive circuit element. Each of the multiple measurement channels includes a differential input connected to the electronic circuit. The differential inputs of the multiple measurement channels are connected in series and include a differential input coupled to the non-resistive circuit element. One input of a differential input of a first measurement channel of the multiple measurement channels is connected to the first terminal of the electronic circuit and one input of a differential input of a second measurement channel of the multiple measurement channels is connected to the second terminal of the electronic circuit. The combining circuit receives multiple outputs from the multiple measurement channels and produce a composite output signal.
    Type: Grant
    Filed: January 10, 2020
    Date of Patent: August 30, 2022
    Assignee: Analog Devices International Unlimited Company
    Inventors: Joseph L. Sousa, Micah Galletta O'Halloran, Andrew Joseph Thomas
  • Patent number: 11409312
    Abstract: One or more embodiments relate to a multi-phase voltage regulator with AVP or droop configured to implement a non-linear load line. According to certain aspects, the non-linear load line can have a non-linear or zero slope in a first current/voltage region and a constant non-zero slope in second current/voltage region. In embodiments, the non-linear or zero slope region can specify that for any value of output current in that region, the output voltage will be the same predetermined value. The non-zero slope region can specify that for any value of the output current in that region, output current will be multiplied by a constant non-zero droop resistance value.
    Type: Grant
    Filed: April 23, 2020
    Date of Patent: August 9, 2022
    Assignee: RENESAS ELECTRONICS AMERICA INC.
    Inventors: Travis Guthrie, Jim Toker, Shea Petricek
  • Patent number: 11402414
    Abstract: A circuit and method for current sensing in DC-DC converters having coupled inductors is disclosed. A DC-DC converter includes a first and second inductors coupled to first and second switching nodes, respectively. The DC-DC converter further includes a current sensing circuit. The current sensing circuit includes a first current sensing circuit coupled to the first switching node and having a first sense node, and further includes a second sensing circuit coupled to the second switching node and having a second sense node. The circuit further includes a first capacitor coupled between the first sensing circuit and the second sensing circuit.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: August 2, 2022
    Assignee: Apple Inc.
    Inventor: Jonathan F. Bolus
  • Patent number: 11387734
    Abstract: Aspects of the disclosure provide for a circuit. In at least some examples, the circuit includes a high-side power transistor, a low-side power transistor, a first transistor, a second transistor, and a third transistor. The high-side transistor is adapted to couple between an input node and a switch node. The low-side transistor is coupled between the switch node and ground. The first transistor is adapted to couple between a first node and the switch node. The second transistor is coupled between the first node and an output node. The third transistor is coupled between the first node and ground.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: July 12, 2022
    Assignee: Texas Instruments Incorporated
    Inventors: Riazdeen Buhari, Roy Alan Hastings, Nghia Trong Tang
  • Patent number: 11381087
    Abstract: A smart grid system includes a current sensor, and plural power conversion devices coupled to an AC grid. The current sensor measures a total current flowed through the AC grid, thereby providing a measured current value. The power conversion devices include a master power conversion device and plural slave power conversion devices. The master power conversion device receives the measured current value, thereby controlling an output power of the master power conversion device and providing a first duty cycle signal according to the measured current value. A first one of the slave power conversion devices which is coupled to the master power conversion device receive the first duty cycle signal, thereby controlling an output power of the first one of the slave power conversion devices according to the first duty cycle signal. The master power conversion device and the slave power conversion devices are communicated via a daisy chain connection.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: July 5, 2022
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Sin-Hong Chen, Tsung-Han Tsai, Xin-Hung Lin
  • Patent number: 11374497
    Abstract: An apparatus comprises a plurality of voltage sources, one or more processors embedded with the plurality of voltage sources, and memory storing processor executable instructions that, when executed by the one or more processors, cause the apparatus to modify duty cycles of the voltage sources, and to modify timing for each phase of a multiphase cycle. In some cases, the apparatus: transfers, for each phase of the multiphase cycle, power from a different source of a plurality of sources to a load; determines, for each phase of the multiphase cycle, an input voltage associated with the transferred power, an output voltage associated with the transferred power, and current from the source associated with the transferred power; determines a duty cycle associated with the source; modifies duty cycles of the voltage sources; and modifies timing for each phase of the multiphase cycle.
    Type: Grant
    Filed: June 28, 2021
    Date of Patent: June 28, 2022
    Assignee: UPLIFT SOLAR CORP.
    Inventor: Eric Dupont Becnel
  • Patent number: 11362590
    Abstract: One or more embodiments relate to a current limit mode control circuit for a buck-boost converter which can provide a stable switching of the converter by operating the converter in a current limit mode during an overcurrent condition, performing fewer state transitions while in the current limit mode, and/or by clamping (reducing to a lower value) the output of an error amplifier in the current limit mode for controlling a pulse width modulation (PWM) signal that drives the switching transistors.
    Type: Grant
    Filed: February 7, 2020
    Date of Patent: June 14, 2022
    Assignee: RENESAS ELECTRONICS AMERICA INC.
    Inventors: Michael Jason Houston, Allan Warrington
  • Patent number: 11342738
    Abstract: One example includes a power generator protection system. The system includes a circuit breaker configured, when triggered, to provide an open circuit in a power line configured to conduct a current between a power grid point-of-interconnect (POI) and a power generator system. The system also includes a programmable controller configured to monitor the current and to generate a dynamic current threshold based on the current. The programmable controller can further be configured to compare the current with the dynamic current threshold and to trigger the circuit breaker based on a difference of the current relative to the dynamic current threshold to set an arc flash incident energy level of the power generator system at or below a predetermined safety level.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: May 24, 2022
    Assignee: FLORIDA POWER & LIGHT COMPANY
    Inventors: Jon D. Lawrence, Joseph M. Arthur
  • Patent number: 11329569
    Abstract: A power conversion system includes a power conversion circuit and a start-up circuit. The power conversion circuit includes an output capacitor, a first switching unit, a second switching unit, a flying capacitor and a magnetic element. The second switching unit includes two switch groups. The flying capacitor is connected between a first terminal and a second terminal of the power conversion circuit. The magnetic element includes two first windings that are electromagnetically coupled with each other. A first one of the two first windings is electrically connected between one switch group and the second terminal of the power conversion circuit. A second one of the two first windings is electrically connected between the other switch group and the second terminal of the power conversion circuit. The start-up circuit includes a third winding and an inductor. The third winding is electromagnetically coupled with the first windings.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: May 10, 2022
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Da Jin, Yahong Xiong, Qinghua Su
  • Patent number: 11323019
    Abstract: A switched mode power supply converter comprises a circuit pulse matching circuit configured to negate output voltage disturbance or noise during switching operation of a power conversion. The current pulse matching circuit input is driven by, or from, a power converter switch node of the switched mode power supply converter. The current pulse matching circuit comprises a rate-of-voltage change detection circuit driven by the power converter switch node.
    Type: Grant
    Filed: December 17, 2018
    Date of Patent: May 3, 2022
    Assignee: UNIVERSITY OF LIMERICK
    Inventors: Eamon O'Malley, Patrick Meehan, Karl Rinne
  • Patent number: 11295691
    Abstract: A current limiting circuit, comprising a switching circuit and a voltage stabilizing circuit. The switching circuit is separately connected to a voltage input terminal VIN and a voltage output terminal VOUT, and used for transmitting an input voltage to the voltage output terminal VOUT from the voltage input terminal VIN; and the voltage stabilizing circuit is separately connected to the switching circuit, the voltage input terminal VIN, and the voltage output terminal VOUT, used for controlling an output current to reduce together with the switching circuit when the output current of the voltage output terminal VOUT is increased and the output current is less than a preset output current, and further used for controlling the output current to be zero together with the switching circuit when the output current of the voltage output terminal VOUT is greater than or equal to the preset output current.
    Type: Grant
    Filed: January 10, 2019
    Date of Patent: April 5, 2022
    Assignee: HKC CORPORATION LIMITED
    Inventor: Liang Zhang
  • Patent number: 11283433
    Abstract: A method for the PWM actuation of more than one HV component for converting the power required by the HV components, in which each HV component is actuated by means of an individual PWM control circuit, and to a device for carrying out the method, wherein individual PWM control circuits are provided for the PWM actuation of 2 . . . n HV components, and wherein means are provided for asymmetrically splitting the phase shifts of the individual PWM actuation provided by the PWM circuitry.
    Type: Grant
    Filed: November 13, 2020
    Date of Patent: March 22, 2022
    Assignee: WEBASTO SE
    Inventors: Paul Leinsle, J├╝rgen Scherschmidt, Markus Prepens
  • Patent number: 11264833
    Abstract: A device may include a rectifier circuit providing a rectified DC signal, a rechargeable energy-storage element, and a power-management integrated circuit (PMIC). The PMIC may include a charging circuit for the rechargeable energy-storage element; a current-sensing circuit that measures a current provided by the rectified DC signal; a programmable current limit; a voltage-sensing circuit that measures a voltage on the rechargeable energy-storage element; and a controller that regulates the current provided to a DC output of the PMIC. the DC output of the PMIC may be regulated based at least in part on the current provided by the rectified DC signal; the programmable current limit; and the voltage on the rechargeable energy-storage element. The DC output of the PMIC may provide energy to a plurality of other energy-consuming subsystems on the device and to the charging circuit for the rechargeable energy-storage element.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: March 1, 2022
    Assignee: Google LLC
    Inventors: Daniel Adam Warren, Eric Marschalkowski, William Alan Saperstein
  • Patent number: 11245333
    Abstract: Provided is a power conversion device using a magnetic coupling reactor and being capable of reducing the number of parts and reducing the size of not only the magnetic coupling reactor but also an input capacitor. The magnetic coupling reactor is connected between a semiconductor switch element group, which executes power conversion, and the input capacitor. The coupling factor of two reactors in the magnetic coupling reactor is kept to a value equal to or less than a set value, for example, 0.8. The set value takes into consideration an area in which a ripple current of the input capacitor increases rapidly in response to a rise in coupling factor. The ripple current flowing in the input capacitor is reduced by thus setting the coupling factor.
    Type: Grant
    Filed: March 4, 2016
    Date of Patent: February 8, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventor: Mao Kawamura