Abstract: Methods of operating a serial data bus divide series of data bits into sequences of one or more bits and encode the sequences as N-level symbols, which are then transmitted at multiple discrete voltage levels. These methods may be utilized to communicate over serial data lines to improve bandwidth and reduce crosstalk and other sources of noise.

Abstract: A load control device for regulating an average magnitude of a load current conducted through an electrical load may operate in different modes. The load control device may comprise a control circuit configured to activate an inverter circuit during an active state period and deactivate the inverter circuit during an inactive state period. In one mode, the control circuit may adjust the average magnitude of the load current by adjusting the inactive state period while keeping the active state period constant. In another mode, the control circuit may adjust the average magnitude of the load current by adjusting the active state period while keeping the inactive state period constant. In yet another mode, the control circuit may keep a duty cycle of the inverter circuit constant and regulate the average magnitude of the load current by adjusting a target load current conducted through the electrical load.

Abstract: A voltage regulator includes power stages and a controller. The power stages are configured to provide power to a load in response to a pulse-width modulated (PWM) signal and to provide a body braking to the load in response to a body braking signal. The body braking is provided via a body diode of the power stage. The controller is configured to provide the PWM signals to a first power stage and a second power stage based upon a power demand of the load, to provide body braking signals to the first power stage and the second power stage in response to an over-voltage condition on the load, and to suspend the first body braking signal to the first power stage and maintain the second body braking signal to the second power stage, in response to an over-temperature condition on the first power stage.

Abstract: The present invention proposes a hybrid converter branch operating mode for a Modular Multilevel power Converter MMC with MMC cells in distinct subsets operating according to a “pulse blocked” cell operation mode with DC cell voltage increase or according to a “bypass” cell operation mode without DC cell voltage increase. Repeated cell subset assignment and corresponding alternation of cell operating mode allows to reduce or at least manage a mean deviation of the cell capacitor DC voltages of the converter cells. The invention also reduces no-load losses of the MMC in standby mode and a charging voltage in an MMC charging mode.

Abstract: An apparatus for determining the occurrence of a leakage current between a series connected electrochemical battery cells, comprising: a first cell connection terminal for connection to a first cell's first terminal via first filter circuitry; a second cell connection terminal for connection, via second filter circuitry, to a connection between the first cell's second terminal and a second cell's first terminal, the first and second cell adjacent in the series arrangement; a first cell balancing terminal for connection to the first cell's first terminal bypassing the first filter circuitry; a second cell balancing terminal for connection to the connection between the first cell's second terminal and the second cell's first cell terminal; balancing circuitry for providing a connection between the cell balancing terminals; the apparatus configured to provide for identification of a leakage current based at least on a voltage between the cell connection terminals and the cell balancing terminals.

Abstract: An apparatus includes first and second power converter stages, each stage having a primary side and a secondary side. The primary side of the first stage includes a switch T1A coupled to a voltage source and a switch T3A coupled to the switch T1A. The primary side of the second stage includes a switch T2A coupled to the switch T3A and a switch T4A coupled to the switch T3A and to the voltage source. The apparatus includes a control circuit to control an on/off time of the switches. The control circuit includes four gate driver controllers to control the on/off time of the switches and a current sharing control section to increase or decrease the on time of a switch based on a comparison of a current through one of multiple output inductors to an average current through the multiple output inductors.

Abstract: Some embodiments include apparatuses and methods of using such apparatuses. One of the apparatuses includes a control circuitry to generate error information based on a value of the feedback voltage generated from an output voltage, generate output information to control a power switching unit based on the error information provided to a forward path in the control circuitry, and adjust a gain of the forward path based on a gain factor computed based at least in part on a first value of the output information in order to cause the output information to have a second value. The control circuitry also computes a value of correction information when the output voltage is within a target value range, and adjusts the control information, based on the correction information, when the output voltage is outside the target value range.

Abstract: A method for monitoring capacitance of DC bus capacitor of a power electronic converter is provided, wherein the power electronic converter includes at least one AC/DC conversion circuit and the DC bus capacitor, a power input/output interface of the AC/DC conversion circuit including a first terminal and a second terminal. The first terminal is connected to an AC grid with a frequency of f, the second terminal is connected to the DC bus capacitor, f is any positive real number, and the method includes: measuring a pulsating power with a frequency of 2f flowing through the DC bus capacitor and a voltage on the DC bus capacitor; and calculating the capacitance of the DC bus capacitor based on the pulsating power and the voltage on the DC bus capacitor. An apparatus for monitoring the capacitance of the DC bus capacitor is provided correspondingly.

Abstract: Linear voltage regulators and a method for low-dropout LDO regulators are presented. Specifically, LDO regulators with circuits for noise reduction are discussed. A linear voltage regulator has a first noise reduction filter, an error amplifier circuit, and a pass device. The pass device may be coupled between an input and output terminal of the regulator. The error amplifier circuit generates a control signal for controlling the pass device based on a filtered reference signal and an output voltage at the output terminal of the regulator. The first noise reduction filter generates the filtered reference signal based on a reference voltage of a reference voltage source by reducing noise originating from the reference voltage source or noise generated by one or more passive components coupled between the reference voltage source and the first noise reduction filter.

Abstract: A DC-DC power converter, a control component of a DC-DC power converter, and a method of controlling a buck DC-DC power converter are provided. The method includes receiving at least one of a measured load current and a measured input voltage. The measured load current is a measurement of current that flows from the buck inductor of a physical component of the buck DC-DC power converter. The measured input voltage is a measurement of the DC link input voltage measured across a DC link of the physical component of the buck DC-DC power converter. The method further includes generating a control signal to control a pulse width modulator (PWM), wherein the control signal is based on at least one of the measured load current and the measured input voltage. The PWM is configured to control at least one switch that is coupled to the buck inductor to allow the buck inductor to operate on a current flowing from the DC link only when the at least one switch is turned ON.

Abstract: A phase-redundant voltage regulator apparatus includes groups of regulator phases, each having a multi-phase controller (MPC) connected to each regulator phase. The MPC transfers, to control logic, phase fault signals and a shared current (ISHARE) phase control signal received from each dedicated regulator phase of a phase group. Spare regulator phases include output ORing devices to limit current flow into spare regulator phase outputs. Output switching devices are configured to electrically couple spare regulator phase outputs to a common regulator output. Control logic is connected to the phase groups MPC and asserts phase enable signals to, transfers ISHARE phase control signals to, and receives phase fault signals from the spare regulator phases. The control logic electrically interconnects a spare regulator phase to a phase group including a failed regulator phase in response to receiving a phase fault signal from an MPC.

Abstract: Methods of operating a serial data bus generate two-level bridge symbols to insert between four-level symbols on one or more data lanes of the serial data bus, to reduce voltage deltas on the one or more data lanes during data transmission on the serial data bus.

Abstract: Systems and methods for individual phase temperature monitoring and balance control in a multi-phase voltage regulator may include a plurality of smart power stages including a first smart power stage and a second smart power stage and a voltage regulator controller. The voltage regulator controller may send a first control signal to the first smart power stage to enable the first smart power stage to send a first temperature of the first smart power stage to the voltage regulator controller during a first phase of a switching cycle. The voltage regulator controller may also determine that the first temperature received by the voltage regulator controller corresponds to the first smart power stage based on the first control signal. The voltage regulator controller may further send a second control signal to the second smart power stage to enable the second smart power stage to send a second temperature to the voltage regulator controller during a second phase.

Abstract: A method and apparatus for a power converter assembly detects an over-current, latches off a low-side switch if an over-current is detected, holds the low-side switch latched off until a PWM controller provides a predetermined minimum pulse to the latch (for the duration of the over-current), and unlatches the low-side switch if a PWM controller provides a predetermined minimum pulse to the latch. A power converter assembly includes a PWM controller coupled to the main switch, the PWM controller configured to control the main switch according to a duty cycle. A latch is coupled with a secondary switch and configured to selectively turn off the secondary switch. The PWM controller is configured to provide a PWM control signal to the latch, and the control signal is configured to reset the latch to allow the secondary switch to turn on only when the PWM begins operating with a minimum pulse width.

Abstract: An electronic circuit is disclosed. The electronic circuit includes a distributed power switch. In some embodiments, the electronic circuit also includes one or more of a distributed gate driver, a distributed gate pulldown device, a distributed diode, and a low resistance gate and/or source connection structure. An electronic component comprising the circuit, and methods of manufacturing the circuit are also disclosed.

Abstract: A device for averaging a sensed current includes a sampling circuit that samples at least two sampling points of each cycle of a front-end alternating current (AC) sensed signal. The two sampling points is substantially symmetrical with respect to a midpoint of each respective cycle of the front-end AC sensed signal. The device also includes a timing circuit that controls a timing of the sampling circuit to sample the front-end AC sensed signal on the at least two sampling points based on a timing signal generated by the timing circuit. The device further includes an averaging circuit that averages the two sampling points for a given cycle of the front-end AC sensed signal to produce an average sensed current.

Abstract: In an approach for controlling voltage, a computer obtains a magnitude of a current of a processing unit. The computer determines an optimized magnitude of a voltage based on the obtained magnitude of the current. The computer generates an updating instruction based on the determined optimized magnitude of the voltage. The computer supplies the generated updating instruction to the processing unit.

Abstract: A circuit for a multi-phase power regulator including a power stage with a first phase and a second phase, the circuit including phase management circuitry coupled to the first phase and the second phase to control the first phase and the second phase, a first comparator coupled to an output of the multi-phase power regulator to compare a value of the output of the multi-phase power regulator to a first threshold value to produce a first comparison result, and phase shedding circuitry coupled to the first comparator and the phase management circuitry to control the phase management circuitry to activate or deactivate the second phase based at least partially on the first comparison result.

Abstract: A method for discontinuous conduction mode operation of a multi-phase DC-to-DC converter includes (a) forward biasing a first inductor being magnetically coupled to a second inductor, (b) reverse biasing the first inductor after forward biasing the first inductor, (c) while reverse biasing the first inductor and before magnitude of current through the first inductor falls to zero, forward biasing the second inductor.

Abstract: An LED drive circuit includes a controller, generating a switching signal to switch a magnetic device that receives an input voltage derived from an input of the LED drive circuit, for generating an output current to drive at least a LED. The controller includes an input circuit receiving a programmable signal correlated to the input of the LED drive circuit to generate a programmable current, the programmable current modulating a current input signal correlated to a switching current of the magnetic device to form a modulated current input signal, and a comparison circuit comparing a signal sourced from an oscillator and a voltage potential generated in response to the modulated current input signal for generating a current control signal. The switching signal is controlled in response to the current control signal for regulating the output current, and a level of the output current is correlated to the current control signal.

Abstract: A phase-redundant voltage regulator can include multiple regulator phases connected in parallel between a common regulator input and a common regulator output. Each regulator phase includes a voltage regulator that receives an input voltage and drives a respective output voltage. The voltage regulator also includes a plurality of linear regulators, each having a linear ORing device electrically connected between the regulator output of a respective regulator and an output of the linear regulator. The voltage regulator also includes an amplifier having inputs electrically connected to a remote voltage sense input and to a reference voltage input. An output of the voltage regulator is electrically connected to an input of the linear ORing device. The amplifier controls the linear ORing device to drive a voltage on the output of the linear regulator equivalent to a voltage on the reference voltage input.

Abstract: Embodiments described herein concern operating a peak-delivered-power (PDP) controller. Operating a PDP includes calculating the new power output value from the output voltage value and the output current value, determining whether the new power output value is greater than the previous power output value to determine whether the voltage regulator is outputting a maximum power output, based on a determination that the new power output value is greater than the previous power output value, providing an instruction to a duty generator to increase a duty cycle of the voltage regulator, based on a determination that the new power output value is not greater than the previous power output value, providing an instruction to the duty generator to decrease the duty cycle of the voltage regulator, and replacing the previous power output value with the new power output value.

Abstract: A system, power supplies, controller and method for enhanced phase current sharing are disclosed. For example, a power supply for enhanced phase current sharing is disclosed, which includes a plurality of power modules, a communication bus coupled to an input of each power module of the plurality power modules, and an output voltage node coupled to a first side of an inductor of each power module of the plurality of power modules, wherein each power module of the plurality of power modules includes a digital controller coupled to the input of the power module, and an RC circuit enabled to generate a feedback signal, coupled to a second side of the inductor and the output voltage node. In some implementations, the power supply is at least part of a power management integrated circuit (PMIC) or at least part of a power supply formed on a semiconductor IC, wafer, chip or die.

Abstract: According to example configurations herein, a controller is operated in a control mode (such as a high-speed control mode) in which the controller controls multiple phases in the power supply to produce an output voltage. The output voltage produced by the controller supplies current to power a dynamic load. While in the (high-speed current balance) control mode, the controller: i) produces, for each of the multiple phases, a respective current value representative of an estimated amount of current supplied by that phase to the dynamic load; and ii) modifies an order of activating the phases based on magnitudes of respective estimated current values produced for the multiple phases.

Abstract: A system that includes a regulator unit is disclosed. The regulator unit includes first and second phase units whose outputs are coupled to through first and second coupled inductors, respectively, to a power supply node of a circuit block. The first phase unit may be configured to discharge, for a first period of time, the power supply node through the first inductor in response to determining a sense current is greater than a demand current. The operation of the second phase unit may follow that of the first phase unit after a second period of time has elapsed.

Abstract: A method for fault positioning and recovery of a voltage source converter includes following steps. Locking a converter station when it is detected that an alternating-current voltage contains a zero sequence voltage or a direct-current voltage contains an unbalanced voltage. Positioning a fault by continuing to detect the zero sequence voltage of an alternating-current side of the converter. Recovering operation of each station after the fault is positioned. The method for fault positioning and recovery is simple, practical, has high reliability, and can effectively detect the problems that each station contains a zero sequence voltage of an alternating-current side and cannot easily position a fault caused due to transmission of the zero sequence voltage of the alternating-current side to an opposite-side alternating-current system via a voltage source converter.

Abstract: An object of this disclosure is to implement a Buck, Boost, or other switching converter, with a circuit to supply a reference voltage and Adaptive Voltage Positioning (AVP), by a servo and programmable load regulation. The reference voltage is modified, achieving a high DC gain, using a servo to remove any DC offset at the output of the switching converter. The correction implemented by the servo is measured, and a programmable fraction of the correction is injected back on either the reference voltage or the output feedback voltage. To accomplish at least one of these objects, a Buck, Boost, or other switching converter is implemented, consisting of an output stage driven by switching logic, with a servo configured between the reference voltage and the control loops of the Buck converter. The AVP function is implemented on either the reference voltage or output feedback voltage.

Abstract: A load control device for regulating an average magnitude of a load current conducted through an electrical load may operate in different modes. The load control device may comprise a control circuit configured to activate an inverter circuit during an active state period and deactivate the inverter circuit during an inactive state period. In one mode, the control circuit may adjust the average magnitude of the load current by adjusting the inactive state period while keeping the active state period constant. In another mode, the control circuit may adjust the average magnitude of the load current by adjusting the active state period while keeping the inactive state period constant. In yet another mode, the control circuit may keep a duty cycle of the inverter circuit constant and regulate the average magnitude of the load current by adjusting a target load current conducted through the electrical load.

Abstract: A frequency compensation circuit includes a compensation circuit and a calculation circuit. The compensation circuit controls the calculation circuit to generate a ramp voltage when the voltage at a node between an upper-side switch and a lower-side switch of the DC voltage converter is larger than an input voltage of the DC voltage converter. The calculation circuit generates a control signal at low level when the ramp voltage is smaller than the output voltage of the DC voltage converter so that the frequency compensation circuit generates the constant on-time signal at high level. The calculation generates the control signal at high level when the ramp voltage is larger than or equal to the output voltage of the DC voltage converter so that the frequency compensation circuit generates the constant on-time signal at low level.

Abstract: A switching control circuit for controlling a multi-channel switching circuit having switching circuits, input terminals coupled to input voltage signals, and an output terminal for providing an output voltage signal, can include: a logic control circuit configured to receive an external operation signal and a first single pulse signal, and to generate an enable signal, a trigger signal, and feedback control signals; a reference voltage regulation circuit configured to receive the enable signal, the trigger signal, and a maximum one of the input voltage signals, and to generate a reference voltage signal; and feedback circuits corresponding to the switching circuits, where the plurality of feedback circuits are configured to receive the feedback control signals, a minimum one of two input voltage signals that are participating in the switching operation, the reference voltage signal, and the output voltage signal, and to generate switching control signals for controlling the switching circuits.

Abstract: A power supply system that includes a converter that converts an input alternating-current voltage into a direct-current voltage and outputs the direct-current voltage to a load. The system includes a switcher that electrically connects one of multiple alternating-current power supplies to the converter, a voltage detector that detects an input voltage input to the converter, and a current detector that detects an output current output from the converter. The switcher repeats, for a predetermined amount of time, a determination of whether there is an abnormality in alternating-current power supply based on the input voltage detected by the voltage detector. Moreover, if there is an abnormality, the switcher switches which alternating-current power supply is connected to the converter. Further, the switcher adjusts, based on the result of detection by the current detector, the amount of time for which the determination is performed.

Abstract: A DC-DC converter includes: a first converter including a pass transistor coupled between the first node and a first output, and a body diode connected in parallel to the pass transistor; a sensor coupled between both ends of the pass transistor and which detects a driving current; and a second converter which outputs a second power voltage lower than the first power voltage to a second output. The second converter includes a master inverting converter which outputs the second power voltage independently of the driving current, a slave inverting converter which outputs the second power voltage when the driving current is greater than a predetermined threshold or when the input power voltage is greater than a predetermined boosting voltage limit, and an inverting converter controller which controls operations of the master and slave inverting converters in first and second drive modes based on the driving current and the input power voltage.

Abstract: A variable efficiency and response buck converter is achieved. The device includes a multi-phase switch, the coupled coils, the filter capacitor, and the load. The multi-phase switch includes the phase control inputs, the circuit common reference, at least two pairs of complementary switches with each switch containing one upper switch and one lower switch, at least two phase control outputs from the complementary switches. The coupled inductive coils are coupled to the phase control outputs to enable weak couplings and strong couplings. Based on the working mode, equivalently the coupled coils can provide strong mutual inductances and weak mutual inductances. The filter capacitors connected to the output of the coupled coils provide high efficiency output to the load.

Abstract: A DC-DC converter with transient control. The DC-DC converter includes a power switching circuit, a current to voltage converter, a PI circuit 403, a voltage to current converter 404 and a logic and control circuit 405. The DC-DC converter obtains the transient information of a current flowing through the power switching circuit, to slow down the variation of the output voltage, so as to eliminate the overshot issue.

Abstract: A buffer stage includes a first transistor having a control terminal connected to an output terminal of an operational amplifier and a second transistor connected in series to a main energization path of the first transistor. An overcurrent controlling circuit is configured to apply an output voltage of the operational amplifier to the control terminal of the first transistor and allow a normal operation of the first transistor when an energization current of a main energization path of an output transistor detected by an overcurrent detection transistor is less than a predetermined value, and is configured to control the output voltage of the operational amplifier to a predetermined control voltage according to a current flowing in a main energization path of the overcurrent detection transistor when the energization current of the main energization path of the output transistor is equal to or greater than the predetermined value.

Abstract: An apparatus is described, comprising: a first power converter with real or artificial hysteresis; a second power converter with real or artificial hysteresis; and a control circuit configured to output a control signal dependent on a phase difference or frequency difference between the first and second power converters; wherein the apparatus is configured such that a magnitude of hysteresis of at least one of said first and second power converters is controlled by said control signal.

Abstract: A deglitch circuit, or look-back, may be used to reduce or avoid reacting to a transient overvoltage situation by a voltage regulator. The voltage regulator may delay reacting to an overvoltage situation unless the overvoltage situation persists for more than a first programmable number of cycles.

Abstract: Multiphase voltage regulator systems are disclosed which include parallel signal pathways that functionally cooperate to provide an analog output signal at a constant, or substantially constant, voltage. The parallel signal pathways generate energy storage element charging signals to charge and/or discharge energy storage elements. Energy provided by discharging energy storage elements is thereafter combined to provide the analog output signal. Moreover, the parallel signal pathways compare one of the energy storage element charging signals with a reference input signal to provide a global error correction signal representing a difference, or error, between the reference input signal and the analog output signal. The parallel signal pathways thereafter adjust the energy storage element charging signals in accordance with the global error correction signal to lessen this difference or error.

Abstract: A DC-to-DC converter employs peak current mode control and includes a cycle skipping prevent circuit. If a latch is set, then a high side switch is turned on. A comparator receives a signal indicative of current flow and a compensated error signal. The prevent circuit supplies a delayed version of a low duty cycle, fixed frequency, oscillator signal onto the set input lead of the latch. The prevent circuit gates a high signal as output by the comparator onto the reset input lead of the latch. If the output of the comparator has, however, not transitioned high by a predetermined time, then the prevent circuit gates a high pulse onto the reset input lead. Accordingly, the prevent circuit ensures that the latch is reset once every period of the signal SET. A cycle skipping prevent circuit is also disclosed for use in a converter that employs valley current mode control.

Abstract: A load control device for regulating an average magnitude of a load current conducted through an electrical load may operate in different modes. The load control device may comprise a control circuit configured to activate an inverter circuit during an active state period and deactivate the inverter circuit during an inactive state period. In one mode, the control circuit may adjust the average magnitude of the load current by adjusting the inactive state period while keeping the active state period constant. In another mode, the control circuit may adjust the average magnitude of the load current by adjusting the active state period while keeping the inactive state period constant. In yet another mode, the control circuit may keep a duty cycle of the inverter circuit constant and regulate the average magnitude of the load current by adjusting a target load current conducted through the electrical load.

Abstract: A power conversion circuit may include a first FET and a first diode connected in series between a second high potential wiring and a low potential wiring and a second FET and a second diode connected in series between the second high potential wiring and the low potential wiring. A main reactor may be connected to a first high potential wiring. A first sub-reactor may be connected between the main reactor and the first FET. A second sub-reactor may be connected between the main reactor and the second FET. First, second, third, and fourth periods repeatedly may appear in this order. In the third period, a first current flowing through the first sub-reactor decreases to zero after a timing at which the second FET is turned on, and the first FET is turned on after or on a timing at which the first current decreases to zero.

Abstract: A multiphase converter is provided with a multiphase conversion unit including a plurality of voltage conversion units; and a control unit configured to individually control the voltage conversion units using control signals. The control unit performs soft start control on the voltage conversion units by offsetting the time periods for individual voltage conversion units against each other. A detection unit detects a value reflecting an output current or an output voltage on a common output path from the plurality of voltage conversion units. The abnormality identifying unit identifies the abnormal voltage conversion unit or the abnormal group of voltage conversion units that generates an abnormal current or an abnormal voltage based on a result of detection by the detection unit during the time periods in which the soft start control is performed.

Abstract: Embodiments described herein describe operating a master-slave controller. Operating the master-slave controller comprises, based on a determination that the first output voltage value is greater than the second output voltage value, calculating a first duty cycle value and an input voltage value and the second voltage regulator, calculating a second duty cycle value based on the first duty cycle value, and based on a determination that the second output voltage value is greater than or equal to the first output voltage value, calculating the second duty cycle value based on the second output voltage value and the input voltage value and calculating the first duty cycle value based on the second duty cycle value and configuring the first voltage regulator with the first duty cycle value and the second voltage regulator with the second duty cycle value.

Abstract: A DC-DC switching converter soft start method is provided, using a scaled switch size. An increased switch resistance, higher than the normal operating switch resistance, is achieved during the startup of the switching converter. The on-resistance of the high side switch, together with a minimum duty cycle, reduces the peak inductor current of the switching converter. After a startup period, the switching converter reverts back to a normal switch resistance.

Abstract: Devices and methods are provided relating to supplying a load having an inrush-current behavior, e.g. charging of a capacitance e.g. at power up of a circuit. A first load path and a second load path are provided which are used in an alternating manner.

Abstract: A power supply system includes a plurality of uninterruptible power supplies provided for a load in parallel. The uninterruptible power supplies each include a power supply unit configured to supply the load with power and being larger in capacitance than the load, and a switch provided between the power supply unit and the load. The power supply system further includes a control unit selecting a first uninterruptible power supply of the plurality of uninterruptible power supplies, and setting the switch of the first uninterruptible power supply to the on state.

Abstract: A voltage regulator comprising: a first regulator module comprising a first transistor switch, wherein the first module operates in a first phase and wherein the first switch is configured to receive a first signal at a first gate of the first switch from a first signal driver; a second regulator module comprising a second transistor switch, wherein the second module operates in a second phase that is different from the first phase, wherein the second switch is configured to receive a second gate drive signal at a second gate of the second switch from a second signal driver, and wherein the second signal is opposite in polarity from the first signal; and a switch that couples the first gate and the second gate during at least part of a time period during which the first switch transitions states and the second switch transitions states.

Abstract: For an easily implementable method for model predictive control of a DC/DC converter, and a corresponding controller, with which the optimization problem of the model predictive control can also be solved sufficiently quickly with large prediction horizons, the optimization problem is divided into two optimization problems by a model predictive output variable control and a model predictive choke current control being implemented in the control unit (10), wherein: the strands of the multiphase DC/DC converter (12) for the output variable control are combined into a single strand; a time-discrete state space model is produced therefrom; and the output variable control predicts the input voltage (uv,k+1) of the next sampling step (k+1) for this single strand on the basis of a first cost function (Jv) of the optimization problem of the output variable control, said input voltage being given to the choke current control as a setpoint and the choke current control determining therefrom the necessary switch positio

Abstract: A connection device for connecting a load to a power supply, comprising at least first and second current control devices arranged in parallel between the power supply and the load, and a controller arranged to switch the current control devices on in sequence for temporally overlapping on periods.

Abstract: A two-stage multi-phase switching power converter operates its first stage during nominal operation responsive to a nominal clocking frequency and operates its second stage during the nominal operation responsive to a second-stage clocking frequency that is greater than the nominal clocking frequency. In response to an application of a load, the first stage temporarily increases its clocking frequency from the nominal clocking frequency and implements a fixed duty cycle.