With Threshold Detection Patents (Class 323/274)
  • Patent number: 6897637
    Abstract: A low drop-out voltage regulator uses a voltage subtractor circuit 36 to form a power supply rejection boost circuit. The voltage subtractor 36 is inserted between the pass element 20 and the amplifier 26 of the low drop-out regulator. The voltage regulator circuit includes a pass element 20 coupled between an input node and an output node; a voltage feedback circuit 28 and 30 coupled to the output node Vo; an amplifier 26 having an input coupled to the voltage feedback circuit; and a voltage subtractor 36 having a control node coupled to an output of the amplifier 26, an output coupled to a control node of the pass element 20, and an input coupled to the input node. The boost circuit improves supply noise rejection performance significantly without adding much complexity to the regulator system. The boost circuit is simple and consumes negligible silicon area and power.
    Type: Grant
    Filed: December 9, 2002
    Date of Patent: May 24, 2005
    Assignee: Texas Instruments Incorporated
    Inventors: Jun Chen, Siew K. Hoon
  • Patent number: 6894468
    Abstract: A DC to DC power converter includes synchronous rectifiers which respond to a control waveform. Negative current from a load into the power converter is prevented by increasing the converter output voltage at a minimum current limit. The synchronous rectifiers may be held off in response to decision logic by activation of a hold-off circuit connected to a control terminal of a synchronous rectifier or of an ORing transistor at the converter output. When the synchronous rectifier is subsequently enabled, its control waveform may be increased slowly relative to the switching cycle.
    Type: Grant
    Filed: July 7, 2000
    Date of Patent: May 17, 2005
    Assignee: Synqor, Inc.
    Inventors: Joshua H. Bretz, Abram P. Dancy, Leif E. LaWhite, Martin F. Schlecht
  • Patent number: 6885174
    Abstract: The present invention relates to a system for providing a regulated voltage meant to supply a load, including a source for providing a substantially constant current approximately corresponding to the maximum current likely to be surged by the load, and a device receiving the constant current and regulating the load supply voltage, at least one capacitor being connected between an output terminal of the regulation device and the ground.
    Type: Grant
    Filed: February 19, 2004
    Date of Patent: April 26, 2005
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventor: Jean-Michel Ravon
  • Patent number: 6867573
    Abstract: An apparatus and method provide for temperature calibrating an over-current limit in a linear regulator. Output current is delivered to the load through a power pass device that is responsive to a gate control signal. A transistor circuit provides a sense current that is proportional to the output current. A diode device senses the operating temperature of the linear regulator. An analog-to-digital converter converts the sensed operating temperature to a digital quantity. A resistance value associated with a resistance circuit is changed in response to the digital quantity. The resistance circuit converts the sense current to a voltage that is compared to a reference voltage. An amplifier is arranged to adjust the gate control signal when the reference voltage is exceeded such that the over-current condition is detected.
    Type: Grant
    Filed: November 7, 2003
    Date of Patent: March 15, 2005
    Assignee: National Semiconductor Corporation
    Inventor: Scott Douglas Carper
  • Patent number: 6847198
    Abstract: A frequency sensing voltage regulator is disclosed. A source follower transistor has a gate connected to a predetermined gate voltage, a drain coupled to an external supply voltage through a switching transistor, and a source connected to a load. The gate of the switching transistor is controlled by a delay circuit through which a pulse derived from the system clock is passed. Through the use of the delay circuit and the switching transistor, the amount of current produced by the source follower transistor is made a function of the cycle rate of the system clock and the current provided by the source follower transistor tracks the frequency-dependent current requirements of the load, resulting in a reduced variance of the supply voltage Vcc over a wide current range.
    Type: Grant
    Filed: May 22, 2003
    Date of Patent: January 25, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Kent M. Kalpakjian, John D. Porter
  • Patent number: 6838862
    Abstract: A pulse width modulation apparatus includes a load circuit, a signal switch, a shunt switch, and a resistor. The signal switch isolates the load circuit from a voltage source along a signal path. The shunt switch is connected to the signal path at a point between the signal switch and the load circuit. The shunt switch isolates the signal path from a ground voltage. A resistor is connected in series between the signal switch and the shunt switch.
    Type: Grant
    Filed: April 4, 2003
    Date of Patent: January 4, 2005
    Assignee: Harris Corporation
    Inventor: Ky Thoai Luu
  • Patent number: 6836101
    Abstract: A power supply system includes an adapter to receive power from a power source, and output a regulated output voltage (Vout). A tip receives Vout from the adapter, and output Vout to an electronic device. The tip includes active circuitry to adjust a programming voltage (Vprog). Vprog is fed back to the adapter to control a magnitude of Vout.
    Type: Grant
    Filed: December 5, 2002
    Date of Patent: December 28, 2004
    Assignee: Comarco Wireless Technologies, Inc.
    Inventor: Thomas W. Lanni
  • Patent number: 6828764
    Abstract: A regulator circuit capable of accurately adjusting output voltage anywhere in a current region and maintaining optimum output voltage by correcting setting of a predetermined voltage to be regulated depending on a value of charging current. An output terminal of an amplifier is connected to a reference voltage terminal through a resistance element. When charging current does not flow, detection voltage 0V. Consequently, voltage of a reference power source is divided between a resistance element R1 and parallel resistance elements R2 and R3. When charging current flows and detection voltage is outputted, the detection voltage is divided by resistance elements R2 and R3, whereby corrected voltage depending on a value of charging current is generated. Even if voltage drop occurs between a charging-control-device output terminal and a battery terminal, control voltage of output voltage is appropriately adjusted so that a battery terminal can keep full charging voltage.
    Type: Grant
    Filed: March 21, 2002
    Date of Patent: December 7, 2004
    Assignee: Fujitsu Limited
    Inventors: Kyuichi Takimoto, Yoshihiro Nagaya, Toshiyuki Matsuyama
  • Patent number: 6822428
    Abstract: A stabilized power supply unit having a current limiting function, comprising a detection transistor impressed with the same control voltage as the output transistor of the power supply unit, adapted to output a detection current which is exactly proportional to the output current, irrespective of the magnitude of the output current. The current detection transistor is controlled by the control voltage controlling the output transistor. A voltage correction unit is provided to control the voltage of the output end of the current detection transistor, equalizing the voltage with the output voltage. This arrangement provides a detection current exactly proportional to the output current.
    Type: Grant
    Filed: July 2, 2003
    Date of Patent: November 23, 2004
    Assignee: Rohm Co., LTD
    Inventors: Koichi Miyanaga, Hiroyuki Ishikawa
  • Patent number: 6822426
    Abstract: A current control circuit forces current sharing among paralleled power converters. Each power converter has an associated current control circuit, which includes a current amplifier and a coupling circuit. The current amplifier outputs a feedback signal to a voltage regulation error amplifier when the power converter output current falls below a predetermined threshold level. The error amplifier causes an increase in the power converter output voltage, forcing an increase in output current. Therefore, each power converter in a paralleled arrangement is regulated to provide a minimum level of output current, based on a predetermined threshold value.
    Type: Grant
    Filed: June 6, 2003
    Date of Patent: November 23, 2004
    Assignee: The Boeing Company
    Inventors: Philip C. Todd, Joe Anthony Ortiz, Stephen John Hulsey, Bruce R. Baker
  • Patent number: 6809504
    Abstract: A dual loop regulator is configured for improved regulation of a supply voltage for a dynamic load based on the magnitude of changes in the load voltage. An exemplary dual loop regulator comprises a primary voltage regulator configured within a linear loop and a secondary voltage regulator configured within a wideband, non-linear loop. The primary voltage regulator is configured for providing a well-controlled, regulated output voltage to the dynamic load, and for addressing small changes in the output voltage. The secondary voltage regulator is configured for sensing undervoltage and overvoltage conditions at the dynamic load, and for addressing changes greater than a predetermined threshold voltage. To facilitate loop stability, secondary voltage regulator can be configured within the wideband, non-linear loop to have a small gain for small changes, a larger gain for large changes, and/or a substantially finite storage capability such that any large signal oscillations will not be sustained.
    Type: Grant
    Filed: March 21, 2002
    Date of Patent: October 26, 2004
    Assignee: Primarion, Inc.
    Inventors: Benjamim Tang, Ken Ostrom, Tim Ng, Clifford Duong
  • Patent number: 6798178
    Abstract: A power controller (10) of a power system switches between operating in a linear operational mode and a non-linear operational mode. The power controller (10) disables an output transistor (40) and removes a linear drive signal from the output transistor (40) to terminate operation in the linear operational mode. Prior to enabling operation in the non-linear operational mode, the power controller (10) adjusts a value of an error voltage in order to minimize overshoot in the output voltage during the mode switch.
    Type: Grant
    Filed: March 12, 2003
    Date of Patent: September 28, 2004
    Assignee: Semiconductor Components Industries, L.L.C.
    Inventor: Abdesselam Bayadroun
  • Patent number: 6798179
    Abstract: In a conventional stabilized direct-current power supply device with a soft starting function, soft starting is achieved by exploiting the rise in a reference voltage. Thus, soft starting is impossible when the reference voltage has already risen. A stabilized direct-current power supply device of the invention has a current suppression circuit that, when the output voltage rises, suppresses the current output from a voltage conversion circuit that converts the input voltage into the output voltage to be fed out. Thus, soft starting is possible even when the reference voltage has already risen.
    Type: Grant
    Filed: January 22, 2003
    Date of Patent: September 28, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Akio Nakajima
  • Publication number: 20040178777
    Abstract: A power controller (10) of a power system switches between operating in a linear operational mode and a non-linear operational mode. The power controller (10) disables an output transistor (40) and removes a linear drive signal from the output transistor (40) to terminate operation in the linear operational mode. Prior to enabling operation in the non-linear operational mode, the power controller (10) adjusts a value of an error voltage in order to minimize overshoot in the output voltage during the mode switch.
    Type: Application
    Filed: March 12, 2003
    Publication date: September 16, 2004
    Applicant: Semiconductor Components Industries, LLC
    Inventor: Abdesselam Bayadroun
  • Publication number: 20040178778
    Abstract: An integrated Low Dropout (LDO) linear voltage regulator provides improved current limiting. A differential voltage amplifier compares an output voltage to reference voltage and controls a pass transistor to make the output voltage substantially match the reference voltage. This is accomplished by sensing the output voltage of the voltage regulator for application to a first input of the differential amplifier and coupling a second input of the differential amplifier to the reference voltage. A current sense transistor utilizes current mirroring techniques to sense the current passing through the pass transistor to the output. This sensed current is compared to a reference current. The result of that comparison is fed back to the differential voltage amplifier to in a manner that increases the apparently sensed output voltage in situations where the sensed current exceeds the reference current.
    Type: Application
    Filed: December 9, 2003
    Publication date: September 16, 2004
    Applicant: STMicroelectronics PVT. LTD.
    Inventor: Nitin Bansal
  • Patent number: 6791303
    Abstract: A voltage stabilization circuit is configured between two signal lines. Each of the signal lines carries a signal, and an interference signal is superimposed on at least one of the signals. The voltage stabilization circuit includes an amplifier circuit that provides an anti-phase signal obtained as an amplified difference between the interference signal and a reference signal. The anti-phase signal has a phase that is opposite the phase of the interference signal. The configuration further includes a matching circuit, which is connected in series with the amplifier circuit, and which generates a compensation signal from the anti-phase signal and superimposes the compensation signal on the signal that is superimposed with the interference signal.
    Type: Grant
    Filed: November 17, 2003
    Date of Patent: September 14, 2004
    Assignee: Infineon Technologies AG
    Inventors: Frank Klotz, Jürgen Petzoldt, Axel Rafoth
  • Patent number: 6791302
    Abstract: A system is provided for supplying current to a dynamic load subject to transient current requirements. A sense unit coupled to the dynamic load is configured to sense the rate of change of supply current required by the dynamic load during a transient event. A current source coupled to the sense unit is configured to supply a current pulse to the dynamic load in response to the sense unit determining that the rate of change of supply current (di/dt) exceeds a predetermined threshold. The current pulse preferably has a shape characterized by a first region and a second region subsequent to the second region, wherein the first region includes a first boost current which exceeds the transient current requirement, and wherein the second region includes a second boost current which is less than the transient current requirement. More generally, a wideband transient suppression system is provided for controlling a wide spectrum of transients.
    Type: Grant
    Filed: March 21, 2002
    Date of Patent: September 14, 2004
    Assignee: Primarion, Inc.
    Inventors: Benjamim Tang, Keith Bassett, Tim Ng, Kenneth A. Ostrom, Nicholas Steffen, Cliff Duong
  • Publication number: 20040174150
    Abstract: A voltage regulator circuit and a semiconductor memory device using the same are provided. The voltage regulator circuit regulates an input voltage to provide an output voltage. The voltage regulator circuit comprises a voltage divider to divide the output voltage, a comparator to determine whether the divided voltage is less than a reference voltage, a driver connected between the input voltage and the output voltage, and operating operate responsive to the comparator, and a controller to control the voltage divider to gradually vary the output voltage. The voltage divider includes a resistance that operates responsive to the controller and whose value varies in a binary weighted form.
    Type: Application
    Filed: March 5, 2004
    Publication date: September 9, 2004
    Inventors: Pyung-Moon Zhang, Seung-Keun Lee
  • Patent number: 6788035
    Abstract: A serial bus control method, apparatus, and system for transmitting signals between a master controller and a slave controller associated with a power regulator are disclosed. The serial bus control scheme allows for information to be written to or read from individual regulators or be written to read from all regulators that are coupled to the master controller.
    Type: Grant
    Filed: June 12, 2002
    Date of Patent: September 7, 2004
    Assignee: Primarion, Inc.
    Inventors: Keith Bassett, Tim Ng, Nicholas Steffen, Kenneth Ostrom, Benjamin Tang, Robert Carroll
  • Patent number: 6784650
    Abstract: A switching network with trimmable resistors lies in a control loop of a voltage generator that can be switched off from the supply voltage by a logic device. The logic device and also the switching network are driven by the same signals. The circuit configuration can be used for trimming or switching off the output voltage generated by the voltage generator during the functional test. As many settings as possible for the output voltage can be tested by a small number of control signals.
    Type: Grant
    Filed: May 14, 2003
    Date of Patent: August 31, 2004
    Assignee: Infienon Technologies AG
    Inventors: Thomas Hein, Patrick Heyne, Thilo Marx, Torsten Partsch
  • Publication number: 20040119451
    Abstract: Disclosed herein is a switching constant-current power supply which comprises: a switching-system power converter for supplying a predetermined current to a load; a current detector for generating a feedback signal in correspondence with the load current; a controller for driving the power converter in correspondence with the feedback signal; and a feedback circuit, which is provided between the current detector and the controller, and comprises a signal holding unit, the feedback circuit supplying either a first feedback signal, output from the current detector, or a second feedback signal, output from the signal holding unit, to the controller; the size of the second feedback signal being approximately equal to the first feedback signal at a given time.
    Type: Application
    Filed: December 9, 2003
    Publication date: June 24, 2004
    Applicant: Toko Kabushiki Kaisha
    Inventor: Tetsushi Otake
  • Patent number: 6744242
    Abstract: In a packaged integrated circuit, the package inductance limits the rate at which off-chip current may be varied in response to a change in on-chip current demand of the integrated circuit. The present invention provides an on-chip voltage regulator circuit for regulating multi-cycle voltage fluctuations of an integrated circuit associated with changes in current demand of the integrated circuit. The voltage regulator sources current to prevent an undervoltage conditions and sinks current to prevent an overvoltage condition.
    Type: Grant
    Filed: January 14, 2003
    Date of Patent: June 1, 2004
    Assignee: Fujitsu Limited
    Inventors: Christophe Giacomotto, Robert P. Masleid, Akihiko Harada
  • Patent number: 6707280
    Abstract: A voltage regulator for providing a bidirectional current and a regulated voltage to a load. The voltage regulator regulates the output voltage at one half the level of the input voltage using a voltage doubler circuit in reverse. The regulator provides current to the load when the output voltage drops and receives current from the load when the output voltage rises. The voltage regulator is particularly suited to supplying a termination voltage to multiple line drivers in a DDR DRAM system, where the line drives require an active termination voltage to reduce power. Additionally, a pair of linear regulators, one for clamping the output voltage at a predetermined low voltage level and for supplying additional current demanded by the load, and the other for clamping the output voltage at a predetermined high voltage level and for receiving additional current supplied by the load, is included.
    Type: Grant
    Filed: September 9, 2002
    Date of Patent: March 16, 2004
    Assignee: Arques Technology, Inc.
    Inventors: Kwang H. Liu, Sorin L. Negru, Fu-Yuan Shih
  • Patent number: 6703814
    Abstract: A regulator system for supplying power to a microelectronic device is disclosed. The system includes an array of a plurality of regulators, where each regulator provides a portion of power required to operate the device. The system may further include an intermediate power regulator that supplies power to the array of regulators.
    Type: Grant
    Filed: May 1, 2002
    Date of Patent: March 9, 2004
    Assignee: Primarion, Inc.
    Inventors: William Pohlman, Michael Eisele
  • Publication number: 20040041547
    Abstract: A power fluctuation inhibiting device for effectively inhibiting fluctuation of power supply voltage that is supplied to internal circuits. The inhibiting device includes a power fluctuation measuring circuit for measuring peaks in the fluctuation of the power supply voltage produced when the internal circuits are operated. A clock signal control circuit adjusts phases of clock signals provided to respective ones of the internal circuits in accordance to the peak measuring result to substantially offset the fluctuation peaks produced when the internal circuits are operated.
    Type: Application
    Filed: August 27, 2003
    Publication date: March 4, 2004
    Applicant: FUJITSU LIMITED
    Inventor: Shigetaka Asano
  • Patent number: 6700361
    Abstract: A voltage regulator is described, the output voltage of which depends on a drive to a transistor contained in the voltage regulator. The voltage regulator described is distinguished by the fact that it contains a stabilization circuit that can change the current flowing through the transistor. Such a voltage regulator is simple to configure and to implement and, with minimum intrinsic power requirement, is stable under all circumstances.
    Type: Grant
    Filed: April 24, 2002
    Date of Patent: March 2, 2004
    Assignee: Infineon Technologies AG
    Inventor: Peter Gregorius
  • Publication number: 20040036456
    Abstract: A circuit for providing an output voltage for a DRAM word line which can be used to drive memory word lines which can be as high as 2Vdd. Transistors in a boosting circuit are fully switched, eliminating reduction of the boosting voltage by Vtn through the transistors. The boosting capacitors are charge by Vdd. A regulator detects conduction current of a replica of a memory cell access transistor, shutting off the boosting circuit clock oscillator when the correct voltage to operate the access transistor has been reached.
    Type: Application
    Filed: June 17, 2003
    Publication date: February 26, 2004
    Applicant: MOSAID Technologies Incorporated
    Inventors: Richard C. Foss, Peter B. Gillingham, Robert F. Harland, Valerie L. Lines
  • Patent number: 6696822
    Abstract: A voltage regulator includes a constant current circuit which is connected between an input node with which a power supply voltage is supplied and an output node to which a load is connected and which supplies constant current to the output node. The voltage regulator also includes a first transistor which is provided in parallel to the constant current circuit and which flows insufficient current to the output node when current flowing through the load is larger than the constant current and a second transistor which is provided between the output node and a common potential node and which flows surplus current to the common potential node when current flowing through the load is less than the constant current. The voltage regulator also includes a control circuit which controls a conductive state of the first and the second transistors so that an output voltage of the output node is maintained at constant voltage.
    Type: Grant
    Filed: July 30, 2002
    Date of Patent: February 24, 2004
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Yasutaka Takabayashi
  • Publication number: 20040032239
    Abstract: A low noise, multiple output power supply circuit featuring a plurality of efficient linear regulators comprises a transformer having a primary circuit with a primary transformer input winding and a plurality of secondary circuits. Each secondary circuit has a secondary transformer output winding having the same number of turns of secondary windings. A saturable reactor core is placed in series with at least one selected output winding of at least one selected secondary circuit to subtract a small amount of average voltage, volt-seconds, from the output voltage of the selected output winding to allow different rectified DC voltages to be obtained from different output windings which have the same number of turns.
    Type: Application
    Filed: August 15, 2002
    Publication date: February 19, 2004
    Applicant: General Electric Company
    Inventors: Robert Louis Steigerwald, Chester Frank Saj
  • Patent number: 6693410
    Abstract: Power control circuits that control the power sequencing and ramp rate of voltages applied to integrated circuits are disclosed. In one embodiment, a power control circuit comprises a delay resistor, a delay capacitor and an input transistor. The delay resistor is adapted to be coupled to an input power supply. The delay capacitor is coupled in series with the delay resistor. The input transistor has an emitter that is adapted to be coupled to the input power supply through the delay resister. The input transistor conducts current when a voltage across the delay capacitor rises above a selected voltage threshold of the input transistor. A power source is applied to a load in response to the conduction of the input transistor which is delayed by the time it takes to charge the delay capacitor to the selected voltage threshold.
    Type: Grant
    Filed: December 16, 2002
    Date of Patent: February 17, 2004
    Assignee: ADC DSL Systems, Inc.
    Inventor: Dale M. Terrien
  • Patent number: 6690146
    Abstract: Embodiments of the invention provide for circuits for driving LEDs with consistently good illumination and superior efficiency at lower cost and suitable for use with cheaper LEDs or with LEDs having wide component parameter tolerances over wide operating voltages and temperature variations. Circuits disclosed may be, but need not be, embodied on a single semiconductor chip.
    Type: Grant
    Filed: August 27, 2002
    Date of Patent: February 10, 2004
    Assignee: Fairchild Semiconductor Corporation
    Inventors: Lajos Burgyan, Francois Prinz
  • Patent number: 6686728
    Abstract: A dropper-type DC stabilized power supply circuit is arranged such that a power transistor is connected in series with a power source line, a first difference amplifier compares (i) a feedback value acquired by dividing an output voltage with (ii) a reference voltage. The first difference amplifier controls the base current of the power transistor with reference to the difference above so as to stabilize the output voltage. This DC stabilized power supply circuit is additionally provided with second and third difference amplifiers having respective offset voltages in inputs thereof. When the output voltage surpasses a predetermined voltage level, the second difference amplifier restrains the base current. On the contrary, when the output voltage falls below a predetermined voltage level, the third difference amplifier increases a bias current of the first difference amplifier so as to increase the gain.
    Type: Grant
    Filed: May 28, 2002
    Date of Patent: February 3, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Akio Nakajima
  • Patent number: 6683442
    Abstract: A synch FET power supply uses a plurality of electronic switches to periodically connect the primary of a transformer to a direct current input source of power to generate a time varying magnetic field. The time varying magnetic field is coupled to two secondary windings. An electronic switch connected to each secondary winding periodically connects its secondary to the other output terminal. A reference voltage is applied to the control circuits, and the control circuits adjust the switches so that the output voltage tracks the reference voltage. Logic AND gates control the “turn on” signals to the electronic switches in the secondary circuits so that the secondary windings are not connected to an output terminal until a “synch FET enable” signal is applied to the AND gates.
    Type: Grant
    Filed: August 15, 2002
    Date of Patent: January 27, 2004
    Assignee: Galaxy Power, Inc.
    Inventors: Andrew Ferencz, Gregory A. Zvonar
  • Publication number: 20040008015
    Abstract: A linear regulator having an output stage including first and second P-channel MOS transistors series connected between a first D.C. supply terminal and an output terminal providing a regulated output voltage, and a circuit for controlling the first and second transistors capable of providing the first and second transistors with first and second control signals according to the output voltage and to the voltage at the midpoint of the series connection.
    Type: Application
    Filed: July 7, 2003
    Publication date: January 15, 2004
    Inventors: Alexandre Pons, Christophe Bernard
  • Patent number: 6674273
    Abstract: This invention includes an improvement to a power regulation and thermal management circuit. The power regulation and thermal management circuit includes a pass element coupled serially between a power source and a load. A voltage sensing circuit senses the voltage across the serial element and selects a corresponding current path based upon the sense voltage from a plurality of current paths. The invention includes a filtering circuit coupled serially between the voltage sensing circuit and the plurality of current paths to reduce noise on the sensed pass element voltage. The power regulation and thermal management circuit also includes a linear regulator to terminate charging at the appropriate voltage. The invention includes a peak detection circuit with the linear regulator to reduce noise caused by, for example, a pulsing load during charging.
    Type: Grant
    Filed: September 28, 2002
    Date of Patent: January 6, 2004
    Assignee: Motorola, Inc.
    Inventor: John Wendell Oglesbee
  • Patent number: 6670795
    Abstract: A regulator system for supplying power to a microelectronic device is disclosed. The system includes an array of a plurality of regulators, where each regulator provides a portion of power required to operate the device. The system may further include an intermediate power regulator that supplies power to the array of regulators.
    Type: Grant
    Filed: May 1, 2002
    Date of Patent: December 30, 2003
    Assignee: Primarion, Inc.
    Inventors: William Pohlman, Michael Eisele
  • Patent number: 6667606
    Abstract: This invention provides a means of protecting power dissipating pass elements from exceeding their predetermined thermal limits. In one preferred embodiment, the circuit protects a pass element in a battery charging circuit from exceeding its threshold junction temperature by predicting temperature based upon the voltage across the pass element and the current flowing through it. From this predicted temperature, current is reduced to provide charging of a battery at a constant power. The circuit includes a voltage sensing circuit and a plurality of comparators for selecting a predetermined current based upon the output of the voltage sensing circuit. The circuit provides a piecewise linear approximation of proper pass element voltage and current values to maintain a suitable threshold junction temperature.
    Type: Grant
    Filed: February 15, 2002
    Date of Patent: December 23, 2003
    Assignee: Motorola, Inc.
    Inventors: John Wendell Oglesbee, Chris Hanchana Thongsouk, Robert Michael Johnson, Jr.
  • Patent number: 6667604
    Abstract: A power supply circuit includes a constant voltage circuit and a timer circuit. The constant voltage circuit generates a constant voltage by regulating a base current of the first transistor via the second transistor. The timer circuit includes a comparator, a delay circuit and an OR circuit. The comparator determines a condition of the IG switch, open or closed. The delay circuit delays inputting an output of the comparator for a predetermined period. The OR circuit outputs a signal to halt the constant voltage generation when the outputs of the comparator and delay circuits indicate that the IG switch is open. The timer circuit is used to continue the constant voltage generation for a predetermined period after the IG switch is opened.
    Type: Grant
    Filed: July 22, 2002
    Date of Patent: December 23, 2003
    Assignee: Denso Corporation
    Inventor: Akihiro Yanagisawa
  • Patent number: 6661212
    Abstract: A wideband voltage regulator is configured to provide suppression of fast transients, which can include a boosting circuit and a sensing circuit. The boosting circuit can be suitably configured to boost the voltage regulator response, while the sensing circuit can determine when such a boost may be desired. Accordingly, the response of the voltage regulator can be accelerated to a fast load transient beyond the closed loop bandwidth limited response or the slew rate limited response of the voltage regulator. An exemplary voltage regulator can be configured with an active sensing circuit comprising a sensing amplifier with switch control outputs, and a boosting circuit comprising N stored charge sources, e.g.; boost capacitors, and (3N−1) switches that are configured to accelerate the voltage regulators response to a fast load transient beyond the closed loop bandwidth limited or slew rate limited response of the voltage regulator.
    Type: Grant
    Filed: January 8, 2003
    Date of Patent: December 9, 2003
    Assignee: Primarion
    Inventor: Kenneth A. Ostrom
  • Patent number: 6646495
    Abstract: The present invention provides increased output swing by connecting a buffer backgate to an upper rail potential (125) during the no load current condition. This can be done through the use of a comparator (440) and a multiplexer (460), thereby changing the threshold voltage of the buffer (115).
    Type: Grant
    Filed: December 31, 2001
    Date of Patent: November 11, 2003
    Assignee: Texas Instruments Incorporated
    Inventor: Raul A. Perez
  • Patent number: 6630817
    Abstract: An electrical circuit arrangement for converting an input voltage into an impressed electrical output variable, to convert the input voltage optionally into an output voltage or into an output current, wherein the input voltage is fed to the desired value input of a regulator. A negative feedback voltage is fed to the actual value input of the regulator, the voltage being a measure of the respectively effective output variable. For converting the input voltage into an impressed output voltage, the negative feedback voltage is a voltage proportional to the output voltage. For converting the input voltage into an impressed current, the negative feedback voltage is a voltage dropped across a resistor through which the output current flows. Circuit arrangements of this type serve for further processing of a unipolar voltage in circuit arrangements which require a current as input variable, or a voltage whose range deviates from that of the input voltage. This is the case e.g.
    Type: Grant
    Filed: August 19, 2002
    Date of Patent: October 7, 2003
    Assignee: Bosch Rexroth AG
    Inventors: Thomas Kison, Alexander Meisselbach
  • Patent number: 6611132
    Abstract: A DC-DC converter for decreasing power consumption and quickly increasing an output voltage. The converter includes a voltage generation circuit, a switching control circuit, a current detection circuit, and a step control circuit. An output transistor performs switching to generate the output voltage of the switching control circuit. The current detection circuit is connected to the voltage generation circuit to detect a load current, which is derived from the output voltage, and to generate a detection signal. A stop control circuit maintains the output transistor in an activated state in accordance with the detection signal and stops the operation of the switching control circuit when the load current is less than or equal to the load current.
    Type: Grant
    Filed: March 5, 2002
    Date of Patent: August 26, 2003
    Assignee: Fujitsu Limited
    Inventors: Shinichi Nakagawa, Hidenobu Ito
  • Publication number: 20030155895
    Abstract: This invention includes an improvement to a power regulation and thermal management circuit. The power regulation and thermal management circuit includes a pass element coupled serially between a power source and a load. A voltage sensing circuit senses the voltage across the serial element and selects a corresponding current path based upon the sense voltage from a plurality of current paths. The invention includes a filtering circuit coupled serially between the voltage sensing circuit and the plurality of current paths to reduce noise on the sensed pass element voltage. The power regulation and thermal management circuit also includes a linear regulator to terminate charging at the appropriate voltage. The invention includes a peak detection circuit with the linear regulator to reduce noise caused by, for example, a pulsing load during charging.
    Type: Application
    Filed: September 28, 2002
    Publication date: August 21, 2003
    Inventor: John Wendell Oglesbee
  • Patent number: 6603292
    Abstract: A low dropout voltage (LDO) regulator having an adaptive zero frequency circuit is described. The adaptive zero frequency circuit maintains the stability of the LDO regulator and improves the transient response of the LDO regulator under a range of values for the output current, whereas the output current inversely varies with the load resistance coupled to the output of the LDO regulator. The adaptive zero frequency circuit generates a zero having a frequency which varies with the output current. Hence, the frequency of the zero changes to maintain the stability of the LDO regulator despite the variation in the frequency of the low-frequency pole generated by the load resistance and the load capacitance (or output capacitor) coupled to the output of the LDO regulator.
    Type: Grant
    Filed: April 11, 2001
    Date of Patent: August 5, 2003
    Assignee: National Semiconductor Corporation
    Inventors: Andre Schouten, Steve O'Kane
  • Patent number: 6586916
    Abstract: A frequency sensing NMOS voltage regulator is disclosed. A NMOS source follower transistor has a gate connected to a predetermined gate voltage, a drain coupled to an external supply voltage through a PMOS switching transistor, and a source connected to a load. The gate of the PMOS transistor is controlled by a delay circuit through which a pulse derived from the system clock is passed. Through the use of the delay circuit and the PMOS transistor, the amount of current produced by the NMOS transistor is made a function of the cycle rate of the system clock and the current provided by the NMOS transistor tracks the frequency-dependent current requirements of the load, resulting in a reduced variance of the supply voltage Vcc over a wide current range.
    Type: Grant
    Filed: September 7, 2001
    Date of Patent: July 1, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Kent M. Kalpakjian, John D. Porter
  • Publication number: 20030117115
    Abstract: The present invention provides a semiconductor integrated circuit device equipped with a negative feedback amplifier circuit or a step-down circuit which realizes stabilization of an output voltage effectively in response to a variation in power supply voltage. A constant current source is used to cause a bias current for setting current consumption to flow in a differential amplifying MOSFET. A capacitor is provided between an external power supply voltage and a predetermined circuit node to thereby detect a reduction in the external power supply voltage. An operating current of the differential amplifying MOSFET is increased through the use of a current flowing in the capacitor due to such an external power variation, thereby executing the operation of stabilizing an output voltage corresponding to the reduction in the external power supply voltage.
    Type: Application
    Filed: November 21, 2002
    Publication date: June 26, 2003
    Applicant: Hitachi, Ltd.
    Inventor: Yoshikazu Saitoh
  • Publication number: 20030117116
    Abstract: The present invention provides a semiconductor integrated circuit device equipped with a negative feedback amplifier circuit-or a step-down circuit which realizes stabilization of an output voltage effectively in response to a variation in power supply voltage. A constant current source is used to cause a bias current for setting current consumption to flow in a differential amplifying MOSFET. A capacitor is provided between an external power supply voltage and a predetermined circuit node to thereby detect a reduction in the external power supply voltage. An operating current of the differential amplifying MOSFET is increased through the use of a current flowing in the capacitor due to such an external power variation, thereby executing the operation of stabilizing an output voltage corresponding to the reduction in the external power supply voltage.
    Type: Application
    Filed: January 29, 2003
    Publication date: June 26, 2003
    Applicant: Hitachi, Ltd.
    Inventor: Yoshikazu Saitoh
  • Patent number: 6573694
    Abstract: A voltage regulator circuit that provides the current necessary to drive an output driver during transients and maintain low output impedance, while having a much better dropout voltage than a single source follower gain stage includes: an output driver 22; a source follower 34 for controlling the output driver; a localized feedback gain loop coupled to the source follower 34; and an amplifier 24 for controlling the source follower 34.
    Type: Grant
    Filed: June 13, 2002
    Date of Patent: June 3, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Mark Pulkin, Gabriel A. Rincon-Mora
  • Publication number: 20030090249
    Abstract: A reference voltage circuit and an operational amplifier operate when an output voltage is produced from an output terminal of a power supply circuit. When the output voltage is low in the rising phase of a power source voltage, a transistor Q17 in a startup circuit turns on and a transistor Q14 turns off to surely turn on transistors Q11 and Q12. Upon the output voltage exceeding a predetermined level, the transistor Q17 turns off and an ordinary feedback control starts.
    Type: Application
    Filed: November 11, 2002
    Publication date: May 15, 2003
    Inventors: Akira Suzuki, Hirofumi Abe, Hideaki Ishihara
  • Patent number: 6559623
    Abstract: A method and circuit are shown for controlling an in-rush current to a voltage regulator circuit. A sense transistor is coupled in parallel with a pass transistor of the voltage regulator circuit and used to monitor the current through the pass transistor. A sense current through the sense transistor is converted to a voltage signal and input to an amplifier along with a ramping voltage signal generated in response to a circuit activation signal. An output of the amplifier drives a control gate of a current source that sources current to gate terminals of both the pass transistor and the sense transistor. A limiting circuit also monitors the sense current and sinks current from the control terminal of the current source in order to limit a maximum current through the pass transistor.
    Type: Grant
    Filed: June 3, 2002
    Date of Patent: May 6, 2003
    Assignee: Integration Associates Inc.
    Inventor: Matthijs D. Pardoen