Abstract: A constant-voltage power circuit incorporating an over-current protection circuit having a fold back current limiting capability operative through low input voltages, and being capable of arbitrarily setting current outputs. The constant-voltage power supply circuit is configured so that a voltage output with small amplitude from a differential amplifier circuit is subjected to amplitude expansion to be amplified to range fully from the ground potential approximately to the input voltage by means of an amplitude expansion circuit, which includes an inverter consisting of an NMOS transistor and a resistor, and that the voltage resulting from the amplitude expansion is subsequently input to the gate of a PMOS transistor configured to directly control an output transistor.

Abstract: A low dropout voltage regulator (LDO) includes a regulating circuit, an amplifier, and a first compensating path. The regulating circuit is configured to receive an input signal at an input terminal and provide an output signal at an output terminal in response to a control signal received at the control terminal. The amplifier may have a first input terminal coupled to a first input path and an output terminal be coupled to the control terminal of the regulating circuit via a path to provide the control signal. The first compensating path is coupled between a first node on the first input path and a first node on the path coupling the output terminal of the amplifier to the control terminal of the regulating circuit, the first compensating path including a first compensating capacitor.

Abstract: A differential amplifier having a positive input terminal, a negative input terminal, an output terminal, a bias terminal and a ground terminal is provided. The differential amplifier comprises a differential pair circuit and a current mirror circuit. Wherein, the differential pair circuit is coupled to the positive input terminal, the negative input terminal, the output terminal, and the bias terminal of the differential amplifier. The current mirror circuit receives a constant current from a current source, and mirrors the constant current to the differential pair circuit. The current mirror circuit further connects to the ground terminal of the differential amplifier, and the terminal of the current mirror circuit receiving the constant current is coupled to a first source/drain terminal of a first PMOS transistor. A second source/drain and a gate of the first PMOS transistor are connected to the bias terminal and the output terminal of the differential amplifier, respectively.

Abstract: A circuit for driving a capacitive load is provided. The circuit includes a differential signal sensor and a differential amplifier. The differential amplifier is arranged to drive the capacitive load. Further, the differential amplifier is arranged to receive an output voltage at one input, and to receive a reference voltage at another input. The output voltage is provided at the output of the differential amplifier. Also, the differential amplifier is arranged to receive a bias current. The differential signal sensor is arranged to determine whether the difference between the output voltage and the reference voltage is within a voltage window. If the difference between the output voltage and the reference voltage is inside of the voltage window, the bias current is provided at its normal value. However, if the difference between the output voltage and the reference voltage is outside of the voltage window, the bias current is increased so that the bias current linearly increases with respect to time.

Abstract: A linear voltage regulator is provided for providing an output voltage to a load. In a preferred embodiment, the linear voltage regulator comprises: an operational amplifier receiving a regulated voltage, and a first voltage reference, and providing a driving voltage; a first regulating transistor driven by the driving voltage, the regulating transistor receiving a system voltage, and providing the regulated voltage; a second regulating transistor receiving the regulated voltage, and providing an output voltage, the second regulating transistor controlled by a controlling voltage; a resistive voltage divider receiving the output voltage, and providing a second voltage reference; and a three-terminal adjustable shunt regulator receiving the second voltage reference, and providing the controlling voltage to the second regulating transistor.

Abstract: A voltage regulator circuit includes a single high voltage regulator, and a plurality of parallel low voltage regulators capable of receiving an intermediate voltage from the high-voltage regulator, and capable of outputting a regulated output voltage. The intermediate voltage is no higher than a breakdown voltage of the low voltage regulators.

Abstract: A device for driving a load such as an electric motor for driving a fan mounted on an automobile includes a semiconductor power FET for supplying a load current to the load, a voltage detector for detecting a load voltage, a current detector for detecting a load current and a control circuit for controlling an amount of the load current. The load current is limited to a first limiting level when the detected load current exceeds a predetermined current level, and to a second limiting level, which is lower than the first limiting level, when the load current exceeds the predetermined current level and the load voltage becomes lower than a predetermined voltage level. By limiting the amount of load current, the power FET is surely prevented from being damaged by over-current even if a circuit including the load is short-circuited.

Abstract: A direct current voltage boosting/bucking device includes a direct current voltage boosting circuit and a low drop-out (LDO) linear voltage converting circuit. The direct current voltage boosting circuit boosts an input voltage so as to generate an output voltage higher than the input voltage. The LDO linear voltage converting circuit converts the output voltage into a load voltage that is to be provided to a load, and controls the direct current voltage boosting circuit in accordance with a feedback signal from the load such that the output voltage and the load voltage have a minimum drop-out voltage differential therebetween and such that current flow through the load is maintained at a determined level.

Abstract: A regulated power source for supplying power to an external circuit includes a voltage sensing circuit and a voltage regulator. The voltage sensing circuit generates a feedback voltage by comparing voltage drops at a plurality of sense points within the external circuit. The feedback voltage is based on the maximum voltage drop at the sense points. The voltage regulator regulates the voltage supplied to the external circuit in accordance with the feedback voltage.

Abstract: An electric power steering control system comprising: an electric motor disposed in a vehicle to apply torque to a steerable wheel; a torque sensor disposed in the vehicle for detecting a steering wheel torque and generating a torque signal indicative thereof; a vehicle speed sensor, the vehicle speed sensor generating a vehicle speed signal; a controller coupled to the torque sensor, the vehicle speed sensor and the electric motor. The controller generates a scheduled compensated torque command to the electric motor. The scheduled compensated torque command is based on at least one of: a torque command signal responsive to the torque signal; a compensated torque command signal; and a blend of the torque command signal and the compensated torque command signal. At least one of the torque command signal, the compensated torque command signal and the blend is based the vehicle speed signal.

Abstract: A motor driver includes a first signal selector and a second signal selector. The first signal selector is used for selecting a signal to be supplied to an energizing unit of driving coils, and selects either one of a normal energizing pattern signal supplied from an energizing signal generator or a signal from the second signal selector based on a signal from an over-current detector. The second signal selector selects either one of a first non-normal energizing pattern signal from a first energizing signal output unit or a second non-normal energizing pattern signal from a second energizing signal output unit based on a signal from a rotary direction detector.

Abstract: A DC to DC power converter includes synchronous rectifiers which respond to a control waveform. Negative current from a load into the power converter is prevented by increasing the converter output voltage at a minimum current limit. The synchronous rectifiers may be held off in response to decision logic by activation of a hold-off circuit connected to a control terminal of a synchronous rectifier or of an ORing transistor at the converter output. When the synchronous rectifier is subsequently enabled, its control waveform may be increased slowly relative to the switching cycle.

Abstract: Embodiments of the invention provide for a system and method for driving LEDs with consistently good illumination and superior efficiency at lower cost and suitable for use with cheaper LEDs or with LEDs having wide component parameter tolerances over wide operating voltages and temperature variations.

Abstract: A circuit in an integrated circuit having input terminals coupled to a resistor network for selecting one of multiple digital states includes a tri-state circuit, a multiplexer, a comparator and a control circuit. A DAC can be used to generate a set of comparison voltage levels. The circuit detects the power connection and the resistance values of at least two resistors in the resistor network having a third resistor of fixed resistance. The resistance values for the two resistors are selected from a set of resistance values corresponding to the number of digital stages which can be programmed on each terminal. The power connection option doubles the number of digital stages to be programmed on each terminal. Thus, multiple programming states can be assigned to each control pin of an integrated circuit and a large number of programming states can be programmed using a small number of control pins.

Abstract: A voltage regulator has an output path to couple to a load. A first sense point at a first sense location on the output path is to sense a first feedback signal for the voltage regulator. And, a second sense point at a second sense location on the output path is to sense a second feedback signal for the voltage regulator.

Abstract: A voltage regulation scheme for an on-chip voltage generator includes a voltage sensing circuit (VSC) and a configurable buffer circuit (CBC) to regulate the on-chip voltage generator. The CBC generates an output signal that is received by the on-chip voltage generator to activate and de-activate the voltage generator. The VSC generates a voltage level detection (VLD) signal having a voltage level that is a function of the level of the on-chip generated voltage. The CBC receives a control signal that is used to dynamically configure the chip into an operational mode, as well as the VLD signal. In response to the control signal, the switch threshold of the CBC is configured to a predetermined level corresponding to the selected operational mode. The predetermined trip point causes the CBC to appropriately activate and de-activate the on-chip voltage generator to regulate the on-chip generated voltage at the level required by the configured operational mode.

Abstract: Power control circuitry and method for controlling a variable output DC power source. The power control circuitry may comprise a first comparator to compare a signal representative of an output current level of the variable output DC power source with a threshold level and provide a first output signal in response to the comparison. The power control circuitry may further comprise threshold input circuitry to provide the threshold level to the first comparator, the threshold level being a fixed threshold level if an output voltage of the variable output DC power source is less than or equal to a first fixed voltage level, the threshold level being a variable threshold level if the output voltage is greater than the first fixed voltage level.

Abstract: A constant voltage power supply circuit including: a differential operation type amplifier, of which a first input terminal is supplied with a reference signal, and of which a second input terminal is supplied with a feedback signal. The amplifier outputs a first control signal responsive to a difference between the reference signal and the feedback signal. An output voltage detection circuit detects an output voltage of the output transistor and applies the detected voltage as the feedback signal to the second input terminal of the amplifier. A first capacitor of which one end is connected to the output portion of the output transistor; and a first control circuit, of which a first input terminal is connected to a first output terminal of the amplifier, of which a second input terminal is connected to another end of the first capacitor, and of which an output terminal is connected to a control input terminal of the output transistor.

Abstract: A voltage regulator with a variable compensation capacitor is capable of driving a large variable dynamic current load. The regulator includes an error amplifier and an output stage amplifier. The variable compensation capacitor is disposed between the output terminal of the error amplifier and the output terminal of the output stage amplifier. In one embodiment, a NMOS transistor is disposed between the output terminal of the output stage amplifier and the variable compensation capacitor. The variable compensation capacitor may be, e.g., a PMOS transistor with the source and drain tied together. In one embodiment, a plurality of regulators is included on chip, e.g., such as a programmable device, where the output terminals of each regulator is tied together and used to drive the same load.

Abstract: A digitally-controlled, DC/DC converter includes at least one switched-mode power stage for the purpose of converting an input voltage (Vin) into an output voltage (Vout); the power stage including at least one controllable switching device, which is turned ON and OFF by a control device with temporal resolution ?t.

Abstract: A power supply circuit relating to the present invention comprises a differential amplifier for feeding out a voltage as a control voltage in accordance with a difference between a feedback voltage commensurate with an output voltage and a reference voltage, an output current control element for feeding out an output current in accordance with the control voltage fed thereto from the differential amplifier, an output line by way of which the output current is supplied to a load, a feedback line by way of which a voltage on the output line is fed back as the feedback voltage to the differential amplifier, the feedback line connected to the output line, and a clamping circuit for maintaining the control voltage so as not drop below a predetermined value.

Abstract: The present invention provides a voltage regulator which has high-speed responsibility with a low consumption current, and which can stably operate with a low output capacity. The voltage regulator includes: a reference voltage circuit, a voltage division circuit, a differential amplifier, an output transistor, a MOS transistor which has a gate to which an output of the differential amplifier is connected, a constant current circuit connected between a drain of the MOS transistor and the ground, and parallel-connected resistor and capacitor for phase compensation are connected between the drain of the MOS transistor and a gate of the output transistor.

Abstract: A circuit configuration provides an output voltage from an input voltage. The circuit configuration has a voltage regulator with an input terminal for receiving an input voltage, an output terminal for providing an output voltage, and drive input for receiving a drive signal. A drive circuit is coupled to the drive input and switches the voltage regulator on and off in a clocked manner according to a state signal.

Abstract: A transistor may operate as a sleep transistor or as a regulator.

Abstract: ORing diodes are used for power redundancy. In order to reduce the power loss due to the diode forward drop voltage, active ORing power MOSFETs are proposed to replace the diodes. With the active ORing controller and power MOSFETs, the power loss can be easily decreased by 90%. To make an N-channel MOSFET work like a diode when it is in reverse and have a very small forward voltage drop when it is in forward, an ORing controller is provided. Its offset, hysteresis, and propagation delay times are optimized for speed, stability, and noise immunity. Its ORing function is tested in an ORing demo board. Its FET check feature makes a live checkup of the ORing power MOSFETs to improve the reliability of the redundant power system.

Abstract: An arrangement having an electric motor (10) has a microcontroller (12) for influencing at least one motor function and a nonvolatile storage element (14) for storing at least one variable as a definition for that motor function. The arrangement also has an interface (13a) for a data line (13) for transferring the at least one variable, in particular a current limiting value (Iref) from or to a storage element (14) by way of the microcontroller (12), and optionally by way of an internal data bus (15). The invention also relates to use of the device in the context of batteries of fans, and program-controlled current limitation for startup of an electric motor (10).

Abstract: A linear predictive system for a DC—DC converter including a linear predictive controller, first and second adders and a multiplier. The DC—DC converter generates an output signal and includes a digital compensation block that converts a feedback error signal into a main duty cycle signal. The linear predictive controller predicts linear changes of the main duty cycle signal in response to changes of the output signal and provides a predictive duty cycle signal. The first adder subtracts the predictive duty cycle signal from the main duty cycle signal to provide a duty cycle delta. The multiplier multiplies the duty cycle delta by a gain factor to provide a duty cycle delta sample. The second adder adds the duty cycle delta sample to the first duty cycle signal to generate an adjusted duty cycle signal.

Abstract: A method and circuits to improve the stability of low dropout voltage regulators having an adaptive biased driving stage. Said improvement of stabilization is valid through the total range of output current possible. A serial impedance is added to the gate capacitance of the PMOS pass device of said LDO. Said serial impedance could be a resistor or a transistor. In case of low load currents said impedance is not dominating, for high load currents said impedance keeps the gate pole close to the resonance frequency of the output tank. In case of medium load currents, wherein the inner resistance of the driving stage is about equal to said serial impedance, the gate pole could get too low. This problem is solved by reducing said serial impedance by shunting. Said shunting can be performed stepwise depending on the size of the load current.

Abstract: Switchmode DC—DC power converters using one or more non-Silicon-based switching transistors and a Silicon-based (e.g. CMOS) controller are disclosed. The non-Silicon-based switching transistors may comprise, but are not necessarily limited to, III-V compound semiconductor devices such as gallium arsenide (GaAs) metal-semiconductor field effect transistors (MESFETS) or heterostructure FETs such as high electron mobility transistors (HEMTs). According to an embodiment of the invention, the low figure of merit (FoM), ?FET, of the non-Silicon-based switching transistors allows the converters of the present invention to be employed in envelope tracking amplifier circuits of wireless devices designed for high-bandwidth technologies such as, for example, EDGE and UMTS, thereby improving the efficiency and battery saving capabilities of the wireless devices.

Abstract: A voltage regulator circuit for use with an integrated circuit (IC) chip and an external voltage source includes a first transistor and a second transistor. The first transistor has the emitter thereof electrically connected to the external voltage source and the collector thereof electrically connected to the IC chip via a power input pin. The second transistor has the collector thereof electrically connected to ground, the base thereof electrically connected to the IC chip via a voltage-regulation control pin, and the emitter electrically connected to the base of the first transistor. The voltage regulator circuit is utilized for regulating a source voltage received from the external voltage source via the first transistor in response to a current signal flowing through the voltage-regulation control pin to have the regulated voltage inputted into the integrated circuit chip via the power input pin.

Abstract: A field effect transistor (FET) driver circuit includes an error amplifier for providing a FET control signal and a current limiting amplifier for preventing excessive current flow through the FET. The current limiting amplifier generates an overcurrent signal when an excessive current is detected. In response to the overcurrent signal, a voltage control circuit adjusts the voltage at the output of the error amplifier to turn off the FET. Meanwhile, a pulldown circuit at an input of the error amplifier adjusts the voltage provided to that input to cause the error amplifier to provide an output voltage that also tends to turn off the FET. If a buffer is present at that input to the error amplifier, a second pulldown circuit is placed at the input to the buffer to maintain a stable unity gain across the buffer.

Abstract: A regulating system comprises an input terminal for applying an input voltage, and an output terminal for providing an output voltage. A semiconductor element is connected between the input terminal and the output terminal and is operable to regulate the output voltage. A regulating signal generation circuit generates the regulating signal and comprises a current mirror arrangement including a first and second current mirror path, wherein a controlled current source is connected in series to the first current mirror path. The controlled current source induces a first current dependent on one of the output signals in the first current mirror path. A second current through the second current mirror path is dependent on the first current. A splitter circuit conducts the second current to the output terminal or to a reference potential, dependent on a load path voltage applied over the load path of the semiconductor element.

Abstract: In a power supply of a synchronous rectification type, the self-turn on phenomenon of MOSFET is suppressed without increase of the drive loss to thereby improve the power efficiency. In a synchronous rectifier circuit, a threshold value of a commutation MOSFET is made higher than that of a rectification MOSFET and particularly a threshold value of a commutation MOSFET 3 is made 0.5V or more higher than that of a rectification MOSFET 2. The threshold value of the rectification MOSFET 2 is lower than 1.5V and the threshold of the commutation MOSFET 3 is higher than 2.0V.

Abstract: A voltage regulator, which generates and outputs a given voltage based on a preset reference voltage, includes: a detection circuit part detecting the output voltage and generating and outputting a voltage based on the detected voltage; first and second operational amplifiers each comparing the output voltage of said detection circuit part and the preset reference voltage and outputting a voltage representing a comparison result, the first operational amplifier being controlled based on control signals supplied externally and consuming a larger amount of electric current than the second operational amplifier; and an output circuit part comprising an output transistor outputting an electric current based on the output voltages of the first and second operational amplifiers.

Abstract: A power supply circuit includes a DC—DC conversion circuit including a high side transistor and a low side transistor connected in series between a power supply voltage and a reference potential and producing a voltage as PWM controlled output which is obtained by turning “on” and “off” each of the transistors with each PWM signal. The power supply circuit also includes a PWM circuit and output driver that detects a level of an intermediate node potential at a junction point of the high side transistor and the low side transistor after turning “off” the high side transistor, and turning “on” the low side transistor when the intermediate node potential becomes below or equal to a predetermined potential.

Abstract: The invention specifies a circuit arrangement for voltage regulation in which, in addition to a control loop having a comparator (4), an output stage (3) and a feedback path, an auxiliary regulator (11–14) is provided which limits the voltage drop across the output stage (3) and, for this purpose, comprises a control element (11) and a further comparator (13). Hence, the output stage (3) of the voltage regulator may advantageously have a withstand voltage which is lower than the supply voltage which can be supplied at the input (1). On account of its good supply voltage suppression, the voltage regulator described is particularly well suited to supplying on-chip VCOs.

Abstract: A linear low dropout voltage regulator is described that makes use of a depletion mode NMOS pass transistor and of a PMOS transistor in series to the NMOS transistor and connected to its drain. The depletion NMOS transistor assures low dropout operations, while the series PMOS transistor allows the current regulation even under the condition of shorted load. The same PMOS transistor may be used to disable the current in the load without generating a negative voltage at the gate of the depletion pass transistor. This regulator is inherently stable without the need for an output capacitor in parallel to the load.

Abstract: A method and system for preventing the movements of an electric vehicle in a direction opposite a desired direction are described herein. The electric vehicle comprises an electric motor linked to at least one wheel of the vehicle. The method comprises detecting the direction of the desired movement; detecting a movement of the vehicle in the direction opposite the desired direction; calculating a torque to be applied by the motor to the at least one wheel to counteract the movement of the vehicle in the undesired direction; and applying the counteracting torque to the at least one wheel via the electric motor.

Abstract: A voltage regulator, regulating a supply voltage and outputting a regulated voltage. The voltage regulator comprises a two stage OP which outputs a first voltage and a second voltage according to a reference voltage and a feedback voltage. A NMOS transistor controlled by a voltage detection unit, to receive the second voltage when the detected supply voltage is in a high mode. A PMOS transistor controlled by the voltage detection unit, to receive the first voltage when the detected supply voltage is in a low mode. A feedback circuit for receiving the regulated voltage and outputting the feedback voltage to the two stage OP.

Abstract: There is provided by this invention soft switching interleaved power converters that are suitable for high power and high voltage applications such as plasma processing. They have greatly reduced switching losses and diode reverse-recovery losses which allows operation at high switching frequencies. The peak values of the reverse-recovery currents of the diodes are substantially less then their peak forward operating currents. The power converters incorporate power converter cells that comprise a plurality of switching assemblies that are operated with an interleaved switching pattern, and that are each connected to an input terminal of an inductor assembly that also has a common terminal. The inductance between each pair of input terminals is less than the inductance between each input terminal and the common terminal of the inductor assembly.

Abstract: A power fluctuation inhibiting device for effectively inhibiting fluctuation of power supply voltage that is supplied to internal circuits. The inhibiting device includes a power fluctuation measuring circuit for measuring peaks in the fluctuation of the power supply voltage produced when the internal circuits are operated. A clock signal control circuit adjusts phases of clock signals provided to respective ones of the internal circuits in accordance to the peak measuring result to substantially offset the fluctuation peaks produced when the internal circuits are operated.

Abstract: A mobile communications device (50) includes a plurality of LDOs (30) for supplying a stable voltage to various circuits on the device. In a normal mode, the LDO's main bandgap voltage source (12) supplies a voltage to a main amplifier (16). During deep sleep mode, sleep logic (40) places the LDOs in a sleeping state, where a low current sleep bandgap voltage source (32) supplies a voltage to a smaller, sleep amplifier (36), which maintains a charge on capacitors (24, 26) for a fast transitions to a full ON state.

Abstract: Quiescent currents in a circuit that includes a regulator are reduced by disabling selected portions of the circuit. A window comparator is selected activated to evaluate the input voltage such that a first operating mode is activated when the input voltage is within a predetermined voltage range and a second operating mode is activated when the input voltage is outside of the predetermined voltage range. The battery voltage is used a reference signal when the first mode is selected such that a voltage reference circuit can be disabled to reduce power, while the voltage reference circuit is enabled when the second mode is selected. Another comparator circuit is periodically activated to compare the reference signal to the output voltage. The regulator is disabled after the output voltage exceeds a first level. The output voltage collapses below a second level associated, the evaluation and regulation process is repeated.

Abstract: A voltage regulator includes a two-stage feedback circuit for driving a controller formed by a transistor 10. The feedback circuit includes an error amplifier 30 and an output amplifier 20, a simple compensating circuit in the form of a resistor RSZ inserted between the inverting input 22 and the non-inverting input 24 of the output amplifier 20 resulting in a high phase reserve of the feedback circuit. The resistor RSZ limits the gain of the error amplifier 30 for small load currents by reducing its effective output impedance. This compensating circuit results in the two-stage feedback circuit being highly stable even when very low load currents are involved. This now makes it possible to achieve a very simple linear voltage regulator architecture totally integrated on a single chip. It is especially in battery-powered handhelds such as e.g.

Abstract: The problem of charge leakage in the AC compensation filter for the error amplifier of a pulse width modulation (PWM)-based DC—DC converter is effectively obviated by controllably sampling and storing the voltage across the AC compensation filter, in response to a transition of the operation of a DC power supply from run or active mode to quiescent or sleep mode. The sampled voltage is retained as a compensation voltage throughout the quiescent mode, so that it will be immediately available to the PWM circuitry at the termination of the quiescent interval. This serves to ensure a relatively smooth (low noise) power supply switch-over during a subsequent transition from quiescent to active mode.

Abstract: In one embodiment, a turn-on delay control structure (30) includes a sense FET device (31) that is coupled to a switch node (13) in a synchronous DC-DC converter (10). The DC-DC converter includes a high-side switch (11) and a low-side switch (12). The sense FET device (31) senses current conduction in a body diode (18) of the low-side switch (12). A current sensing/comparator circuit (32) coupled to the sense FET (31) detects changes in current conduction. A delay circuit (33) and a clock/logic circuit (32) coupled to the current sensing/comparator circuit (32) predict and adjust delay time in switching between the high-side switch (11) and the low-side switch (12).

Abstract: Devices, circuits, and methods generate a substantially constant output voltage. A power storage element generates a DC output voltage from an input voltage. The output is sampled to generate a feedback signal. An error amplifier generates an error signal from the feedback signal and a reference voltage. A ramp generator generates a ramp signal from the error signal. A comparator generates a pulse signal by comparing the ramp signal to a threshold voltage. The pulse signal is used to control a power switch, which switches the power storage element on and off. The pulse signal is generated such that, if the input voltage changes within a certain range, a width of its pulses changes so as to maintain the output voltage substantially constant.

Abstract: A transient suppression system is configured for providing power regulation to a microelectronic device. A pre-adjust stage is configured to pre-charge or pre-discharge a bypass capacitor as driven by a predictive transient event signal and in anticipation of a transient event.

Abstract: In a stabilized power supply unit having a current limiting function, the unit is designed to have a steep over-current dropping characteristic. This minimizes the over-current region, prevents oscillation during a startup, and limits inrush current during a start up within a predetermined range. The output voltage of the power supply unit provides a constant output voltage by controlling an output transistor by means of a differential amplifier amplifying the difference between a reference voltage and an output feedback voltage. The power supply unit has a first high-gain, slow-response type current limiting circuit that outputs a first current limiting signal when the output current of the power supply unit exceeds a predetermined level, and a second low-gain, quick-response type current limiting circuit that outputs a second current limiting signal when the outputs exceeds the predetermined level.

Abstract: A first constant voltage circuit includes an operational amplifier having a reference voltage applied to a first input terminal thereof and a voltage obtained as a result of an output voltage being divided applied to a second input terminal thereof, and controls an output transistor with an output of its operational amplifier. A second constant voltage circuit includes an operational amplifier having a reference voltage applied to a first input terminal thereof and a voltage obtained as a result of the output voltage being divided applied to a second input terminal thereof, and controls the output transistor with an output of its operational amplifier, a current consumption of the second constant voltage circuit being smaller than a current consumption of the first constant voltage circuit. A switching part is provided for each of those operational amplifiers and makes connection and disconnection between an output terminal of the operational amplifier and the output transistor.