With Plural Condition Sensing Patents (Class 323/275)
  • Patent number: 11966240
    Abstract: An apparatus includes an amplifier, a pass transistor connected to a load and to an input of the amplifier, and a capacitor connected between the amplifier and the pass transistor.
    Type: Grant
    Filed: November 3, 2021
    Date of Patent: April 23, 2024
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Siva K. Chinthu, Veerendranath P. Sundar
  • Patent number: 11962141
    Abstract: Devices having one primary transistor, or a plurality of primary transistors in parallel, protect electrical circuits from overcurrent conditions. Optionally, the devices have only two terminals and require no auxiliary power to operate. In those devices, the voltage drop across the device provides the electrical energy to power the device. A third or fourth terminal can appear in further devices, allowing additional overcurrent and overvoltage monitoring opportunities. Autocatalytic voltage conversion allows certain devices to rapidly limit or block nascent overcurrents.
    Type: Grant
    Filed: January 27, 2023
    Date of Patent: April 16, 2024
    Assignee: Symptote Technologies LLC
    Inventor: Mark D. Creech
  • Patent number: 11942862
    Abstract: A voltage generation module and a power supply management chip include a reference voltage generation circuit, a comparison circuit, a switch circuit and a voltage control circuit. The reference voltage generation circuit generates a first reference voltage and a second reference voltage. The comparison circuit applies a turn-on control signal or a turn-off control signal. In the case that the switch circuit controls the input terminal to be electrically disconnected from the voltage output terminal, the voltage control circuit controls an output voltage signal from the voltage output terminal in accordance with the first reference voltage.
    Type: Grant
    Filed: May 31, 2021
    Date of Patent: March 26, 2024
    Assignees: Beijing ESWIN Computing Technology Co., Ltd., Hefei ESWIN IC Technology Co., Ltd.
    Inventor: Yonghua Zhou
  • Patent number: 11867573
    Abstract: A temperature detection device includes: a detection part in which a first resistor element and a second resistor element having different relations between temperature variation and variation in an electric resistance value are provided; a switch provided capable of performing a switching operation so as to be coupled to one of a first circuit including wiring to which the first resistor element is coupled and a second circuit including wiring to which the second resistor element is coupled; a power supply circuit configured to apply a voltage to the one circuit coupled to the power supply circuit through the switch to generate an electric signal in the one circuit; and a controller configured to detect a temperature of the detection part based on a strength of the electric signal output from the one circuit. The controller is configured to periodically cause the switch to perform the switching operation.
    Type: Grant
    Filed: September 27, 2021
    Date of Patent: January 9, 2024
    Assignee: Japan Display Inc.
    Inventor: Masashi Takahata
  • Patent number: 11853091
    Abstract: A voltage regulating device and a mode switching detecting circuit are provided. The mode switching detecting circuit is configured to reset a soft start circuit of the voltage regulating device. The mode switching detecting circuit includes a mode switching signal detector, a reset signal generator, and a reset status detector. The mode switching signal detector receives a mode switching signal and generates a setting signal according to a transition edge of the mode switching signal. The reset signal generator is coupled to the mode switching signal detector and generates a reset activating signal according to the setting signal. The reset activating signal drives the soft start circuit to perform a reset operation. The reset status detector compares an output voltage of the soft start circuit and a reference voltage to generate a clear signal. The reset signal generator clears the reset activating signal according to the clear signal.
    Type: Grant
    Filed: November 4, 2021
    Date of Patent: December 26, 2023
    Assignee: ALi Corporation
    Inventor: Andrew Yang Lee
  • Patent number: 11709514
    Abstract: A voltage regulator is provided wherein electricity flows through a second transistor in an operating state in which a control unit) applies an operating voltage to a base of the second transistor. A Zener diode sets, in the operating state, a voltage of a second conductive path to a voltage corresponding to a voltage across the Zener diode. A current corresponding to an addition value obtained by adding a value of a current flowing through a second resistor portion in the operating state, a value of a current flowing through a third resistor portion in the operating state, and a value of a current flowing through the Zener diode in the operating state flows through a ground-side resistor portion. A control unit stops the output of the operating voltage when a voltage of the second conductive path is lower than or equal to a threshold value.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: July 25, 2023
    Assignees: AutoNetworks Technologies, Ltd., Sumitomo Wiring Systems, Ltd., Sumitomo Electric Industries, Ltd.
    Inventors: Kazushi Shimamoto, Yuuki Sugisawa
  • Patent number: 11703899
    Abstract: A voltage regulator, including an amplifier, a voltage setting circuit and a power transistor, is provided. The amplifier includes a first current source and a second current source. The amplifier has two input terminals to respectively receive a reference voltage and a feedback voltage. The first current source is coupled between the operating power source and an output terminal of the amplifier, and provides a first current to the output terminal. The second current source is coupled between the output terminal and a reference ground terminal, and draws a second current from the output terminal. The voltage setting circuit is coupled to the output terminal, and increases a driving voltage on the output terminal according to the first current in a voltage bypass mode. The power transistor receives the driving voltage and generates an output voltage according to the driving voltage based on the operating power source.
    Type: Grant
    Filed: October 5, 2021
    Date of Patent: July 18, 2023
    Assignee: ALi Corporation
    Inventors: Chih-Yuan Hsu, Andrew Yang Lee
  • Patent number: 11703896
    Abstract: The present disclosure relates to a low-dropout regulator that limits a quiescent current. It mainly includes an error amplifier, an output switching transistor, a feedback switching transistor, a current duplicating circuit, and a clamping current source. The clamping current source is added between an input voltage and the feedback switching transistor, so that a feedback current outputted by the feedback switching transistor is clamped, and the highest value is only proportional to a current value of the clamping current source. In this way, the quiescent current outputted by the low-dropout regulator is no longer increasing indefinitely in proportional to a load current, which can effectively solve the technical problems of poor stability and decreased efficiency caused by the infinite increase of the quiescent current.
    Type: Grant
    Filed: March 16, 2022
    Date of Patent: July 18, 2023
    Assignee: NUVOTON TECHNOLOGY CORPORATION
    Inventor: Hua-Chun Tseng
  • Patent number: 11563380
    Abstract: A control unit (4) generates a control signal. A switching device (2) performs switching according to the control signal and generates a primary side input voltage from a supply voltage. A transformer (1) converts the primary side input voltage to a secondary side output voltage. A drive circuit (7) drives a power device (8) according to the secondary side output voltage. The control unit (4) includes a table listing a correspondence relationship between supply voltages and set values of control signals for obtaining a desired secondary side output voltage, refers to the table and generates the control signal having a set value corresponding to the supply voltage.
    Type: Grant
    Filed: May 15, 2018
    Date of Patent: January 24, 2023
    Assignee: Mitsubishi Electric Corporation
    Inventors: Koichi Taguchi, Shoji Saito
  • Patent number: 11409313
    Abstract: Aspects of the present disclosure provide a voltage reference architecture. An example circuit generally includes a resistor ladder, a reference current source, and a plurality of multiplexers. The resistor ladder comprises a plurality of resistive elements coupled in series. The reference current source has an output coupled to the resistor ladder. The plurality of multiplexers have inputs coupled to one or more nodes between the plurality of resistive elements and the output of the reference current source, each of the multiplexers having an output selectively coupled to one of the inputs of the multiplexer.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: August 9, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Jize Jiang, Hua Guan, Kuan Chuang Koay
  • Patent number: 11281248
    Abstract: An integrated circuit includes a current detection circuit configured for coupling to an output terminal of a voltage regulator, the output terminal providing a total current that is divided into a load current to a load device and a feedback current for providing a feedback signal to the voltage regulator. The current detection circuit includes a current sampling circuit and a current comparator circuit. The current sampling circuit provides a first current that is proportional to the total current, a second current that is proportional to the feedback current, and a third current that is proportional to the load current. The current comparator circuit is configured to compare the third current with a threshold current, and output a detection signal that indicates whether the third current matches the threshold current, thereby indicating a target load device is detected.
    Type: Grant
    Filed: February 12, 2020
    Date of Patent: March 22, 2022
    Assignee: NUVOTON TECHNOLOGY CORPORATION
    Inventors: Chang-Xian Wu, Bal S. Sandhu
  • Patent number: 11165335
    Abstract: According to an aspect, a non-regulated power converter includes a plurality of switching tank converter (STC) modules configured to be connected in parallel and to a load. The plurality of STC modules includes a first STC module configured to generate a first output current and a second STC module configured to generate a second output current. The first STC module includes an output current (OC) measuring circuit configured to measure a value of the first output current, and a dead time (DT) adjustor configured to compare the value of the first output current with a value of a minimum output current provided by the plurality of STC modules. The DT adjustor is configured to adjust a dead time in response to the value of the first output current being greater than the value of the minimum output current.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: November 2, 2021
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Michele Sblano, Saverio De Palma, Massimiliano Picca, Stefano Casula
  • Patent number: 10873327
    Abstract: A hot swap controller circuit includes a comparator and current control circuitry. The comparator is configured to compare voltage across a power transistor controlled by the hot swap controller circuit to a predetermined threshold voltage. The current control circuitry is coupled to the comparator. The current control circuitry is configured to limit current through the power transistor to no higher than a predetermined high current based on the voltage across the transistor being less than the predetermined threshold voltage. The current control circuitry is also configured to limit the current through the transistor to be no higher than a predetermined low current based on the voltage across the transistor being greater than the predetermined threshold voltage. The predetermined high current is greater than the predetermined low current.
    Type: Grant
    Filed: January 9, 2020
    Date of Patent: December 22, 2020
    Assignee: Texas Instruments Incorporated
    Inventor: Artem Andreevich Rogachev
  • Patent number: 10848058
    Abstract: An embodiment circuit includes a charge pump configured to receive an input voltage at an input terminal, and a clock signal at a clock input, the charge pump being further configured to produce a first output voltage that is a multiple of the input voltage by a factor N. The circuit further includes an input stage including a reference terminal configured to receive a reference voltage, and an output terminal configured to provide the input voltage to the charge pump. The circuit also includes a capacitive element coupled to the charge pump and chargeable to a second output voltage, and a feedback network including a first feedback loop configured to feed back the first output voltage to an input of the input stage, and a second feedback loop configured to maintain a fixed offset between the first output voltage and the second output voltage.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: November 24, 2020
    Assignee: STMICROELECTRONICS S.R.L.
    Inventor: Calogero Marco Ippolito
  • Patent number: 10700518
    Abstract: A control circuit for controlling multiple power supplies having their outputs coupled in series is configured to in response to an output current reaching a defined current threshold of a power supply of the power supplies, control the power supply to operate in its constant current mode so that the output current is regulated at the defined current threshold as the remaining power supplies operate in their constant voltage mode, and in response to the output voltage of the power supply reaching a defined voltage threshold, control the power supply to operate in its constant voltage mode so that the power supply provides a first regulated output voltage to its output as the remaining power supplies provide a second regulated output voltage different than the first regulated output voltage to their output. Various other systems, power supplies, control circuit and methods are also disclosed.
    Type: Grant
    Filed: October 8, 2015
    Date of Patent: June 30, 2020
    Assignee: Astec International Limited
    Inventors: Antonio Remetio Soleño, Ronnie Bachiller Gozun, Eric Ortaliz Henares, Vincent Vicente Vivar
  • Patent number: 10658856
    Abstract: A battery management system (BMS) used in a battery pack, the battery pack has a discharging switch coupled between a battery and a load, and the load has a capacitor charged by the battery pack. The BMS has a driver circuit having a power supply terminal to receive a drive voltage, a ground reference terminal coupled to receive the battery pack voltage and an output terminal coupled to a control terminal of the discharging switch. The BMS generates a normal drive voltage and a ramp drive voltage, and the normal drive voltage is selected as the drive voltage when the voltage difference between the battery voltage and the battery pack voltage is less than a threshold voltage, and the ramp drive voltage is selected as the drive voltage when the voltage difference between the battery voltage and the battery pack voltage is higher than the threshold voltage.
    Type: Grant
    Filed: November 2, 2018
    Date of Patent: May 19, 2020
    Assignee: Monolithic Power Systems, Inc.
    Inventors: Paolo Baruzzi, Kai Chen
  • Patent number: 10637237
    Abstract: This invention provides a power switch circuit and a power circuit using the power switch circuit. In particular, the power switch circuit includes a first reverse current monitoring circuit and a second reverse current monitoring circuit. The first reverse current monitoring circuit is coupled to a power transistor, and is configured to detect whether a reverse current flows through the power transistor to a voltage input terminal for a predetermined period of time, and only if yes, turn off the power transistor. The second reverse current monitoring circuit is coupled to the power transistor, and is configured to detect whether a reverse current flows through the power transistor to the voltage input terminal, and if yes, turn off the power transistor immediately.
    Type: Grant
    Filed: March 2, 2017
    Date of Patent: April 28, 2020
    Assignee: Green Solution Technology Co., Ltd.
    Inventors: Li-Min Lee, Zhong-Wei Liu, Shian-Sung Shiu, Yong-Heng Jiang
  • Patent number: 10630195
    Abstract: A converter includes a first diode having an anode and a cathode connected respectively to an input terminal and a first output terminal, a second diode having an anode and a cathode connected respectively to a second output terminal and the input terminal, a first transistor connected between the first output terminal and the input terminal, a second transistor connected between the input terminal and the second output terminal, and a bidirectional switch connected between the input terminal and a third output terminal and including third to sixth diodes and a third transistor. Each of the first diode, the second diode, and the third transistor is made of a wide bandgap semiconductor. Each of the first and second transistors and the third to sixth diodes is made of a semiconductor other than the wide bandgap semiconductor.
    Type: Grant
    Filed: April 12, 2016
    Date of Patent: April 21, 2020
    Assignee: TOSHIBA MITSUBISHI-ELECTRIC INDUSTRIAL SYSTEMS CORPORATION
    Inventors: Keisuke Ohnishi, Shoichi Abe, Kazunori Sanada
  • Patent number: 10591942
    Abstract: A voltage regulator which includes a differential amplifier circuit containing a first and second input transistors, controlling a gate-source voltage in each of the first and second input transistors including: a current source configured to drive the differential amplifier circuit; the first input transistor containing a gate; the second input transistor containing a gate; and a voltage controller including at least one of a first voltage control circuit to control a voltage at a tail connection point, a second voltage control circuit to control the voltage at the gate of the first input transistor, a third voltage control circuit to control the voltage at the tail connection point, and a fourth voltage control circuit to control the voltage at the gate of the second input transistor.
    Type: Grant
    Filed: July 9, 2019
    Date of Patent: March 17, 2020
    Assignee: ABLIC INC.
    Inventors: Tadakatsu Kuroda, Tsutomu Tomioka, Hideyuki Sawai, Michiyasu Deguchi
  • Patent number: 10566965
    Abstract: A hot swap controller circuit includes a comparator and current control circuitry. The comparator is configured to compare voltage across a power transistor controlled by the hot swap controller circuit to a predetermined threshold voltage. The current control circuitry is coupled to the comparator. The current control circuitry is configured to limit current through the power transistor to no higher than a predetermined high current based on the voltage across the transistor being less than the predetermined threshold voltage. The current control circuitry is also configured to limit the current through the transistor to be no higher than a predetermined low current based on the voltage across the transistor being greater than the predetermined threshold voltage. The predetermined high current is greater than the predetermined low current.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: February 18, 2020
    Assignee: Texas Instruments Incorporated
    Inventor: Artem Andreevich Rogachev
  • Patent number: 10539624
    Abstract: According to the invention, in an energy accumulator emulation the accuracy of energy accumulator emulation is increased in that a load current demand on the energy accumulator (20) is converted to a cell tester load current (IZ) of a real reference cell (6) based on the configuration of the energy accumulator (20) and the cell tester load current (IZ) is applied to the reference cell (6), and thereby the cell voltage (UZ) of the reference cell (6) is measured and the cell voltage (UZ) of the reference cell (6) is converted to a first energy accumulator voltage (UB) based on the configuration of the energy accumulator (20), a second energy accumulator voltage (UB_Mod) is calculated from the energy accumulator model (10) and the load current demand and the first energy accumulator voltage (UB) is compared to the second energy accumulator voltage (UB_Mod) and the energy accumulator model (10) is adjusted if the first energy accumulator voltage (UB) deviates by a specified tolerance range (TB) from the second en
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: January 21, 2020
    Assignee: AVL LIST GmbH
    Inventor: Gottfried Schipfer
  • Patent number: 10496117
    Abstract: A voltage regulator includes an overshoot detection circuit which detects an overshoot based on an output voltage, an overshoot suppression circuit which controls a gate voltage of an output transistor based on a detection signal of the overshoot detection circuit, a state monitoring circuit which monitors a state of the voltage regulator, a timer circuit which operates the overshoot detection circuit for a preset period in response to a signal of the state monitoring circuit, and a timer off circuit which shortens the preset period counted by the timer circuit in response to the detection of the overshoot.
    Type: Grant
    Filed: May 15, 2019
    Date of Patent: December 3, 2019
    Assignee: ABLIC INC.
    Inventor: Yasuhiko Ogura
  • Patent number: 10425075
    Abstract: Driver circuits with S-shaped gate drive voltage curves for ramp-up and ramp-down of power field effect transistors are presented. In ramp-up, the S-shaped curve rapidly ramps the gate voltage of the power FET to its threshold. This ramp-up is self-terminating. The gate voltage of the power FET is slewed through saturation with a time constant. After a predetermined time, the gate of the power FET is driven to approach the supply voltage level. In ramp-down, the S-shaped curve rapidly ramps the gate voltage of the power FET down to its threshold voltage. This ramp-down is self-terminating. The gate voltage of the power FET is slewed through saturation. The gate-source voltage of the power FET is rapidly ramped down to zero. Such S-shaped curves for the gate drive signal allow the control of the transition times of the gate drive signal to acceptable levels of voltage/current spikes and electromagnetic interference.
    Type: Grant
    Filed: April 30, 2018
    Date of Patent: September 24, 2019
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Kelly Consoer, Bryan Quinones, Kevin Yi Cheng Chang, Mark Mercer
  • Patent number: 10389224
    Abstract: A power converter including: a regulator including an output terminal to output an output voltage according to a first reference voltage, the output terminal to be coupled to a load; and a controller coupled to the output terminal, the controller to increase a current at the output terminal when a voltage at the output terminal is lower than a second reference voltage, and to decrease the current at the output terminal when the voltage at the output terminal is greater than a third reference voltage.
    Type: Grant
    Filed: November 5, 2014
    Date of Patent: August 20, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventor: Chaofeng Huang
  • Patent number: 10373539
    Abstract: Disclosed are a power supply unit and a display device including the same, which prevent a source drive IC from being damaged by a supply reversal between a VDD voltage and an HVDD voltage. The power supply unit may include a first voltage generator that generates a first voltage and a first voltage line connected to the first voltage generator for supplying the first voltage to a plurality of first source drive ICs of the display panel. A second voltage generator is included that generates a second voltage, and a second voltage line is connected to the second voltage generator for supplying the second voltage to a plurality of second source drive ICs of the display panel. The power supply unit may further include a diode circuit that includes at least one diode connected between the first voltage line and the second voltage line.
    Type: Grant
    Filed: August 23, 2017
    Date of Patent: August 6, 2019
    Assignee: LG Display Co., Ltd.
    Inventors: Seunghwan Kim, Young Sun Kim
  • Patent number: 10361190
    Abstract: A standard cell circuit includes a standard cell unit and a first resistive device. The standard cell unit is coupled to at least one resistor. The first resistive device is coupled to the standard cell unit and provides a first current path for a first current to flow through.
    Type: Grant
    Filed: May 31, 2016
    Date of Patent: July 23, 2019
    Assignee: MEDIATEK INC.
    Inventors: Kin-Hooi Dia, Hugh Thomas Mair, Shao-Hua Huang, Wen-Yi Lin
  • Patent number: 10345840
    Abstract: A novel low dropout regulator (LDO) is presented. The LDO includes the generation of a first feedback signal and a second feedback signal. The first feedback signal and a reference signal connect to a first error amplifier. The second feedback signal and the first error amplifier output signal connect to a second error amplifier. The output signal from the second error amplifier is coupled to the gate of a FET transistor. The FET transistor can be either a p-channel FET transistor, an n-channel FET transistor, a NMOS pass transistor, or a PMOS pass transistor. The positive input terminal or the negative input terminal of the first amplifier or of the second amplifier therefore need to be configured accordingly. When the source of the FET transistor is connected to the input voltage VIN, the drain of the FET transistor is the output voltage VOUT; when the drain of the FET transistor is connected to the input voltage VIN, the source of the FET transistor is the VOUT.
    Type: Grant
    Filed: January 11, 2019
    Date of Patent: July 9, 2019
    Inventor: Hua Cao
  • Patent number: 10331152
    Abstract: A circuit for generating an output voltage, and regulating the output voltage to a target voltage, is described. The circuit comprises a pass device coupled between an input voltage level and an output voltage level, an error amplifier stage configured to generate a first control voltage on the basis of a reference voltage and the output voltage, a buffer stage configured to generate a drive signal for the pass device on the basis of the first control voltage, and a tracking circuit configured to track a voltage across the pass device and to generate a second control voltage on the basis of the voltage across the pass device. The buffer stage comprises a variable resistance element, for limiting a current flowing through the buffer stage on the basis of the second control voltage.
    Type: Grant
    Filed: April 6, 2018
    Date of Patent: June 25, 2019
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Mihail Jefremow, Dan Ciomaga, Gennadii Tatarchenkov, Stephan Drebinger, Fabio Rigoni
  • Patent number: 10326436
    Abstract: A hot swap controller circuit includes a comparator and current control circuitry. The comparator is configured to compare voltage across a power transistor controlled by the hot swap controller circuit to a predetermined threshold voltage. The current control circuitry is coupled to the comparator. The current control circuitry is configured to limit current through the power transistor to no higher than a predetermined high current based on the voltage across the transistor being less than the predetermined threshold voltage. The current control circuitry is also configured to limit the current through the transistor to be no higher than a predetermined low current based on the voltage across the transistor being greater than the predetermined threshold voltage. The predetermined high current is greater than the predetermined low current.
    Type: Grant
    Filed: September 29, 2017
    Date of Patent: June 18, 2019
    Assignee: Texas Instruments Incorporated
    Inventor: Artem Andreevich Rogachev
  • Patent number: 10291053
    Abstract: An adaptive constant current-constant voltage (CC-CV) transition circuit comprises an amplifier, a series-pass device with current sense, a feedback network and a constant current controller to provide a stable and smooth transition between a constant voltage mode and a constant current mode, and vice versa. A voltage regulator loop comprises an amplifier, an optional buffer, a series-pass device with current sense and a feedback network which provides a feedback voltage to the amplifier. A current regulation loop comprises the amplifier, the optional buffer, the series-pass device, the feedback network and a constant current controller comprising a trans-impedence amplifier and a transconductance comparator which generate a current signal to a pseudo-constant bias (PCB) and a voltage signal to the adaptive compensation network (ACN) of the amplifier.
    Type: Grant
    Filed: August 20, 2018
    Date of Patent: May 14, 2019
    Assignee: Miot Limited
    Inventors: Ka Wai Ho, King Man Lai, Chiu Sing Celement Tse
  • Patent number: 10261534
    Abstract: Methods and systems for a low-dropout regulator may comprise a voltage regulator comprising: (a) a pass transistor having a first terminal at a control gate, a voltage input at a second terminal, and a voltage output at a third terminal, and (b) an adaptive control circuit (ACC), electrically coupled to a reference voltage and each of the terminals of the pass transistor. The ACC may determine a ?V between the second and third terminals and cause an error signal to be applied to the first terminal to keep ?V essentially constant as the voltage input varies. The ACC may include a voltage summing circuit electrically coupled to the reference voltage and the input voltage to generate a comparison value. An error amplifier electrically coupled to the control gate and to the voltage summing circuit may generate the error signal from the comparison value and the output voltage.
    Type: Grant
    Filed: November 20, 2015
    Date of Patent: April 16, 2019
    Assignee: Maxlinear, Inc.
    Inventors: Joseph Nabicht, Branislav Petrovic
  • Patent number: 10193535
    Abstract: Provided are an oscillation circuit, a booster circuit, and a semiconductor device capable of reducing power consumption when a power supply voltage is high. In a ring oscillator circuit which is the oscillation circuit, a PMOS transistor in each of inverter circuits has a substrate connected to a first power supply voltage, and a source connected to a drain of a PMOS transistor, which is a first constant current element configured to control a supply current to the inverter circuit, and the PMOS transistor, which is the first constant current element, has a source connected to a second power supply voltage VREG, which serves as a constant voltage when the first power supply voltage is at a predetermined voltage or higher.
    Type: Grant
    Filed: March 16, 2017
    Date of Patent: January 29, 2019
    Assignee: ABLIC INC.
    Inventor: Masaya Murata
  • Patent number: 10175708
    Abstract: A power source device includes an output transistor connected between an input node at which an input voltage can be received and an output node at which an output voltage corresponding to the input voltage can be output according to a control voltage applied to a gate of the output transistor, a first amplifier that includes a first transistor element and a second transistor element having gates to which a first voltage is applied, receives a feedback voltage corresponding to the output voltage, and outputs a second voltage corresponding to a voltage difference between the feedback voltage and a reference voltage, a monitor transistor having a gate to which the first voltage is applied, a first current source that supplies a first current to the first amplifier, and a second current source that supplies a second current to the first amplifier according to a current flowing in the monitor transistor.
    Type: Grant
    Filed: August 24, 2017
    Date of Patent: January 8, 2019
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Akio Ogura
  • Patent number: 10166939
    Abstract: When supplying electric power to a load from a power supply via a parallel circuit of two electrical wires having the same wiring resistance, a vehicular power supply control device uses a current measurement unit in intelligent power devices (IPDs) to measure a passing current flowing in a semiconductor switching device in each of the electrical wires. Then, in order to match the temperatures of the electrical wires as estimated by a present temperature estimation unit base on the measured current, a target duty ratio in a PWM control for reducing the passing current in the semiconductor switching device of the IPD on one electrical wire is calculated in a target duty ratio calculation unit, and the semiconductor switching device of the one IPD is turned on and off by a PWM/DC control and shutoff determination unit with the calculated target duty ratio.
    Type: Grant
    Filed: March 27, 2017
    Date of Patent: January 1, 2019
    Assignee: YAZAKI CORPORATION
    Inventors: Yoshihide Nakamura, Keisuke Ueta, Yoshinori Ikuta, Yasuyuki Shigezane, Shuuji Satake
  • Patent number: 10152072
    Abstract: A wide-tuning range low output impedance flip voltage follower (FVF) low dropout regulator (LDO) for large capacitor switching loads is disclosed. In some implementations, the LDO includes an operational amplifier and a FVF. The FVF can have a gain device, a source follower device, and an adaptive level shifter coupled between a drain of the source follower device and a gate of the gain device.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: December 11, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Mahmoud Mohamed Rashad Ibrahim Elhebeary, Sameer Wadhwa
  • Patent number: 10082784
    Abstract: A process transmitter includes device circuitry that generates values that are to be conveyed on a current loop. A series control transistor is in series between the current loop and the device circuitry and a saturation prevention circuit prevents the series control transistor from entering saturation.
    Type: Grant
    Filed: March 30, 2015
    Date of Patent: September 25, 2018
    Assignee: ROSEMOUNT INC.
    Inventors: Clarence Edward Holmstadt, Robert Ernest LaRoche, Steven J. McCoy
  • Patent number: 10074304
    Abstract: What is disclosed are systems and methods of compensation of images produced by active matrix light emitting diode device (AMOLED) and other emissive displays. The electrical output of a pixel is compared with a reference value to adjust an input for the pixel. In some embodiments an integrator is used to integrate a pixel current and a reference current using controlled integration times to generate values for comparison.
    Type: Grant
    Filed: August 6, 2016
    Date of Patent: September 11, 2018
    Assignee: Ignis Innovation Inc.
    Inventor: Gholamreza Chaji
  • Patent number: 10045421
    Abstract: The disclosure is directed at a system, power supplied to a solid state lighting (SSL) device when an operational fault condition is sensed such as when the power level being supplied to the device is sensed to be meeting or higher than an expected or predetermined level. The system, method and apparatus provide a recovery aspect which means that the SSL device will not be automatically shut down (or power being supplied to the SSL device will not be immediately stopped) upon the discovery of the operational fault condition but will enter a recovery mode.
    Type: Grant
    Filed: January 24, 2017
    Date of Patent: August 7, 2018
    Assignee: LUMASTREAM CANADA ULC
    Inventors: David Tikkanen, Kyle Hathaway
  • Patent number: 10013005
    Abstract: Apparatus and method relating to voltage regulation is disclosed. In an apparatus thereof, an integrated circuit includes a first differential opamp having a first gain. The first differential opamp is configured to receive a reference voltage and a feedback voltage. A second differential opamp has a second gain less than the first gain. The second differential opamp is configured to receive the reference voltage and the feedback voltage. A driver transistor is configured to provide an output voltage at an output voltage node and to receive a gating voltage output from the second differential opamp. A differential output of the first differential opamp is configured for gating a current source transistor of the second differential opamp. A capacitor is connected to the driver transistor and the current source transistor.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: July 3, 2018
    Assignee: XILINX, INC.
    Inventor: Sharat Babu Ippili
  • Patent number: 9966119
    Abstract: A reference selection circuit may be provided. The reference selection circuit may include a plurality of reference drivers configured to respectively output a plurality of reference voltages having different voltage levels, and a plurality of selectors configured to select any one of the plurality of reference voltages based on a selection signal, and output the selected reference voltage to a monitoring pad.
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: May 8, 2018
    Assignee: SK hynix Inc.
    Inventor: Young Joo Kim
  • Patent number: 9880203
    Abstract: Current detection circuit of a semiconductor device provided with a shunt resistor, a voltage division ratio adjustment resistor and a selection circuit which selects a voltage division ratio of the latter and has enhancement type MOSFETs and Zener Zaps as trimming elements. One of the Zener Zaps is trimmed and a divided voltage of the voltage division ratio adjustment resistor connected in parallel with the shunt resistor is outputted. The detected voltage in which variation of the resistance of the shunt resistor has been cancelled is therefore outputted. As the shunt resistor and the voltage division ratio adjustment resistor are laminated together, it is possible to obtain a current detection circuit with a small area, which can detect a current flowing into a shunt resistor with high accuracy.
    Type: Grant
    Filed: February 13, 2015
    Date of Patent: January 30, 2018
    Assignee: FUJI ELECTRIC CO., LTD.
    Inventors: Hideaki Katakura, Yoshiaki Toyoda
  • Patent number: 9634481
    Abstract: A circuit for protecting a semiconductor element is provided in a system for supplying power from an input node to an output node. The circuit has an analog multiplier responsive to a voltage across the semiconductor element and a current flowing through the semiconductor element to produce an output voltage. A transconductance amplifier is coupled to an output of the analog multiplier for receiving the output voltage of the analog multiplier to produce an output current. An analog RC circuit coupled to the output of the transconductance amplifier is configurable to include a selected number of resistive elements having selected resistance values and a selected number of capacitive elements having selected capacitance values. The configuration of the RC circuit is carried out to provide an RC thermal model that reproduces a desired thermal behavior of the semiconductor element.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: April 25, 2017
    Assignee: LINEAR TECHNOLOGY CORPORATION
    Inventors: Daniel James Eddleman, Mitchell Edward Lee, Zhizhong Hou
  • Patent number: 9634480
    Abstract: A circuit for protecting a semiconductor element is provided in a system for supplying power from an input node to an output node. The circuit has an analog multiplier responsive to a voltage across the semiconductor element and a current flowing through the semiconductor element to produce an output voltage. A transconductance amplifier is coupled to an output of the analog multiplier for receiving the output voltage of the analog multiplier to produce an output current. An analog RC circuit coupled to the output of the transconductance amplifier is configurable to include a selected number of resistive elements having selected resistance values and a selected number of capacitive elements having selected capacitance values. The configuration of the RC circuit is carried out to provide an RC thermal model that reproduces a desired thermal behavior of the semiconductor element.
    Type: Grant
    Filed: September 15, 2014
    Date of Patent: April 25, 2017
    Assignee: LINEAR TECHNOLOGY CORPORATION
    Inventors: Daniel James Eddleman, Mitchell Edward Lee, Zhizhong Hou
  • Patent number: 9628204
    Abstract: A communication device system includes a communication device (1) and a reception power monitoring device (2). The communication device (1) includes a reception processing unit (10) that outputs a signal intensity voltage (Vin) in accordance with a signal level of a received signal, and a monitoring terminal signal generator circuit (30) that generates a monitoring terminal signal (Vout) by current amplification of a level shift voltage generated by shifting a level of the signal intensity voltage (Vin) by an offset voltage (Voff) corresponding to a voltage value of a power supply voltage of an external device. The reception power monitoring device (2) includes a constant voltage generator circuit that outputs a constant voltage from the monitoring terminal signal (Vout), and a voltage converter circuit that operates based on the constant voltage and outputs a display level indication signal reflecting a voltage level of the monitoring terminal signal (Vout).
    Type: Grant
    Filed: February 6, 2014
    Date of Patent: April 18, 2017
    Assignee: NEC Corporation
    Inventor: Satoshi Iino
  • Patent number: 9608516
    Abstract: A battery discharge circuit has a switching circuit and a controller. The switching circuit is coupled between a battery and a load. The controller is configured to generate a control signal to control the switching circuit. When the battery voltage drops below a first reference voltage, the controller adjusts the control signal to regulate the battery voltage to be equal to the first reference voltage.
    Type: Grant
    Filed: October 8, 2014
    Date of Patent: March 28, 2017
    Assignee: CHENGDU MONOLITHIC POWER SYSTEMS CO., LTD.
    Inventors: Min Xu, Qiming Zhao
  • Patent number: 9591713
    Abstract: The disclosure is directed at a system, method and apparatus for monitoring and limiting power supplied to a solid state lighting (SSL) device when an operational fault condition is sensed such as when the power level being supplied to the device is sensed to be meeting or higher than an expected or predetermined level. The system, method and apparatus provide a recovery aspect which means that the SSL device will not be automatically shut down (or power being supplied to the SSL device will not be immediately stopped) upon the discovery of the operational fault condition but will enter a recovery mode. The system may be used for white light general illumination applications as well as to color changing applications.
    Type: Grant
    Filed: June 25, 2014
    Date of Patent: March 7, 2017
    Assignee: LUMASTREAM CANADA ULC
    Inventors: David Tikkanen, Kyle Hathaway
  • Patent number: 9566821
    Abstract: A plasma processing apparatus includes a plasma-generation high-frequency power supply which generates plasma in a processing chamber, a biasing high-frequency power supply which applies high-frequency bias electric power to an electrode on which a sample is placed, a monitor which monitors a peak-to-peak value of the high-frequency bias electric power applied to the electrode, an electrostatic chuck power supply which makes the electrode electrostatically attract the sample, a self-bias voltage calculating unit which calculates self-bias voltage of the sample by monitoring the peak-to-peak value of the high-frequency bias electric power applied to the electrode, and an output voltage control unit which controls output voltage of the electrostatic chuck power supply based on the calculated self-bias voltage.
    Type: Grant
    Filed: November 19, 2012
    Date of Patent: February 14, 2017
    Assignee: HITACHI HIGH-TECHNOLOGIES CORPORATION
    Inventors: Takamasa Ichino, Ryoji Nishio, Shinji Obama
  • Patent number: 9553453
    Abstract: A method, apparatus, system and computer program is provided for controlling an electric power system, including implementation of a voltage control and conservation (VCC) system used to optimally control the independent voltage and capacitor banks using a linear optimization methodology to minimize the losses in the EEDCS and the EUS. An energy validation process system (EVP) is provided which is used to document the savings of the VCC and an EPP is used to optimize improvements to the EEDCS for continuously improving the energy losses in the EEDS. The EVP system measures the improvement in the EEDS a result of operating the VCC system in the “ON” state determining the level of energy conservation achieved by the VCC system.
    Type: Grant
    Filed: February 28, 2014
    Date of Patent: January 24, 2017
    Assignee: Dominion Resources, Inc.
    Inventors: Stephen J. Tyler, Phillip W. Powell
  • Patent number: 9541934
    Abstract: A linear regulator circuit includes: a power switch having a first terminal coupled to an input voltage, a second terminal coupled to an output voltage, and a control terminal; an error amplifier, controlling the control terminal of the power switch according to a comparison between a feedback signal related to the output voltage and a reference signal; a first node, coupled between the error amplifier and the power switch; a transistor, coupled to the first node to provide a current path; and a body control unit, coupled between the input voltage and a body of the transistor, wherein when a change occurs in the input voltage, the body control unit controls a body voltage of the transistor to adjust a current in the current path, to correspondingly control a voltage of the first node, such that the control terminal of the power switch responds to the change.
    Type: Grant
    Filed: June 15, 2015
    Date of Patent: January 10, 2017
    Assignee: RICHTEK TECHNOLOGY CORPORATION
    Inventor: Chin-Yuan Wei
  • Patent number: 9541928
    Abstract: A power supply device includes: a comparator that compares an error voltage and a slope voltage to generate a comparison signal; a PWM pulse generation portion that generates a PWM pulse based on a clock signal and the comparison signal; an on-time fixed pulse generation portion that uses the comparison signal as a trigger to generate an on-time fixed pulse where an on-time and an on-time number are constant; a one shot pulse generation portion that generates once, when a soft start voltage exceeds a predetermined threshold voltage, a one shot pulse where the on-time and the on-time number are constant; and a selector that selects any one of the PWM pulse, the on-time fixed pulse and the one shot pulse.
    Type: Grant
    Filed: June 18, 2013
    Date of Patent: January 10, 2017
    Assignee: Rohm Co., Ltd.
    Inventor: Yuhei Yamaguchi