Including Final Control Device Parameter Patents (Class 323/279)
  • Patent number: 11385667
    Abstract: An LDO regulator is provided that includes a bias circuit that generates a bias current having a non-linear relationship to an output current for the LDO regulator. The LDO regulator is also configured to clamp the output current.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: July 12, 2022
    Assignee: QUALCOMM Incorporated
    Inventors: Kuan Chuang Koay, Hua Guan, YuFei Pan
  • Patent number: 10838445
    Abstract: According to one embodiment, a constant-voltage power supply circuit includes: an error amplifier including an inverting input terminal and a noninverting input terminal, a reference voltage source connected with the inverting input terminal of the error amplifier, an output transistor, the transistor having a source connected with a power supply terminal, a drain connected with a circuit output terminal, and a gate connected with an output terminal of the error amplifier, and an output voltage detecting circuit, the circuit being connected between the circuit output terminal and a power supply terminal, detecting voltage of the circuit output terminal to apply the detected voltage to the noninverting input terminal of the error amplifier. The constant-voltage power supply circuit further includes a positive feedback circuit connected between the output terminal of the error amplifier and the gate of the output transistor.
    Type: Grant
    Filed: April 23, 2018
    Date of Patent: November 17, 2020
    Assignee: New Japan Radio Co., Ltd.
    Inventor: Toshiyuki Nagai
  • Patent number: 9454167
    Abstract: Technologies are generally described for a voltage regulator implemented as an integrated circuit (IC). The voltage regulator may include a power transistor configured to receive and convert an input voltage from a voltage source to an output voltage, and a feedback loop configured to regulate the output voltage in response to a change from a desired level. The feedback loop may include an error amplifier configured to determine and amplify a value difference between the output voltage and a reference output voltage, a voltage divider configured to generate voltage proportional to the output voltage such that a ratio is the value difference, and a first unity gain buffer configured to increase stability of the IC. In some examples, the feedback loop may include a second unity gain buffer and/or an overshoot suppressor circuit configured to reduce an output voltage fluctuation when a current consumed by the load is changed suddenly.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: September 27, 2016
    Assignee: VIVID ENGINEERING, INC.
    Inventors: Vladislav Potanin, Elena Potanina
  • Patent number: 8970190
    Abstract: A common (ground) of a low voltage regulator is connected to a virtual common (ground) of an integrated circuit device that is also connected to transistor sources but isolated from a true ground connected to the substrate of the integrated circuit device. The regulated output voltage from the low voltage regulator rises the same as the virtual ground voltage rises when back-biased sufficient to reduce leakage current to an acceptable level in a given process technology. Therefore, the output of the low voltage regulator will maintain a normal operating voltage for the logic during a power saving back-biased condition.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: March 3, 2015
    Assignee: Microchip Technology Incorporated
    Inventors: James Muha, Tim Wilson, D C Sessions, Yong Yuenyongsgool
  • Patent number: 8963519
    Abstract: A switching voltage regulator includes a comparison module configured to receive a reference voltage and a feedback voltage and to generate a comparison signal based on a difference between the reference voltage and the feedback voltage, and a control module configured to generate a gain control threshold signal based on at least one of the reference voltage and the feedback voltage. The control module may be configured to control a duration of a PWM pulse based on the at least one of the reference voltage and the feedback voltage. The feedback voltage may a regulated output voltage of the switching voltage regulator. The switching voltage regulator may be implemented in an analog or a digital manner.
    Type: Grant
    Filed: July 9, 2012
    Date of Patent: February 24, 2015
    Assignee: STMicroelectronics S.r.l.
    Inventors: Osvaldo Enrico Zambetti, Daniele Giorgetti
  • Patent number: 8947064
    Abstract: An electronic switch is connected in series with a load dependent on an input signal. The electronic switch is operated in a first operation mode for a first time period after a signal level of the input signal has changed from an off-level to an on-level. The first operation mode includes driving the electronic switch dependent on a voltage across the load and dependent on a temperature of the electronic switch. The electronic switch is operated in a second operation mode after the first time period. The second operation mode includes driving the electronic switch dependent on the temperature according to a hysteresis curve.
    Type: Grant
    Filed: September 20, 2011
    Date of Patent: February 3, 2015
    Assignee: Infineon Technologies Austria AG
    Inventor: Martin Feldtkeller
  • Patent number: 8618780
    Abstract: A multimode voltage regulator comprises an output for providing a regulator output voltage Vdd and an output current to a load and a low power reference voltage source having a reference voltage output providing the regulator output voltage Vdd, when in a first low power mode the output current is not greater than a threshold value. It may comprise a buffer amplifier having an output providing the regulator output voltage Vdd, when the output current is greater than the threshold value and a first bias voltage input being connected in a second low power mode to the reference voltage output when the output current is greater than the threshold value for less than a predefined time. And it may comprise a mode controller for automatically determining the output current and automatically switching from first low power mode to second low power mode.
    Type: Grant
    Filed: November 24, 2008
    Date of Patent: December 31, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Philippe Mounier, Estelle Huynh, David Lopez, Thierry Sicard
  • Publication number: 20130049686
    Abstract: A control circuit for indirectly limiting a load current which flows through a controllable semiconductor component. The control circuit controls the controllable semiconductor component based upon a measured and/or a calculated load-current-dependent power loss of the semiconductor component. The control circuit can also control the controllable semiconductor component based upon a measured and/or a calculated load-current-dependent component temperature of the controllable semiconductor component. A charging circuit includes a controllable semiconductor component for limiting a load current and has a control circuit in accordance with the invention. A motor vehicle includes an on-board electrical power supply system having a charging circuit in accordance with the invention.
    Type: Application
    Filed: August 23, 2012
    Publication date: February 28, 2013
    Applicant: MAGNA E-Car Systems GmbH & Co. OG
    Inventor: Michael ERHART
  • Patent number: 8378652
    Abstract: A voltage controlled current source circuit is utilized to clamp the internal compensation node of a low dropout (LDO) regulator with an NMOS output during load transients. The circuit senses a voltage drop of the internal node and mirrors its current to the internal node to hold the internal node voltage when the voltage starts to drop low enough to turn off the output transistor.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: February 19, 2013
    Assignee: Texas Instruments Incorporated
    Inventor: Yong Xie
  • Patent number: 8339108
    Abstract: A circuit for charging a battery may include a switch operable for conducting a current flowing through the switch, and a first amplifier coupled to the switch and operable for adjusting the current according to an amount of power dissipation associated with the switch.
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: December 25, 2012
    Assignee: 02MICRO Inc
    Inventors: Guoxing Li, Xin Dong
  • Patent number: 8299767
    Abstract: In some implementations, a method of dynamically maintaining a device's operation within a safe operating area (SOA) may include sensing instantaneous voltage and current of the device; determining, based on the sensed instantaneous voltage and current, a value that represents a power dissipated in the device; using the determined dissipated power and a model of thermal behavior of the device to model a junction temperature of the device; and controlling operation of the device based on the modeled junction temperature. A programmable SOA circuit including sensing, scaling, filtering, and controlling functions may be packaged on a single die or in a package with a power transistor.
    Type: Grant
    Filed: May 10, 2010
    Date of Patent: October 30, 2012
    Assignee: Picor Corporation
    Inventors: Claudio Tuozzolo, Aiman Alhoussami, John P. Clarkin, Robert M. Lanoue, Andreas Gerasimos Ladas
  • Publication number: 20120262138
    Abstract: A load current compensating output buffer circuit and method are disclosed. The circuit includes a buffer amplifier coupled to a supply voltage and the inverting input receives an input voltage and the non-inverting input couples to an output capacitive load. A feedback impedance with a variable resistance circuit and a Miller capacitance in series is coupled to an output of the buffer amplifier and the capacitive load. A pass transistor couples to the supply voltage and the output capacitive load, the pass transistor having a gate terminal coupled to the output of the output buffer amplifier and the feedback impedance, a load current passing through the pass transistor. A sense circuit is configured to sense the load current and apply a control voltage to the variable resistance circuit to vary the resistance of the variable resistance circuit based on the load current.
    Type: Application
    Filed: April 13, 2011
    Publication date: October 18, 2012
    Inventors: VENKATESH SRINIVASAN, Swaminathan Sankaran, Vijaya Bhaskar Rentala
  • Publication number: 20120249654
    Abstract: A temperature detecting apparatus includes: a temperature sensor having an element whose resistance value changes depending on temperature and detecting temperature based on a voltage value obtained by supply of a supply current to the element from a power source and outputting an output voltage depending on the voltage value; a change-instructing-signal output portion connected to the temperature sensor and outputting a change instructing signal for changing the supply current based on the output voltage outputted from the temperature sensor; and a current-value change portion disposed between the power source and the element, connected to the change-instructing-signal output portion, and changing a current value of the supply current to be supplied to the element when having received the change instructing signal.
    Type: Application
    Filed: January 31, 2012
    Publication date: October 4, 2012
    Applicant: BROTHER KOGYO KABUSHIKI KAISHA
    Inventor: Toru YAMASHITA
  • Patent number: 8183711
    Abstract: A power extractor suitable for locations proximate to the sink of a signal channel is disclosed. The power extractor can generate power from the signal channel without substantially disturbing a quality of signals within the channel. In one embodiment, the power extraction circuit can include: a current source coupled to a sink side of a signal channel, where the signal channel is independent of any power supply signal, the current source being high impedance to maintain signal quality within the signal channel; a first regulator configured to generate a first regulated supply from a current derived from the signal channel using the current source; and a second regulator coupled to the first regulator, where the second regulator is configured to generate a second regulated supply from the first regulated supply.
    Type: Grant
    Filed: June 2, 2009
    Date of Patent: May 22, 2012
    Assignee: Quellan, Inc.
    Inventors: Georgios Asmanis, Faouzi Chaahoub
  • Patent number: 7852054
    Abstract: An over current protection circuit for low dropout regulator comprises a sense transistor, a sense resistor, an operational amplifier and a first transistor. The sense transistor senses the current flowing through the power transistor. The sense resistor is coupled to the sense transistor and shares the same current flowing through the sense transistor. The operational amplifier outputs a control signal according to the voltage across the sense resistor and a reference voltage. The first transistor controls the power transistor according to the control signal.
    Type: Grant
    Filed: September 23, 2008
    Date of Patent: December 14, 2010
    Assignee: Advanced Analog Technology, Inc.
    Inventors: Shun Hau Kao, Mao Chuan Chien
  • Patent number: 7768339
    Abstract: Provided is a voltage regulator for limiting a rush current from an output stage transistor. The voltage regulator includes an output current limiting circuit having a low detection current value and an output current limiting circuit having a high detection current value, and is structured so as to enable operation of the output current limiting circuit having a low detection current value during a time period from a state in which an overheat protection circuit detects overheat and an output current is stopped to a state in which an overheat protection is canceled and a predetermined time passes. Accordingly, after the overheat protection is cancelled, an excessive rush current can be limited.
    Type: Grant
    Filed: January 16, 2009
    Date of Patent: August 3, 2010
    Assignee: Seiko Instruments Inc.
    Inventor: Teruo Suzuki
  • Patent number: 7652455
    Abstract: A low-dropout (LDO) voltage regulator for generating an output voltage is disclosed. The voltage regulator includes a startup circuit, a curvature corrected bandgap circuit, an error amplifier, a metal oxide semiconductor (MOS) pass device and a voltage slew rate efficient transient response boost circuit. The MOS pass device has a gate node which is coupled to the output of the error amplifier, and a drain node for generating the output voltage. The voltage slew rate efficient transient response boost circuit applies a voltage to the gate node of the MOS pass device to accelerate the response time of the error amplifier in enabling the LDO voltage regulator to reach its final regulated output voltage when an output voltage drop occurs in the LDO voltage regulator.
    Type: Grant
    Filed: February 20, 2007
    Date of Patent: January 26, 2010
    Assignee: Atmel Corporation
    Inventor: Frederic Demolli
  • Patent number: 7629711
    Abstract: An integrated circuit package (202) includes a voltage regulator (208) and a power-out pin (236) for coupling to a load circuit (210) via a connection (234) external to the integrated circuit package and for coupling to an output (230) of the voltage regulator via a connection (224, 228, 226 and 231) internal to the integrated circuit package. The internal connection has a series resistance that causes a voltage drop due to a load current. The voltage regulator compensates for the voltage drop in the internal connection using a current feedback circuit, in which the current fed back is proportional to the voltage drop caused by the series resistance of the internal connection.
    Type: Grant
    Filed: March 23, 2007
    Date of Patent: December 8, 2009
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Kai Zhong, John J. Parkes, Jr.
  • Patent number: 7538528
    Abstract: System and methodology for supplying power to a load using a pass device for connecting the load. A current limit circuit prevents current supplied to the load from exceeding a current threshold. A foldback circuit modifies the current threshold in accordance with a prescribed condition. The foldback circuit is configured to vary the current threshold in accordance with an approximate safe operating area of the pass device.
    Type: Grant
    Filed: September 13, 2006
    Date of Patent: May 26, 2009
    Assignee: Linear Technology Corporation
    Inventor: Jeffrey Lynn Heath
  • Publication number: 20090015221
    Abstract: A voltage generating apparatus generates an output voltage based on an input voltage. A voltage generator includes a first operational amplifier operative to receive the input voltage and a feedback voltage proportional to the output voltage. The voltage generator regulates the output voltage so that a virtual short circuit is produced in the first operational amplifier. An output capacitor smoothes the output voltage generated by the voltage generating apparatus. A sense signal generator detects a current flowing in the output capacitor and generates a sense signal proportional to the current detected. An adder-subtractor circuit superimposes the sense signal on at least one of the input and the output of the first operational amplifier.
    Type: Application
    Filed: May 16, 2008
    Publication date: January 15, 2009
    Applicant: ADVANTEST CORPORATION
    Inventor: Satoshi Kodera
  • Patent number: 7405547
    Abstract: A stabilized DC power supply circuit of the present invention includes an output current limiting circuit for limiting an output current of an output transistor, and a correction circuit for correcting variation of restriction in the output current caused by variation in a current amplification factor of the output transistor. The correction circuit includes a correcting transistor that is manufactured in the same manufacturing process as the output transistor and formed so as to have the same tendency of manufacturing process variation in current amplification factor etc. as that of the output transistor.
    Type: Grant
    Filed: May 1, 2006
    Date of Patent: July 29, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Takao Kanzaki
  • Publication number: 20080143307
    Abstract: A power supply system includes a regulator for receiving an input voltage and producing an output voltage, the regulator including an output device and a controller coupled to the regulator. The controller is configured to monitor at least one operating parameter of the output device and, in response, generate a control signal that adjusts the input voltage to a minimum input voltage needed to maintain the output device in saturation regardless of variation in the monitored operating parameter.
    Type: Application
    Filed: December 14, 2007
    Publication date: June 19, 2008
    Inventors: Keith Nelson Bassett, Ralph Edward Anderson, Samuel H. Nork
  • Patent number: 7362080
    Abstract: A power regulator includes a pass transistor, a feedback circuit, an error amplifier and a protection circuit. The pass transistor receives an unregulated first power supply voltage, and an output terminal of the power regulator outputs an output voltage varying depending upon a control signal. The feedback circuit senses a current flowing through the pass transistor and generates a feedback signal. The error amplifier compares a reference signal to the feedback signal and generates a control signal varying depending upon a voltage difference between the reference signal and the feedback signal. The protection circuit scales down a current flowing through the pass transistor by a prescribed ratio and changes a voltage of the control signal when the scaled-down current has a value higher than a prescribed value.
    Type: Grant
    Filed: August 20, 2005
    Date of Patent: April 22, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Il-Young Sohn, Dong-Jin Keum
  • Patent number: 7215103
    Abstract: A method and circuit for automatically lowering a quiescent current at a predetermined threshold. A compact and low power current comparator is employed to detect the power consumption conditions, and issues a control signal to lower current consumption within a power management circuit. By dynamically resizing bias device geometries, a minimum quiescent current of an electronic device may be further reduced. Moreover, the control signal may also be used to engage modification of circuit dynamics to improve circuit performance and mitigate a response profile during recovery from a low power operation.
    Type: Grant
    Filed: December 22, 2004
    Date of Patent: May 8, 2007
    Assignee: National Semiconductor Corporation
    Inventors: Kern W. Wong, Kenneth Robert Marasco
  • Patent number: 7038431
    Abstract: A low drop output regulator may be used for power management. The low drop out regulator may include an amplifier network having a transfer function may be used to provide a substantially constant voltage and variable current to a load. A zero compensation network may be used to add a zero to the transfer function that varies with the load current.
    Type: Grant
    Filed: August 7, 2003
    Date of Patent: May 2, 2006
    Inventor: Jamel Benbrik
  • Patent number: 7019499
    Abstract: A low noise voltage regulator circuit with fast stable output voltage is disclosed. The low noise voltage regulator circuit contains a reference voltage generator, for generating a reference voltage; a switching circuit, which is electrically coupled to the output of reference voltage generator and has two states; and a stabilizing circuit. When the switching circuit is at a first state, the reference voltage is coupled to the stabilizing circuit without being filtered; when the switching circuit is at a second state, the reference voltage is filtered by a low pass filter before being coupled to the stabilizing circuit. A switching control signal is used to switch the switching circuit between the two states. The filtered reference voltage is used to generate a low noise regulated output voltage.
    Type: Grant
    Filed: May 19, 2004
    Date of Patent: March 28, 2006
    Assignee: MediaTek Inc.
    Inventors: Chi-Kun Chiu, Chi-Ming Hsiao
  • Patent number: 6650097
    Abstract: To provide a voltage regulator with high safety in which its characteristics do not deteriorate and the regulator is not destroyed even if it is used with a large loss, for example, it is erroneously used in excess of an allowable loss. The voltage regulator of the present invention is provided with a loss detecting circuit that functions so as to lower an output voltage when a loss increases. When the loss detecting circuit is activated, the output voltage falls and an output current decreases, whereby the loss can be reduced.
    Type: Grant
    Filed: June 6, 2002
    Date of Patent: November 18, 2003
    Assignee: Seiko Instruments Inc.
    Inventor: Atsushi Sakurai
  • Patent number: 6583607
    Abstract: A control method and a linear regulator of the type including a power MOS transistor, controlled by a differential amplifier having a first input terminal receiving a reference voltage and a second input terminal receiving, via a switchable resistor circuit, the output voltage of the regulator, a smooth switching of the resistors being provided.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: June 24, 2003
    Assignee: STMicroelectronics S.A.
    Inventors: Nicolas Marty, Marco Cioci
  • Patent number: 6181118
    Abstract: A control circuit (1) for controlling a FET (2) for outputting a 3.3 volt or a regulated 1.5 volt output to an AGP bus on a PC motherboard in response to a TYPEDET signal being applied to a control terminal (3) of the control circuit (1) through an input (6) of a voltage divider circuit (8). The TYPEDET signal is received from a video card receiving slot and indicates the type of video card in the slot of the motherboard. An amplifier (20) outputs a control signal to the gate of the FET (2) for either disabling the FET (2), or enabling the FET (2) to output the 1.5 volt or the 3.3 volt outputs. A decoding circuit (30) decodes the state of the control terminal (3) and controls the amplifier (20) to disable the FET (2) during power up. When the TYPEDET signal of zero volts, the FET (2) is operated to output the 1.5 regulated voltage output. When the TYPEDET signal is floating, the FET (2) outputs the 3.3 source voltage.
    Type: Grant
    Filed: June 24, 1999
    Date of Patent: January 30, 2001
    Assignee: Analog Devices, Inc.
    Inventors: Patrick Meehan, Brian Anthony Moane, George Francis Clernon
  • Patent number: 6046577
    Abstract: An improved low-dropout ("LDO") voltage regulator incorporates a transient response boost circuit which is added to the slew-rate limited node at the control terminal of the LDO voltage regulator output transistor and provides improved transient response performance to the application of various load current step stimuli while requiring no standby or quiescent current during zero output current load conditions. The transient boost circuit supplies current to the slew-rate limited node only upon demand and may be constructed as either a localized positive feedback loop or a number of switching devices which conduct current only during slew-rate conditions.
    Type: Grant
    Filed: December 30, 1997
    Date of Patent: April 4, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Gabriel A. Rincon-Mora, Nicolas Salamina
  • Patent number: 6034515
    Abstract: A current limiting circuit in which, when the input DC voltage is raised from zero volts to the reference voltage, an output DC flows through the connected load only when the value of the input DC voltage rises to a value above an undervoltage threshold value which is below the reference voltage.
    Type: Grant
    Filed: April 26, 1999
    Date of Patent: March 7, 2000
    Assignee: Siemens Aktiengesellschaft
    Inventor: Gerald Hirmer
  • Patent number: 5986441
    Abstract: The circuit configuration captures the load current of a field effect-controllable power semiconductor component. The drain and gate terminals of a further field effect-controllable semiconductor component are connected to the drain and gate terminals, respectively, of the first semiconductor component. A fraction of the load current flows through the further semiconductor component. The load current of the further semiconductor component is set as a function of the drain-to-source voltage of the two semiconductor components. The load current flowing through the further semiconductor component is compared with a reference current and an output signal is generated if the load current falls below a set value.
    Type: Grant
    Filed: February 16, 1999
    Date of Patent: November 16, 1999
    Assignee: Siemens Aktiengesellschaft
    Inventors: Adam-Istvan Koroncai, Jenoe Tihanyi
  • Patent number: 5920472
    Abstract: A power supply apparatus for a drive unit in a high voltage converter circuit, the circuit has a plurality of power semiconductors connected in series. Each power semiconductor is connected to a drive unit for turning the power semiconductor on and off. The power supply apparatus consists of a capacitor and a regulator connected in parallel with the power semiconductor. The capacitor is connected to the drive unit and stores sufficient energy for power supply of the drive unit. The regulator regulates the voltage across the capacitor.
    Type: Grant
    Filed: August 29, 1997
    Date of Patent: July 6, 1999
    Assignee: Asea Brown Boveri AB
    Inventors: Bo Bijlenga, Lennart Zdansky, Anders Persson
  • Patent number: 5644215
    Abstract: A circuit regulates a voltage by controlling a voltage generator. A voltage divider is coupled between the regulated voltage and a supply voltage, and generates a sense voltage. A clamp circuit is coupled to the divider, and reduces the sensitivity between the supply voltage and the regulated voltage by substantially prohibiting the voltage across itself from exceeding a predetermined value A detector circuit is coupled between the divider and the voltage generator, and provides a control signal that deactivates the generator when the sense voltage reaches a first predetermined threshold, and activates the generator when the sense voltage reaches a second predetermined threshold.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: July 1, 1997
    Assignee: Micron Technology, Inc.
    Inventor: Stephen L. Casper
  • Patent number: 5550462
    Abstract: The present invention provides a regulated power supply circuit capable of stably limiting an output current even in a case where an output current detecting resistor having a low resistance is used. Emitter current of a series regulating transistor Q11 is detected by a current detecting resistor R8. The transistor Q11 is controlled by a transistor Q10 connected by a Darlington connection thereto. A current limiting circuit is composed of transistors Q12 and Q13, which are connected at their bases with one another. The collector of Q12 is connected to the base of Q10 so that the base current of Q10 is reduced at the time of limiting the output current. Emitters of Q12 and Q13 are connected to the resistor R8 by way of resistors R7 and R14, respectively.
    Type: Grant
    Filed: June 27, 1994
    Date of Patent: August 27, 1996
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Akio Nakajima
  • Patent number: 5528127
    Abstract: A method and apparatus for providing a regulated output voltage when supplied with an unregulated input voltage utilizes a detection circuit to selectively steer current between two current paths in order to minimize the amount of power dissipated by a pass device such as a bipolar transistor, MOS transistors, field effect transistors or other current control device.
    Type: Grant
    Filed: May 17, 1994
    Date of Patent: June 18, 1996
    Assignee: National Semiconductor Corporation
    Inventor: Lawrence C. Streit
  • Patent number: 5272399
    Abstract: A circuit configuration for limiting current flowing through a power MOSFET includes a voltage divider being connected between drain and source terminals of the power MOSFET and having a node at which a voltage following a drain-to-source voltage of the power MOSFET drops. A control transistor has a load path connected between the gate terminal and the source terminal of the power MOSFET. The control transistor is made conducting as a function of the voltage at the node of the voltage divider if the drain-to-source voltage of the power MOSFET exceeds a predetermined value. A resistor is connected between the gate terminal of the control transistor and the gate terminal of the power MOSFET. A depletion FET has a drain terminal connected to the gate terminal of the control transistor. The source terminal of the depletion FET is connected to the node of the voltage divider. The gate terminal of the depletion FET is connected to the source terminal of the power MOSFET.
    Type: Grant
    Filed: January 15, 1993
    Date of Patent: December 21, 1993
    Assignee: Siemens Aktiengesellschaft
    Inventors: Jenoe Tihanyi, Ludwig Leipold, Rainald Sander
  • Patent number: 5243271
    Abstract: A power-supply arrangement comprises a reference circuit for generating a reference voltage (Vref). The reference circuit is coupled between a first (1) and a second (2) supply voltage terminal for receiving a supply voltage. A stabilizing circuit (4) generates a stabilization voltage (Vstab) related to the reference voltage and has an input terminal for receiving the reference voltage, a common terminal (7), and an output terminal for supplying the stabilization voltage. A switching stage (10) is switched depending on the supply voltage and comprises at least one switching element coupled between the input terminal and the common terminal. A current source is switched depending on the supply voltage and is coupled between the second supply voltage terminal and the common terminal. A capacitor is coupled between the common terminal and the first supply voltage terminal, and a buffer stage is coupled between the common terminal and the output terminal.
    Type: Grant
    Filed: December 5, 1991
    Date of Patent: September 7, 1993
    Assignee: U.S. Philips Corporation
    Inventor: Anthonius J. J. C. Lommers
  • Patent number: 5180965
    Abstract: A direct current power source circuit has a voltage control power MOS-FET and a back gate control circuit. The voltage control power MOS-FET is connected between an input terminal and an output terminal of the circuit and the back gate control circuit is connected to a back gate of the voltage control power MOS-FET and controls a back gate voltage for causing a parasitic diode between a source and a drain of the power MOS-FET to become a non-conductive state when an input voltage applied to the input terminal becomes a low level. The output of the back gate control circuit is also connected to a voltage dividing circuit which sets an output voltage of the power source circuit. The arrangement enables to prevent a reverse flow of current from the output terminal to the input terminal.
    Type: Grant
    Filed: October 24, 1991
    Date of Patent: January 19, 1993
    Assignee: NEC Corporation
    Inventor: Tadashi Nose
  • Patent number: 5004970
    Abstract: In a device for detecting the flow of a current lower than a given threshold current in a load (L) in series with a power MOS transistor (M1), the free terminal of the MOS transistor is connected to a first terminal (1) of a supply source, the second terminal (2) of which is connected to the free terminal of the load (L), the gate (G1) of the MOS transistor being connected to a control source (3). A means (11) for detecting the voltage drop is connected across the terminals of the MOS transistor and a control loop (12) imposes an appropriate gate voltage to the MOS transistor as soon as the voltage drop across its terminals tends to decrease below a determined level.
    Type: Grant
    Filed: January 19, 1990
    Date of Patent: April 2, 1991
    Assignee: SGS-Thomson Microelectronics S.A.
    Inventor: Michel Barou
  • Patent number: 4950975
    Abstract: A preliminary stage of a voltage regulator with a low voltage loss to be connected with a further stage of the voltage regulator and comprising an input and output voltage terminals, a common voltage terminal for input voltage and output voltage, a capacitor serving as a charge storage element at an output side of the series preliminary stage, a branch including a transistor having an emitter connected with the input voltage terminal, a collector connected with the output voltage terminal, and an auxiliary collector; a power means for feeding the transistor with a base current, and a current reducing element for reducing current flowing in the capacitor to zero before the transistor reaches saturation when the input voltage and the output voltage falls below a predetermined amount, and including an element for influencing a potential of the collector and connected with the auxiliary collector and the input voltage terminal, and a voltage regulator containing such a preliminary stage.
    Type: Grant
    Filed: August 16, 1989
    Date of Patent: August 21, 1990
    Assignee: Robert Bosch GmbH
    Inventor: Ulrich Fleischer
  • Patent number: 4887021
    Abstract: Circuitry is provided to eliminate high frequency noise spikes in the output of a pulse width modulator and inverters employing pulse width modulators. This circuitry provides a precision noise spike elimination circuit based on a discovery that the switching of a MOSFET has two distinct regions: one in which only the drain current changes, and the other in which only the drain to source voltage changes. The precision noise spike elimination circuit includes a pair of back-to-back Zener diodes connected in parallel with the first current generator and direct feedback of the rate of change of voltage across the catch diode, thereby eliminating the effect of non-linear capacitance of the MOSFET in the feedback path. The back-to-back Zener diodes provide very precise control of the rate of change of the MOSFET current and catch-diode voltage. The more linear switching of the MOSFET due to the improved feedback results in a reduction in losses in the MOSFET for the same degree of noise reduction.
    Type: Grant
    Filed: January 31, 1989
    Date of Patent: December 12, 1989
    Assignee: Honeywell Inc.
    Inventor: Charles S. Walker
  • Patent number: 4800331
    Abstract: A high efficiency current limit circuit comprises a current sensor, a control unit responsive to the current sensor for providing a control signal to a solid-state series pass element which limits load current. A thermal safety circuit provides overtemperature circuit protection. Together, the current limit circuit and thermal safety circuit provide continuous short circuit protection (of indefinite time duration) with automatic recovery upon removal of the short.
    Type: Grant
    Filed: February 12, 1987
    Date of Patent: January 24, 1989
    Assignee: United Technologies Corporation
    Inventors: Richard V. Vesce, Andrew C. Reck
  • Patent number: 4771357
    Abstract: A power driver including a switch (17) that connects between a power input terminal (12) and a power output terminal (13). A current sense unit (22) provides an over current sense signal if an over current condition should exist with respect to the switch (17). A reference signal unit (23) utilizes a control signal as introduced at a contol signal input (11) to provide a threshold current level signal. A comparator (21) compares the latter two signals and provides an enabling signal to a second switch (19) to disable the switch (17) upon detecting an over current condition. The comparator (21) is enabled by the control signal.
    Type: Grant
    Filed: July 23, 1986
    Date of Patent: September 13, 1988
    Assignee: Motorola, Inc.
    Inventors: Stefan Lorincz, Jeffrey J. Braun
  • Patent number: 4706159
    Abstract: A short circuit protection circuit and associated method is provided, for a device with a first and second power supply. The circuit comprises a pair of switches connected to the respective power supplies, a current sensing element connected to each switch and an output buffer circuit connected to each switch for preventing either power supply from being shorted. The circuitry utilizes advantageously integrated circuit technology. Through the use of the circuitry the power supplies are effectively removed from the output buffer when excessive current is sensed.
    Type: Grant
    Filed: March 12, 1985
    Date of Patent: November 10, 1987
    Assignee: Pitney Bowes Inc.
    Inventor: Warren G. Hafner
  • Patent number: 4684878
    Abstract: The collector-to-emitter voltage (V.sub.CE) of a transistor switch and its base drive are designed to have maximum specified values when the transistor switch conducts the highest specified load current. The base drive to the transistor switch is reduced when the load current is reduced, or when the beta of the transistor increases or is greater than a minimum specified value. The base drive to the transistor switch is regulated by sensing the V.sub.CE of the transistor switch and producing a control current which decreases with decreasing V.sub.CE and increases with increasing V.sub.CE. The control current is then used to supply a regulated base current to the transistor switch while maintaining the V.sub.CE of the transistor below, the maximum specified value, for values of load current below the maximum specified level.
    Type: Grant
    Filed: May 8, 1986
    Date of Patent: August 4, 1987
    Assignee: RCA Corporation
    Inventor: Raymond L. Giordano
  • Patent number: 4669026
    Abstract: A thermal shutdown circuit for use with a high power transistor which incorporates a sense emitter. A differential amplifier is driven from the transistor base and the sense emitter and has an output that is coupled to the power transistor base. When the sense emitter potential exceeds the base potential, the amplifier output will pull the base down so as to limit the current in the power transistor. For a silicon transistor, the circuit will act to limit the hottest portion of the sense emitter to a maximum of about 250.degree. C. When there are no hot spots and the sense emitter is heated uniformly, heating of the transistor will be limited to about 200.degree. C.
    Type: Grant
    Filed: September 9, 1985
    Date of Patent: May 26, 1987
    Assignee: National Semiconductor Corporation
    Inventor: Robert J. Widlar
  • Patent number: 4489141
    Abstract: This invention provides a passive potentiostat which is adapted to function as a self-adjustable unipolar resistive load.The passive potentiostat is suitable for controlling the half-cell potential of a thermodynamically favorable electrochemical process, e.g., a process operating in a fuel cell mode or battery mode.
    Type: Grant
    Filed: August 23, 1982
    Date of Patent: December 18, 1984
    Assignee: Celanese Corporation
    Inventors: Gery R. Stafford, Louie L. Scribner, Jr.
  • Patent number: RE33941
    Abstract: A power driver including a switch (17) that connects between a power input terminal (12) and a power output terminal (13). A current sense unit (22) provides an over current sense signal if an over current condition should exist with respect to the switch (17). A reference signal unit (23) utilizes a control signal as introduced at a control signal input (11) to provide a threshold current level signal. A comparator (21) compares the latter two signals and provides an enabling signal to a second switch (19) to disable the switch (17) upon detecting an over current condition. The comparator (21) is enabled by the control signal.
    Type: Grant
    Filed: March 27, 1990
    Date of Patent: May 26, 1992
    Assignee: Motorola, Inc.
    Inventors: Stefan Lorincz, Jeffrey J. Braun