Abstract: A parallel circuit 27 of a frequency control circuit 11 is provided as an external circuit. Thereby, the charging time t1 depends on the characteristics of the circuit elements, which are provided in the package of a semiconductor device 70 and therefore subject to manufacturing variations of the semiconductor device 70. The discharging time t2 depends on the parallel circuit 27, which is provided external to the semiconductor device 70 and therefore can be selected to have appropriate characteristics after the semiconductor device 70 has been manufactured. The circuit constants of circuits are set so that the discharging time t2 that depends on the device characteristics of the external parallel circuit 27 is longer than the charging time t1 that depends on the device characteristics of the internal circuits of the semiconductor device 70.

Abstract: In one embodiment, a multi-channel power supply controller adjusts the value of an error signal to minimize overshoot and undershoot during load transients.

Abstract: An LDO regulator includes two linear regulator circuits and an internal priority logic scheme that favors generating a regulated output voltage using a regulated supply voltage over an unregulated supply voltage. The unregulated supply voltage is applied to a first input terminal from a raw voltage source. The regulated supply voltage is applied to a second input terminal from, for example, a switching (e.g., BUCK) regulator. Two output devices are respectively connected between the first and second input terminals and the LDO output terminal. The first regulator circuit causes the first output device to supply the desired regulated output voltage while the switching regulator ramps up. Once the regulated supply voltage is high enough to allow regulation, the internal priority logic scheme disables the first regulator circuit, whereby the desired regulated output voltage is generated solely by the second regulator circuit through the second output device.

Abstract: A disclosed overcurrent protection and output short-circuit protection circuit has a proportional output current generation unit and a first current voltage conversion unit provided in series between a first power supply terminal and an output terminal. Furthermore, the overcurrent protection and output short-circuit protection circuit has a control unit that operates based on a difference between a voltage generated at the first current voltage conversion unit and that generated at a second current voltage conversion unit provided between the first power supply terminal and a second power supply terminal. A current flowing to the second current voltage conversion unit is changed by one or more switching elements in a stepwise manner based on the output voltages of the output transistor when supplying the current, thereby changing the voltages generated at both ends of the second current voltage conversion unit.

Abstract: A voltage regulator for a static random access memory operating either in a standby mode or a operation mode is provided. The voltage regulator includes a reference voltage generating circuit for generating a reference voltage, a first control circuit connected to the reference voltage generating circuit for providing power supply during the standby mode of the SRAM, and a second control circuit connected to the reference voltage generating circuit for providing power in response to an enabling signal during the operation mode of the SRAM.

Abstract: A voltage comparison unit compares a battery voltage with a predetermined threshold voltage, and outputs a comparison signal. A sequence circuit receives the comparison signal and a start-up signal instructing start-up of equipment mounted with a UVLO circuit, and executes a predetermined sequence when start-up is instructed by the start-up signal in a state the battery voltage is higher than the threshold voltage. A voltage control unit switches the threshold voltage based on the comparison signal and the start-up signal.

Abstract: Circuits and methods to provide an LDO output stage implemented with low-voltage devices and still allowing higher voltage levels have been achieved. The output stage has been built using two low voltage MOS devices in series. During the time the regulator is in active mode the second MOS device acts as a small resistor in series to the pass device. During power down this second device actively protects the MOS pass device and itself from high voltage stress levels. This is achieved by a robust regulating mechanism that compensates leakage currents. These leakage currents normally determine the different potentials of the output stage during power down. Although the second transistor presents a resistive obstacle during active mode the total chip area required is smaller compared to a single pass device tolerating e.g. 5 Volts.

Abstract: When a forward direction voltage of any of several LEDs 14 to 20 is lowered, a drain voltage of an NMOS transistor 70 employed in any of series regulators 24 to 30 becomes higher than a defined voltage. A zener diode ZD1, which is connected to the LED where the abnormal condition occurs, becomes conductive. A voltage, which is increased from the defined voltage, is applied to a negative input terminal of a comparing amplifier 72, and an output voltage of the comparing amplifier 72 is lowered by this increased voltage portion so that a gate voltage of the NMOS transistor 70 is lowered. A current flowing through the NMOS transistor 70 is decreased. Even if an abnormal condition caused by a voltage drop occurs in any of the LEDs 14 to 20, then the LEDs 14 to 20 can be protected.

Abstract: Circuits and methods to provide an LDO output stage implemented with low-voltage devices and still allowing higher voltage levels have been achieved. The output stage has been built using two low voltage MOS devices in series. During the time the regulator is in active mode the second MOS device acts as a small resistor in series to the pass device. During power down this second device actively protects the MOS pass device and itself from high voltage stress levels. This is achieved by a robust regulating mechanism that compensates leakage currents. These leakage currents normally determine the different potentials of the output stage during power down. Although the second transistor presents a resistive obstacle during active mode the total chip area required is smaller compared to a single pass device tolerating e.g. 5 Volts.

Abstract: Circuits and methods to provide an LDO output stage implemented with low-voltage devices and still allowing higher voltage levels have been achieved. The output stage has been built using two low voltage MOS devices in series. During the time the regulator is in active mode the second MOS device acts as a small resistor in series to the pass device. During power down this second device actively protects the MOS pass device and itself from high voltage stress levels. This is achieved by a robust regulating mechanism that compensates leakage currents. These leakage currents normally determine the different potentials of the output stage during power down. Although the second transistor presents a resistive obstacle during active mode the total chip area required is smaller compared to a single pass device tolerating e.g. 5 Volts.

Abstract: Circuits and methods to provide an LDO output stage implemented with low-voltage devices and still allowing higher voltage levels have been achieved. The output stage has been built using two low voltage MOS devices in series. During the time the regulator is in active mode the second MOS device acts as a small resistor in series to the pass device. During power down this second device actively protects the MOS pass device and itself from high voltage stress levels. This is achieved by a robust regulating mechanism that compensates leakage currents. These leakage currents normally determine the different potentials of the output stage during power down. Although the second transistor presents a resistive obstacle during active mode the total chip area required is smaller compared to a single pass device tolerating e.g. 5 Volts.

Abstract: A current direction detection circuit includes a monitoring transistor having a control terminal and an output terminal respectively connected with a control terminal and an output terminal of a ground side output transistor; an impedance element having one terminal connected with an input terminal of the monitoring transistor and the other terminal grounded; first and second constant-current sources; a diode-connected reference transistor interposed between the first constant-current source and ground potential; and a sensing transistor interposed between the second constant-current source and the impedance element and having a control terminal connected with the control terminal of the reference transistor. The current direction detection circuit is small yet capable of minimizing power loss of a switching regulator.

Abstract: Embodiments of the present disclosure provide a fault protection circuit, a method of operating a fault protection circuit and a voltage regulator. In one embodiment, the fault protection circuit is for use with the voltage regulator and includes an output power section having first and second MOS transistors configured to provide a regulated voltage on an output node of the voltage regulator. The fault protection circuit also includes a gate pull-down section connected to the first and second MOS transistors and configured to provide a gate pull-down MOS transistor to limit a current through the first and second MOS transistors during a current overload fault condition on the output node.

Abstract: A constant-voltage power supply circuit for converting an input voltage applied to an input terminal into a predetermined constant voltage for output from an output terminal includes an output transistor to supply from the input terminal to the output terminal an output current responsive to an applied control signal, an error amplifying circuit unit to receive a predetermined bias current to control an operation of the output transistor, and a bias current adjusting circuit unit to supply the error amplifying circuit unit with the bias current responsive to the output current output from the output transistor, wherein the bias current adjusting circuit unit is configured to suspend the supply of the bias current to the error amplifying circuit unit in response to lowering of the output voltage to a predetermined voltage.

Abstract: The present invention provides a switching power supply device including a switching element, a control circuit controlling the switching element, a transformer having an auxiliary winding, a potential clamp circuit connected to one of outputs of the transformer, a delay capacitor connected to an output of the potential clamp circuit, a potential detection circuit detecting a potential at the delay capacitor, and an overload protection actuation circuit realizing overload protection. During an overload, the delay capacitor is charged only by ringing of the auxiliary winding, generated immediately after the switching element is turned off, through the potential clamp circuit. Then, the potential detection circuit supplies an actuation signal to a latch stop circuit by detecting that the potential at the delay capacitor rises. The latch stop circuit latches and stops the switching operation of the switching element to realize the overload protection when the actuation signal is fed into the latch stop circuit.

Abstract: In one embodiment, a protection circuit includes a linear regulator remains enabled during a portion of a time while limiting an output voltage of the linear regulator to a first value.

Abstract: A current direction detection circuit includes a monitoring transistor having a control terminal and an output terminal respectively connected with a control terminal and an output terminal of a ground side output transistor; an impedance element having one terminal connected with an input terminal of the monitoring transistor and the other terminal grounded; first and second constant-current sources; a diode-connected reference transistor interposed between the first constant-current source and ground potential; and a sensing transistor interposed between the second constant-current source and the impedance element and having a control terminal connected with the control terminal of the reference transistor. The current direction detection circuit is small yet capable of minimizing power loss of a switching regulator.

Abstract: A LED-based lamp apparatus includes a LED unit having multiple LEDs connected in series, a step-up circuit for stepping up a power supply voltage by a switching action of a switching element to supply an electric current to the LED unit, a sensing element for measuring a value of the current, and a controlling element connected in series with the LED unit to control the current based on the measured current value. When some of the LEDs of the LED unit are broken and short-circuited due to, for example, long-term use, the current increases instantaneously and an overcurrent condition occurs. In this case, the controlling element limits the current immediately to correct the overcurrent condition. Thus, the controlling element prevents the overcurrent condition from causing a secondary failure to normal LEDs of the LED unit.

Abstract: An apparatus for a power supply with brownout protection and the method thereof are proposed. As a brownout condition occurs, the apparatus informs at least one microprocessor to process the shutdown process timely. The apparatus includes a power factor correction (PFC) circuit, and a bus capacitor generating a bus voltage by receiving an input voltage via the PFC circuit, and a PWM circuit generating multiple output voltages for the microprocessor, and a supervisor circuit generating a power-good signal in response to a proportional bus voltage, and a brownout circuit for disabling the boosting operation of the PFC circuit under a brownout condition. When the boosting operation is disabled, the bus voltage starts to fall. As the proportional bus voltage is lower than a threshold voltage, the supervisor circuit generates the power-good signal. Therefore, the microprocessor can process the shutdown procedure timely.

Abstract: A power converter that can continue to operate after suffering a partial failure. The power converter includes multiple array transformers; normally-on switches connected respectively in series with the ends of each of the primary windings of the array transformers; normally-off current bypass devices connected in parallel with the series connections of the primary windings of the array transformers and the switches at the transformer ends; AC-DC converter units having AC sides respectively connected secondary windings of the array transformers; and mutually independent DC circuits respectively connected to DC sides of the AC-DC converter units. By turning on the current bypass device of the primary winding of a specified array transformer and turning off the switches at the ends of that primary winding, it is possible to isolate the specified array transformer and the AC-DC converter unit connected to it.

Abstract: A step-down controller has an input having a first and a second input terminal for applying an input voltage, an output having a first and a second output terminal at which an output voltage can be provided, a series circuit including a switch and an inductance which is coupled between the first input terminal and the first output terminal. The switch has a control input for applying a control signal. A first diode is coupled between a junction point between the switch and the inductance and a reference potential such that, when the inductance is freewheeling, a current flow through the first diode (D1) is possible. There is a snubber network with a snubber capacitor, a second and third diode and an auxiliary inductance, a series circuit including the snubber capacitor, the third diode and the auxiliary inductance being coupled in parallel with the inductance.

Abstract: A load driving circuit includes a first transistor and a second transistor that are bipolar transistors connected in series between a first fixed voltage (Vdd) and a second fixed voltage (GND), and supplies a drive current, according to ON-OFF states of the two transistors, to a load connected to an output terminal that is a connection point of the two transistors. A current source controls a base current supplying the first transistor. A protection circuit compares output voltage of the output terminal with a predetermined threshold voltage, and additionally monitors ON and OFF states of the first transistor. In a state in which Vout<Vth, and the first transistor is ON, the protection circuit reduces the base current of the first transistor.

Abstract: Control loops in a voltage regulator can be stabilized using minimal silicon area. A current limit signal, generated by a current limit control loop in the voltage regulator, can be divided to minimize a zero provided in a compensation set associated with a voltage control loop, thereby stabilizing both loops. The compensation set can include a resistor (the zero) and a capacitor (a pole) connected in series between output and input terminals of an amplifier. Dividing the current limit signal can include injecting a first portion of the current limit signal on a first side of the resistor and injecting a second portion of the current limit signal on a second side of the resistor. The ratio of the first and second portions can be based on a gain of the amplifier, thereby minimizing an effect of the resistor.

Abstract: A voltage regulator has an output MOS transistor connected between a voltage source and an output terminal. A voltage dividing circuit is disposed between the output terminal and GND. An error amplifier receives a reference voltage from a reference voltage circuit and a division voltage from the voltage dividing circuit. A current limiting circuit is disposed between the voltage source and the output terminal. The current limiting circuit has a first MOS transistor connected to the voltage source. A current source circuit is disposed between the first MOS transistor and the output terminal. A resistor is connected to the voltage source. A second MOS transistor is controlled based on a current caused to flow through the first MOS transistor. A third MOS transistor is connected between the voltage source and an output terminal of the error amplifier and is controlled based on a current caused to flow through the resistor.

Abstract: A voltage regulator circuit with over-current protection, which includes a linear regulator, a voltage controller, and an over-current protection circuit. The linear regulator includes a converter and a driver. The converter is connected to a voltage input terminal and a voltage output terminal. An output terminal of the driver is connected to the converter for controlling the operation of the converter. The voltage controller is connected to the voltage output terminal, the output terminal and a first input terminal of the driver, respectively, for providing a feedback voltage. The over-current protection circuit is connected to the output terminal of the driver and the linear regulator. The over-current protection circuit detects the output voltage of the driver for comparing with a comparison voltage. When the output voltage is larger than the comparison voltage, the over-current protection circuit controls the driver to turn off the converter.

Abstract: An overshoot suppression circuit comprises a switch for coupling to an output of a voltage regulation module and a voltage detector for detecting an output voltage at the output. When the load to the voltage regulation module changes from heavy to light to result in the output voltage higher than a threshold, the voltage detector turns on the switch to release energy from the output, and thereby the output voltage is suppressed to produce overshoot to damage the load coupled to the output.

Abstract: A constant voltage power supply circuit is provided with a constant voltage circuit part to convert an input voltage into a predetermined constant voltage, a first excessive current protection circuit part to control the constant voltage circuit part so as to reduce the output voltage while maintaining an output current that is output to a predetermined maximum value if the output current is greater than or equal to the predetermined maximum value when the output voltage is a rated voltage, and a second excessive current protection circuit part to control the constant voltage circuit part so as to reduce the output voltage and the output current and to output a short-circuit current if the output voltage decreases to a ground voltage when the output voltage is decreased to a predetermined value by the first excessive current protection circuit part. The second excessive current protection circuit part is disabled in response to a first test signal that is active.

Abstract: A DC-to-DC converter comprises a sense circuit to sense the output voltage of the converter to generate a feedback signal, a transconductive amplifier to amplify a difference between the feedback signal and a threshold signal to generate a first current and to generate a second current in response to a load transient, a charging circuit connected with the first current to generate a charging voltage, a driver to compare the charging voltage with two reference signals to generate a pair of low-side and high-side driving signals, and a fast response circuit to compare a load transient signal corresponding to the second current with a third reference signal to generate a bypass signal to drive the output stage of the converter in the load transient.

Abstract: A power supply circuit relating to the present invention comprises a differential amplifier for feeding out a voltage as a control voltage in accordance with a difference between a feedback voltage commensurate with an output voltage and a reference voltage, an output current control element for feeding out an output current in accordance with the control voltage fed thereto from the differential amplifier, an output line by way of which the output current is supplied to a load, a feedback line by way of which a voltage on the output line is fed back as the feedback voltage to the differential amplifier, the feedback line connected to the output line, and a clamping circuit for maintaining the control voltage so as not drop below a predetermined value.

Abstract: A voltage regulator has an output transistor connected between a power supply and an output terminal, and a voltage amplifying circuit that compares a feedback voltage with a reference voltage to control the output transistor. A transient response improving circuit has a detecting portion that detects fluctuations in the power supply voltage and controls the operating current of the voltage amplifying circuit based on the detected fluctuation level of the power supply voltage thereby improving the responsiveness and reducing power consumption of the voltage regulator.

Abstract: Circuits and methods to provide an LDO output stage implemented with low-voltage devices and still allowing higher voltage levels have been achieved. The output stage has been built using two low voltage MOS devices in series. During the time the regulator is in active mode the second MOS device acts as a small resistor in series to the pass device. During power down this second device actively protects the MOS pass device and itself from high voltage stress levels. This is achieved by a robust regulating mechanism that compensates leakage currents. These leakage currents normally determine the different potentials of the output stage during power down. Although the second transistor presents a resistive obstacle during active mode the total chip area required is smaller compared to a single pass device tolerating e.g. 5 Volts.

Abstract: A current averaging circuit for averaging a piecewise linear switching current waveform of a PWM power converter including first, second and third sample and hold circuits and a sample averaging circuit. The first sample and hold circuit samples a short duration of the current waveform for each PWM cycle and provides corresponding short samples. The second sample and hold circuit samples a long duration of each PWM cycle and provides corresponding long samples. The sample averaging circuit is coupled to the first and second sample and hold circuits, averages corresponding ones of the short and long samples and provides corresponding average values. The third sample and hold circuit samples each average value and provides a current average signal. The waveform may include ramp-on-a-step voltage pulses representing switching current. The current average signal is updated after each current pulse.

Abstract: According to one embodiment, a computer system is disclosed. The computer system includes an integrated circuits (IC), a power supply that supplies power to the IC and an over-current protection (OCP) circuit. The OCP circuit prevents the exceeding a predetermined power threshold during a short circuit condition while the IC is enabled to receive a greater power level.

Abstract: A voltage regulator circuit includes a regulator circuit and a short-circuit protection circuit. The regulator circuit includes a first transistor and a first amplifier. The first amplifier outputs a gate voltage to a gate of the first transistor in response to a reference potential and a feedback potential such that the feedback potential coincides with the reference potential. The feedback potential is a fed back potential from the first transistor. The short-circuit protection circuit includes a second transistor, a first resistance, a second resistance and a second amplifier. The gate voltage is supplied to a gate of the second transistor. The first resistance connects a first terminal of the second transistor with a ground. The second resistance connects a second terminal of the second transistor with a power source. The second amplifier outputs a control voltage to the first amplifier in response to a bias potential and a potential of the first terminal to control the gate voltage.

Abstract: A power supply circuit relating to the present invention comprises a differential amplifier for feeding out a voltage as a control voltage in accordance with a difference between a feedback voltage commensurate with an output voltage and a reference voltage, an output current control element for feeding out an output current in accordance with the control voltage fed thereto from the differential amplifier, an output line by way of which the output current is supplied to a load, a feedback line by way of which a voltage on the output line is fed back as the feedback voltage to the differential amplifier, the feedback line connected to the output line, and a clamping circuit for maintaining the control voltage so as not drop below a predetermined value.

Abstract: The present invention provides a voltage regulator which has high-speed responsibility with a low consumption current, and which can stably operate with a low output capacity. The voltage regulator includes: a reference voltage circuit, a voltage division circuit, a differential amplifier, an output transistor, a MOS transistor which has a gate to which an output of the differential amplifier is connected, a constant current circuit connected between a drain of the MOS transistor and the ground, and parallel-connected resistor and capacitor for phase compensation are connected between the drain of the MOS transistor and a gate of the output transistor.

Abstract: In a voltage regulator according to an embodiment of the present invention, a delay circuit delays an enable signal by a delay time or less, the delay time corresponding to a certain time from a start of charging of the output capacitor to a completion of the charging of the output capacitor, and sends the delayed enable signal as a delayed signal to a mode selector. An overcurrent protection circuit unit operates according to a constant current type drooping characteristic from a time point of input of the enable signal. The overcurrent protection circuit unit operates according to a current limiting characteristic that can lower an output current below an upper limit value after a time point of input of the delayed signal. Thereby the output current having the upper limit value is prevented from continuing to flow after a time point of completion of charging of the output capacitor at the latest.

Abstract: An H-bridge switching topology for bi-directional field excitation to null the effects of a rotor's permanent magnets uses both a low-side and a high-side field excitation driver to control the rotor's average field current. A standard proportional control signal for generators using uni-directional field excitation is used to control an H-bridge for bi-directional field excitation. The H-bridge consists of two pair of power switches. In a preferred embodiment, the switches are n-channel MOSFETs. A drive circuit interfaces a logic block with the H-bridge in order to properly bias the power switches.

Abstract: A field effect transistor (FET) driver circuit includes an error amplifier for providing a FET control signal and a current limiting amplifier for preventing excessive current flow through the FET. The current limiting amplifier generates an overcurrent signal when an excessive current is detected. In response to the overcurrent signal, a voltage control circuit adjusts the voltage at the output of the error amplifier to turn off the FET. Meanwhile, a pulldown circuit at an input of the error amplifier adjusts the voltage provided to that input to cause the error amplifier to provide an output voltage that also tends to turn off the FET. If a buffer is present at that input to the error amplifier, a second pulldown circuit is placed at the input to the buffer to maintain a stable unity gain across the buffer.

Abstract: A power switching circuit comprising a first power switching device the first power switching device having a control electrode and two main current carrying electrodes, a sense circuit for providing a signal proportional to the current through the first power switching device and an active clamp circuit connected to said control electrode of said first power switching device, wherein said active clamp circuit provides a variable clamp voltage between one of the main electrodes of the first power switching device and the control electrode when the current in the first power switching device exceeds a threshold level the variable clamp voltage being related to current through the first power switching device.

Abstract: A DC-DC converter achieves a high level of a signal superimposed in an AC manner onto the output of an insulator such as a photocoupler, and there are very few limitations in the aspects of constant design, phase correction, starting characteristics, and short-circuit protection. A secondary-side control circuit detects an output voltage, and feeds back a control signal to a drive control circuit on the primary side via a photocoupler. The photocoupler insulates the primary side of a DC-DC converter from the secondary side thereof, wherein the control signal output from the secondary-side control circuit is transmitted to the primary side. The output signal of an auxiliary power-supply circuit is superimposed in an AC manner onto the control signal via a coupling capacitor. The drive control circuit has a configuration in which a pulse control signal is applied to a switching element in order to stabilize the output voltage of a secondary-side circuit on the basis of the control signal.

Abstract: A circuit and method for enabling a rapid adjustment of a reference voltage during a disable period such as a fault condition, shutdown condition, and the like, of a voltage regulator is described. A soft start circuit that is arranged to couple a reference voltage input of an error amplifier to a portion of an output voltage avoiding high current surges and optimizing start up time is modified to include a low resistance switch that provides a path for a reference node capacitance to rapidly discharge. The faster discharge may allow the reference voltage to match the output voltage even when the switch is activated for a very brief interval. This in return allows the output voltage to start up in a controlled manner after a disable period.

Abstract: A power supply system (10) forms an active zone that facilitates the power supply system (10) enabling an output transistor (37) when the input voltage (30) is between a first voltage value and a second voltage value. When the output transistor is enabled, it forms a load current (35) having an instantaneous value that when averaged over the period of the input signal results in a desired average value of the load current.

Abstract: The invention pertains to a method for detecting and/or limiting short-circuit or overcurrent states of a switching regulator, where the load current or a variable proportional to the load current is measured and compared with a predetermined maximum value, and where the result of this comparison is used to influence the switching pulses. In this case, the result of the comparison between the load current and the maximum value is only taken into consideration within at least one time window during at least one timing period of the switching pulses.

Abstract: A current boost circuit that supplies additional current to a voltage reference power rail. When the voltage reference power rail drops due to an excessive current demand from the load, the drop is sensed and a switch is activated supplying additional current to the voltage reference rail. A gain stage is capacitively coupled to the reference voltage and any drop is transferred through this capacitor to a gain stage that amplifies the drop. The amplified drop is capacitively coupled to a solid state switch that turns on connecting an additional current source to the reference voltage rail. The solid state switch is biased just below its turn on threshold.

Abstract: A power module for a CNI avionics system includes a rechargeable back-up battery (17) and a battery charger (9) in a back-up battery channel, a power conversion unit (11, 25, 27 and 29) in a power conditioning channel, and a semiconductor switch (23) for selectively coupling either the output of the power conditioning channel unit or the back-up battery channel through to the module output (24) and the electronics of external LRM's of the cryptographic section of the CNI avionics system, and a microcontroller (14) for controlling voltages and spurious signal emanations. Sensors (51, 52, 54 & 55) provide information to the microcontroller. The microcontroller senses the state of prime power, current draw on the cryptographic devices and adjusts power output between the battery and power supply in real time.

Abstract: An overcurrent protection circuit (6) outputs an overcurrent protection signal (S6) based on a sense voltage (Vsense). A masking circuit (5) is configured so as to allow a masking signal (S5) to be kept set to “L” even when an input signal (IN) rises to “H” (an IGBT (1) is turned on) and an NPN bipolar transistor (23) is turned off, and allow the masking signal (S5) to be changed only after a capacitor (C12) is charged up and a voltage (V9) exceeds a reference voltage (VR). An AND gate (25) receives the masking signal (S5) at one of input terminals thereof and the overcurrent protection signal (S6) at the other of the input terminals thereof, and provides an output which is then output as an interruption control signal (SC_OUT) from a sense output terminal (P2) and is finally supplied to a gate terminal (P3) of the IGBT (1).

Abstract: A method is specified for operating a transformer (1) from a drivable voltage source (2), in which the voltage source, (2) produces an output voltage (uA) for feeding active power and/or a reactive component via the transformer (1) into an electrical AC voltage supply network (3), and an output current (iA) from the voltage source (2) is monitored for a maximum permissible value (iAmax) in which the magnetic flux (&phgr;) of the transformer (1) is determined continuously, and, when the maximum permissible value (iAmax) of the output current (iA) is exceeded, the voltage source (2) is disconnected from the transformer (1).

Abstract: The circuit contains a series regulator with an FET. A capacitor and a further FET, which is provided as a transfer gate and is driven by the POR signal, are connected in series between the source terminal, to which the external supply voltage is applied, and the gate connection. When the external voltage is applied, the FET opens, with the transfer gate switched on, corresponding to the charging of the capacitor which now takes place. Because this charging process takes a certain amount of time, overshoots in the internal voltage are prevented.

Abstract: According to the conventional stabilized DC power supply device, there is a possibility that the output transistor breaks down by heat when the input voltage fluctuates. To cope with this, the stabilized DC power supply device embodying the invention is so configured as to comprise an output transistor for converting an input voltage to an output voltage and feeding out the output voltage, a control circuit for controlling the output transistor so as to maintain a value of the output voltage constant, a current detection circuit for detecting an output current of the output transistor, a voltage detection circuit for detecting a voltage appearing between an input side and an output side of the output transistor, a multiplying circuit for multiplying an output of the current detection circuit and an output of the voltage detection circuit together, and a protection circuit for restricting a wattage power of the output transistor according to an output of the multiplying circuit.