Abstract: An electronic system includes a source follower circuitry that functions as an input driver. The source follower circuitry includes a first input transistor, first current source circuitry, and first phase shift circuitry. The first input transistor includes a first node coupled to a first voltage node, a second node coupled to a first output node, and a gate node coupled to a first input node. The gate node receives a first input signal via the first input node. The first current source circuitry coupled to the first output node and configured to generate a first bias current. The first phase shift circuitry is coupled to the first current source circuitry. The first phase shift circuitry generates a first phase shift signal to modulate the first current source circuitry to reduce signal drop across the first input transistor.

Abstract: A regulator circuit module, a memory storage device, and a voltage control method are disclosed. The method includes: generating an output voltage according to an input voltage by a driving circuit; generating a feedback voltage according to the output voltage; controlling the driving circuit to adjust the output voltage according to the feedback voltage by a regulator circuit; compensating an output of the regulator circuit by a compensating circuit; and activating or deactivating the compensating circuit according to an input bypass-voltage of a switch circuit.

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a dc-dc converter control circuit and methods of manufacture. The structure includes a dynamic pulse width modulation (PWM) circuit which converts a sense voltage to a variable current in response to a load current being above a predetermined threshold, and a ramp generator circuit which receives the variable current from the dynamic PWM circuit and dynamically adjusts a fixed base frequency of a PWM signal to a dynamic frequency of the PWM signal which corresponds with the load current.

Abstract: In an example, a system includes a differential amplifier having a first input terminal and a second input terminal, the differential amplifier configured to be coupled to a boost diode of a boost converter. The system also includes an input diode coupled to the first input terminal and the second input terminal. The system includes a pull-up circuit coupled to the input diode and configured to be coupled to the boost diode. The system also includes a pull-down circuit coupled to the pull-up circuit. The system includes a transistor coupled to the pull-up circuit and the pull-down circuit.

Abstract: In an embodiment, an apparatus includes: an amplifier to compare a reference voltage to a feedback voltage and to output a comparison signal based on the comparison; a first loop circuit coupled to the amplifier to receive the comparison signal and output a first feedback voltage for the amplifier to use as the feedback voltage in a first mode of operation; and a second loop circuit coupled to the amplifier. The second loop circuit may be configured to receive the comparison signal and output a second feedback voltage for the amplifier to use as the feedback voltage in a second mode of operation. The second feedback voltage may be greater than the first feedback voltage, and the second loop circuit may output a regulated voltage based on the comparison signal.

Abstract: A power supply circuit and a memory are provided. The power supply circuit includes: a voltage generation module, configured to provide an initial voltage signal; a first power supply module, configured to provide a power reference voltage based on the initial voltage signal; an amplification module, configured to generate and output a first power voltage based on the power reference voltage; a first power network, configured to supply power to at least one function module connected to the first power network; a second power supply module, a second power network and a voltage control module. The second power supply module is configured to provide a second power voltage for the second power network based on the initial voltage signal.

Abstract: The present disclosure relates to power management for digital-to-analog converters (DACs). As electronic devices and the components therein become increasingly smaller to satisfy the desire for more compact/portable devices, the operating voltage may be reduced to reduce the likelihood of shorts and/or voltage/current bleeds. To maintain comparable power output with the reduced operating voltage, the current may increase proportionally to the decrease in voltage. Consequently, in scaled devices and applications, high-current low-voltage regulators may be beneficial. As such, a low-dropout regulator (LDO) including one or more operational amplifiers and multiple pass devices may be implemented between a power supply and the DAC to regulate the power supply to the DAC. Moreover, the LDO may include one or more feedback loops to maintain a desired voltage regulation of the pass devices.

Abstract: In certain aspects, a system includes an amplifying circuit having an input and an output, a high-pass filter coupled between a gate of a pass transistor of a low dropout (LDO) regulator and the input of the amplifying circuit, and a metal-oxide-semiconductor (MOS) capacitor coupled between the output of the amplifying circuit and the gate of the pass transistor.

Abstract: In a conventional electronic device, it is difficult to passively diagnose disconnection of an external capacitor added to an output terminal of a regulator circuit. An electronic device in this embodiment includes a regulator circuit 2 that outputs a constant voltage while external power supplied from the outside is input thereto, an external capacitor 3 connected to an output terminal of the regulator circuit 2 as an external component, an oscillation detector 4 that detects an oscillating state of the output voltage of the regulator circuit 2, and a failure determination unit 5 that outputs a failure signal when the oscillation detector 4 detects the oscillating state of the regulator circuit.

Abstract: A capacitor-less linear Low Drop Out (LDO) Voltage Regulating (VR) system and method with enhanced Power Supply Rejection (PSR), line transient response, and load transient response is disclosed. The system includes a current-summing amplifier to refine input voltage and error signals from an error amplifier circuit, improving regulation accuracy. Further, the system includes a Dynamic Current Bleeder (DCB) circuit to manage current flow, optimizing efficiency. Furthermore, a strategically placed compensation capacitor ensures stable voltage delivery despite load or input changes. To further enhance performance, a boost and reduce amplifier circuit continuously monitors and adjusts current of the error amplifier circuit, minimizing output voltage variations. The system effectively manages applications demanding highly regulated and stable voltage supplies.

Abstract: This application relates to voltage regulators and, particular, to low-dropout regulators (LDOs). The regulator (300) has an output stage (102) which receives an input voltage (Vin) and outputs an output voltage (Vout) and which includes at least one transistor (103) as an output device configured to pass an output current to the output, based on a drive voltage (V1). A differential amplifier (101) is configured to receive a feedback signal derived from the output voltage and also a reference voltage (REF) to generate an amplifier output to control the drive voltage (V1) to minimise any difference between the feedback signal and the reference voltage. A controller (301) is operable to selectively reconfigure the output stage to provide a change in output current in response to a load activity signal (ACT), which is indicative of a change in load activity that results in a change in load current demand for a load connected, in use, to the output.

Abstract: An electronic device is provided. The electronic device includes a power generator, a power regulator and an electronic element. The power generator is configured to provide an input voltage. The power regulator includes a voltage regulator. The voltage regulator is electrically connected to the power generator. The voltage regulator is configured to receive the input voltage to generate an output voltage. The electronic element is electrically connected to the power regulator. The electronic element is configured to receive the output voltage. The power regulator generates a control signal according to the input voltage. The power regulator provides the control signal to the electronic element. An adjustable level of the electronic element is adjusted according to the control signal.

Abstract: A low dropout regulator is provided. The low dropout regulator includes a gain-stage module, an output setting stage, and a detection circuit. The gain-stage module generates a gain-stage signal. The output setting stage is electrically connected to the gain stage module. The output setting stage outputs a load current to an output terminal in response to the gain-stage signal. The detection circuit is electrically connected to the gain stage module and the output setting stage. The detection circuit includes a monitor circuit and a compensation circuit. The monitor circuit is electrically connected to the output terminal. The monitor circuit compares a charge-up duration of the signal at the output terminal with a pre-defined threshold duration, and generates a comparison signal accordingly. The compensation circuit is electrically connected to the gain-stage module and the output terminal. The compensation circuit selectively performs frequency compensation in response to the comparison signal.

Abstract: A power control unit is provided to monitor the output power of a charge pump converter having an input impedance and an input impedance controlling terminal to be plugged to the power control unit and modify the input impedance. The power control unit includes a control circuit sense the output power of the charge pump converter and a control unit to receive the sensed power value, establish a control value, and send the control value to the impedance controlling terminal so as to modify the input impedance.

Abstract: A parallel input and dynamic cascaded OTA (operational transconductance amplifier includes: plural sub-OTAs which generate corresponding plural transconductance output currents according to corresponding plural differential input voltages; and at least one cascading capacitor which is cascaded between a first sub-OTA and a second sub-OTA. A second transconductance output current generated by the second sub-OTA is coupled through the cascading capacitor to generate a transient bias current on a common mode bias node of the first sub-OTA, thus providing the transient bias current to a differential pair circuit of the first sub-OTA in a case when a transient variation occurs in the differential input voltage corresponding to the first sub-OTA, so that a loop bandwidth and a response speed during a transient state are enhanced.

Abstract: A controller chip of a flyback converter, a flyback converter and a switched-mode power supply system are disclosed. In the controller chip, a current scaling module is added, which converts a feedback current signal at a feedback pin of the controller chip to allow compensation capacitor with a small capacitance to be integrated into the chip to constitute a required pole compensation module. In this way, a pole required by the feedback pin FB can be successfully provided in the chip. As a result, filtering of high-frequency noise in a feedback path in which the feedback pin FB is located can be achieved, reducing ripple in an output voltage generated by the flyback converter. Moreover, without changing a sampling gain and the compensation pole, it is allowed to greatly reduce the compensation capacitance, for example, to the order of 10 pF.

Abstract: An integrated circuit (IC) includes a voltage-to-current converter circuit having a first voltage terminal, a second voltage terminal, a first current terminal, and a second current terminal. A transimpedance amplifier (TIA) and biquad filter circuit has a first TIA and biquad filter input coupled to the first current terminal and has a second TIA and biquad filter input coupled to the second current terminal. The transimpedance amplifier includes cross-coupled transistors configured to use positive feedback.

Abstract: A voltage regulator includes an operational amplifier that compares a feedback voltage that is proportional to an output voltage and a predetermined reference voltage that corresponds to a desired output voltage. The operational amplifier controls the conduction state of an output transistor according to the comparison. A detecting circuit monitors the operating state of the operational amplifier, and in the case that the operational amplifier is not operating, outputs a signal which causes the output transistor to be placed in a non-conductive state.

Abstract: A voltage regulator circuit includes a first amplifier, a second amplifier and a transistor. Respective first input terminals of the first and second amplifiers are coupled to a first reference voltage and a second reference voltage, respectively. A connection terminal of the transistor is coupled to a supply voltage. A control terminal of the transistor is selectively coupled to one of respective output terminals of the first and second amplifiers. When the control terminal of the transistor is coupled to the output terminal of the first amplifier, another connection terminal of the transistor is coupled to a second input terminal of the first amplifier to output a regulated voltage. When the control terminal of the transistor is coupled to the output terminal of the second amplifier, the another connection terminal of the transistor is coupled to a second input terminal of the second amplifier to output the regulated voltage.

Abstract: A voltage regulator includes an amplifier having a first amplifier input, a second amplifier input, an amplifier output, and an amplifier supply terminal. A controllable current source has a control terminal coupled to the amplifier output and has a current output coupled to the second amplifier input via a feedback path. A voltage dropout detector includes a voltage dropout detector input and a voltage dropout detector output. The voltage dropout detector input is coupled to the current output. A current bias boost circuit includes a current bias boost input and a current bias boost output. The current bias boost input is coupled to the voltage dropout detector output, and the current bias boost output is coupled to the amplifier supply terminal.

Abstract: A linear voltage regulator includes a pass transistor, an error amplifier, a buffer, a load capacitor and a pair of components coupled in series between the output node of the error amplifier and the regulated output voltage node. The buffer is coupled between the error amplifier and the pass transistor. The buffer is a unity voltage-gain buffer, has a wide bandwidth and provides higher current drive to the control terminal of the pass transistor. A first component of the pair of components is provided to decrease loop gain as output current increases so as to provide frequency compensation, but reduces a speed at which the regulator can respond to output voltage transients. A second component of the pair of components is designed to at least partially negate the operation of the first component during an output voltage transient, and thereby enables the regulator to respond quickly to the transient.

Abstract: An integrated circuit includes: a power supply circuit configured to generate a supply voltage from at least one of first and second power source voltages; and a system load configured to operate by receiving the supply voltage through an output node of the power supply circuit, wherein the power supply circuit includes: a first low drop-output (LDO) regulator configured to generate, from the first power source voltage, a first load current flowing to the system load through the output node; and a second LDO regulator configured to selectively generate a second load current flowing to the system load through the output node, from the second power source voltage based on a difference between voltages of internal nodes of the first LDO regulator.

Abstract: A DC-DC converter includes a first converter outputting a first power voltage in a first driving method of generating an inductor current by alternately turning on transistors in a normal mode and outputting the first power voltage in a second driving method of generating the inductor current with the number of turn-on times less than that of the first driving method in a power saving mode, a second converter outputting a second power voltage in a third driving method of generating the inductor current with the number of turn-on times less than that of the second driving method in the power saving mode and determining differently magnitudes of the second power voltage in the power saving mode and the second power voltage in the normal mode, and a mode selector supplying a mode control signal to the converters to drive the converters according to one of the modes.

Abstract: An LDO regulator for generating an output voltage at an output node of the LDO controller based on an input voltage received at an input node of the LDO controller is described. The LDO controller comprises a first amplifier stage, a driver stage, a second amplifier stage coupled between the drive stage and the output node, a feedback stage coupled between the output node and the first amplifier stage, and a gain limiter stage coupled between the first amplifier stage and the driver stage at an intermediate node for lowering a loop gain of the LDO regulator. A corresponding method for operating an LDO regulator is further described.

Abstract: Provided is a shunt regulator including: multiple resistors, connected in series between an output terminal and a ground terminal and constituting a voltage divider circuit; an output transistor, connected between the output terminal and the ground terminal; a first drive circuit, including a first reference voltage circuit which outputs a first reference voltage and an error amplifier, and controlling the output transistor based on a voltage of a first output terminal of the voltage divider circuit; a second drive circuit, controlling the output transistor based on a voltage of a second output terminal of the voltage divider circuit; and an activation control circuit, switching operation of the first drive circuit and the second drive circuit based on the first reference voltage. The second drive circuit has a shorter activation time than the first drive circuit.

Abstract: Low drop-out (LDO) regulator circuits and methods that can operate at high frequencies without the adverse consequences of an oscillatory resonance effect from a capacitive load. In a first embodiment, a low pass filter (LPF) is coupled to the LDO and tuned to cancel the oscillatory resonance effect. In a second embodiment, the LPF is a second-order LPF and/or programmable. Since the tuning values of the programmable LPF may be programmatically selected, a much greater range of external capacitors values (with attendant ESR and ESL values), as well as a wider range of system parasitic capacitances, can be accommodated while maintaining system stability. Some variants of the second embodiment include an oscillation detector and filter bit control circuit that allows the tuning values of the programmable LPF to be dynamically determined and re-determined. An impedance-lowering device may be coupled to lower the impedance of the connection to the LPF.

Abstract: An analog circuit arrangement (1) to variably set a voltage Uout, within defined voltage limits, has a non-inverting adder (10) with a positive input (11). A voltage divider (20), with at least a first stage (21) and a second stage (22), is connected to the positive input (11) of the adder (10). At least one stage has a parallel circuit of n resistors (R1, R2, . . . , Rn) that are each connected in series in a conduction path (L1, L2, . . . , Ln) to an overcurrent protection device (F1, F2, . . . , Fn). At least one device (30) actively changes one or more of the overcurrent protection devices (F1, F2, . . . , Fn) into a state that interrupts the respective affected conduction path (L1, L2, . . . , Ln).

Abstract: A power converter includes a switched-capacitor circuit that forms different capacitor networks out of a set of capacitors. It does so in a way that avoids losses that can arise when capacitors are connected together.

Abstract: A semiconductor device includes a first transistor; a first resistor; a second resistor; a first circuit configured to apply a first voltage to the first transistor. The first voltage is based on a difference between a reference voltage and an output voltage divided by the first and second resistors. A first current through the first circuit in a first mode is less than a second current through the first circuit in a second mode. The semiconductor device includes a capacitor connected to the output terminal; and a second circuit connected to the capacitor that: (a) disconnects the first circuit from the capacitor and apply a second voltage to the capacitor in a first mode, and (b) electrically connects the first circuit to the capacitor in the second mode.

Abstract: Disclosed is an integrated user programmable slew-rate controlled soft-start for a low-dropout regulator that includes a current steering stage and an integrator stage. The current steering stage may also be denoted as an error amplifier. A Miller compensation capacitor couples between an input node to the integrator stage and an output node for an output voltage of LDO. During a power up period of the LDO, the current steering stage generates an input current that charges the Miller compensation capacitor. This controlled charging of the Miller compensation capacitor controls the slew rate of the output voltage as it rises to its regulated value at a completion of the power up period.

Abstract: A voltage regulator circuit can include two feedback loops, such as to reduce or suppress an unwanted transient condition in an output voltage during transient conditions such as during startup or during load current demand transients. One of the two feedback loops can include a shunt device arranged to provide a temporary current pathway during the transient condition to change current provided to a load connected to an output of the voltage regulation circuit. In addition, or instead, the voltage regulator circuit can include an open-loop regulation circuit separate from a loop corresponding to the first error amplifier. The open-loop regulator circuit can operate in a lower-power mode as compared to a closed-loop regulator circuit. A portion or an entirety of the voltage regulator circuit can be implemented in an integrated circuit, such as monolithically.

Abstract: A magnetic junction memory device is provided. The magnetic junction memory device including a sensing circuit including a sensing node, the sensing node being connected to a first end of a transistor and configured to change a voltage of the sensing node in accordance with a resistance of a magnetic junction memory cell, a gating voltage generator circuit configured to generate a gating voltage of the transistor using a reference resistor and a reference voltage, and a read circuit configured to read data from the magnetic junction memory cell using the reference voltage and the voltage of the sensing node.

Abstract: A low drop-out (LDO) linear regulator includes: a pass transistor coupled between an input terminal and an output terminal; an error amplifier suitable for amplifying and outputting a difference between a feedback voltage corresponding to an output voltage of the output terminal and a predetermined reference voltage; a buffer including an input terminal which is coupled to an output node of the error amplifier and an output terminal which is coupled to a gate of the pass transistor; a first compensation circuit suitable for driving an equivalent resistance of the output node of the error amplifier to be in inverse proportion to a load current; and a second compensation circuit suitable for driving an equivalent resistance of an output node of the buffer to be in inverse proportion to the load current.

Abstract: A low-dropout voltage regulator is provided. The low-dropout voltage regulator includes a differential amplifier pair, a secondary amplification circuit that is self-stabilized, an output circuit, and a frequency compensation circuit. The secondary amplification circuit includes a first amplification transistor and a second amplification transistor. The first amplification transistor includes a first terminal, a second terminal, and a third terminal. The second amplification transistor includes a first terminal, a second terminal, and a third terminal. The second terminal of the first amplification transistor is electrically connected to the second terminal of the second amplification transistor to form an input terminal of the secondary amplification circuit to be connected to an output terminal of the differential amplifier pair.

Abstract: An amplifier circuit includes a first input unit, a second input unit, a first current supply unit, and a second current supply unit. The first input unit changes a voltage level of a first output node based on a first input signal. The second input unit changes a voltage level of a second output node based on a second input signal. The first current supply unit supplies a first current to the first output node based on a voltage level of the first output node and boosts the voltage level of the first output node for a predetermined time when the voltage level of the first output node is changed. The second current supply unit supplies a second current to the second output node based on the voltage level of the first output node.

Abstract: A method for regulating a voltage reference signal includes providing a first output current during a first interval and a boosted output current during a second interval to generate a low-dropout voltage reference signal based on a first power supply voltage, a second power supply voltage, and a reference voltage level. The method includes, during the second interval, compensating for a voltage drop caused by providing the boosted output current. The first output current may be provided in a first mode of operation. The boosted output current and voltage drop compensation may be provided in a boosted mode of operation.

Abstract: The disclosure relates to an apparatus including: a first set of one or more field effect transistors (FETs) coupled between a first voltage rail and a load; a second set of one or more FETs coupled between the first voltage rail and the load; a gate voltage control circuit configured to: provide a first set of gate voltages to first and second gates of the first and second sets of one or more FETs in accordance with a first mode of operation, respectively; and provide a second set of gate voltages to the first and second gates of the first and second sets of one or more FETs in accordance with a second mode of operation, respectively; and a voltage droop compensation circuit configured to control an output voltage across the load during a transition from the first mode of operation to the second mode of operation.

Abstract: A voltage regulation circuit includes a voltage regulator that is configured to provide a stable output voltage based on an input voltage; and a control circuit, coupled to the voltage regulator, and configured to provide an injection current to maintain the stable output voltage in response to an enable signal provided at an input of the control circuit transitioning to a predetermined state and cease providing the injection current when the control circuit detects that a voltage level of the output voltage is higher than a pre-defined voltage level.

Abstract: Power supply noise reduction methods and low drop out (LDO) voltage regulators with capacitively coupled supply noise-reducing components are disclosed. One illustrative voltage regulator includes: a pass transistor having an n-type conduction channel that couples a supply voltage to an output node; an operational amplifier that derives a control signal for the pass transistor from a difference between a reference voltage and a scaled or unscaled voltage of the output node, the control signal being supplied to a gate or base of the pass transistor; a buffer that derives a ripple cancellation signal from the supply voltage; and a coupling capacitor that couples the buffer to the base or gate of the pass transistor to impose the ripple cancellation signal on the control signal.

Abstract: In an example, an apparatus includes an error amplifier, a buffer, a transistor, and a current-mode feedforward ripple canceller (CFFRC). The error amplifier has an amplifier output, a first input, and a second input, the error amplifier second input configured to receive a reference voltage. The buffer has a buffer input and a buffer output, the buffer input coupled to the error amplifier output. The transistor has a gate, a source, and a drain, the gate coupled to the buffer output, the drain coupled to the first input. The transistor is configured to receive an input voltage (VIN) at the source and provide an output voltage at the drain. The CFFRC has a CFFRC input and a CFFRC output, the CFFRC output coupled to the gate, and the CFFRC input configured to receive VIN.

Abstract: Circuitry for ultrasound devices is described. A multilevel pulser is described, which can provide bipolar pulses of multiple levels. The multilevel pulser includes a pulsing circuit and pulser and feedback circuit. Symmetric switches are also described. The symmetric switches can be positioned as inputs to ultrasound receiving circuitry to block signals from the receiving circuitry.

Abstract: One or more sampling parameters of an application associated with a downstream voltage regulator may be determined. A power supply rejection ratio (“PSRR”) and a switching frequency of an upstream voltage regulator may be dynamically adjusted based on the sampling parameters of the application associated with the downstream voltage regulator. The sampling parameters may include a noise level and a workload of the selected application.

Abstract: Systems and methods are provided for controlling power down of an overdrive low drop out regulator circuits. The system is designed with a low dropout regulator circuit configured to operate in a safe operating area range of operation with very low current. The circuit contains a regulator, a current boost, and a power down switch. The current boost is responsive to a power down signal, generally from a power distribution board. The circuit is fabricated such that the low dropout regulator circuit with the current boost operates with minimum current pull while maintaining safe operating area range of operation. The safe operating area range of operation is maintained during various design operations, normal operations, and power down. This regulator circuit may be designed without a middle level voltage or high-ground.

Abstract: A motor controller circuit having a stable speed controlling mechanism is provided. A duty cycle determining circuit determines duty cycles of the plurality of waveforms respectively of the first waveform signals within each of a plurality of time intervals to output a duty cycle instructing signal, according to a target working period corresponding to a target rotational speed. A signal generating circuit outputs the plurality of first waveform signals according to the duty cycle instructing signal, and outputs a second waveform signal. A motor control circuit outputs a plurality of on-time signals according to the plurality of first waveform signals and the second waveform signal. A motor driving circuit is controlled to operate and drive a motor to rotate according to the plurality of on-time signals.

Abstract: According to one embodiment, a constant voltage circuit includes: a first gain stage that outputting a first voltage amplifying a difference voltage between a divided voltage of an output voltage and a reference voltage; a second gain stage outputting a second voltage amplifying the first voltage; a second transistor, one end of which is coupled to the input voltage terminal, and other end of which is coupled to an output voltage terminal, controlling the output voltage to be constant in accordance with the second voltage applied to the gate; and a first circuit selecting one of a first operation mode and a second operation mode. When the first operation mode is selected, a first current flows to the first node, and when the second operation mode is selected, a second current flows to the first node.

Abstract: A semiconductor package and a manufacturing method thereof are provided. The semiconductor package includes a first device die and a second device die. The first device die includes first bonding pads at a front surface of the first device die. The second device die is bonded on the first device die, and includes die regions and a scribe line region connecting the die regions with one another. The die regions respectively comprise second bonding pads at a front surface of the second device die. The second bonding pads are respectively in contact with one of the first bonding pads.

Abstract: A power supply circuit, includes: an N-channel depletion type output transistor connected between an input terminal of an input voltage and an output terminal of an output voltage; and an operational amplifier configured to control a gate of the output transistor so that a feedback voltage corresponding to the output voltage matches a reference voltage.

Abstract: A second semiconductor switching element is connected in series with a first semiconductor switching element, and is at least partially stacked on the first semiconductor switching element in the thickness direction. A first control element controls the first semiconductor switching element and the second semiconductor switching element, and performs an overcurrent protection operation with reference to a shunt voltage. The first control element is arranged outside the first semiconductor switching element and the second semiconductor switching element in the in-plane direction.

Abstract: A voltage regulator and a corresponding method of regulating a voltage are presented. The voltage regulator includes an N-type power switch, an error amplifier, and a switch capacitor circuit. The switch capacitor circuit includes a first capacitor coupled to a network of switches, the switch capacitor circuit has a first port coupled to an output the error amplifier, a second port coupled to an output terminal of the power switch, and a third port coupled to a control terminal of the power switch. The switch capacitor circuit is iteratively operable between a first phase and a second phase. In the first phase the first port is coupled to ground via a path comprising the first capacitor, and in the second phase the second port is coupled to the third port via a path comprising the first capacitor. The voltage regulator may be implemented as a low dropout regulator.

Abstract: A voltage regulator is provided. The voltage regulator includes a level shifter, a low-pass filter, and a voltage regulating circuit. The level shifter shifts a voltage value of a reference voltage signal to generate a set voltage signal. The low-pass filter filters the set voltage signal to generate a filtered voltage signal. The voltage regulating circuit outputs an output voltage signal according to the filtered voltage signal and adjusts a voltage value of the filtered voltage signal according to a change of the output voltage signal to stabilize a voltage value of the output voltage signal.