With A Specific Feedback Amplifier (e.g., Integrator, Summer) Patents (Class 323/280)
  • Patent number: 9953582
    Abstract: A gray-scale voltage generating circuit includes a ladder resistor circuit and a constant current source. The ladder resistor circuit includes a plurality of resistors connected in series to one another, and is configured to output a plurality of gray-scale voltages with different voltage values from ends of the respective resistors. The constant current source is configured to be connected in series to the ladder resistor circuit.
    Type: Grant
    Filed: February 20, 2014
    Date of Patent: April 24, 2018
    Assignee: SONY CORPORATION
    Inventors: Kei Kimura, Junichi Yamashita
  • Patent number: 9954460
    Abstract: A voltage control device includes an output module and a control module. The output module provides an output current at an output terminal thereof based on a control voltage. The control module includes a comparing circuit, a capacitor, a charging circuit and a discharging circuit. The comparing circuit compares a to-be-compared voltage, which is associated at least with a to-be-controlled voltage at the output terminal of the output module, with a predetermined reference voltage to generate a comparison signal. The capacitor provides the control voltage. The charging circuit is operable to charge the capacitor based on the comparison signal. The discharging circuit is operable to discharge the capacitor based on the comparison signal.
    Type: Grant
    Filed: October 7, 2016
    Date of Patent: April 24, 2018
    Assignee: MACROBLOCK, Inc.
    Inventors: Lon-Kou Chang, Che-Wei Chang, Ting-Ta Chiang, Shi-Jie Liao
  • Patent number: 9940877
    Abstract: A gray-scale voltage generating circuit includes: a ladder resistor circuit including a plurality of resistors connected in series to one another, and configured to output a plurality of gray-scale voltages with different voltage values from ends of the respective resistors; and a constant current source configured to be connected in series to the ladder resistor circuit, in which the constant current source includes a current source transistor configured to be connected in series to the ladder resistor circuit, and a voltage setting section configured to select one voltage from the plurality of voltages and set the selected voltage as a voltage determining a current that is to flow through the current source transistor.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: April 10, 2018
    Assignee: SONY CORPORATION
    Inventors: Kei Kimura, Yusuke Onoyama, Junichi Yamashita
  • Patent number: 9933798
    Abstract: Provided is a voltage regulator configured to stably operate with low current consumption, and having good responsiveness. A delay circuit is provided between a transient response improvement circuit and a voltage amplifier circuit.
    Type: Grant
    Filed: January 11, 2017
    Date of Patent: April 3, 2018
    Assignee: SII SEMICONDUCTOR CORPORATION
    Inventor: Yoshihisa Isobe
  • Patent number: 9915963
    Abstract: Devices and methods to design voltage regulators requiring lower power consumption, wide output current and input voltage range, low dropout, and small footprint. The disclosed methods and devices provide solutions to stabilize such regulators in the presence of widely varying loads.
    Type: Grant
    Filed: July 5, 2017
    Date of Patent: March 13, 2018
    Assignee: pSemi Corporation
    Inventor: Gary Chunshien Wu
  • Patent number: 9893618
    Abstract: In some examples, a voltage regulator comprises an amplifier stage and a pass element configured to receive an output of the amplifier stage and an output of a feedback circuit. The voltage regulator further comprises the feedback circuit configured to receive an output of the pass element, wherein the feedback circuit includes a differentiator stage coupled to a feedback output stage, and wherein the differentiator stage comprises a single capacitor configured to differentiate an output voltage of the pass element.
    Type: Grant
    Filed: May 4, 2016
    Date of Patent: February 13, 2018
    Assignee: Infineon Technologies AG
    Inventor: Fabio Ballarin
  • Patent number: 9891643
    Abstract: A method to adjust the load transient regulation of a low drop-out (LDO)/load switch linear voltage regulator (LVR) with an n-type pass element having an open loop transfer function, including determining during a load transient event if the gate of the pass—element goes lower than a scaled value of the output voltage or a constant voltage level, generating a control signal that controls a current sink block if the gate voltage of the pass element is lower than the output voltage, and enabling a current sink block that is controlled by the control signal and connecting the output of the current sink block to the output of the LVR.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: February 13, 2018
    Assignee: Vidatronic, Inc.
    Inventors: Mohamed Ahmed Mohamed El-Nozahi, Faisal Abdellatif Elseddeek Ali Hussien, Mohamed Mostafa Saber Aboudina, Sameh Ahmed Assem Mostafa Ibrahim, Moises Emanuel Robinson
  • Patent number: 9874887
    Abstract: A voltage regulator circuit with variable feedback is disclosed. In one embodiment, a voltage regulator includes an amplifier having a first input configured to receive a reference voltage and a second input configured to receive a feedback signal. The voltage regulator further includes first and second transistors each having respective gate terminals coupled to an output of the amplifier. A resistor network coupled to the second input of the amplifier and further coupled to the first and second transistors. The resistor network is configured to produce the feedback signal based on currents through the first and second transistors, respectively.
    Type: Grant
    Filed: February 24, 2012
    Date of Patent: January 23, 2018
    Assignee: Silicon Laboratories Inc.
    Inventors: Shouli Yan, Alan Westwick
  • Patent number: 9843260
    Abstract: A supply modulator including a first switched-mode power supplier configured to transmit a modulated voltage to an output node in response to an envelope signal, the first switched mode power supplier including: a switching circuit configured to transmit a pulse signal in response to the amplitude of the envelope signal; and a low pass filter configured to generate the modulated voltage by filtering certain frequency band of the pulse signal, the low pass filter comprising a plurality of stages; and a second switched-mode power supplier configured to selectively transmit a compensation current to the output node in response to the current transmitted from the first switched-mode power supplier, wherein each of the plurality of stages of the low pass filter comprises at least one variable impedances.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: December 12, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ji Seon Paek, Dongsu Kim, Younghwan Choo
  • Patent number: 9837831
    Abstract: A feedback controlled coil driver with ASK modulation is disclosed. A class E coil driver drives an LC circuit to generate a magnetic signal via the inductor. A modulation capacitor is coupled to the LC circuit to modulate the coil driver signal. The voltage across the coil driver switch is sampled. The difference between the sampled voltage and a reference voltage is integrated and compared to a ramp voltage to obtain an optimal on time for the coil driver switch such that coil current is maximized.
    Type: Grant
    Filed: April 28, 2015
    Date of Patent: December 5, 2017
    Assignee: The Alfred E. Mann Foundation For Scientific Research
    Inventor: Edward K. F. Lee
  • Patent number: 9836070
    Abstract: The regulator with a low dropout voltage comprises an error amplifier comprising a differential pair of input transistors and a circuit with folded cascode structure connected to the output of the said differential pair, an output stage connected to the output node of the error amplifier, and a Miller compensation capacitor connected between the output stage and the cascode node on the output side (XP) of the cascode circuit; the error amplifier furthermore comprises at least one inverting amplifier module in a feedback loop between the said cascode node and the gate of the cascode transistor of the cascode circuit connected between the said cascode node and the said output node.
    Type: Grant
    Filed: November 10, 2015
    Date of Patent: December 5, 2017
    Assignee: STMicroelectronics (Rousset) SAS
    Inventors: Jimmy Fort, Thierry Soude
  • Patent number: 9817415
    Abstract: A low drop-out regulator circuit comprises a pass transistor providing an output voltage on an output terminal in response to a gate voltage on a gate of the pass transistor. A feedback circuit is coupled to the output terminal to generate a feedback voltage, and an error amplifier provides a drive signal in response to a reference voltage and the feedback voltage. A first gate driver circuit is operable over a first voltage range to provide the gate voltage to the pass transistor in response to the drive signal. A second gate driver circuit is operable over a second voltage range to provide the gate voltage to the pass transistor in response to the drive signal, where the second voltage range is lower than the first voltage range.
    Type: Grant
    Filed: July 15, 2015
    Date of Patent: November 14, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Vincenzo F. Peluso, Liangguo Shen, Hua Guan, Mengmeng Du, Ngai Yeung Ho
  • Patent number: 9806759
    Abstract: An apparatus comprises a radio frequency (RF) transceiver circuit; a phase modulator that comprises digital-to-time converter (DTC) circuitry configured to convert a digital value to a specified signal phase of a signal transmitted by the RF transceiver circuit; low drop out regulator (LDO) circuitry operatively coupled to the DTC circuitry, wherein a bias current of the LDO circuitry is adjustable; and logic circuitry operatively coupled to the LDO circuitry and DTC circuitry, wherein the logic circuitry is configured to set the adjustable bias current of the LDO circuitry according to a digital value input to the DTC circuitry.
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: October 31, 2017
    Assignee: Intel IP Corporation
    Inventors: Sebastian Sievert, Ofir Degani, Eshel Gordon
  • Patent number: 9793707
    Abstract: Apparatus disclosed herein implement a fast transient precision current limiter such as may be included in an electronic voltage regulator. The current limiter includes two current sense element/current clamp control loops. A fast response time control loop first engages and clamps a current spike. A precision control loop then engages to more accurately clamp the output current to a programmed set point. The precision clamping loop includes an inner loop to linearize the precision current sense element. The inner loop forces the drain-to-source voltage (VDS) of the precision sense element to track the VDS of the regulator pass element. A more precise clamping operation results. Overall speed is not sacrificed as the fast response time clamping loop operates in parallel to protect circuitry while the precision clamping loop engages.
    Type: Grant
    Filed: May 28, 2013
    Date of Patent: October 17, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Hector Torres, Charles Parkhurst
  • Patent number: 9791875
    Abstract: A low dropout regulator (LDO) is disclosed. The LDO includes a transistor loop including a first transistor coupled to a second transistor. The first transistor and the second transistor coupled to a first resistor and a second resistor. The first resistor being coupled to ground and second resister coupled to the first resistor. The LDO further includes an output transistor coupled to the second transistor and a power supply line. The output transistor further coupled to a pair of input transistors coupled to the power supply line. One of the input transistors coupled to a third resistor, wherein the third resistor coupled to a fourth resistor and the fourth resistor coupled to ground. The LDO also includes a fifth resistor coupled to an output of the output transistor. The fifth resistor is coupled to the first transistor.
    Type: Grant
    Filed: January 5, 2017
    Date of Patent: October 17, 2017
    Assignee: NXP B.V.
    Inventor: Ge Wang
  • Patent number: 9780664
    Abstract: A power supply device, including: a switching structure for controlling a continuous current in an inductive load on the basis of at least one control signal of a power switch; and anomaly detection elements, generating at least one item of information about the detection of an anomaly of the open circuit type in the wiring from the load to the switching structure. The anomaly detection elements include: elements for measuring the current flowing in the inductive load; elements for comparing the measured current continuously with a threshold value; and elements for counting a time interval during which the measured current remains continuously below the threshold value, delivering the anomaly detection information if the counted time interval>a reference time interval, which is k times greater than a period of the control signal, where k>1, and if the duty cycle of the control signal>a threshold value.
    Type: Grant
    Filed: February 19, 2015
    Date of Patent: October 3, 2017
    Assignees: CONTINENTAL AUTOMOTIVE FRANCE, CONTINENTAL AUTOMOTIVE GMBH
    Inventors: Angelo Pasqualetto, Marie-Nathalie Larue
  • Patent number: 9773468
    Abstract: A display driving device includes a first source amplifier that receives first display data and supplies a first pixel voltage to a first pixel based on the received first display data, and a second source amplifier that receives second display data and first control data and supplies a second pixel voltage to a second pixel based on the received second display data and first control data. The second source amplifier has a first stage in which a first process is performed on an input signal based on the second display data, and a second stage in which a second process is performed on the first processed input signal to output the second pixel voltage. The first source amplifier may be configured to conditionally supply the first pixel voltage to the second pixel.
    Type: Grant
    Filed: February 12, 2014
    Date of Patent: September 26, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-Hyuck Woo, Won-Sik Kang, Yang-Hyo Kim, In-Suk Kim, Jong-Kon Bae
  • Patent number: 9753482
    Abstract: A voltage reference source includes a source block, a first resistor having a first terminal coupled to a first terminal of the source block, a reference output for providing a reference voltage, and a first and a second mirror transistor forming a first current mirror. The first mirror transistor couples a second terminal of the source block to a supply voltage terminal and the second mirror transistor couples the reference output to the supply voltage terminal. A series connection of a second resistor and a diode is arranged between the reference output and the first terminal of the first resistor. A mirror current flows through the second mirror transistor and the series connection to the first terminal of the first resistor.
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: September 5, 2017
    Assignee: AMS AG
    Inventors: Mark Niederberger, Thomas Mueller
  • Patent number: 9753473
    Abstract: Aspects of the present invention include a low-dropout (LDO) linear power supply system. The system includes a pass-element configured to generate an output voltage at an output based on an input voltage. The system also includes a compensation amplifier stage coupled to the output and configured to provide frequency compensation and provide a desired frequency response of the output voltage. The system further includes a gain amplifier stage interconnecting the compensation amplifier stage and the pass-element and configured to provide DC gain scaling to generate the output voltage substantially proportional to the input voltage within a given range of the input voltage.
    Type: Grant
    Filed: October 2, 2012
    Date of Patent: September 5, 2017
    Assignee: Northrop Grumman Systems Corporation
    Inventors: Fang Dong Tan, Jeff Zee
  • Patent number: 9753471
    Abstract: Various circuits and methods are disclosed for generating a regulated voltage. According to an example embodiment, an apparatus includes a voltage regulation circuit including a transistor having a channel between source and drain nodes and a gate for affecting current passing through the channel. The voltage regulation circuit configured and arranged to generate, from a voltage source, a regulated voltage at an output node. The voltage regulation circuit exhibits a transfer function having a pole-frequency that varies in response to changes in the current passed by the transistor. The apparatus also includes a current control circuit connected to the voltage regulation circuit, and configured to adjust current provided to the output node to maintain a relatively constant current through the transistor.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: September 5, 2017
    Assignee: NXP B.V.
    Inventor: Ananthasayanam Chellappa
  • Patent number: 9742362
    Abstract: In a semiconductor device, power consumption is reduced. Further, a standby circuit is formed of a few elements, and thus increase in the circuit area of the semiconductor device is prevented. The standby circuit provided in the semiconductor device is formed of only one transistor and voltage supplied to the transistor is switched, whereby output current of the semiconductor device is controlled. As a result, the output current of the semiconductor device in a standby state can be substantially zero, so that the power consumption can be reduced. By using an oxide semiconductor for a semiconductor layer of a transistor, leakage current can be suppressed as low as possible.
    Type: Grant
    Filed: May 28, 2015
    Date of Patent: August 22, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Atsushi Hirose
  • Patent number: 9734904
    Abstract: A digital LDO regulator includes a first comparison circuit to compare an output voltage with a reference voltage and to output a reference load switching signal when the output voltage rises above the reference voltage, a logic circuit to output a control current in response to the reference load switching signal, a second comparison circuit to compare the output voltage with a transient reference voltage and to output a transient load switching signal when the output voltage rises above the transient reference voltage, a switching circuit to control the logic circuit to pass a transient current in response to the transient load switching signal, a circuit to provide a mirroring current to the logic circuit after a transient state, a load current supply circuit to switch in response to the control current and to supply a load current, and a capacitor coupled to the load current supply circuit.
    Type: Grant
    Filed: February 2, 2017
    Date of Patent: August 15, 2017
    Assignees: SK HYNIX INC., KOREA ADVANCED INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Gyu Hyeong Cho, Sung Won Choi, Chang Yong Ahn
  • Patent number: 9729140
    Abstract: Apparatus and methods to increase the range of a signal processing circuit. A system uses floating bias circuits coupled to a signal processing circuit to increase the range of power supplies that can be used with the signal processing circuit, while maintaining the components of the signal processing circuit within a breakdown voltage threshold. As the voltage level of the data signal varies, the voltage level of the floating bias circuits varies as well.
    Type: Grant
    Filed: March 5, 2014
    Date of Patent: August 8, 2017
    Assignee: Analog Devices, Inc.
    Inventors: JoAnn Close, Jennifer W. Pierdomenico, David Hall Whitney
  • Patent number: 9691444
    Abstract: Memory devices and methods of making and operating them are shown. Memory devices shown include stacked memory dies with one or more buffer dies included. In one such memory device, a command die communicates with one or more downstream memory dies through the one or more buffer dies. The one or more buffer dies function to repeat signals, and can potentially improve performance for higher numbers of memory dies in the stack.
    Type: Grant
    Filed: November 11, 2013
    Date of Patent: June 27, 2017
    Assignee: Micron Technology, Inc.
    Inventor: Timothy M. Hollis
  • Patent number: 9684324
    Abstract: A voltage-regulator device includes an error-amplifier stage configured to receive a first reference voltage and a feedback voltage, an output amplifier stage coupled to the error-amplifier stage and configured to generate an output voltage related to the first reference voltage by an amplification factor, and a feedback stage configured to generate the feedback voltage. A compensation stage is configured to implement a second feedback loop, and cause, in response to a variation of the output voltage, a corresponding variation of a first biasing voltage for the output amplifier stage. The compensation stage includes a coupling-capacitor element coupled between the output amplifier stage and a first internal node, and a driving module coupled between the first internal node, and the output amplifier stage and configured to generate a compensation voltage for driving the output amplifier stage.
    Type: Grant
    Filed: December 15, 2015
    Date of Patent: June 20, 2017
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Antonino Conte, Carmelo Paolino
  • Patent number: 9685863
    Abstract: A power conversion system includes, for example, a PFM controller, a PWM controller, and an auxiliary voltage output stage. The PFM controller controls a power output stage in a PFM mode in response to a power stage voltage output generated by the power output stage during a first period of time in which the power output stage is operating in the PFM mode. The PWM controller controls the power output stage in a PWM mode in response to a power stage voltage output generated by the power output stage during a second period of time in which the power output stage is operating in the PWM mode. The auxiliary voltage output stage generates an auxiliary voltage during a third period of time, where the PWM controller controls the auxiliary power output stage using the auxiliary voltage during the third period of time.
    Type: Grant
    Filed: December 31, 2014
    Date of Patent: June 20, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventor: Srinivas Venkata Veeramreddi
  • Patent number: 9671804
    Abstract: The present document relates to multi-stage amplifiers, such as linear regulators (e.g. low-dropout regulators). A method and a circuit for reducing leakage current of such multi-stage amplifiers is presented. A voltage regulator is described. The voltage regulator comprises a pass device configured to provide a load current at a regulated output voltage to an output node of the voltage regulator. A source of the pass device is coupled to a first potential of the voltage regulator. Furthermore, the voltage regulator comprises drive circuitry configured to control the pass device via a gate of the pass device, based on a reference voltage and based on a feedback voltage derived from the output voltage. In addition, the voltage regulator comprises leakage reduction circuitry configured to pull-up the gate of the pass device using a second potential; wherein the second potential is higher than the first potential.
    Type: Grant
    Filed: November 19, 2014
    Date of Patent: June 6, 2017
    Assignee: Dialog Semiconductor (UK) Limited
    Inventors: Frank Kronmueller, Ambreesh Bhattad, Burak Dundar
  • Patent number: 9648789
    Abstract: An apparatus is provided that includes a housing for an electronic device. The housing includes a plurality of side walls and a removable exterior housing panel. A circuit board is mechanically attached to a first side of the panel, which faces an interior of the housing when the panel is secured to the plurality of side walls. The panel is made from a heat-conductive material to conduct heat from the circuit board to the panel and exterior environment.
    Type: Grant
    Filed: October 10, 2014
    Date of Patent: May 9, 2017
    Assignee: General Electric Company
    Inventors: Andrew Louis Krivonak, Mark Allen Murphy
  • Patent number: 9627976
    Abstract: A power supply system includes a power source; a load device configured to receive power from the power source; and a power interface device coupled to the power source and the load device and configured to change a first voltage provided by the power source to a second voltage for operating the load device. The power interface device include a main switching converter configured to operate at a first switching frequency and source low frequency current to the load device and an auxiliary switching converter coupled in parallel with the main switching converter and configured to operate at a second and different switching frequency and source fast transient high frequency current to the load device.
    Type: Grant
    Filed: February 19, 2016
    Date of Patent: April 18, 2017
    Assignee: LINEAR TECHNOLOGY CORPORATION
    Inventor: Jian Li
  • Patent number: 9612603
    Abstract: A voltage regulator calibrator analyzes voltage regulator output and compares the output with known electrical loads. The calibrator selects a known electrical load, applies the known electrical load to a voltage regulator, receives from the voltage regulator measured output power characteristics of the voltage regulator, compares the known electrical load with the measured output power characteristics, and generates a voltage regulator adjustment value based on the compared values. Embodiments of the present disclosure also include a method for calibrating, the method including selecting a known electrical load, applying the known electrical load to a voltage regulator, receiving measured output power characteristics of the voltage regulator, comparing the known electrical load with the measured output power characteristics, and generating a voltage regulator adjustment value based on the compared values.
    Type: Grant
    Filed: July 17, 2014
    Date of Patent: April 4, 2017
    Assignee: Dell Products, L.P.
    Inventors: George G. Richards, III, Abey K. Mathew, John E. Jenne, Ralph H. Johnson, III
  • Patent number: 9612274
    Abstract: A probe card including a multi-layered substrate, a plurality of needles, and a temperature controlling unit may be provided. The multi-layered substrate may include a test pattern through which a test current passes. The needles may be provided on the multi-layered substrate. The needles may be electrically connected to the test pattern and may be configured to contact an object so that the test current may be supplied to the object. The temperature controlling unit may provide the multi-layered substrate with at least one of a first temperature and a second temperature, the first temperature being higher than the second temperature. Thus, a time for setting a test temperature may be shortened. As a result, thermal deformation of the probe card and/or the object may be reduced or suppressed, and thus reliability of test result may be improved.
    Type: Grant
    Filed: February 24, 2014
    Date of Patent: April 4, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jun-Hee Lee, Jong-Hyun Kim
  • Patent number: 9601987
    Abstract: In a power supply apparatus, power is transmitted from its input terminal to its output terminal. The transmitted power is controlled so that an output voltage detected in a predetermined ratio can be equal to a reference voltage. A reduction signal is outputted when the output voltage decreases below a threshold. A presence or absence of an abnormality in a capacitance connected to the output terminal or a load current in a load connected to the output terminal is determined, when the output voltage is equal to the target voltage, by changing at least one of the detection ratio and the reference voltage so that the output voltage can transition from a target voltage higher than the threshold toward a middle voltage lower than the threshold only during a predetermined time period.
    Type: Grant
    Filed: November 7, 2014
    Date of Patent: March 21, 2017
    Assignee: DENSO CORPORATION
    Inventors: Mutsuya Motojima, Takeshi Morinaga
  • Patent number: 9595929
    Abstract: An amplifier includes an amplifier input and an amplifier output. A compensation network is coupled to the amplifier output. The compensation network includes at least one RC network tuned to a frequency in which the amplifier operates. The compensation network provides at least one zero to compensate for at least one pole introduced by a load coupled to the amplifier output.
    Type: Grant
    Filed: October 7, 2014
    Date of Patent: March 14, 2017
    Assignee: Texas Instruments Incorporated
    Inventors: Srinivas K. Pulijala, Steven G. Brantley
  • Patent number: 9559509
    Abstract: A power supply control device includes: a control board that is configured to control a voltage of a battery module; and a bus bar module that is configured to electrically connect the control board and the battery module, the control board and the bus bar module are arranged in a stacked manner, and connection terminals of the bus bar module which are connected to the battery module are exposed when viewed from the control board.
    Type: Grant
    Filed: October 4, 2012
    Date of Patent: January 31, 2017
    Assignees: KEIHIN CORPORATION, HONDA MOTOR CO., LTD.
    Inventors: Takeshi Nakamura, Daiki Kudo, Masashi Ueda, Kosuke Tachikawa, Tetsuya Hasebe
  • Patent number: 9509216
    Abstract: A switching power supply circuit includes: a voltage generation circuit that generates an output voltage by smoothing, with a capacitor, a voltage produced in an inductor; an integration circuit that integrates a switching voltage to generate a first ripple voltage including a first ripple component; a feedback voltage generation circuit that divides the output voltage to generate a feedback voltage; a comparison circuit that compares the feedback voltage with a reference voltage to output the result of the comparison as a comparison result signal; an integration circuit that integrates the comparison result signal to generate a second ripple voltage including a second ripple component; and a drive circuit that controls the turning on and off of a switch element based on the comparison result signal, where the first ripple component and the second ripple component are added to the feedback voltage.
    Type: Grant
    Filed: July 2, 2015
    Date of Patent: November 29, 2016
    Assignee: Rohm Co., Ltd.
    Inventors: Atsushi Yamaguchi, Yohei Moriyama, Koki Sakamoto
  • Patent number: 9471074
    Abstract: A voltage regulator has a large gm current buffer driver added between a first stage of an operation amplifier and a last stage power transistor. This current buffer allows a significant reduction in the maximum internal and external compensation capacitances needed for regulator stability. The current buffer compensation circuit allows a wide range of external capacitor sizes that increases the flexibility in choosing the external capacitor types (with low to high ESR ratings).
    Type: Grant
    Filed: March 11, 2014
    Date of Patent: October 18, 2016
    Assignee: MICROCHIP TECHNOLOGY INCORPORATED
    Inventors: Huamin Zhou, Woowai Martin, Cristian Albina, Fritz Schlunder, Minh Le
  • Patent number: 9471075
    Abstract: A compensation module for a voltage regulation device having a gain stage, an output stage and a miller compensation module includes a low-output-impedance non-inverting amplifier unit coupled to a gain output of the gain stage and an output-stage input of the output stage.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: October 18, 2016
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Min-Hung Hu, Pin-Han Su, Chun-Wei Huang, Chen-Tsung Wu, Chiu-Huang Huang
  • Patent number: 9465086
    Abstract: A circuit and method is described for automatically testing multiple LDO regulator circuits on an integrated circuit chip independent of an ATE. Each LDO regulator is tested for voltage at a specified current output capability, wherein the output driver transistor is formed by at least two pass transistors, which are each tested for voltage output at a particular current capability. The test results are delivered back to the ATE and for a failed test, the gate voltage of the pass device can be observed through an analog multiplexer to enable debug.
    Type: Grant
    Filed: September 3, 2015
    Date of Patent: October 11, 2016
    Assignee: Dialog Semiconductor GmbH
    Inventors: Dietmar Orendi, Biren Minhas, Robert Baraniecki
  • Patent number: 9467204
    Abstract: A transmitter of a NFC device includes a current detector which detects a first current flowing in an output node of a regulator and outputs a current detection signal related to a result of the detection, and a control block which compares the current detection signal with a reference current and generates a control signal for controlling a voltage of the output node according to a result of the comparison.
    Type: Grant
    Filed: October 27, 2014
    Date of Patent: October 11, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chol Su Yoon, Il Jong Song, Jae Hun Choi
  • Patent number: 9467045
    Abstract: A SMPS has a switching circuit and a controller. The switching circuit has an input terminal and an output terminal, and also includes a switch and an inductor, wherein the switching circuit regulates an output voltage at the output terminal based on an input voltage at the input terminal by controlling a switching action of the switch. The controller generates a switching control signal to control the switch, where the switching control signal transits from a first state to a second state when an output signal at the output terminal satisfies a predetermined condition, and the switching control signal transits from the second state to the first state after a period of time. And a switching frequency of the switch and an inductor ripple current of the inductor both vary with the input voltage.
    Type: Grant
    Filed: September 18, 2014
    Date of Patent: October 11, 2016
    Assignee: MONOLITHIC POWER SYSTEMS, INC.
    Inventors: John Fogg, Jian Jiang, Junyong Gong
  • Patent number: 9454168
    Abstract: In an LDO regulator, two feedback loops are created. The first feedback loop includes a high power PNP bipolar power transistor connected in series between the input voltage Vin terminal and the output voltage Vout terminal. The first feedback loop includes a first error amplifier that controls a drive transistor to drive the base of the power transistor such that Vout matches a set voltage Vset. This first feedback loop circuitry uses an operating voltage (the upper rail voltage) that is regulated by a second feedback loop and is approximately 300 mV greater than Vout. As a result, the control circuitry will be powered by a low ripple supply to improve output PSRR. Further, the power transistor is connected such that any noise in the input voltage is a common mode voltage across the base-emitter of the transistor.
    Type: Grant
    Filed: May 7, 2015
    Date of Patent: September 27, 2016
    Assignee: Linear Technology Corporation
    Inventors: Amitkumar P. Patel, Carl Nelson
  • Patent number: 9442501
    Abstract: A semiconductor device including a voltage regulator is disclosed. The voltage regulator may include a multipath amplifier stage, a driver stage coupled to the multipath amplifier stage, a dynamic compensation circuit coupled to the multipath amplifier stage, and a current compensation circuit. The dynamic compensation circuit may be operable to provide a varying level of compensation to the multipath amplifier stage, where the varying level of compensation proportional to a current level associated with the load; and the current compensation circuit may be operable to allow a minimum current level at the driver stage.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: September 13, 2016
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Stefano Pietri, Chris C. Dao, Andre Luis Vilas Boas
  • Patent number: 9395731
    Abstract: Circuits and methods to reduce the size of output capacitors of LDOs or amplifiers are disclosed. Nonlinear mirroring of the load current allows scaling of gain or adapting small signal impedance of a pass transistor depending on other inputs, in case of a preferred embodiment, allows to reduce small signal impedance at the gate of the pass transistor as the load current increases, hence allowing to reduce the size of an output capacitor without compromising stability of the system.
    Type: Grant
    Filed: September 4, 2014
    Date of Patent: July 19, 2016
    Assignee: Dialog Semiconductor GmbH
    Inventor: Ambreesh Bhattad
  • Patent number: 9379554
    Abstract: A current output circuit for a two-wire transmitter includes a first current source circuit configured to output a first current controlled by a control voltage generated based on a physical quantity, a second current source circuit configured to output a second current controlled by the first current, a first shunt voltage source circuit configured to generate an internal power source of the two-wire transmitter from the second current, a third current source circuit configured to generate a third current controlled by a reference voltage, and a second shunt voltage source circuit configured to generate a power source of the second current source circuit by the third current. The current output circuit is configured to output a predetermined current controlled by the control voltage based on the first current, the second current and the third current to an external circuit through two transmission lines.
    Type: Grant
    Filed: November 11, 2013
    Date of Patent: June 28, 2016
    Assignee: YOKOGAWA ELECTRIC CORPORATION
    Inventors: Daisuke Hatori, Youichi Iwano
  • Patent number: 9377801
    Abstract: In one embodiment a low-dropout regulator comprises a first differential amplifier (Nmos1) to receive an input voltage (Vin), a power transistor (T1) coupled to the first differential input pair (Nmos1), the power transistor having an output (OUT) forming an output terminal of the low-dropout regulator to provide an output voltage (Vout) as a function of the input voltage (Vin), a second differential amplifier (Pmos1) coupled to the first differential amplifier (Nmos1), and a switching element (Mncut1, Mncut2) coupled between first and second differential amplifier (Nmos1, Pmos1), said switching element (Mncut1, Mncut2) being operated as a function of a feedback signal (Sfb) derived from the output voltage (Vout). The second differential amplifier (Pmos1) is complementary to the first differential amplifier (Nmos1).
    Type: Grant
    Filed: March 20, 2014
    Date of Patent: June 28, 2016
    Assignee: AMS AG
    Inventors: Carlo Fiocchi, Alessandro Carbonini
  • Patent number: 9369041
    Abstract: A voltage converter for converting an input voltage to an output voltage is disclosed. The voltage converter includes a voltage converter circuit having a set of switches, a switch driver connected to the voltage converter circuit, a controller connected to the switch driver and the output voltage, a target output voltage connected to the controller, a control signal generated by the controller for the switch driver that includes a duty ratio based on the target output voltage and the output voltage. The switch driver is configured to apply the control signal to the set of switches and the voltage converter circuit generates the output voltage based on the duty ratio to match the target output voltage.
    Type: Grant
    Filed: August 21, 2014
    Date of Patent: June 14, 2016
    Assignees: Cirasys, Inc., The Board of Regents, The University of Texas System
    Inventors: Vikas V. Paduvalli, Louis R. Hunt, Poras T. Balsara, Robert J. Taylor
  • Patent number: 9350240
    Abstract: PWM control circuits and soft start circuitry thereof are presented in which a source follower circuit provides an input to a pulse generator error amplifier during startup according to a lower one of an internal soft start circuit ramp signal and a voltage across and externally connected capacitor, with a current source connected to the source follower to limit the charging current supplied to the externally connected capacitor.
    Type: Grant
    Filed: April 8, 2014
    Date of Patent: May 24, 2016
    Assignee: Texas Instruments Incorporated
    Inventors: Xianhui Dong, Xiaojun Xu, Shuchun Zhang, Daniel Jing
  • Patent number: 9337785
    Abstract: Examples are provided for a multi-stage track-and-hold amplifier (THA). The multi-stage THA may include a first stage, a second stage, and a third stage. The first stage may be coupled to an input signal and configured to sample the input signal. The second stage may be coupled to the first stage and may include a buffer circuit. The third stage may be coupled to the second stage and can include a bootstrapped THA. The first stage may further include a shunted source-follower circuit and a switched source-follower circuit. The shunted source-follower circuit may include a first switch that can be operable to couple an output node of the shunted source-follower circuit to ground potential.
    Type: Grant
    Filed: February 12, 2014
    Date of Patent: May 10, 2016
    Assignee: Semtech Corporation
    Inventors: Sandeep Louis D'Souza, Kenneth Colin Dyer, Raghava Manas Bachu
  • Patent number: 9292026
    Abstract: An overshoot reduction circuit within a low dropout voltage regulator eliminates an overshoot at an output terminal resulting from a transient fault condition occurring at an input or output terminal. The overshoot reduction circuit monitors to sense if there is a transient fault condition occurring at the input or output terminal and provides a Miller capacitance at the output terminal of a differential amplifier of the low dropout voltage regulator to prevent the output of the differential amplifier from being discharged to ground during the transient. A control loop circuit balances current within an active load of the differential amplifier to clamp the output of the differential amplifier to its normal operating point. When the transient fault condition ends, the output voltage of the differential amplifier is set such that a pass transistor of the low dropout regulator responds quickly to resume the regulation to reduce or eliminate the overshoot.
    Type: Grant
    Filed: October 14, 2013
    Date of Patent: March 22, 2016
    Assignee: Dialog Semiconductor GmbH
    Inventor: Ambreesh Bhattad
  • Patent number: 9280169
    Abstract: A voltage regulator can provide a regulated output voltage. The voltage regulator includes a regulating module that includes a resistor and a field effect transistor that has a threshold voltage. The resistor is coupled to a gate terminal and a source terminal of the field effect transistor. The regulating module provides the output voltage. A reference module is suitable for detecting a variation of the output voltage. The reference module is coupled with the regulating module. A current sink is suitable for subtracting a compensation current from the current flowing from the regulating module to the reference module. The compensation current is dependent on a variation of the threshold voltage.
    Type: Grant
    Filed: July 7, 2010
    Date of Patent: March 8, 2016
    Assignee: EPCOS AG
    Inventors: Jeroen Bouwman, Leon C. M. van den Oever