With A Specific Feedback Amplifier (e.g., Integrator, Summer) Patents (Class 323/280)
  • Patent number: 7312598
    Abstract: A low drop out (LDO) regulator that includes a novel error amplifier, which is arranged with a first stage that employs both NMOS and PMOS devices that are similarly doped in differential pairs and a second stage that operates with NMOS and PMOS devices in a push-pull arrangement. In addition to the error amplifier, the LDO regulator can also include a startup circuit coupled to an enable voltage, a reference filter circuit coupled to a reference voltage, an output circuit, a quiescent current control circuit, and a pulse generator circuit. Also, an internal RC network is provided to compensate for phase shift. The integrated operation of the components of the regulator enables stable and fast operation of an LDO regulator with no external capacitors connected to the input or output terminals.
    Type: Grant
    Filed: August 25, 2006
    Date of Patent: December 25, 2007
    Assignee: National Semiconductor Corporation
    Inventor: Shengming Huang
  • Patent number: 7304458
    Abstract: A regulator circuit is offered to resolve a problem that an unnecessary operating current flows in a semiconductor integrated circuit in a low power consumption state. Channel width to channel length ratios of an output transistor in a first operational amplifier and a first control MOS transistor are designed large in order to obtain an operating current in a normal operation state, while channel width to channel length ratios of an output transistor in a second operational amplifier and a second control MOS transistor are designed small to obtain an operating current in the low power consumption state. There is provided a switching circuit that selectively put in operation one of the operational amplifiers according to the state of the integrated circuit. The first operational amplifier and the first control MOS transistor having higher current driving capabilities operate in the normal operation state.
    Type: Grant
    Filed: November 7, 2006
    Date of Patent: December 4, 2007
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Takashi Kakinuma
  • Patent number: 7301315
    Abstract: A power supply circuit includes an output driver transistor, a reference voltage generator circuit, an output voltage detector circuit, an amplifier circuit, and a buffer circuit. The output driver transistor outputs a current in accordance with a first control signal input thereto. The reference voltage generator circuit generates a predetermined reference voltage. The output voltage detector circuit detects an output voltage and outputs a divided voltage generated based on the output voltage. The amplifier circuit has a first polarity and a second polarity opposite to the first polarity and compares the predetermined reference voltage and the divided voltage and outputs a second control signal. The buffer circuit receives the second control signal and controls the operation of the output driver transistor in accordance with the second control signal. The buffer circuit includes first and second transistors having a polarity same as the second polarity of the amplifier circuit.
    Type: Grant
    Filed: January 5, 2005
    Date of Patent: November 27, 2007
    Assignee: Ricoh Company, Ltd.
    Inventor: Ippei Noda
  • Patent number: 7282902
    Abstract: A voltage regulator apparatus, wherein two transistors are coupled to an output terminal of a voltage regulator, so as to improve the transient response of output voltage and increase the stability of the output voltage. Besides, it avoids the use of an external capacitor.
    Type: Grant
    Filed: March 7, 2004
    Date of Patent: October 16, 2007
    Assignee: Faraday Technology Corp.
    Inventors: Yuan-Hsun Chang, Jia-Jio Huang, Cheng-Chung Chou
  • Patent number: 7276861
    Abstract: A system drives one or plurality of LEDs regulating their brightness by controlling LEDs average current or voltage. The system includes a switching power converter and an integrated digital regulator with at least one of electrical, thermal and optical feedbacks. The regulator is constructed as a hysteretic peak current mode controller for continuous mode of operation of the power converter. For discontinuous mode of operation of the power converter a pulse averaging sliding mode control is being used. Average LED current is measured by integrating LED pulse current at off time and hysteretically adjusting on time of the power switch. Input battery is protected from discharging at abnormally low impedance of the output.
    Type: Grant
    Filed: May 31, 2005
    Date of Patent: October 2, 2007
    Assignee: Exclara, Inc.
    Inventors: Anatoly Shteynberg, Harry Rodriguez
  • Publication number: 20070216383
    Abstract: A low drop-out voltage regulator having soft-start. A low drop-out regulator circuit is provided having an input node, an output node, a power FET connected by a source and drain between the input node and the output node, and a feedback circuit having an output connected and providing a control signal to a gate of the power FET. A current limit circuit is configured to control the power FET to limit the current through it when the voltage across a controllable sense resistor connected to conduct a current representing the current through the power FET exceeds a predetermined limit value. At start-up, control unit provides a control signal to the controllable resistor to cause the resistance value of the controllable resistor to decrease incrementally in value at respective predetermined incremental times during a predetermined time interval.
    Type: Application
    Filed: March 7, 2007
    Publication date: September 20, 2007
    Applicant: TEXAS INSTRUMENTS, INCORPORATED
    Inventors: Mohammad A. Al-Shyoukh, Marcus M. Martins, Devrim Yilmaz Aksin
  • Patent number: 7262586
    Abstract: A shunt type voltage regulator circuit (300) can include a load supply circuit (306) and feedback circuit (308-0) that provide impedance modulated according to a first feedback circuit (308), thus limiting power consumption at higher power supply ranges. In addition, a faster regulation response can be provided by a current conveyor circuit (312?) that can force the voltage at a regulated load node (304) to match that at a replication node (316).
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: August 28, 2007
    Assignee: Cypress Semiconductor Corporation
    Inventor: Iulian Gradinariu
  • Patent number: 7253595
    Abstract: A low drop-out voltage regulator having a pass device (Mp), an error amplifier (M1-M51) and a double regulation loop including DC feedback loop (R1, R2) and an AC feedback loop (Rf, Cf) including a high pass filter (Cf). Combining these two loops creates an ultra low frequency internal pole which makes the regulator stable substantially independent of the output bypass capacitor's value. This provides the following advantages: allows the use of very low bypass capacitors; allows to extend the PSRR frequency behavior; allows an increase in the regulator's efficiency (reduced power consumption on heavy loads).
    Type: Grant
    Filed: February 12, 2003
    Date of Patent: August 7, 2007
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Ludovic Oddoart, Gerald Miaille
  • Publication number: 20070176582
    Abstract: A constant voltage circuit is disclosed that includes an output voltage control transistor outputting a current to an output terminal; a first error amplifier circuit part controlling the operation of the output voltage control transistor; a second error amplifier circuit part causing the output voltage control transistor to increase the output current when there is a rapid decrease in an output voltage from the output terminal; and a current limiting circuit part controlling the operation of the output voltage control transistor so as to prevent the output current therefrom from exceeding a first predetermined value by gradually decreasing the output current and the output voltage alternately when the output current is greater than or equal to the first predetermined value. The current limiting circuit part stops the operation of the second error amplifier circuit part when the output voltage is less than or equal to a second predetermined value.
    Type: Application
    Filed: January 11, 2007
    Publication date: August 2, 2007
    Inventors: Tsugunori Okuda, Akihito Nagahama
  • Patent number: 7248025
    Abstract: In a voltage regulator, a reference voltage generating circuit generates a reference voltage. A drive transistor is connected between a first power supply terminal and an output terminal and has a control terminal. A voltage divider generates a feedback voltage which is an intermediate voltage between voltages at the output terminal and a first power supply terminal. A differential amplifier generates an error voltage in accordance with the feedback voltage of the voltage divider and the reference voltage, and transmits it to the control terminal of the drive transistor. An oscillation preventing capacitor is connected between the control of the drive transistor and the output terminal. A capacitor is connected between the first power supply terminal and the first input of the differential amplifier.
    Type: Grant
    Filed: April 29, 2005
    Date of Patent: July 24, 2007
    Assignee: NEC Electronics Corporation
    Inventor: Masahiro Adachi
  • Patent number: 7242171
    Abstract: The present invention provides an improved form of inverter circuit which refines the known conventional circuit to reduce its offset and then uses a combination of this refined circuit and a feedback type power converter to achieve low output offset, very high speed and very high current efficiency. According to a first aspect of the present invention there is provided a voltage converter circuit comprising serially coupled first and second gain stages and switching means arranged between the second gain stage and an output for the converter circuit, the first gain stage having a gain greater than that of the second gain stage, and the second gain stage having a bandwidth greater than that of the first gain stage.
    Type: Grant
    Filed: July 23, 2004
    Date of Patent: July 10, 2007
    Assignee: Seiko Epson Corporation
    Inventors: Simon Tam, Vinayak Agrawal
  • Patent number: 7221213
    Abstract: A voltage converting circuit has an output terminal for supplying an output current at an output voltage to a load. In response to a transient of the load, a current sinking circuit allows a current source to provide a sink current flowing from the output terminal of the voltage converting circuit into a ground potential. The sink current is finite and stable. When the output voltage decreases below a threshold voltage, the current sinking circuit allows the current source to keep providing the finite and stable sink current for an extension time, causing the output voltage to decrease from the threshold voltage to a regulated value.
    Type: Grant
    Filed: August 8, 2005
    Date of Patent: May 22, 2007
    Assignee: Aimtron Technology Corp.
    Inventors: Rong-Chin Lee, Fang-Te Su
  • Patent number: 7221132
    Abstract: A power supply circuit relating to the present invention comprises a differential amplifier for feeding out a voltage as a control voltage in accordance with a difference between a feedback voltage commensurate with an output voltage and a reference voltage, an output current control element for feeding out an output current in accordance with the control voltage fed thereto from the differential amplifier, an output line by way of which the output current is supplied to a load, a feedback line by way of which a voltage on the output line is fed back as the feedback voltage to the differential amplifier, the feedback line connected to the output line, and a sink current generating circuit, connected between the feedback line and ground, for generating a sink current by which the control voltage fed to the output current control element is raised to a predetermined value.
    Type: Grant
    Filed: June 22, 2004
    Date of Patent: May 22, 2007
    Assignee: Rohm Co. Ltd.
    Inventors: Takuya Okubo, Ko Takemura
  • Patent number: 7218087
    Abstract: The invention proposes a low dropout voltage regulator, including a feedback circuit, an operational amplifier, a transconductor, a current mirror, and a power transistor. The feedback circuit provides a voltage according to a current provided by the power transistor. An invert-phase input terminal of the operational amplifier is coupled with the feedback circuit, and the positive-phase input terminal of the operational amplifier receives a reference voltage. The transconductor is coupled to an output terminal of the operational amplifier, and controls the current, which is fed to the transconductor from the current mirror, according to the output voltage from the operational amplifier. The current mirror is coupled with the transconductor and drives the power transistor. The power transistor is coupled between the current mirror and the feedback circuit, so as to provide current to the feedback circuit.
    Type: Grant
    Filed: January 4, 2006
    Date of Patent: May 15, 2007
    Assignee: Industrial Technology Research Institute
    Inventor: Chung-Wei Lin
  • Patent number: 7218084
    Abstract: A low dropout voltage (LDO) regulator comprises an output stage (EtS) of the amplifier (AMP), which has a main output and n auxiliary outputs which can respectively deliver a main control voltage (VGPRINC) and n auxiliary control voltages (VG1, . . . , VGn); and a power stage (EtP) which has a main power transistor (PmosPrinc), controlled at its gate by the main control voltage (VGPRINC), and p power modules (module 1, . . . , module n) of identical layout with p less than or equal to n, respectively having p auxiliary power transistors (PMos1, . . . , PMosn) each controlled at their gate by p auxiliary control voltages (VG1, . . . , VGn). The number p is selected as a function of an intended maximum output current.
    Type: Grant
    Filed: July 12, 2005
    Date of Patent: May 15, 2007
    Assignee: STMicroelectronics S.A.
    Inventors: Alexandre Pons, Fabienne Grigis
  • Patent number: 7208925
    Abstract: A method, circuit, and system for providing a power good signal for a voltage regulator are described. The voltages of the two input pins to an error amplifier within a voltage regulator may be compared to determine if the error amplifier is operating in the linear range. If it is determined the error amp is operating in the linear range, then the voltage regulator is operating properly, and the power good signal may be set to a high level.
    Type: Grant
    Filed: September 1, 2004
    Date of Patent: April 24, 2007
    Assignee: Intel Corporation
    Inventor: Bruce W. Rose
  • Patent number: 7208924
    Abstract: The invention intends to provide a technique that achieves a sufficient phase margin with ease. The circuit includes a power supply circuit that is formed with a phase compensating resistor and a phase compensating capacitor, between a second input terminal of a differential amplifier and a low supply voltage. Thereby, the first pole frequency in the overall gain is determined by the first pole frequency in the voltage-dividing resistor stage in the Bode diagram for the pole/zero compensation, which is shifted to a lower frequency. Also, the zero point cancels the first pole frequency in the differential amplifier stage, which reduces the phase delay to secure the phase margin.
    Type: Grant
    Filed: June 3, 2003
    Date of Patent: April 24, 2007
    Assignees: Renesas Technology Corporation, Hitachi ULSI Systems Co., Ltd.
    Inventors: Hiroshi Toyoshima, Masahiko Nishiyama
  • Patent number: 7205827
    Abstract: A low-dropout regulator comprises a high-gain error amplifier having a differential input stage and a single-ended output, a high-swing high-positive-gain second stage with input connecting to the output of the error amplifier and a single-ended output, a p-type MOS transistor with gate terminal connecting to the output of the second stage, source terminal connecting to the supply voltage, and drain terminal to the output of the low-dropout regulator. A first-order high-pass feedback network connects the output of the low-dropout regulator and the positive input of the error amplifier, and a damping-factor-control means comprising a negative gain stage with a feedback capacitor connects the input and output of this gain stage. A capacitor is connected between the output of the error amplifier and the output of the low-dropout regulator, while a voltage reference connects to the negative input of the error amplifier.
    Type: Grant
    Filed: December 19, 2003
    Date of Patent: April 17, 2007
    Assignee: The Hong Kong University of Science and Technology
    Inventors: Ka Nang Leung, Kwok Tai Mok
  • Patent number: 7202654
    Abstract: A high voltage regulator including a current mirror including a pair of transistors, one of the transistors being connected to a node that outputs an output voltage Vout, a diode stack that includes a plurality of serially connected transistors T0, T1, T2, . . .
    Type: Grant
    Filed: September 27, 2005
    Date of Patent: April 10, 2007
    Assignee: Saifun Semiconductors Ltd
    Inventors: Oleg Dadashev, Alexander Kushnarenko
  • Patent number: 7199567
    Abstract: Circuits and methods to provide an LDO output stage implemented with low-voltage devices and still allowing higher voltage levels have been achieved. The output stage has been built using two low voltage MOS devices in series. During the time the regulator is in active mode the second MOS device acts as a small resistor in series to the pass device. During power down this second device actively protects the MOS pass device and itself from high voltage stress levels. This is achieved by a robust regulating mechanism that compensates leakage currents. These leakage currents normally determine the different potentials of the output stage during power down. Although the second transistor presents a resistive obstacle during active mode the total chip area required is smaller compared to a single pass device tolerating e.g. 5 Volts.
    Type: Grant
    Filed: December 9, 2004
    Date of Patent: April 3, 2007
    Assignee: Dialog Semiconductor GmbH
    Inventor: Matthias Eberlein
  • Patent number: 7199561
    Abstract: In a converter device, an N-type FET is connected in series between an input terminal and an output terminal and an N-type FET is connected between the side of the output terminal of the N-type FET1 and a ground terminal. A smoothing circuit and a comparator circuit are connected to the side of the output terminal of the circuits. The output side of the comparator circuit is connected to an H/S driver circuit controlling the N-type FET1 through an inverter and directly connected to an L/S driver circuit controlling the N-type FET2. A reference voltage correction circuit is included in the comparator circuit, and the comparator circuit outputs an appropriate switching control signal by comparing a correction reference voltage, obtained through comparison of a divider voltage in accordance with the time average value of an output voltage with a reference voltage, with the divider voltage.
    Type: Grant
    Filed: April 27, 2005
    Date of Patent: April 3, 2007
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Takashi Noma
  • Patent number: 7196504
    Abstract: A constant-voltage circuit includes a first transistor, a first control circuit, and a second control circuit having a second transistor and a differential amplifier. The first transistor controls an output current according to a first control signal output by the first control circuit such that an output voltage is substantially equal to a predetermined voltage. The second control circuit has a response property faster than the first control circuit to a variation of the output voltage, and causes the first transistor to increase the output current for a predetermined time period, regardless of the first control signal, when the output voltage varied to an extent greater than a predetermined output voltage variation value. The second transistor controls an operation of the first transistor according to a second control signal output by the differential amplifier such that a voltage at an inverting input terminal is substantially equal to the bias voltage.
    Type: Grant
    Filed: January 17, 2006
    Date of Patent: March 27, 2007
    Assignee: Ricoh Company, Ltd.
    Inventor: Kohzoh Itoh
  • Patent number: 7183756
    Abstract: A power management system (100) comprising a power generator (1) for providing a supply signal (Vchg) to a load (2), a floating controllable bi-directional current sensor (N1) coupled via a first connection (10) to the power generator and via a second connection (20) to the load (2) for detecting a positive current (pos) flowing from the power generator (1) to the load (2) and a negative current (neg) from the load (2) to the power generator (3).
    Type: Grant
    Filed: February 6, 2004
    Date of Patent: February 27, 2007
    Assignee: NXP BV
    Inventors: Jan Dikken, Ferry Nieuwhoff
  • Patent number: 7180278
    Abstract: A real current sense apparatus for a DC-to-DC converter uses a current mirror composed by two JFETs to mirror the output current of the converter to generate a temperature-independent mirror current to further generate a current sense signal. Due to the temperature-independence of the mirror current, the current sense signal is also temperature-independent.
    Type: Grant
    Filed: March 28, 2005
    Date of Patent: February 20, 2007
    Assignee: Richtek Technology Corp.
    Inventors: Liang-Pin Tai, Jiun-Chiang Chen
  • Patent number: 7176664
    Abstract: A method for providing precise current regulation and limitation for a power supply is provided. The method includes amplifying any difference between a load current signal and a current setting reference signal with a feedback loop amplifier to generate a feedback signal. A power output signal is generated based on the feedback signal. An output signal for the power supply is generated based on the power output signal. The load current signal and the current setting reference signal are generated based on the power output signal. An offset error signal is generated based on the load current signal and the current setting reference signal. A differential bias for the feedback loop amplifier is adjusted based on the offset error signal.
    Type: Grant
    Filed: April 7, 2005
    Date of Patent: February 13, 2007
    Assignee: National Semiconductor Corporation
    Inventors: Vladislav Potanin, Elena Potanina
  • Patent number: 7173402
    Abstract: A low dropout voltage regulator (LDO) includes a regulating circuit, an amplifier, and a first compensating path. The regulating circuit is configured to receive an input signal at an input terminal and provide an output signal at an output terminal in response to a control signal received at the control terminal. The amplifier may have a first input terminal coupled to a first input path and an output terminal be coupled to the control terminal of the regulating circuit via a path to provide the control signal. The first compensating path is coupled between a first node on the first input path and a first node on the path coupling the output terminal of the amplifier to the control terminal of the regulating circuit, the first compensating path including a first compensating capacitor.
    Type: Grant
    Filed: February 25, 2004
    Date of Patent: February 6, 2007
    Assignee: O2 Micro, Inc.
    Inventors: Jiwei Chen, Guoxing Li
  • Patent number: 7170269
    Abstract: A hard saturation mode of operation can be avoided in an LDO regulator by providing an additional feedback control loop. The additional control loop cooperates with the LDO regulator's amplifier stage and output stage to maintain at least a minimum desired voltage drop across the output stage from the power supply to the load.
    Type: Grant
    Filed: May 16, 2005
    Date of Patent: January 30, 2007
    Assignee: National Semiconductor Corporation
    Inventor: James T. Doyle
  • Patent number: 7166991
    Abstract: Circuits and methods to achieve dynamic biasing for the complete loop transfer function of a current mode voltage regulator have been achieved. The circuit comprises a Mirror-Transconductor Amplifier type operational transconductance amplifier (OTA) wherein its transconductance is linearly dependent on its biasing current. This biasing current is a linearly derivative of the OTA's output current. A current amplification circuit couples the regulator output current linearly with said OTA's output current. In this configuration the iterative biasing of the OTA forms a feed-forward loop, which contains a low-pass filter for stability and a negative feedback loop is closed by connecting the regulator voltage output to the OTA input. The invention realizes a purely current mode regulator since all internal currents are generated as a fraction of the output load.
    Type: Grant
    Filed: September 23, 2004
    Date of Patent: January 23, 2007
    Assignee: Dialog Semiconductor GmbH
    Inventor: Matthias Eberlein
  • Patent number: 7154253
    Abstract: A digitally controlled hybrid power module is controlled by a programmable controller. The hybrid power module includes a digitally controlled switching supply with an output coupled to an input of a digitally controlled linear voltage regulator. Independent control of switching supply and the linear regulator is provided by the programmable controller, which may be a field programmable gate array (FPGA), microcontroller, or digital signal processor (DSP). The programmable controller may independently control one or more power modules. Each power module may also include enable switching and an associated current clamp for capacitive loads. An output voltage transient suppressor may also be used to control transients, such as those produced under fast switching conditions.
    Type: Grant
    Filed: March 22, 2005
    Date of Patent: December 26, 2006
    Assignee: Inovys Corporation
    Inventor: Andre Gunther
  • Patent number: 7145318
    Abstract: A first voltage divider includes a first resistor having a first resistance coupled to a positive voltage reference in series with a second resistor having a second resistance and coupled to ground. A second voltage divider includes a third resistor having the first resistance coupled to the positive voltage potential in series with a fourth resistor having the second resistance, and a fifth resistor having a third resistance and coupled to a negative voltage. A comparator has an inverting input coupled to the junction of the first and second resistors and a non-inverting input coupled to the junction of the third and fourth resistors. The first and third resistors are equal and the second and fourth resistors are equal. The fifth resistor has a value chosen to drop a voltage equal to the target voltage to be regulated when the voltage regulator output is equal to that target voltage.
    Type: Grant
    Filed: November 21, 2005
    Date of Patent: December 5, 2006
    Assignee: Atmel Corporation
    Inventors: Johnny Chan, Tin Wai Wong, Ken Kun Ye
  • Patent number: 7142045
    Abstract: There is provided an internal voltage generating circuit that reliably supplies a constant internal voltage to the interior of a semiconductor device without regard to an external voltage, where the internal voltage generating circuit compares a first reference voltage with a first internal voltage fed back to generate the first internal voltage following the first reference voltage, receives the first internal voltage to generate a second reference voltage which is more insensitive to fluctuation of the external voltage than the first reference voltage, and compares the second reference voltage with a second internal voltage fed back to generate the second internal voltage which follows the second reference voltage and has a variation gradient smaller than that of the first internal voltage when the external voltage is changed, thereby supplying the second internal voltage to a circuit requiring stabilized internal voltage, which is obtained to increase stability and durability of the operation of the semico
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: November 28, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun-Sun Mo, Sang-Ki Hwang
  • Patent number: 7135842
    Abstract: A regulated power source for supplying power to an external circuit includes a voltage sensing circuit and a voltage regulator. The voltage sensing circuit generates a feedback voltage by comparing voltage drops at a plurality of sense points within the external circuit. The feedback voltage is based on the maximum voltage drop at the sense points. The voltage regulator regulates the voltage supplied to the external circuit in accordance with the feedback voltage.
    Type: Grant
    Filed: January 31, 2005
    Date of Patent: November 14, 2006
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Jaideep Banerjee, Tushar S. Nandurkar
  • Patent number: 7129682
    Abstract: A direct-current to direct-current conversion (DC/DC) apparatus includes a control circuit having an error amplifier for voltage control, basing the conversion on a pulse width modulation control using an output of the error amplifier. The error amplifier inputs a voltage signal corresponding to an output voltage of a DC/DC result and a plurality of reference voltage signals. The DC/DC apparatus also includes a soft start capacitor to provide one of the plurality of reference voltage signals. The error amplifier amplifies a difference between the voltage signal corresponding of the output voltage of a DC/DC result and a voltage signal of a lower potential among the plurality of reference voltage signals and carries out the pulse width modulation control. Furthermore, the control circuit includes a circuit for discharging charges corresponding to the output voltage of the DC/DC result when a power supply to the control circuit is turned off.
    Type: Grant
    Filed: May 23, 2005
    Date of Patent: October 31, 2006
    Assignee: Fujitsu Limited
    Inventors: Mitsuo Saeki, Hidetoshi Yano, Hidekiyo Ozawa, Seiya Kitagawa, Toshiyuki Matsuyama, Takashi Matsumoto, Kyuichi Takimoto, Yoshiaki Sano
  • Patent number: 7126316
    Abstract: A voltage regulation circuit. The voltage regulator includes an input stage, a reference voltage circuit, a gain stage, and an output stage. The reference voltage circuit is coupled to one input of the input stage, and the output stage is coupled to another input of the input stage. The gain stage includes a buffer device coupled to the output of the input stage and a drive circuit coupled to the output stage. The buffer device is operable to provide isolation between the input stage and the drive circuit. The drive circuit may include a first transistor coupled to the output stage, a base current translation circuit, and a current divide circuit coupled to the first transistor and to said base current translation circuit. The input stage may be biased with a substantially constant bias current, such that output dependent current loading effects are avoided.
    Type: Grant
    Filed: February 9, 2004
    Date of Patent: October 24, 2006
    Assignee: National Semiconductor Corporation
    Inventor: Ronald Neal Dow
  • Patent number: 7109697
    Abstract: An operational amplifier having temperature-compensated offset correction. The amplifier includes an operational amplifier circuit, that has a first input field effect transistor (FET) having a gate connected to receive a first input signal, and a second input FET having a gate connected to receive a second input signal, the first and the second input FETs being connected together to receive a first bias current, and also being connected to respective sides of a first current mirror. A correction amplifier circuit is also provided, that has a first correction FET having a gate, and a second correction FET having a gate, the first and the second correction FETs being connected together to receive a second bias current, and also being connected to respective sides of a second current mirror.
    Type: Grant
    Filed: June 29, 2005
    Date of Patent: September 19, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Amer Hani Atrash, Shanmuganand Chellamuthu
  • Patent number: 7106042
    Abstract: A regulator circuit including output loading sense circuitry where the output loading sense circuitry comprises, in one example, a resistor in the feedback leg of the replica bias regulator, a switch in the feedback leg of the replica bias regulator for bypassing the resistor, and a comparator used to sense the output loading and selectively drive the switch.
    Type: Grant
    Filed: December 3, 2004
    Date of Patent: September 12, 2006
    Assignee: Cypress Semiconductor Corporation
    Inventor: Scott A. Jackson
  • Patent number: 7106033
    Abstract: This invention relates to a quick-recovery low dropout linear regulator (LDO), which utilizes a current-detection circuit to detect the magnitude of the output current, and the output current compares with a reference current so as to dynamically adjust the bias-current of the 2nd stage amplifier such that the system remains stable even when the output current is high resulting from the damping ratio ? is still greater than 1. As a result, the output voltage can quickly recover stability from a large and sudden change of the output current.
    Type: Grant
    Filed: June 6, 2005
    Date of Patent: September 12, 2006
    Assignee: Sitronix Technology Corp.
    Inventors: Shen-Iuan Liu, Sao-Hung Lu
  • Patent number: 7095219
    Abstract: The power supply unit is provided with a power supply circuit adapted to generate an output voltage in accord with an instruction voltage, an output condenser Co connected to the output end of the power supply circuit, and an auxiliary output voltage setting circuit adapted to compare the instruction voltage and the output voltage and to cause the output condenser to discharge its electric charge when the instruction voltage becomes lower than the output voltage. Because of the auxiliary output voltage setting circuit, the power supply circuit quickly generates an output voltage in accord with the instruction voltage if the instruction voltage is lowered.
    Type: Grant
    Filed: December 14, 2004
    Date of Patent: August 22, 2006
    Assignee: Rohm Co., Ltd.
    Inventors: Ko Takemura, Kiyotaka Umemoto, Kenichi Nakata
  • Patent number: 7071664
    Abstract: A programmable voltage regulator configurable for reverse blocking and double power density is disclosed herein. The programmable voltage regulator includes an error amplifier that couples to receive a reference voltage. A first NMOS pass transistor connects between an auxiliary voltage input node and the output terminal of the voltage regulator, wherein the first NMOS pass transistor is biased by the output of the error amplifier. Connected between the source of the first NMOS pass transistor and the second input of the error amplifier, a feedback network provides feedback for the voltage regulator. A second NMOS pass transistor connects between the first power supply and the auxiliary voltage input node. Furthermore, an independent node control circuit biases the second NMOS pass transistor such that in a first mode of operation, a first control signal input is operable to receive a signal for controlling the second NMOS pass transistor during reverse battery condition.
    Type: Grant
    Filed: December 20, 2004
    Date of Patent: July 4, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Ross E. Teggatz, Sanmukh M. Patel, Rex M. Teggatz, Suribhotla V. Rajasekhar, Valerian Mayega
  • Patent number: 7053597
    Abstract: A regulator and a related control method for providing a regulated voltage. The regulator includes a bipolar junction transistor (BJT), a capacitive module having capacitors, and an operational amplifier (OP-AMP) for feedback control. The OP-AMP has a amplifying circuit, a driving stage and a current mirror. The BJT charges the capacitive module to establish the regulated voltage, the OP-AMP controls a driving current of a base of the BJT according to the feedback of the regulated voltage. When the regulated voltage is in a predetermined range, the current mirror provides a secondary current through the driving stage such that the driving current is reduced, and the current of the BJT is thus limited to its rated current. When the regulated voltage is out of the predetermined range, the current mirror stops providing the secondary current, and the regulator will operate normally without current supplied by the current mirror.
    Type: Grant
    Filed: July 2, 2003
    Date of Patent: May 30, 2006
    Assignee: Via Technologies Inc.
    Inventors: Peter Lin, Arioso Lin
  • Patent number: 7048610
    Abstract: In one embodiment, a CMP pad is conditioned by repeatedly cycling the CMP pad between a first temperature and a second temperature higher than the first temperature to eliminate at least one crystalline area in the CMP pad.
    Type: Grant
    Filed: January 26, 2005
    Date of Patent: May 23, 2006
    Assignee: Intel Corporation
    Inventors: Alexander Tregub, Mansour Moinpour, Victor K. Souw
  • Patent number: 7038431
    Abstract: A low drop output regulator may be used for power management. The low drop out regulator may include an amplifier network having a transfer function may be used to provide a substantially constant voltage and variable current to a load. A zero compensation network may be used to add a zero to the transfer function that varies with the load current.
    Type: Grant
    Filed: August 7, 2003
    Date of Patent: May 2, 2006
    Inventor: Jamel Benbrik
  • Patent number: 7030595
    Abstract: A low drop-out (LDO) voltage regulator that has high a PSRR (Power Supply Ripple Rejection) performance and a high load regulation with low current consumption is disclosed. The voltage regulator doses not require any high gain error amplifier that may cause instability in the voltage regulator. A voltage-controlled current-feedback is presented that generates an inverse phase signal and compensation voltage for a ripple noise and dropout voltage, respectively. The voltage-controlled current-feedback generates a negative voltage slope with regard to the power supply voltage, which can cancel the ripple noise at the output terminal. The current-feedback creates a positive coefficient voltage with regard to the load current, which compensates the voltage drop caused by parasitic resistances.
    Type: Grant
    Filed: August 4, 2004
    Date of Patent: April 18, 2006
    Assignee: Nanopower Solutions Co., Ltd.
    Inventor: Shinichi Akita
  • Patent number: 7026824
    Abstract: A voltage reference generator for generating an output voltage at an output node. A level shifter shifts a first reference voltage into the output voltage at the output node according to a shift between the first reference voltage and the output voltage, and a feedback circuit monitors the output voltage and a second reference voltage to control the shift and normalize the output and second reference voltages.
    Type: Grant
    Filed: October 31, 2003
    Date of Patent: April 11, 2006
    Assignee: Faraday Technology Corp.
    Inventor: Yung-Hung Chen
  • Patent number: 7023005
    Abstract: A feedback circuit has an optical coupler with a feedback gain control. The feedback gain control includes an active element connected to vary current flow depending on changes in gain of the optical coupler.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: April 4, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: David A. Williams, Michael G. Amaro
  • Patent number: 7019499
    Abstract: A low noise voltage regulator circuit with fast stable output voltage is disclosed. The low noise voltage regulator circuit contains a reference voltage generator, for generating a reference voltage; a switching circuit, which is electrically coupled to the output of reference voltage generator and has two states; and a stabilizing circuit. When the switching circuit is at a first state, the reference voltage is coupled to the stabilizing circuit without being filtered; when the switching circuit is at a second state, the reference voltage is filtered by a low pass filter before being coupled to the stabilizing circuit. A switching control signal is used to switch the switching circuit between the two states. The filtered reference voltage is used to generate a low noise regulated output voltage.
    Type: Grant
    Filed: May 19, 2004
    Date of Patent: March 28, 2006
    Assignee: MediaTek Inc.
    Inventors: Chi-Kun Chiu, Chi-Ming Hsiao
  • Patent number: 7012410
    Abstract: A regulating system comprises an input terminal for applying an input voltage, and an output terminal for providing an output voltage. A semiconductor element is connected between the input terminal and the output terminal and is operable to regulate the output voltage. A regulating signal generation circuit generates the regulating signal and comprises a current mirror arrangement including a first and second current mirror path, wherein a controlled current source is connected in series to the first current mirror path. The controlled current source induces a first current dependent on one of the output signals in the first current mirror path. A second current through the second current mirror path is dependent on the first current. A splitter circuit conducts the second current to the output terminal or to a reference potential, dependent on a load path voltage applied over the load path of the semiconductor element.
    Type: Grant
    Filed: September 23, 2004
    Date of Patent: March 14, 2006
    Assignee: Infineon Technologies AG
    Inventors: Emanuele Bodano, Giorgio Chiozzi, Andrea Logiudice, Salvatore Piccolella
  • Patent number: 6984969
    Abstract: A voltage regulator includes a linear mode regulator having a high pass filter circuit connected between its output and an output node, and a switch mode regulator having an low pass filter circuit connected between its output and the same output node. The high pass filter passes high frequency AC current provided by the linear mode regulator to the output node and reduces the low frequency AC and DC currents to substantially zero, and the low pass filter prevents the high frequency AC current produced by the linear mode regulator from being drawn by the switch mode regulator and passes the low AC and DC currents provided by the switch mode regulator to the output node. Thus, the present regulator offers the high response speed and low noise of a linear mode regulator, and the high power efficiency and large continuous output current capability of a switch mode regulator.
    Type: Grant
    Filed: March 19, 2004
    Date of Patent: January 10, 2006
    Assignee: Analog Devices, Inc.
    Inventors: Gang Liu, Joseph C. Buxton, Paul R. Collanton, Jr.
  • Patent number: 6977825
    Abstract: A method of controlling the output voltage of a voltage regulator that uses a transimpedance block is disclosed. The method comprises measuring the voltage representative current of the output and comparing the voltage representative current to a reference current. Finally, the charging process is stopped if the voltage representative current of the secondary winding is substantially the same as the reference current.
    Type: Grant
    Filed: July 24, 2003
    Date of Patent: December 20, 2005
    Assignee: Monolithic Power Systems, Inc.
    Inventor: Curtis B. Robinson, Jr.
  • Patent number: 6977490
    Abstract: A voltage regulator apparatus includes an error amplifier that amplifies a voltage difference between a reference and a sampled output voltage of the voltage regulator apparatus. A driver amplifier has an input that is responsive to the amplified voltage difference to produce a gate driving voltage at its output. An output transistor having a drain, a gate, and a source is also included. The gate is responsive to the gate driving voltage to produce a regulated output voltage at the source. To stabilize the voltage regulator apparatus, a Miller compensation capacitor is provided to feed a sample of the regulated output voltage back to the input of the driver amplifier; and additionally, an Ahuja compensation circuit is provided to feed back a portion of the regulated output voltage back to the input of the driver amplifier.
    Type: Grant
    Filed: July 15, 2003
    Date of Patent: December 20, 2005
    Assignee: Marvell International Ltd.
    Inventors: Hong Zhang, Jiancheng Zhang, Sehat Sutardja