Abstract: A feedback circuit is provided for reducing the input impedance of a preamplifier circuit, such as for use with a sensing coil in an imaging system. The feedback circuit permits adjustment of the input impedance by balancing inductive and capacitive components of a feedback control circuit. The imaginary component of the input impedance may be adjusted independently of the real component, to provide a substantially zero input impedance, while allowing adjustment of the stability of the system. The circuitry may function in conjunction with a reactance matching circuit to reduce cross-talk in multiple sensing coil arrangements.

Abstract: A voltage supplying device which supplies a voltage to a load capacitance to finish charging the load capacitance with a predetermined voltage within a predetermined charging period. The voltage supplying device comprises a digital-analogue converter (DAC) and a voltage follower circuit for performing the impedance conversion for a voltage from the DAC and outputting the converted voltage. A first switching element is provided between the output of the voltage follower circuit and the load capacitance. A bypass line is provided for supplying a voltage from the DAC to the load capacitance bypassing the impedance conversion circuit and the first switching element, and a second switching element is provided on the bypass line. In the first period of the charging period, the first switching element is turned on, and the second switching element is turned off, whereby the output of the voltage follower circuit is supplied to the load capacitance.

Abstract: A voltage regulator includes a capacitor providing a regulated voltage, a regulation switch for connecting the capacitor to a voltage source, and a regulation circuit for closing the regulation switch when the regulated voltage is below a first reference voltage. The voltage regulator also includes at least one ballast switch arranged in parallel with the regulation switch. The regulation circuit opens the regulation switch and closes the ballast switch during a starting phase of the regulator.

Abstract: A voltage regulator with a current limiter includes a voltage regulating circuit including an amplifier circuit and a feedback circuit. The amplifier circuit includes a ballast or pass resistor and the feedback circuit supplies a first feedback voltage to the amplifier circuit, which is compared to a reference voltage. The voltage regulator further includes a current limiter circuit including a current limiter transistor in series with the ballast transistor and an output of the voltage regulator and a feedback circuit supplying a second feedback voltage to a controller for controlling the current limiter transistor. The controller causes the current limiter transistor to operate between saturation and blocking conditions depending on whether the second feedback voltage, which is representative of the output of the voltage regulator, is above or below a predetermined threshold voltage.

Abstract: There is disclosed an impedance conversion circuit called a regulated cascode circuit in which a parasitic capacity deteriorating frequency characteristics is reduced during operation up to about several hundreds of megahertz or higher frequencies. In the impedance conversion circuit comprising two regulated cascode circuits in which active elements and reverse amplifiers are interconnected with a feedback applied thereto, a capacity element is disposed between a control end of one active element and an output end of the other active element.

Abstract: A system supply voltage, supplied from an external supply circuit, is lowered to generate an internal supply voltage for an internal circuit when the system supply voltage is higher than a breakdown voltage of the internal circuit. The system supply voltage is directly supplied to the internal circuit when the system supply voltage is not higher than the breakdown voltage of the internal circuit.

Abstract: The present invention provides an LDO that is stable for all capacitive loads. Because the LDO is stable for all capacitive loads, the ESR (equivalent series resistance) inherent in any capacitive load can no longer affect the equivalent value of the combination of the ESR and the capacitive load. Thus, the invention also effectively removes the ESR restrictions on the loads. According to the present invention, a low dropout voltage regulator is provided. The regulator comprises a switching element (e.g., a transistor) having first terminal for receiving an input signal, a second terminal for providing an output signal and a control terminal; a control circuit, operably coupled to the switching element, that is configured to control the switching element; and a compensation circuit having a first segment connected between the first and control terminals of the switching element and a second segment connected between the control and second terminals of the switching element.

Abstract: The present invention relates to a method of improving power efficiency in a converter circuit at low load currents. The method comprises the steps of monitoring a load current of the converter circuit and adjusting a natural frequency of the converter circuit based on the load current. Such an adjustment of the natural frequency results in a reduction in switching losses at low load currents, thereby improving the power efficiency associated therewith. The present invention also relates to a circuit for improving a power efficiency in a dc-dc converter. The circuit comprises a converter circuit and a comparator circuit coupled to an input of the converter circuit.

Abstract: A low drop-out (“LDO”) voltage regulator includes an output stage of having a pass device and a discharge device arranged in complementary voltage follower configurations to both source load current to and sink load current from a regulated output voltage conductor. The pass device and the discharge device are controlled through a single feedback loop.

Abstract: A voltage regulator includes a regulation MOS transistor with low serial resistance having a first terminal connected to a voltage source and a second terminal connected to the output of the voltage regulator and an amplifier having an output driving a gate of the transistor. The gate is driven based upon a difference between a reference voltage and a feedback voltage. The regulator may also include an anti-overshoot switch with a first terminal connected to the gate of the regulation MOS transistor and a second terminal is taken to a potential for turning the regulation MOS transistor off. A switch controller closes the switch when the output voltage of the regulator is higher than a first threshold. The first threshold may be higher than the nominal value of the output voltage.

Abstract: The performance of the main regulatory transistor of an on-chip voltage regulator circuit is enhanced when the main transistor is appropriately biased during start up. In an example embodiment, a voltage regulator circuit includes a thin gate oxide transistor as the main regulatory transistor and an operational amplifier that is referenced to a midlevel operating voltage. During start-up, the potential voltage difference is large enough to necessitate the disconnection of the main transistor from the operational amplifier. A voltage divider ladder circuit is used to maintain the gate voltage of the main transistor at the midlevel voltage while a smaller thick gate oxide transistor is used to maintain loop stability and to withstand voltage transients.

Abstract: A DC/DC converter 100 has a DAC 40 that receives a code associated with desired processor operating voltage and sets the reference voltage on its output 41. The reference voltage (VDAC) is boosted by the buffer amplifier 42 to center the droop along the median load. A sensed current signal ICS 22 is proportional to the load current Io 24 and can be either inductor current, or switch current, or diode (or synchronous switch) current. In all cases it is scaled down by the factor of gain Gc. A droop control feedback circuit includes an error amplifier 50. It has two inputs. In one embodiment the gain of the converter is by a signal inversely proportional to the processor clock frequency FCPU max and transformed to the current IDROOP 32 that creates the voltage drop across the resistor R1. The other input is coupled to the buffer amplifier output.

Abstract: A method and apparatus is directed to a thermal shut down for a low drop out (LDO) regulator including a MOS transistor. An error amplifier controls the gate of the MOS transistor by comparing the regulator output voltage to a reference voltage that is generated by a reference circuit. To enhance power supply rejection and improve regulation, the error amplifier and the reference circuits are powered by a potential at an internal power supply node. A power control circuit selectively couples the internal power supply node to one of the regulated output voltage and the unregulated supply voltage. A start-up circuit may be employed to ensure that regulation begins when power is applied. A temperature sensor circuit detects when the operating temperature exceeds a predetermined temperature and activates a supply transfer circuit to couple the unregulated supply to the internal power supply node.

Abstract: A power converter having a remote sensing system. The power converter includes a high-pass feedback signal, a remote sensing low-pass signal, a constant-sum filter combining the high-pass feedback signal and the remote sensing low-pass signal. The constant-sum filter is at least a second order filter and generates an error signal. The constant-sum filter is a three terminal low-pass filter and an input terminal, an output terminal, and a common terminal. The input terminal receives the remote sensing low-pass signal. The common terminal receives the high-pass feedback signal. The output terminal transmits the feedback control signal.

Abstract: A voltage regulator includes a regulation MOS transistor and an amplifier providing an output for driving a gate of the regulation MOS transistor. The amplifier drives the gate based upon a difference between a reference voltage and a feedback voltage. The voltage regulator may further include a circuit for making the amplifier switch to a standby mode with low current consumption when the difference between the supply voltage and the output voltage of the regulator is below a first threshold. This is done while maintaining, at the gate of the regulation transistor, a voltage that keeps the regulation transistor on. The present invention is particularly applicable to the management of power supplies in portable telephones.

Abstract: To provide a regulator for restraining a variation in a frequency band and having a transient response characteristic which does not depend upon load current, by generating current in proportion to load current by a load current detecting transistor connected in parallel with an output driver transistor for supplying current to a load and changing a resistance value of a variable resistance portion by the current, a frequency of a zero point for phase compensation is varied and by varying the frequency of the zero point for phase compensation in accordance with the load current, the variation in the frequency band of the regulator is restrained without depending upon the load current and the transient response characteristic is improved.

Abstract: In a charge pump system, the frequency of an oscillator is based on the output signals from a plurality of differential amplifiers. Each differential amplifier receives a different reference voltage as well as a common input voltage derived from the pumped voltage. A predetermined logic signal output by the differential amplifiers modifies, i.e. reduces, an original frequency of the oscillator. In this manner, the charge pump system quickly compensates for any overshoot in the pumped voltage in a manner directly correlated to the magnitude of the pumped voltage. If no differential amplifiers output the predetermined logic signal, then the oscillator generates the original frequency. In this manner, the charge pump system also compensates for any undershoot in the pumped voltage by providing the fastest frequency.

Abstract: A voltage regulator circuit in an integrated circuit (IC) device such as a Complex Programmable Logic Device (CPLD) comprises a reference voltage generator, a tuning circuit, and an output driver circuit. The reference voltage generator converts an external supply voltage provided to the IC device into a stable reference voltage. The tuning circuit converts the stable reference voltage into a desired internal supply voltage, such as the reduced voltage required by deep sub-micron transistors. The output driver circuit provides the desired internal supply voltage with sufficient current to properly power the circuits of the IC device. The tuning circuit includes an op-amp and resistive elements configured in a voltage divider configuration in the negative feedback loop of the op-amp. The output of the op-amp can be set to the desired internal supply voltage by properly sizing the resistive elements.

Abstract: In a reference voltage circuit 2 and an error amplifier 3 in a voltage regulator, a power supply is taken from an input voltage Vdd when an output voltage Vout is lower than an arbitrary set output voltage Vo and from the output voltage Vout when the output voltage Vout is higher than an arbitrary set output voltage Vo, to thereby largely suppress a noise contained in the input voltage from reflecting the output voltage Vref of the reference voltage circuit, etc.

Abstract: Presented is a low-drop type of voltage regulator formed with BiCMOS/CMOS technology. The regulator includes an input terminal that receives a stable voltage reference connected to one input of an operational amplifier through a switch controlled by a power-on enable signal. A supply voltage reference powers the operational amplifier. The regulator includes an output transistor connected to an output of the amplifier to generate a regulated voltage value to be fed back to the amplifier input. A second transistor is connected in series between the output transistor and the supply voltage reference. The regulator uses a control circuit portion connected between the control terminal of the second transistor and the supply voltage reference to prevent the breakdown of the output transistor from occurring.

Abstract: An inventive potential generator generates a predetermined potential and includes first operational amplifier, current supply circuit and current sink circuit. A first reference potential is applied to the non-inverting input terminal of the first amplifier and a potential at the output node of the first amplifier is not only applied to the inverting input terminal of the first amplifier but also used as the output of the generator. The current supply circuit supplies a current to the output node of the first amplifier if the potential at the output node of the first amplifier is lower than a predefined level. And the current sink circuit drains a current from the output node of the first amplifier if the potential at the output node of the first amplifier is higher than the predefined level.

Abstract: A micropower low-dropout regulator (LDO) (30) having a low dropout voltage and a compensating impedance for compensating base current errors. The new compensation technique involves placing a shunt capacitor (C2) at a counterphase input (node A) of a Brokaw transconductance cell incorporating a base current compensation resistor (R5). The resistor (R5) and capacitor (C2) provide a zero frequency that does not depend upon the attenuation ratio of the feedback divider. The counterphase compensation capacitor (C2)provides a low-frequency zero using a reasonably sized capacitor, and provides a pole-zero separation that does not depend upon the attenuator ratio, without additional current-consuming components.

Abstract: The monitoring of regulated redundant power supplies is enhanced by returning to each power supply a feedback (sensed) voltage signal that is indicative of the voltage level that the respective power supply is outputting and the voltage level supplied to a system load. In one embodiment, a feedback signal that is supplied to a power supply as the sensed signal is derived using a voltage divider network across the output of the power supply and a common connection at which the outputs of the power supplies are “Ored” for delivery to the system load. In this way, each power supply regulates its output voltage as a function of the level of the feedback signal and the level of a respective preset signal.

Abstract: A high power supply ripple rejection (PSRR) internally compensated low drop-out voltage regulator using an output PMOS pass device. The voltage regulator uses a non-inversion variable gain amplifier stage to adjust its gain in response to a load current passing through the output PMOS device such that as the load current decreases, the gain increases, wherein a second pole associated with the voltage regulator is pushed above a unity gain frequency associated with the voltage regulator. The non-inversion variable gain amplifier is further operational to adjust its gain in response to a load current passing through the power PMOS device such that as the load current increases, the gain decreases, wherein the voltage regulator unity gain bandwidth associated with the loop formed by the compensation capacitor is kept substantially constant.

Abstract: An embodiment of the invention is directed to a voltage regulator that provides a conditioned reference voltage with high supply noise rejection. A reference circuit provides an input reference voltage. An operational amplifier (opamp) has a first opamp input coupled to the reference circuit, a second opamp input, and an opamp output to provide the conditioned reference voltage based on the input reference voltage. A differential MOS amplifier has a first input coupled to the opamp output and an output coupled to the second opamp input. The reference voltage is conditioned in accordance with the size of transistors in the differential amplifier. The voltage regulator may be used in different types of analog-to-digital converters, including those built for use with camera chips.

Abstract: A circuit for providing hi-Z charging of a deeply discharged battery includes a load simulator circuit to provide a charging load resistance even when the battery has been discharged to 0V. The load simulator circuit includes a transistor connected in series with the battery. A logic circuit detects when the battery voltage is below a minimum threshold voltage and instructs a voltage control circuit to provide a constant voltage across the battery and the load simulator circuit. The logic circuit also applies the output of a current control circuit to the gate terminal of the transistor, enabling the current control circuit to regulate the total resistive load of the battery-transistor pair and thus maintain a constant hi-Z charge current across the battery.

Abstract: Current drawn from a power supply at the start-up of a voltage regulator is reduced by providing a clamp circuit to clamp the input voltage of an output transistor in the voltage regulator for a predetermined period of time after start-up. The voltage regulator preferably comprises an error amplifier for producing an error signal depending upon the difference between a divided portion of the regulated output voltage and a reference voltage, the error signal for controlling the output transistor to regulate the output voltage thereof, and the clamp circuit includes a charge storage device connected to a current source, and a switch circuit having a first terminal connected to a first voltage sufficient to place the output transistor in a high-resistance state, a second terminal connected to the error signal and the input of the output transistor, and a third terminal connected to the charge storage device for controlling an ON/OFF state of the switch circuit.

Abstract: An LDO voltage regulator includes an error amplifier having a first input coupled to a first reference voltage, a second input receiving a feedback signal, and an output producing a first control signal. An output transistor has a gate, a drain coupled to an unregulated input voltage, and a source coupled to produce a regulated output voltage on an output conductor. A feedback circuit is coupled between the output conductor and a second reference voltage. An overvoltage comparator has a first input coupled to receive the first reference voltage and a second input coupled to respond to the feedback signal to produce a discharge control signal indicating occurrence of an output overvoltage of at least a predetermined magnitude to control a discharge transistor coupled between the output conductor and the second reference voltage. An output current sensing circuit produces a control current representative of the drain current of the output transistor.

Abstract: A low dropout voltage reference having three gain stages and two feedback loops, an overall loop and a secondary loop, is disclosed. The overall feedback loop establishes a desired output voltage. The secondary feedback loop provides two benefits: (1) a broadband reduction of the output impedance to ensure stability under various loading conditions and (2) an improvement in power supply rejection. The first benefit ensures that the pole created by the load capacitance and the output impedance of the amplifier doesn't adversely affect the overall loop stability. The second benefit helps improve line regulation. The low dropout voltage reference does not rely on a capacitor connected to the output to properly compensate the overall feedback loop. Therefore, the reference will work properly for a wide range of load capacitance values.

Abstract: A low drop-out (LDO) voltage regulator (10) and system (100) including the same are disclosed. An error amplifier (38) controls the gate voltage of a source follower transistor (24) in response to the difference between a feedback voltage (VFB) from the output (VOUT) and a reference voltage (VREF). The source of the source follower transistor (24) is connected to the gates of an output transistor (12), which drives the output (VOUT) from the input voltage (VIN) in response to the source follower transistor (24). A current mirror transistor (14) has its gate also connected to the gate of the output transistor (12), and mirrors the output current at a much reduced ratio. The mirror current is conducted through network of transistors (18, 22), and controls the conduction of a first feedback transistor (28) and a second feedback transistor (35) which are each connected to the source of the source follower transistor (24) and in parallel with a weak current source (34).

Abstract: A voltage regulator circuit (1) able to detect a latch-up phenomenon disturbing the voltage to be regulated, to suppress such phenomenon and re-establish the voltage at a predetermined level. The circuit a bipolar transistor (2), a resistor (5) and substantially constant voltage supply means (6). The circuit (1) also includes voltage detection means (11) arranged to receive the regulated voltage (Vreg), and to supply a control voltage to said transistor (2) which can control the switching thereof between a conducting state and a blocked state, so that the transistor (2) is in the blocked state when latch-up causes the regulated voltage to drop below a first voltage level, and so that the transistor (2) is in the conducting state when the regulated voltage is lower than a second voltage level, the latch-up being suppressed below such level.

Abstract: A control circuit (1) for controlling a FET (2) for outputting a 3.3 volt or a regulated 1.5 volt output to an AGP bus on a PC motherboard in response to a TYPEDET signal being applied to a control terminal (3) of the control circuit (1) through an input (6) of a voltage divider circuit (8). The TYPEDET signal is received from a video card receiving slot and indicates the type of video card in the slot of the motherboard. An amplifier (20) outputs a control signal to the gate of the FET (2) for either disabling the FET (2), or enabling the FET (2) to output the 1.5 volt or the 3.3 volt outputs. A decoding circuit (30) decodes the state of the control terminal (3) and controls the amplifier (20) to disable the FET (2) during power up. When the TYPEDET signal of zero volts, the FET (2) is operated to output the 1.5 regulated voltage output. When the TYPEDET signal is floating, the FET (2) outputs the 3.3 source voltage.

Abstract: A diode-resistor network for modifying the gain/bandwidth of the feedback loop. The feedback loop gain modifier circuit comprises two (2) diodes and a resistor coupled and parallel with a resistor in the AC feedback path of an amplifier. The diodes are connected such that one diode conducts on a voltage bus overshoot and the other diode conducts on a voltage bus undershoot. In this manner, during large step load transients, one of the gain modifier circuits diodes conducts thereby coupling the resistors in parallel resulting in a modified the gain/bandwidth of the feedback loop. In this way, the feedback gain modifier circuit does not affect the small signal feedback loop stability because it is only activated when a large transient is present.

Abstract: A regulator (200) has a pass transistor (250) for transferring a voltage from an input (202) to an output (205). A voltage sensor (231) at the output (205) carries a PTAT current (IA) A generator with diode or transistor chains (271, 272) derives a voltage VRES from serially coupled base-emitter path of transistors (381-386) having different current densities. The generator (271, 272) and a transistor pair (273) form a bandgap reference circuit. Each chain (271, 272) has transistors alternatively of a first type (pnp) and second type (npn). The value ratio (R4/R3) of resistances (240, 230) in the voltage sensor (231) can be chosen such, that the noise components of the voltage VOUT at the output (205) is low.

Abstract: A regulator includes a first controllable semiconductor component, which has an input terminal connected to a regulator input, an output terminal connected to a regulator output, and a control terminal. A second semiconductor component is provided, which is connected to the control terminal of the first semiconductor component and has an input terminal, an output terminal and a control terminal. A comparison device that has a first input, a second input and an output connected to the control terminal of the second semiconductor component is further provided. A reference voltage can be applied to the first input of the comparison device and the second input is connected to the regulator output. A driver device, which, when a predetermined threshold value is exceeded by an input signal present at the regulator input, diverts part of the current from the control terminal of the first semiconductor component to the regulator output.

Abstract: A power circuit including means for preventing the generation of an inrush current during the power circuit's initial operation without increasing the size of the power circuit is described. The power circuit comprises an output transistor for supplying a current from a power supply to an output terminal, and a differential amplifier for controlling the current supplied by the output transistor in such a manner as to regulate a voltage at the output terminal based on a preset reference voltage. A limiting transistor is provided as a source follower on a current path at the output stage of the differential amplifier. The gate potential of the output transistor is controlled using the source potential of the limiting transistor. Before the power circuit starts to operate, an operation controller charges a capacitor to control the gate potential of the limiting transistor so that during the initial operation of the power circuit, the capacitor is discharged by using a current source.

Abstract: A direct-current to direct-current conversion (DC/DC) apparatus includes a control circuit having an error amplifier for voltage control and controlling a direct-current to direct-current conversion based on a pulse width modulation control using an output of the error amplifier. The error amplifier inputs a voltage signal corresponding to an output voltage of a DC/DC result and a plurality of reference voltage signals. The DC/DC apparatus also includes a soft start capacitor to provide one of the plurality of reference voltage signals. The error amplifier amplifies a difference between the voltage signal corresponding to the output voltage of a DC/DC result and a voltage signal of a lower potential among the plurality of reference voltage signals and, based on the amplified output, carries out the pulse width modulation control.

Abstract: An embodiment of the invention is directed to a voltage regulator that provides a conditioned reference voltage with high supply noise rejection. A reference circuit provides an input reference voltage. An operational amplifier (opamp) has a first opamp input coupled to the reference circuit, a second opamp input, and an opamp output to provide the conditioned reference voltage based on the input reference voltage. A differential MOS amplifier has a first input coupled to the opamp output and an output coupled to the second opamp input. The reference voltage is conditioned in accordance with the size of transistors in the differential amplifier. The voltage regulator may be used in different types of analog-to-digital converters, including those built for use with camera chips.

Abstract: The present invention is to provide an apparatus for driving a flat panel display which allows the amount of electrons emitted from a cell to be easily controlled and which performs a stable display gradation processing. To this end, the present invention comprises a shift register for sequentially shifting a video signal input from the exterior in synchronism with a clock signal; a latch for temporarily storing and outputting said video signal which has been sequentially inputted from said shift register; an AND gate for adjusting the time of outputting said video signal output from said latch; and an output driving circuit for inputting said video signal from said AND gate and performing a display gradation control. The present invention allows the amount of electrons emitted from a cell to be easily adjusted so that a 16 step of gradation processing of a display is made possible.

Abstract: A voltage generator for generating an output voltage at an output terminal thereof which includes a first transistor of a first channel conductivity type having a first end connected to the output terminal and a feedback regulator connected to the output terminal. A switch is connected between a voltage node and a second end of the first transistor, the switch receiving a switching signal.

Abstract: A voltage regulator providing smooth variation of an absorbed current having a first capacitor parallel-connected to a load, which is in turn connected to a supply voltage; a transconductor coupled between the supply voltage and the load and whose output voltage supplies the load; a differential amplifier coupled between the output of the transconductor and the supply voltage, and further coupled to the input of the transconductor, a second capacitor coupled between the supply voltage and the input of the transconductor; and a pair of diodes coupled between the output of the transconductor and the first capacitor and configured to introduce a zero in the transfer function of the voltage regulator that is suitable to compensate for a pole generated by the first capacitor.

Abstract: A voltage regulator circuit in an integrated circuit (IC) device such as a Complex Programmable Logic Device (CPLD) includes a reference voltage generator, a tuning circuit, and an output driver circuit. The reference voltage generator converts an external supply voltage provided to the IC device into a stable reference voltage. The tuning circuit converts the stable reference voltage into a desired internal supply voltage, such as the reduced voltage required by deep sub-micron transistors. The output driver circuit provides the desired internal supply voltage with sufficient current to properly power the circuits of the IC device. The tuning circuit includes an op-amp and resistive elements configured in a voltage divider configuration in the negative feedback loop of the op-amp. The output of the op-amp can be set to the desired internal supply voltage by properly sizing the resistive elements.

Abstract: Circuits and methods for implementing both a soft-start function and a short-circuit timer function in voltage regulator controller circuits using only a single package pin are provided. The soft-start and short-circuit timer functions are performed by measuring the voltage across an external capacitor as the capacitor is charged and discharged by a function control circuit. The soft-start function is performed by charging the capacitor from a completely discharged state using a current source in the function control circuit and by using the capacitor voltage as a current limit signal to gradually increase the current drawn from a voltage source to the normal operating level. The short-circuit timer function is performed by using the charge and discharge times of the capacitor to delay the shutdown of the voltage regulator in response to a short-circuit detection.

Abstract: A feedback apparatus includes a current amplifier for generating a binary error signal corresponding to a received feedback signal, a switched capacitor filter, coupled to the current amplifier, for averaging the binary error signal and providing a voltage reference corresponding thereto, and an output stage, coupled to the switched capacitor filter and to the current amplifier, for outputting a current corresponding to a magnitude of the voltage reference and for providing the feedback signal to the current amplifier.

Abstract: A control system for a switching regulator which linearizes the relationship between the control input signal and the duty ratio of the pulse output. A logarithmic signal generator furnishes a logarithmically increasing signal to a comparator circuit. The comparator circuit compares the logarithmic signal to a control input signal and triggers a pulse generator such that the frequency of the pulses has an exponential relationship to the control input signal. The pulses are averaged and the average is subtracted from a reference signal. The result is then used as the input to the logarithmic signal generator. The resulting relationship between the duty ratio of the pulse output and the control input signal is linear.

Abstract: A gate voltage of output driving MOS transistor is adjusted through a negative feedback circuit. The negative feedback circuit suppresses variations in gate voltage of the output MOS transistor by the feedback loop. A gate length of the output driving MOS transistor is set substantially equal to a gate length of a transistor included in the negative feedback circuit. The power supply voltage dependency of the output voltage is canceled out. The output voltage is represented by the difference between threshold voltage of a biasing transistor in the negative feedback circuit and the threshold voltage of the output driving MOS transistor. Output voltage is stably generated at a fixed level without being influenced by operation environment and fluctuation in manufacturing parameters.

Abstract: A voltage regulator that has a first mode circuit having a gating device and an amplifier, the gating device with a first input for receiving a first voltage, a second input, and an output. The amplifier is configured to receive a reference voltage and the gating device output as the second input. The gating device is configured to receive an amplifier output at said second input and responsive thereto to couple the first voltage with the gating device output when the gating device output is within a voltage range. The voltage regulator also has a second mode circuit having a voltage divider with an output. The voltage divider is configured to received the first voltage and supply a second voltage to the voltage divider output. The invention also relates to an integrated circuit having a power bus line and at least two voltage regulator cells coupled to the power bus line.

Abstract: A precision voltage regulator comprises a three terminal regulator coupled to a voltage divider. The voltage divider has two composite resistors, each of which comprises a plurality of matched value resistors fabricated on a common substrate, mixed in series and parallel configurations. The resultant voltage divider produces a wide range of divider ratios, while preserving a divider ratio which is independent of temperature and tolerance effects.

Abstract: A voltage regulator that has a first mode circuit having a gating device and an amplifier, the gating device with a first input for receiving a first voltage, a second input, and an output. The amplifier is configured to receive a reference voltage and the gating device output as the second input. The gating device is configured to receive an amplifier output at said second input and responsive thereto to couple the first voltage with the gating device output when the gating device output is within a voltage range. The voltage regulator also has a second mode circuit having a voltage divider with an output. The voltage divider is configured to received the first voltage and supply a second voltage to the voltage divider output. The invention also relates to an integrated circuit having a power bus line and at least two voltage regulator cells coupled to the power bus line.

Abstract: An amplifier (32) is provided which allows for reduced system power dissipation. The amplifier (32) can dynamically draw power from different supply voltages in response to an input voltage signal. The amplifier (32) includes a plurality of complementary transistor pairs (40-46), where each transistor pair is coupled to a respective power supply. Each transistor pair provides output current when the input voltage signal is within a respective predetermined voltage range. This arrangement permits the amplifier (30) to interpolate between the supply voltages to generate a continuous amp output. System power is conserved by selecting the power supply which can most efficiently supply the required current within the voltage range.