Abstract: A duty cycle generator for generating a duty cycle signal to a power converter is disclosed. The duty cycle generator includes a first inverter, a second inverter, a signal protection unit including an input terminal coupled to the duty cycle signal for generating a break pulse to generate a protected duty cycle signal, a comparator for comparing a triangle-wave signal with a comparison signal to generate a comparison result, a NOR gate for generating a reset signal according to the comparison result and the protected duty cycle signal, an SR-latch for outputting a turn-on signal according to the clock signal and the reset signal, and an AND gate for generating the duty cycle signal according to the inverted clock signal and the turn-on signal.

Abstract: A DC/DC converter includes a first comparator configured to compare an output voltage to a reference voltage; a pulse generator circuit configured to generate a pulse signal when triggered by an output signal from the first comparator; a first switch circuit configured to open and close on the basis of the pulse signal; an output voltage generator configured to generate the output voltage on the basis of an input voltage supplied via the first switch circuit; a delay generator circuit configured to delay the output signal from the first comparator before outputting; and an error amplifier configured to control a delay time of the delay generator circuit on the basis of a potential difference between the output voltage and the reference voltage.

Abstract: A switching power source apparatus includes a high-side MOSFET 11 connected to an input voltage, a ramp signal generator 18 to generate a ramp signal in synchronization with a switching frequency of the high-side MOSFET 11, an amplitude signal generator to generate an amplitude signal Comp corresponding to an amplitude of the ramp signal, a superposing circuit 3 to generate a second ramp signal having a positive inclination corresponding to the amplitude and frequency of the ramp signal and provide a superposed signal by superposing the second ramp signal on a first reference voltage, a controller 1 to control the ON timing and ON width of the high-side MOSFET 11, and a sudden heavy load detector 23 to detect if light load changes to heavy load, and if detects such a change, widen the ON width of the high-side MOSFET 11.

Abstract: Various circuits, including DC/DC converters can include an integrated soft-start circuit. The integrated soft-start circuit includes a PMOS transistor configured to receive a reference signal and control the current to a bipolar junction transistor when the reference signal is in a first state. First and second NMOS transistors are included in the soft-start circuit, and receive the reference signal to turn off (to release from reset) when the reference signal is in the first state. A capacitor coupled in parallel with one of the NMOS transistors controls the soft-start signal. Various different transistors types can be used depending on the desired implementation.

Abstract: A method of operating a regulator controller IC for performing intermittent diode braking for controlling a multiple phase voltage regulator. The method includes receiving at least one signal for detecting repetitive load transients, determining a rate of the repetitive load transients, generating diode braking control signals, each for applying diode braking to a corresponding one of multiple phases for at least one load transient when the repetitive load transients are below a first rate, and controlling the diode braking control signals to drop application of diode braking of at least one phase for at least one load transient when the repetitive load transients are at least the first rate. The method may include rotating the application of diode braking among the phases during successive applications of diode braking. The method may include dropping an increased number of phases for diode braking as the rate of repetitive load transients is increased.

Abstract: The present invention relates to a DC to DC converter system (100), which comprises converter means (110) and control means (120). The switching sequence of the first, second and third switching means (S1, S2, S3) is controlled by the control means (120) in such a manner that, during the on-time of the second switching device (S2), the first current (II) that flows through the inductive storage element (L) of the converter means (110) can be indirectly measured through the first voltage (VC1) across the capacitive storage element (C1), which is being charged with a second current (12) proportional to the input voltage (Vin) of the converter means (110) and provided by the current source (CS). Thus, the on-time of the second switching means (S2) varies inversely proportional to the input voltage (Vin).

Abstract: DC-DC voltage converter structures and methods are provided that employ first and second transistors which are switched to control currents through an inductor and a capacitor to thereby provide an output voltage substantially equal to a predetermined reference voltage. Preferably included is a voltage feedback loop in which an error voltage is fed back to a loop comparator and further included is a current feedback loop that provides to the comparator a first voltage ramp whose amplitude is proportional to the amplitude of the converter's input current. The output signal of the comparator sets the duty cycles of the first and second transistors. In each converter period, the first and second transistors of the voltage converter respectively control, through the inductor, a first current with a rising slope and a second current with a falling slope. Finally, converter stability is enhanced by providing a second voltage ramp having a slope related to a fraction (e.g.

Abstract: The disclosed embodiments relate to a system that implements a switched-capacitor power converter which is configured to actively control power loss while converting an input voltage to an output voltage. This system includes one or more switched-capacitor blocks (SCBs), wherein each SCB includes a first capacitor and a set of switching devices configured to couple a constant-potential terminal and a time-varying-potential terminal of the first capacitor between the input voltage, the output voltage and a reference voltage. The system also includes a clocking circuit which produces gate drive signals for switching transistors in the one or more SCBs. The system additionally includes a controller configured to actively control the gate drive signals from the clocking circuit to substantially minimize the power loss for the switched-capacitor power converter.

Abstract: Methods and apparatus for control of DC-DC converters, especially in valley current mode. The DC-DC converter is operable so that a low side supply switch may be turned off, before the high side supply switch is turned on. During the period when both switches are off the current loop control remains active and the change in inductor (L) current is emulated. One embodiment uses a current sensor for lossless current sensing and emulates the change in inductor current by holding the value of the output of the current sensor (ISNS) at the time that the low side switch turns off and adding an emulated ramp signal (VISLP) until the inductor current reaches zero. Embodiment employing a pulse-skip mode of operation based on a minimum conduction time are also disclosed. The invention enables a seamless transition from Continuous Conduction Mode the Discontinuous Conduction Mode and Pulse Skipping and provide converters that are efficient at low current loads.

Abstract: A method, system and apparatus for controlling a pulse width modulator (PMW) converter for direct AC/AC conversion and/or AC voltage regulation. According to some embodiments of the invention, an output voltage may be provided, independent of the input voltage quality, thereby avoiding or minimizing power company irregularities, brownouts and the like. Embodiments of the present invention may be useful, for example, for use in connection with motors and motored devices or other applications.

Abstract: A control circuit includes a drive signal generator controlling switching of a power switch to regulate a flow of energy to one or more loads coupled to a power converter output. A regulator circuit charges a capacitor to a first voltage and stops charging the capacitor if an energy requirement of the one or more loads falls below a threshold. The regulator again charges the capacitor after the capacitor is discharged from the first voltage to a second voltage. An unregulated dormant mode control circuit renders dormant the drive signal generator and the regulator circuit while the capacitor is discharged from the first voltage to the second voltage causing the regulation of the flow of energy to the power converter output to cease. The drive signal generator and the regulator circuit are powered up after the capacitor is discharged from the first voltage to the second voltage.

Abstract: An output voltage of a voltage regulator is set to within a prescribed voltage range in a short time. The voltage regulator comprises: an amplifier (AMP) that amplifies a difference between a reference voltage and a voltage proportional to an output voltage; an NMOS transistor (MN1) that has a control terminal connected to an output terminal of the amplifier (AMP) and that drops a power supply voltage to output an output voltage; a first capacitive element (C1) that has a first terminal connected to the output terminal of the amplifier (AMP) and a second terminal connected to ground; a second capacitive element (C2) that has a first terminal connected to the output terminal of the amplifier (AMP); and a control circuit (11) that, subsequent to supply of the power supply voltage, controls operation activation of the amplifier (AMP) and also supplies a drive signal to a second terminal of the second capacitive element (C2).

Abstract: A solid state power controller (SSPC) for soft start of a direct current (DC) link capacitor of a DC power distribution system includes a power input connected to a DC power source of the DC power distribution system; a plurality of power switches arranged in parallel, the plurality of power switches being connected to a power output of the SSPC, the power output being connected to the DC link capacitor; and an SSPC controller configured to: pulse width modulate the plurality of power switches with a phase-shifted sequence in a current limiting mode; determine whether soft start is complete; and in response to determining that the soft start is complete, turn on the plurality of switches at a maximum gate-source voltage.

Abstract: A bidirectional buck-boost DC-DC converter is particularly well suited for applications where multiple bidirectional buck-boost DC-DC converters are connected in parallel to a common battery. Multiple bidirectional DC-DC converters, as disclosed, may be connected in parallel to a common battery and, at least in boost mode, substantially no current circulates between the parallel connected bidirectional DC-DC converters.

Abstract: A single replica current is proportional to current through a main switch of a switching power converter. This replica current may be used for current compensation, detection and response to an overload, detection and response to a super-overload, and combinations thereof. An input voltage is switchably coupled to an output signal generating a load current responsive to a switch control. A replica switch generates a replica current proportional to the load current. A ramp modulation signal may be generated. A voltage ramp of the ramp modulation signal may be adjusted in response to the replica current. A feedback difference signal is compared to the ramp modulation signal to generate a comparison output. Comparison of an overload reference voltage to a replica voltage proportional to the replica current generates an overload signal. The switch control is generated responsive to the comparison output and may be modified responsive to the overload signal.

Abstract: A switching power supply circuit includes: a comparator for comparing a reference voltage, which is an output signal of a reference voltage generation circuit, with a feedback voltage, and outputting a set signal when a difference between the reference voltage and the feedback voltage exceeds a predetermined threshold value; an ON-time generation circuit for generating an ON-time signal for defining a period of time during which a switching element is kept ON; and a flip-flop circuit which turns on or off the switching element by the set signal and turns off or on the switching element by the ON-time signal. The reference voltage generation circuit has a first reference power supply for generating a first reference voltage, a second reference power supply for generating a second reference voltage, a capacitor, a resistor, and switch means.

Abstract: Provided is a switching regulator including a circuit for detecting a short-circuit state easily and reliably, without the need of an adjustment step such as trimming. In accordance with a drive signal of a power switching element of the switching regulator, a discharge circuit is controlled. When the power switching element is short-circuited and becomes the ON state all the time, the discharge circuit stops its operation, and a capacitor is continuously charged. A voltage detection circuit detects that a charge voltage of the capacitor has reached a predetermined potential, to thereby detect the short-circuit state.

Abstract: An improved DC-DC power converter employs a feed-forward circuit to improve the response of the output voltage to transient signals on the input voltage. A portion of the input voltage generated by the feed-forward circuit is combined with either the sense voltage or the set point reference to offset one of the voltages applied to the PWM circuit comparator. The feed-forward circuit essentially bypasses the PWM feedback loop to quickly pre-compensate for the input transient and allow the output voltage to settle rapidly at a new operating point. The feed-forward circuit can be implemented with a resistive voltage divider network connected to the input voltage.

Abstract: In a step-down switching regulator, a switching element is a high-voltage NMOS transistor, turned on and off based on a control signal generated by a controller, and charges an inductor with an input voltage input to an input terminal. A first drive circuit is a low-voltage MOS transistor and turns on and off the switching element based on the control signal. A voltage generator generates a predetermined first power supply voltage not greater than a withstand voltage of the low-voltage MOS transistor. A capacitor is connected in parallel with the first drive circuit and stores charge from the voltage generator to supply power to the first drive circuit. One end of the capacitor is connected to a junction node between the switching element and the inductor, and the other end of the capacitor is supplied with the first power supply voltage generated by the voltage generator.

Abstract: A PFC converter that prevents and reduces switching losses by controlling ripple of inductor current and enables application for high power usage, includes a switching device that is turned off when an inductor current flowing through an inductor reaches a first threshold value, and turned on when the inductor current reaches a second threshold value. A switching control circuit sets a reference value of the inductor current using results from an input voltage detection circuit and an output voltage detection circuit. The first threshold value is produced by adding a predetermined value to the reference value, and the second threshold value is produced by subtracting the predetermined value from the reference value.

Abstract: Methods and apparatuses for a soft-start function with auto-disable are described. Such methods and apparatuses can gradually increase a voltage towards a reference voltage using a ramp generator and a control loop and can disable the ramp generator and the control loop once the voltage has reached the reference voltage.

Abstract: A high voltage waveform is generated that is similar to a low voltage input waveform. The high voltage waveform is a series of pulses that are applied directly to the device. An error signal controls the frequency, magnitude, and duration of the pulses. A feedback signal derived from the high voltage waveform is compared with the input waveform to produce the error signal.

Abstract: The present invention discloses a buck switching regulator including a power stage, a driver circuit and a bootstrap capacitor. The power stage includes an upper-gate switch, a first lower-gate switch and a second lower-gate switch. The first upper-gate switch is electrically connected between an input terminal and a switching node. The first lower-gate switch is connected in parallel with the second lower-gate switch, both of which are electrically connected between the switching node and a first node. The driver circuit controls the operation of the upper-gate switch and the first lower-gate switch. The bootstrap capacitor is electrically connected between a boot node and the switching node, wherein the boot node is electrically connected to a supply voltage. When a voltage across the bootstrap capacitor is smaller than a reference voltage, the second lower-gate switch is turned on to charge the bootstrap capacitor from the supply voltage.

Abstract: Circuits and methods to limit an in-rush current of a load circuit such as a processor are disclosed. A charge pump is used as driver for switches with pulse modulation width (PWM) control on the duty cycle of a clock. A clock generator generates a ramp signal with variable slope and a reference voltage. The slope of the ramp signal is dependent on the in-rush current of the switch. No dedicated slew rate driver or an external capacitor is required. The main building blocks are: a charge pump used as driver connected to single supply domain, one external (or internal) switch device, a single capacitive feedback between the switch device and the PWM control, and a PWM control comprising a fix frequency voltage triangular pulse generator with variable slope proportional to the in-rush current measurement.

Abstract: A capacitor drop power supply circuit for supplying power to a load has a switch configured to alter a configuration of the power supply circuit to reduce input current of the power supply circuit. The switch is operable by the load to alter the configuration when the load enters a power save mode. The switch is operable to alter the configuration of the power supply circuit between a first configuration having a first current path through the power supply circuit in a first current direction, and a second configuration having a second current path through the power supply circuit in the first current direction. The switch changes the power supply circuit between the first configuration and the second configuration when the load enters a power save mode.

Abstract: The present invention is related to a switched-mode power supply. It is also related to a LED lighting system and driver which comprise such a switched-mode power supply. In addition, the present invention is related to a method for electrically driving a load. According to the present invention, the switched-mode power supply is switched from a charging state, in which an energy storage is charged, to a discharging state, in which the energy storage feeds a load, when a current limit has been exceeded. This current limit is set proportional to an instantaneous voltage outputted by the rectifier.

Abstract: A controller for a switched mode power supply converting an input voltage to a regulated output voltage according to one embodiment includes a control network and a detection network. The control network develops a pulse width control signal for regulating a level of the output voltage. The detection network detects a phase lag of the output voltage and adjusts operation of the control network based on the phase lag. The phase lag may be determined from any parameter incorporating phase shift, such as the output voltage or the compensation voltage. Various alternative schemes are disclosed for adjusting the control loop, including, but not limited to, adding slope compensation, adjusting window resistance or window current, adding adjustment current to adjust ripple voltage, adjusting ripple transconductance, and adjusting ripple capacitance. Digital and analog compensation adjustment schemes are disclosed.

Abstract: A DC-DC converter operates as a step-down chopper using a main switch element, a sub switch element, an inductor and a capacitor. A sub switch control signal generating circuit discharges a capacitor with a voltage that is proportional to a difference between a voltage of a power supply input unit and a voltage of a power supply output unit when a PGATE signal is at an “L” level, and charges the capacitor with a voltage that is proportional to the voltage of the power supply output unit when an NGATE signal is at an “H” level. The sub switch element is forcibly turned off and reverse flow of an inductor current is prevented even at the time of a light load as a result of the voltage of the capacitor being generated as an NCTL signal. Thus, reverse flow of an inductor current is prevented and a high-efficiency DC-DC converter is provided without the use of a high-speed comparator or any other kind of comparator.

Abstract: A compensation circuit has a resistor, a switch and a compensation capacitor. The resistor and the switch are connected in series between a power node and a compensation node. The compensation capacitor is connected to the compensation node, whose voltage is responsive to the output power source. For a predetermined period of time after the voltage falls below a predetermined value, the switch is open and no current flows through the resistor from the power node to the compensation node.

Abstract: A power supply for a gated load includes a power current source controlled by a current magnitude signal. A capacitor integrates the power current to produce load voltage. The power current is sampled, and compared with a reference voltage appearing across a reference capacitor, to produce the current magnitude signal. The reference voltage is controlled by a window comparator which charges the reference capacitor when the load voltage exceeds an upper threshold, and discharges the reference capacitor when the load voltage is less than a lower threshold. The window comparator is enabled by the load gating signal.

Abstract: A DC-DC converter including a Pulse Width Modulation (PWM) controller for converting an input voltage into an output voltage is provided. The PWM controller includes: an error amplifier, receiving a reference voltage and a feedback voltage and provides an error signal; a compensation unit coupled to an output of the error amplifier, compensating the error signal and comprising a first resister and a first capacitor; a ramp generator, generating a ramp signal according to a constant on time PWM signal; a first comparator coupled to the compensation unit and the ramp generator, comparing the compensated error signal with the ramp signal to generate a trigger signal; and a PWM generator coupled to the first comparator, providing the constant on time PWM signal according to the trigger signal, an input voltage of the DC-DC converter and the output voltage of the DC-DC converter.

Abstract: A circuit for an oscillator structured to drive a control device of a switching resonant converter; the converter having a switching circuit structured to drive a resonant load provided with at least one transformer with at least a primary winding and at least a secondary winding. The control device structured to drive the switching circuit, and the converter structured to convert an input signal into an output signal, the integrated circuit includes a first circuit structured to charge and discharge a capacitor by a first current signal such that the voltage at the ends of the capacitor is between first and second reference voltages, the current signal having a second current signal indicating the output voltage of the converter; the integrated circuit including a second circuit structured to rectify a signal indicating the current circulating in the primary winding.

Abstract: A DC-DC converter comprises a high-side switch, a low-side switch connected to the high-side switch, and an output capacitance. An inductance has one end connected to the high-side switch and the low-side switch and another end connected to the output capacitance. A shunting device circulates current flowing through the inductance back to the inductance during a load reduction transition to control a voltage across the output capacitance.

Abstract: A stability compensation circuit and a DC-DC converter including the same are provided. When an output voltage of the DC-DC converter decreases more than a predetermined value, the stability compensation circuit quickly charges an integral capacitor by using an additional converter or by reducing an effective resistance of a charging circuit which charges the capacitor. Since an output voltage of an integrator in the stability compensation circuit is enabled to quickly reach a control voltage, the instant decrease of the output voltage of the DC-DC converter can be quickly compensated for.

Abstract: A control circuit and method for a ripple regulator system generate a ripple signal in-phase and synchronous with an inductor current of the ripple regulator system, and extract a ripple information proportional to the amplitude of the ripple signal. The ripple signal is used for triggering control in PWM signal generation to make the ripple regulator system have small ripples and better loop stability simultaneously. The ripple information is used to improve the output offset of the ripple regulator system that is caused by the ripple signal.

Abstract: A hysteretic power converter constituted of: a switched mode power supply; a hysteretic comparator, a first input of the comparator arranged to receive a feedback signal providing a representation of the output voltage of the switched mode power supply and a second input of the comparator arranged to receive a reference voltage; a ramp capacitor coupled to one of the first and second input of the comparator; a current source, a terminal of the current source coupled to the ramp capacitor and arranged to drive current to the ramp capacitor; and a switchable current source, a terminal of the switchable current source coupled to the ramp capacitor, the switchable current source arranged to drive current to the ramp capacitor in a direction opposite the current driven by the current source, wherein the switchable current source is alternately enabled and disabled responsive to the output of the hysteretic comparator.

Abstract: A DC-DC converter includes: a high-side MOSFET as a main switching element which is driven by using a bootstrap capacitor; a low-side MOSFET as a synchronous rectifier, wherein a series circuit of the high-side MOSFET and the low-side MOSFET is connected to a DC power supply; and a coil and a smoothing capacitor, which are serially connected between the drain and the source of the low-side MOSFET; an overvoltage protection unit, which clamps an overvoltage; an overcurrent interrupting unit, which interrupts an overcurrent that flows when the overvoltage protection unit clamps the overvoltage; and a protection circuit, wherein the protection circuit includes: a differential-voltage detecting unit detecting the voltage of both ends of the bootstrap capacitor; and a control unit that, when the voltage detected by the differential-voltage detecting unit exceeds a predetermined value, turns OFF the low-side MOSFET and turns ON the high-side MOSFET.

Abstract: The present invention discloses a SMPS. The SMPS comprises an output port, configured to supply a load; a control signal generator, having an input and an output configured to provide a first control signal; a first switch configured to receive the first control signal and regulate the voltage at the output port; and a ramp signal generator, comprising an input and an output, wherein the input is configured to receive the control signal and the output is configured to provide a current signal simulating an output signal at the output port, and wherein the output of the ramp signal generator is further coupled to the input of the means for generating control signal.

Abstract: Devices, systems and methods for controlling the application of current and/or voltage to deliver drug from patient contacts of an electrotransport drug delivery device by indirectly controlling and/or monitoring the applied current without directly measuring from the cathode of the patient terminal. In particular, described herein are electrotransport drug delivery systems including constant current delivery systems having a feedback current and/or voltage control module that is isolated from the patient contacts (e.g., anodes and cathodes). The feedback module may be isolated by a transistor from the patient contacts; feedback current and/or voltage control measurements may be performed at the transistor rather than at the patient contact (e.g., cathode).

Abstract: A frequency-jitter-controller for a power-converter is provided, and which includes a first and a second capacitance units, a first and a second charge-discharge control units, a comparing unit and a control unit. Both capacitance units are charged to a crossing-voltage during a charging phase and discharged to a reference voltage and a clamp voltage respectively during a discharging-phase in response to operations of both charge-discharge control units. The comparing unit outputs a pulse signal, compares voltages of both capacitance units during the charging phase, and compares the voltage of the first capacitance unit and the reference voltage during the discharging phase. The control unit generates a frequency jitter control signal according to the pulse signal to adjust a rising rate of the voltage on the second capacitance unit, so as to change a frequency of the pulse signal, and thus reduce EMI generated by switching switch-elements in the power-converter.

Abstract: Three modifications are provided to obtain a fast and accurate average current limit in a DC/DC converter. The first modification relates to providing a bias signal control configured to apply a variable DC bias signal to the compensation ramp signal generated in the DC/DC converter so that the compensating ramp signal is biased to zero at the end of each ON-time for each cycle so that the peak current limit is independent of the duty cycle of the pulse width modulation signal during current limit conditions. A second modification relates to modulating the clamp voltage that establishes the peak current limit as a function of ripple of the inductor current for each cycle of the pulse width modulation signal so as to reduce or cancel the effect of the inductor ripple current on the average output current during current limit conditions.

Abstract: A switching control circuit includes an N-channel MOSFET having an input electrode applied with an input voltage and an output electrode connected to one end of an inductor and one end of a rectifying element. The other end of the inductor is connected to a first capacitor. A bootstrap circuit is configured to generate a bootstrap voltage on a second capacitor having one end connected to the output electrode of the N-channel MOSFET. The bootstrap voltage is required when the N-channel MOSFET is turned on. A driving circuit is configured to be applied with a driving voltage corresponding to the bootstrap voltage and turn on/off the N-channel MOSFET to generate an output voltage of a target level on the first capacitor. A clamping circuit is configured to clamp the driving voltage to be at a predetermined level or lower.

Abstract: Provided is a DC-DC converter including a soft start circuit capable of prolonging a soft start time without increasing a capacitance used in the soft start circuit. A soft start is implemented by gradually increasing a limiting level of an inductor current or a reference voltage. The soft start time is adjusted by varying a frequency of CLOCK signals supplied to switch circuits. The soft start time may be prolonged without increasing a chip size because the capacitance does not need to be increased to prolong the soft start time.

Abstract: A PWM controller for adjusting an output voltage of a buck and boost converter includes a first saw wave generator, which generates a first saw wave in accordance with the level of the output voltage. A first comparator coupled to the first saw wave generator compares the first saw wave with a first reference voltage and generates a first pulse. A peak hold circuit coupled to the first saw wave generator holds a peak value of the first saw wave. A second saw wave generator coupled to the peak hold circuit generates a second saw wave having a lower limit value that is the peak value of the first saw wave. A second comparator coupled to the second saw wave generator compares the second saw wave with the first reference voltage and generates a second pulse.

Abstract: A boost regulator that comprises a capacitor adapted to couple in parallel with a load, a switch coupled to the capacitor and to a diode, a comparator coupled to the load and receiving a reference voltage, and a circuit logic component that receives an output of the comparator and an output of a duty cycle signal generator. An output of the circuit logic component couples to the switch and is capable of activating and de-activating the switch.

Abstract: A DC-DC converter or the like capable of generating a stable output voltage is provided. A control circuit 11 of a current mode step-down DC-DC converter 1 includes a slope compensation circuit SC and an offset circuit IF1. The slope compensation circuit SC adds an increase gradient m2 due to slope compensation to an increase gradient of a coil current waveform Vsense in a range wherein an ON period Ton of a switch SW1 exceeds ½ of an operating cycle T. An offset circuit IF1 applies an offset voltage Voffset which becomes smaller depending on the ON period Ton in excess of ½ of an operating cycle T, to a coil current waveform Vsense.

Abstract: The present invention discloses a power supply circuit with adaptively enabled charge pump. The power supply circuit includes: a buck switching regulator switching at least one power switch therein to convert an input voltage to a middle voltage according to a control signal; a charge pump coupled to the buck switching regulator, wherein when the charge pump is enabled, the charge pump boosts the middle voltage to provide an output voltage higher than the middle voltage, and when the charge pump is disabled, the middle voltage is supplied as the output voltage; and a controller generating the control signal to control the switching regulator, and determining to enable or disable the charge pump according to a level of the input voltage.

Abstract: A circuit may generate a clock signal with a variable period given by a ratio between an initial switching period and a number of phase circuits through which a current of a multi-phase PWM voltage converter flows. The circuit may include an adjustable current generator driven by a signal representing the number of phase circuits through which the current flows and configured to generate a current proportional to the number of phase circuits through which the current flows, and a tank capacitor charged by the adjustable current generator. The circuit may include a comparator of a voltage on the tank capacitor with a threshold value configured to generate a pulse of the clock signal when the threshold value is attained, and a discharge path of the tank capacitor, the discharge path being enabled during the pulses of the clock signal.

Abstract: Circuitry and methodology for tracking the maximum power point (MPP) of a solar panel is disclosed. The voltage and current generated by the solar panel are monitored and used to generate a pulse signal for charging a capacitor. The changes in the voltage and current generated by the solar panel are also monitored, and that information is used to generate a pulse signal for discharging the capacitor. The charging and the discharging pulse signals are used to charge and discharge the capacitor. A reference signal indicative of the charge level of the capacitor is generated. As the current and voltage generated by the solar panel approach the maximum power point (MPP), the frequency of the discharging pulse signal becomes progressively higher, so that the capacitor charging occurs in progressively smaller increments. When the MPP is reached, the reference signal level becomes steady because the charge level of the capacitor becomes steady.

Abstract: A DC-DC converter including a Pulse Width Modulation (PWM) controller for converting an input voltage into an output voltage is provided. The PWM controller includes an error amplifier, a comparator, a PWM generator and a ramp generator. The error amplifier generates an error signal according to a difference between a reference voltage and the output voltage. The comparator compares the error signal with a ramp signal to generate a trigger signal. The PWM generator generates a PWM signal with a fixed turn-on time, wherein a frequency of the PWM signal is adjusted according to the trigger signal, the input and output voltages. The ramp generator generates the ramp signal according to the PWM signal, the input voltage and the output voltage.