Abstract: In a DC-DC converter controller of the present invention, a ramp voltage for compensating a reference voltage is designed to have the same valley value or peak value irrespective of an input voltage and an output voltage of a controlled converting circuit when the controlled converting circuit operates in the steady state. Hence, the DC-DC converter controller of the present invention is capable of controlling the controlled converting circuit to accurately output the output voltage in different applications.

Abstract: A control circuit for controlling a soft-start time of a DC power supply includes a digital potentiometer, a first drive circuit, and a controller. The digital potentiometer includes a first potentiometer. The first drive circuit includes a first driver, a first MOSFET, and a first charge capacitor. The first driver charges the first charge capacitor via the first potentiometer when the DC power supply is first switched on, and the first MOSFET is switched on to connect the DC power supply to the load when the first charge capacitor is fully charged. The controller regulates resistance of the first potentiometer to regulate a charge time constant of the first charge capacitor, enabling a gradual rise in voltage supplied, from approximately zero to full power, within a desired period of time.

Abstract: A multi-mode pulse width modulation (PWM) controller for a buck switching regulator includes a multi-mode PWM control circuit where the PWM control circuit is configured to operate in one of multiple control schemes selectable by a mode select signal. In one embodiment, the multi-mode PWM control circuit incorporates a peak current mode control scheme, a voltage mode control scheme, and a valley current mode control scheme. In another embodiment, the multi-mode PWM control circuit further incorporates a constant ON-time control scheme.

Abstract: A DC-DC converter, having an input voltage and an output voltage, includes an inductor and a switch switching the input voltage to an input side of the inductor, where a feedback path controlling initiation of closing the switch includes capacitive coupling of the voltage at the input side of the inductor.

Abstract: The present invention is directed to prevent occurrence of a problem on a withstand voltage in a circuit group which receives supply of an internal power supply voltage. An error amplifier outputs a control voltage obtained by amplifying a difference voltage between a reference voltage and a divided voltage obtained by dividing an internal power supply voltage to an output node. A drive transistor supplies a drive current according to the control voltage of the output node of the error amplifier from an external power supply line to an internal power supply line. When the divided voltage exceeds a predetermined voltage, a clamp circuit changes the control voltage in the direction of decreasing the drive current.

Abstract: A voltage converter device includes a voltage regulator having a supply terminal for receiving a supply voltage and an output terminal for providing a regulated voltage. A voltage multiplier is for receiving the regulated voltage and providing a boosted voltage higher in absolute value than the regulated voltage. The voltage multiplier includes circuitry for providing a clock signal that switches periodically between the regulated voltage and a reference voltage, and a sequence of capacitive stages that alternately accumulate and transfer electric charge according to the clock signal for generating the boosted voltage from the regulated voltage. The voltage regulator includes a power transistor and a regulation transistor each having a first conduction terminal, a second conduction terminal and a control terminal.

Abstract: A control circuit for controlling a power supply including a first switch and a second switch coupled in series between a first potential and a second potential. The control circuit includes a detection circuit that detects a magnitude relation of a voltage value at a node between the first and second switches and a reference value during a period in which the first switch and the second switch are inactivated. The detection circuit generates a control signal corresponding to the magnitude relation. A regulation circuit regulates a switching timing of the second switch in response to the control signal to decrease a difference between the voltage value at the node and the reference value.

Abstract: A hysteretic power converter constituted of: a switched mode power supply; a hysteretic comparator, a first input of the comparator arranged to receive a feedback signal providing a representation of the output voltage of the switched mode power supply and a second input of the comparator arranged to receive a reference voltage; a ramp capacitor coupled to one of the first and second input of the comparator; a current source, a terminal of the current source coupled to the ramp capacitor and arranged to drive current to the ramp capacitor; and a switchable current source, a terminal of the switchable current source coupled to the ramp capacitor, the switchable current source arranged to drive current to the ramp capacitor in a direction opposite the current driven by the current source, wherein the switchable current source is alternately enabled and disabled responsive to the output of the hysteretic comparator.

Abstract: A ramp signal generating method and a generator thereof, and a pulse width modulation signal generator are provided. The ramp signal generating method includes following steps: receiving an error signal, wherein the error signal relates to an output voltage of a power converter; generating an error delayed signal according to the error signal; and providing a ramp signal according to the error signal and the error delayed signal. The ramp signal is phase leading and inverting compared to the error signal. The ramp signal serves to improve a response speed of the power converter.

Abstract: A switched capacitor power converter comprising a set of at least two capacitors; an input for receiving an input voltage an output for outputting an output voltage different to the input voltage, a plurality of switches configured to arrange the set of capacitors into a plurality of different subcircuit arrangements between the input and output for converting the input voltage to the output voltage; wherein the set of capacitors is configured to adopt a first subcircuit arrangement in which the set is connected to the input, a second subcircuit arrangement different to the first subcircuit arrangement and a third subcircuit arrangement, different to the first and second arrangements, in which the set is connected to the output, the subcircuit arrangements configured such that each of the capacitors in the set acts as a floating capacitor.

Abstract: The present invention provides miniature power supplies and circuitry for powering high-voltage devices.

Abstract: A switching regulator arrangement utilizes internal capacitors rather than external capacitors for driving output power transistors. Low-dropout linear voltage regulators together with a dip compensation circuit provide an intermediate supply voltage for driving power transistors under circumstances in which a supply voltage is greater than a gate drive voltage of the power transistor, allowing for a more efficient absorption of transient current.

Abstract: A switch mode power supply system has a constant on-time signal generator, a logic circuit, a feedback circuit, a first ramp signal generator, a second ramp signal generator, a switch circuit having a power switch, and a comparator. A feedback signal from the feedback circuit is compensated by the first ramp signal generator, and a reference signal is compensated by the second ramp signal generator. The comparator compares the compensated feedback signal with the compensated reference signal to indicate an off time of the power switch while the constant on-time signal generator decides the on-time of the power switch.

Abstract: An example circuit includes a capacitance circuit, a regulator circuit, and a slew rate control circuit. The capacitance circuit is coupled between a first node and a second node. The regulator circuit is coupled to the capacitance circuit to regulate a supply voltage across the capacitance circuit with a charge current during a normal operation mode of the circuit. The slew rate control circuit is coupled to the capacitance circuit and the regulator circuit. The slew rate control circuit is coupled to lower a slew rate of a change in voltage over change in time between the first and second nodes during a power up mode of the circuit. The slew rate control circuit includes a transistor coupled between the first and second nodes to shunt excess current from the charge current.

Abstract: A system includes a feedback module that communicates with a capacitor connected across an output of a power converter and that generates a feedback voltage indicating a pre-bias voltage across the capacitor before power is supplied to the power converter. A comparator compares the feedback voltage to a reference voltage and determines whether the pre-bias voltage across the capacitor is greater or less than a desired output voltage of the power converter when power is supplied to the power converter. A ramp generator module generates a first or second ramp if the pre-bias voltage is less or greater than the desired output voltage. A control module drives high-side and low-side switches to charge or discharge the capacitor from the pre-bias voltage to the desired output voltage based on the first or second ramp and controls the power converter after a voltage across the capacitor reaches the desired output voltage.

Abstract: The present invention discloses a current balance circuit for a multiphase DC-DC converter. The current balance circuit comprises a current error calculation circuit, for generating a plurality of current balance signals indicating imbalance levels of a plurality of inductor currents of a plurality of channels of the multiphase DC-DC converter according to a plurality of current sensing signals of the plurality of channels, a time shift circuit, for adjusting pulse widths of a plurality of clock signals according to the plurality of current balance signals, and a ramp generator, for deciding shift levels of a plurality of ramp signals according to the plurality of clock signals.

Abstract: Generally, this disclosure provides methods and systems for improved startup for DC-DC converters that reduce input voltage droop, in-rush current and output voltage jumps. The system may include a power stage circuitry including a plurality of power segments coupled in parallel, the power stage circuitry is coupled between an input voltage and output stage circuitry and configured to deliver power to a load coupled to the output stage circuitry. The system may further include PWM and power stage controller circuitry configured to sequentially and progressively activate the plurality of power segments to limit an input in-rush current from the input voltage during a ramp up period and output voltage at the output stage circuitry.

Abstract: A method for providing non-resonant zero-voltage switching in a switching power converter. The switching power converter converts power from input power to output power during multiple periodic switching cycles. The switching power converter includes a main switch and an auxiliary capacitor adapted for connecting to the main switch, and an inductor connectible to the auxiliary capacitor. When the main switch is on, a previously charged (or previously discharged) auxiliary capacitor is connected to the main switch with auxiliary switches. The main switch is switched off with zero voltage while discharging non-resonantly (charging) the auxiliary capacitor by providing a current path to the inductor. The auxiliary capacitor is disconnected from the main switch.

Abstract: A DC-DC controller and a control method thereof are provided. The DC-DC controller is coupled to an output stage. The output stage receives an input voltage and provides an output voltage. The DC-DC controller includes a transient boost circuit, a ramp oscillator, a combination logic circuit, a first comparator and a pulse width modulation (PWM) generator. The transient boost circuit generates an adjusting signal according to a variation of the output voltage. The combination logic circuit controls the ramp oscillator to generate a ramp signal according to the adjusting signal. The first comparator generates a first signal according to the ramp signal and an outputted feedback voltage related to the output voltage. The PWM generator generates a PWM signal according to the first signal, so as to control the operations of the output stage.

Abstract: A switching regulator including: a power stage having a first power switch and a second power switch coupled in series; a filter circuit having an inductor and an output capacitor; a feedback circuit configured to provide a feedback signal indicating an output voltage of the regulator; and a control circuit configured to provide a switching signal to control the ON and OFF of the first power switch so as to regulate the energy supplied to a load; wherein the control circuit has a peak current generator configured to generate a peak current signal, wherein the gain of a variation of the peak current signal between the contiguous switching cycles is less than one.

Abstract: An example PWM includes a driver and a two-way oscillator. The oscillator includes, a first frequency adjust current source, a second frequency adjust current source, a capacitor, a switching reference and a comparator. The capacitor integrates a frequency adjust current by charging with the first frequency adjust current source. The capacitor subsequently integrates a second frequency adjust current by discharging with the second frequency adjust current source. The switching reference outputs a first reference voltage and a second reference voltage responsive to an oscillator signal. The comparator compares the output of the switching reference with a voltage on the capacitor. The first and second frequency adjust current sources vary the first and second frequency adjust currents to vary the frequency of the PWM signal to spread energy of switching harmonics over a frequency band and to reduce EMI.

Abstract: The present invention relates to a power factor correction circuit, that can include: an inductor current detector that generates a sampling voltage signal, and sinusoidal half-wave current and voltage signals based on the sampling voltage signal; a mediate signal generator generating slope voltage and clock signals in response to the sinusoidal half-wave voltage signal, where a frequency of each varies with the sinusoidal half-wave voltage signal; a current modulation circuit receiving the sinusoidal half-wave current signal and a voltage feedback signal representative of a power stage output voltage to generate a regulation signal that is compared against the slope voltage signal to generate a modulation signal; and a logic/driving circuit receiving the modulation and clock signals, and generating a controlling signal that controls a power switch with variable frequency to maintain the inductor current in phase with the sinusoidal half-wave voltage signal and the power stage output voltage constant.

Abstract: Advantageous digital logic cells and methods of powering logic blocks using the same are provided. A digital logic cell can include a charge storage device, a logic block, and connections to a power supply. The charge storage device may be a capacitor. The capacitor or other charge storage device can be disconnected from the logic block and a power supply to discharge the capacitor, and then connected to the power supply, via the power supply connections, to charge the capacitor. The capacitor can be disconnected from a ground connection of the power supply while the capacitor is discharged. After being charged via the power supply, the capacitor can also be disconnected from the power supply (including ground) and connected to the logic block to power the logic block.

Abstract: Advantageous analog and/or digital logic cells and methods of powering circuit blocks using the same are provided. A digital logic cell can include a charge storage device, a logic block, and connections to a power supply. The charge storage device may be a capacitor. The capacitor or other charge storage device can be disconnected from the logic block and a power supply to discharge the capacitor, and then connected to the power supply, via the power supply connections, to charge the capacitor. The capacitor can be disconnected from a ground connection of the power supply while the capacitor is discharged. After being charged via the power supply, the capacitor can also be disconnected from the power supply (including ground) and connected to the logic block to power the logic block.

Abstract: A power factor correction circuit is provided which may include a first switched-mode converter circuit comprising a first inductor, at least one second switched-mode converter circuit having a second inductor, a control circuit coupled to the first and second switched-mode converter circuits, wherein the control circuit is configured to start a switching pulse for the second switched-mode converter circuit when the following conditions are fulfilled: the second inductor of the second switched-mode converter circuit has a predefined magnetization state and a predefined time period has elapsed since the start of a switching pulse for the first switched-mode converter circuit, wherein the predefined time period is a predefined fraction of the time period from the start of a previous switching pulse for the second switched-mode converter circuit to a time when the second inductor of the second switched-mode converter circuit has the predefined magnetization state.

Abstract: The present invention provides a bootstrap driving circuit without extra power supply, which circuit includes a power unit, a switching unit, a bootstrap unit, a drive unit; the power unit is used to output a direct voltage; the switching unit is connected with the power unit, to control the turn-on or turn-off with the power unit; the bootstrap unit is connected with the switching unit, to supply drive electric energy and output drive power; the bootstrap unit includes an energy storage capacitor; the drive unit is connected with the bootstrap unit, to output control signal under the drive of the drive power. The bootstrap driving process is completed via the charging-discharging of the energy storage capacitor in the bootstrap unit of the invention and without an extra power supply, which forms the bootstrap driving circuit without extra power supply, further overcomes the requirement of an extra power supply for a common driving circuit, reduces the power consumption and meets the demand of the circuit.

Abstract: A voltage converter includes a voltage converting circuit, a pulse width modulation (PWM) controller, a feedback circuit, an adjusting circuit, and a measuring circuit. The voltage converting circuit converts an input voltage to a low output voltage for a load. The PWM controller includes a comparator and a triangular-wave oscillator. The comparator is connected to the voltage converting circuit and outputs a PWM voltage to the voltage converting circuit. The triangular-wave oscillator is connected to an inverting terminal of the comparator, and outputs a sawtooth-wave voltage to the comparator. The feedback circuit is connected to a non-inverting terminal of the comparator and outputs a feedback voltage to the comparator. The measuring circuit measures current output from the voltage converting circuit and controls the adjusting circuit to provide a pull-up voltage to the triangular-wave oscillator when the measured current decreases, thereby increasing the duty ratio of the PWM voltage.

Abstract: A control circuit for a switching voltage regulator is disclosed, having a charging circuit, a discharging circuit, and a charging-discharging control circuit. The charging circuit generates a charging current according to the input voltage and the output voltage of the switching voltage regulator for charging a capacitor. The discharging circuit generates a discharging current according to the output voltage of the switching voltage regulator for discharging the capacitor. The charging-discharging control circuit configures the charging circuit, the discharging circuit, and the switching voltage regulator according to the voltage of the capacitor for providing a control signal to configure the switching voltage regulator.

Abstract: A bootstrap capacitor detecting circuit includes a current source, for providing a discharging current; a first switch, for conducting connection between a system voltage and a bootstrap voltage node according to a power-on-reset signal, to charge the bootstrap voltage node; a second switch, for conducting connection between a current source and the bootstrap voltage node according to the power-on-reset signal, to discharge the bootstrap voltage node; and a detecting unit, for determining whether a bootstrap capacitor is connected normally according to a bootstrap voltage of the bootstrap voltage node after the current source discharges the bootstrap voltage node.

Abstract: Provided are a ramp circuit and a DC-DC converter. The ramp circuit generates a current flowing in a resistor using voltages affected by an output voltage and an input voltage of a DC-DC converter, and generates a ramp signal through copying of the current and charging and discharging of a capacitor using a current mirror unit. The ramp signal is generated by considering the input voltage and the output voltage, and thus the ramp signal has an optimal slope to provide an adaptive response to state change in the input voltage and the output voltage. The DC-DC converter uses such a ramp circuit to facilitate its operation.

Abstract: Methods and circuits related to power regulation are disclosed. In one embodiment, a power regulator for converting an input electrical signal to an output electrical signal to supply power to a load, can include: (i) a power stage having switching devices and a filter; (ii) a regulation signal generator for the switching devices that includes a feedback circuit and a PWM, the feedback circuit receiving an output signal from the power stage, the PWM receiving an output from the feedback circuit, and generating a PWM control signal; (iii) a constant time generator receiving the PWM control signal and generating a constant time signal based on the PWM control signal duty cycle; and (iv) a logic/driving circuit receiving the PWM control signal and the constant time signal, and controlling operation of the switching devices to modulate the output signal from the power stage, and maintaining a pseudo constant operation frequency.

Abstract: An adaptive slope generator can include a current mirror configured to receive a multiplied current that varies as a function of an output voltage and a switching frequency of a switching current. The output voltage can characterize the switching current provided to a load coupled to an inductor. The current mirror can also be configured to receive an oscillation current. The oscillation current can have an amplitude that corresponds to the switching frequency of the switching current. The current mirror can be further configured to generate an output current substantially equivalent to the product of the oscillation current and the output voltage. The adaptive slope generator can also include a ramp generator configured to generate a compensation signal based on the output current. The compensation signal can have a sawtooth shape and a slope that varies as a function of the output voltage.

Abstract: A method for soft-starting a voltage generator includes disabling an output driver; detecting the voltage on an output node; ramping a reference voltage at a controlled rate from a predetermined first level until the reference voltage reaches a second level that is a predetermined function of said output node voltage; enabling the output driver when the reference voltage reaches said second level; and then ramping the reference voltage and the output node voltage at a controlled rate to a boot voltage level. A soft-start circuit for an output voltage generator includes a comparator for causing a ramp generator to ramp the reference voltage and the voltage on the output node to a boot voltage level at a controlled rate once the comparator detects that the reference voltage is substantially equal to the voltage on the output node.

Abstract: A DC-DC controller and a multi-ramp signal operating method thereof are provided. The DC-DC controller includes a ramp generating unit, a comparator, a logic circuit and a switch unit. The ramp generating unit generates a first interior-ramp signal and a second interior-ramp signal alternately. The logic circuit generates the first and second control signals according to a comparison signal of the comparator. The switch unit is configured to switch one of the first interior-ramp signal and the second interior-ramp signal alternately to a second terminal of the comparator according to the first and second control signals. When the second interior-ramp signal is switched to the comparator, the first interior-ramp signal is charged to a first voltage level by the ramp generating unit. In another switch procedure, the second interior-ramp signal is charged to a second voltage level by the ramp generating unit.

Abstract: In a DC-DC converter controller of the present invention, a ramp voltage for compensating a reference voltage is designed to have the same valley value or peak value irrespective of an input voltage and an output voltage of a controlled converting circuit when the controlled converting circuit operates in the steady state. Hence, the DC-DC converter controller of the present invention is capable of controlling the controlled converting circuit to accurately output the output voltage in different applications.

Abstract: Disclosed is a switched-mode power supply including an inductor which is connected between a voltage input terminal to which a DC voltage is input and an output terminal to which a load is connected, a driver switching element which intermittently feeds a current to the inductor and a control circuit which generates a control pulse according to a feedback voltage from output side and controls on/off of the driver switching element. The control circuit includes a voltage comparison circuit which compares the feedback voltage to a predetermined voltage and a pseudo ripple generator circuit which generates a pseudo ripple voltage having a predetermined amplitude, and the control circuit injects a ripple component in a transmission path of the feedback voltage based on the pseudo ripple voltage generated by the pseudo ripple generator circuit.

Abstract: Systems and methods for regulating a switching converter are disclosed. One embodiment of the present invention relates to a power supply system that includes a switching converter that provides an output voltage by alternately turning on and off a high-side transistor and a low-side transistor both coupled to an output inductor through a switching node. The switching converter includes a drive circuit that regulates the output voltage based on a feedback signal. The power supply system also includes a simulated output generator that generates and provides the drive circuit with a simulated inductor waveform as the feedback signal based on a low-side output waveform of the low-side transistor measured at the switching node during off-times of the switching converter.

Abstract: Peak current, valley current or average current mode controlled power converters in either digital or analog implementations obtain a stabilized feedback loop and allow high system bandwidth design by use of an external ramp generator using a slope computation equation or design parameters based on fixing the quality factor of a double pole at one-half of the switching frequency at a desired value The slope of the external ramp waveform is tuned automatically with knowledge of the slope change in the waveform of inductor current of a power converter derived by differentiating a waveform in the current feedback loop. This autotuning of the external ramp generator provides immunity of quality factor change under variations of duty cycle, component values of topological change of the power converter.

Abstract: An apparatus for electric power conversion includes a converter having a regulating circuit and switching network. The regulating circuit has magnetic storage elements, and switches connected to the magnetic storage elements and controllable to switch between switching configurations. The regulating circuit maintains an average DC current through a magnetic storage element. The switching network includes charge storage elements connected to switches that are controllable to switch between plural switch configurations. In one configuration, the switches forms an arrangement of charge storage elements in which at least one charge storage element is charged using the magnetic storage element through the network input or output port. In another, the switches form an arrangement of charge storage elements in which an element discharges using the magnetic storage element through one of the input port and output port of the switching network.

Abstract: Systems and methods for providing a buck-boost converter with an improved efficiency are disclosed. The buck-boost converter disclosed operates in 5 different modes, namely in buck mode, half frequency buck mode, half frequency buck-boost mode, half frequency boost mode, and in boost mode. In half frequency buck mode, buck-boost mode, and in half frequency boost mode the switching frequency is halved compared to the switching frequency of buck or boost mode. A simple circuit implementation by adding two offset voltages in ramp signals or PWM comparators enables to halve the switching frequency if required.

Abstract: The present invention relates to a circuit and method of generating a ramp compensation voltage as might be used in a switching regulator. The ramp compensation voltage comprises: a charging current generating circuit configured to receive a switching signal having a frequency of fs, a duty cycle of D and a period of Ts, the charging current generating circuit generating a charging current in direct proportion to f s ( 1 - D ) ? DTs ; and a voltage generating circuit for generating a quadratic ramp compensation voltage by means of the charging current. The resulting ramp compensation voltage enables the switching regulator to operate over a broad range of duty cycles. The generated ramp compensation voltage has an amplitude as low as possible, the generated compensation slope approximates to the target compensation slope as close as possible, and over compensation at low duty cycles is reduced as far as possible.

Abstract: Operation of a switching power converter having an output capacitor having a small equivalent series resistance (ESR) is stabilized and jitter reduced by sensing capacitor current with gain and combining the resulting signal with the output voltage signal to provide a feedback signal to control switching of the power converter. capacitor current can be sensed without interfering with operation of the filter capacitor by providing a branch circuit having a time constant matched to the output or filter capacitor but an arbitrarily high impedance so as to be effectively lossless. The gain provided in the capacitor current signal can be tuned to provide optimally short settling time after load transients; generally within one switching cycle. Matching of time constants and/or tuning of gain can be performed automatically.

Abstract: A converter circuit and associated control method are disclosed hereby. The converter circuit has an error amplifier to provide an error signal; a proportional amplifier to provide a gain signal according the error signal and an output voltage of the converter circuit; a first comparator, generating a pulse signal according to the gain signal and a comparison signal; and a timer, generating a timing signal according to the pulse signal to indicate the on time and the off time of the converter circuit; and wherein either the gain signal or the comparison signal comprises a ramp component, and wherein the on time of the converter circuit is constant.

Abstract: Disclosed are a ramp signal generator and an image sensor. The ramp signal generator includes: a comparator comparing a first bias voltage input to a first input terminal and a second bias voltage input to a second input terminal and outputting a ramp signal from an output terminal; a ramp signal adjustment unit including a plurality of switched capacitors made up of switches and capacitors connected in series, and connected in parallel between a first input terminal of the comparator and an output terminal of the comparator; and a controller switching the switches of the plurality of switched capacitors to adjust the ramp signal output from the comparator such that the ramp signal becomes nonlinear over time.

Abstract: A switching-capacitor regulator with a charge injection mode for a high loading current is provided, where the switching-capacitor regulator is used to generate an output voltage at an output node, and the switching-capacitor regulator includes a storage capacitor, a switch module, a current source and a control unit. The switch module is coupled between the storage capacitor, a first supply voltage, a second supply voltage and the output node. The current source is coupled to the output node, and is used for selectively providing a current to the output node. The control unit is coupled to the switch module and the output node, and is used for controlling the switch module to selectively charge or discharge the storage capacitor, and for controlling the current source to selectively provide the current to the output node, to adjust a voltage level of the output voltage.

Abstract: The present disclosure includes systems and methods using truncated ramp signal in switching regulators. In one embodiment, a switching regulator includes a truncated ramp generator to produce a truncated ramp signal comprising a ramp component and a constant component. A comparator receives the truncated ramp signal and a first signal, and in accordance therewith, produces a modulation signal. The first signal is based on an output voltage or an output current, and the first signal intersects the constant component of the truncated ramp signal in response to a change in the output voltage or output current, and in accordance therewith, the first switching transistor changes state.

Abstract: A controller having an on-time controller, an off-time controller, a switch control signal generator, and a jittering signal generator, wherein the jittering signal generator couples jitter into the on-time or the off-time of a primary switch of the power supply. Therefore the EMI performance may be improved.

Abstract: In a PWM signal generation method of a voltage regulator, an output sense signal, a first ramp signal and a second ramp signal are provided. A first time point of the first ramp signal crossing with the output sense signal is used to determine a start point of an ON-time of a PWM signal, and a second time point of the second ramp signal crossing with the output sense signal is used to determine an end point of the ON-time of the PWM signal. Moreover, the first ramp signal is reset to a reference voltage at the first time point and then maintained at the reference voltage, and further ramps down starting from the end point of the ON-time. The second ramp signal ramps up starting from the start point of the ON-time, and then is reset to a preset voltage at the second time point.

Abstract: A soft-start/soft-stop (SS) controller for a voltage regulator. The SS controller includes a power up/down detector configured to perform at least one selected from a group consisting of detecting a power on condition of the voltage regulator to determine a start-up time period and detecting a power off condition of the voltage regulator to determine a shut-down time period, and a ramped reference voltage signal generator configured to perform at least one selected from a group consisting of increasing a voltage level of a ramped reference voltage signal using a pre-determined ramp-up rate during the start-up time period and decreasing the voltage level of the ramped reference voltage signal using a pre-determined ramp-down rate during the shut-down time period, wherein the ramped reference voltage signal is supplied to the voltage regulator for controlling an output voltage level of the voltage regulator.

Abstract: A power converter control circuit includes a ramp signal circuit, a blanking circuit, and a pulse driver circuit. The ramp signal circuit provides a ramp signal in response to a power converter feedback signal and an enable signal. The blanking circuit provides a blanking signal in response to the ramp signal and a clock signal. The blanking signal is provided when both the ramp signal is increasing in value and the enable signal indicates a light load operating condition. The pulse driver circuit provides a power switch control pulse in accordance with the clock signal and in the absence of the blanking signal.