Abstract: A soft-start circuit and a method thereof are described. The circuit includes an amplifier and a voltage ramp generator. The amplifier has a first input end, a second input end, an output end, and a power source control end. The first input end is coupled to a reference voltage. The second input end is coupled to a feedback voltage. The output end outputs an output voltage, and the feedback voltage corresponds to the output voltage. The voltage ramp generator is coupled to the power source control end, and generates a ramp-up voltage. When the ramp-up voltage is lower than a threshold value, the output voltage rises with the ramp-up voltage. When the ramp-up voltage is not lower than the threshold voltage, the output voltage remains at a stable value. A surge current occurring during smooth soft-start or even in operation is thus prevented.

Abstract: Systems and methods source a heating resistor to control temperature. For example, a sensor block assembly (SBA) heater controls the temperature of a MEMS device in a sensor block assembly. An exemplary embodiment generates a root mean square (RMS) pulse width modulation (PWM) control signal based upon an input voltage from a power source, controls a switch in accordance with the RMS PWM control signal; and sources a heater resistor from the power source in accordance with the controlling of the switch. Power to the heating resistor is controlled by the switch to provide a substantially constant value of power to the heating resistor for varying values of the input voltage.

Abstract: The present invention relates to a circuit and method of generating a ramp compensation voltage as might be used in a switching regulator. The ramp compensation voltage comprises: a charging current generating circuit configured to receive a switching signal having a frequency of fs, a duty cycle of D and a period of Ts, the charging current generating circuit generating a charging current in direct proportion to f s ( 1 - D ) ? DTs ; and a voltage generating circuit for generating a quadratic ramp compensation voltage by means of the charging current. The resulting ramp compensation voltage enables the switching regulator to operate over a broad range of duty cycles. The generated ramp compensation voltage has an amplitude as low as possible, the generated compensation slope approximates to the target compensation slope as close as possible, and over compensation at low duty cycles is reduced as far as possible.

Abstract: A photovoltaic (PV) energy system includes a pulsed bus defined by a non-zero average value voltage that is proportional to a rectified utility grid AC supply voltage. The PV energy system also includes a plurality of PV modules, each PV module including a bucking circuit configured to convert a corresponding PV voltage into a pulsing current, wherein the pulsating bus is configured to sum the pulsing currents produced via the plurality of PV modules such that a resultant pulsing current is injected into the pulsating bus in phase with the non-zero average value voltage. A current unfolding circuit is configured to control the amount of AC current injected into the utility grid in response to the resultant pulsing current.

Abstract: A novel method to operate synthetic ripple switching power converters at constant frequency is presented. The method includes the generation of a clock signal and the summing of a ramp signal to a DC voltage reference to be compared to a synthetic ripple signal. The ramp signal is synchronous with the clock signal. A minimum on-time or minimum off-time type of control is implemented. The switching frequency is constant. The presented approach provides significant advantages with respect to the more traditional means of utilizing hysteretic approaches combined with frequency control circuits. The switching frequency can be as high as the one obtained for a hysteretic power converter, the load and line transient response is comparable with or better than the one achieved with hysteretic approaches. The stability is obtained by adapting the slope of the ramp signal in order to obtain the adequate gain of the system.

Abstract: A disclosed switching regulator includes a speed-up circuit for speeding up an operation of an error amplifier circuit during the time starting from when a switching element is turned OFF based on an output of an abnormality detection circuit, or starting from a fixed period of time after the switching element is turned OFF based on the output of the abnormality detection circuit, until the next time the switching element is again turned OFF based on an output of a PWM comparison circuit.

Abstract: A system and method for controlling ripple in an output voltage of a switching regulator is described. In one embodiment, the method includes providing a ramp circuit to selectively charge and discharge a ramp capacitor. The ramp capacitor provides a ramp voltage. The ramp voltage is selectively added to the output voltage to generate a summation voltage. The summation voltage is compared to a reference voltage to generate a control signal. An input voltage is coupled to an LC circuit based on the control signal. The LC circuit provides the output voltage. The input voltage is selectively coupled to the LC circuit when the ramp capacitor is selectively charged.

Abstract: A power supply includes a load connected in series with a switch. The power supply uses the load in series with the switch to maintain a substantially constant voltage. The voltage may be used as a voltage bias and supplied to a controller module that is used to control switching of the switch. The load is operable to maintain a substantially constant voltage at an input terminal of the load and also to function as a current sink. The load may also perform an additional function, such as provide auxiliary lighting or operate as a cooling mechanism for the power supply and/or a lighting system that includes the power supply.

Abstract: A multi-phase DC-DC power converter including a pulse width modulation (PWM) controller and a plurality of output stage circuits is provided. The output stage circuits convert an input voltage into an output voltage. The PWM controller includes a PWM generation module, a ramp generator and a feedback circuit. The feedback circuit generates a trigger signal according to the output voltage and a ramp signal. The PWM generation module generates a PWM signal with a constant on time, and adjusts a duty cycle of the PWM signal according to the trigger signal, the input and output voltages, so as to control phase channels of the multi-phase DC-DC power converter in order.

Abstract: According to one aspect of the teachings herein, a DC-to-DC converter operates according to an advantageous constant on-time topology that reduces output voltage ripple during light load conditions. The converter produces an output voltage by driving high-side and low-side switches in an inductor-based switching circuit, and regulates the output voltage by varying the on-time of a low-side switch, while holding the on-time of the high-side switch constant. Advantageously, the converter shortens the on-time of the high-side switch during light load conditions, which reduces the output voltage ripple. Thus, the converter may be understood as using a first, constant on-time for the high-side switch during “normal” operations and a second, shorter on-time for the high-side switch during light load conditions.

Abstract: A boost-forward-flyback convertor has a boost converting circuit, a forward converting circuit, a flyback converting circuit and a transformer. The boost converting circuit, the forward converting circuit and the flyback converting circuit are coupled by using elements of the boost and forward converting circuits to form the transformer. The boost-forward-flyback convertor combines benefits of conventional boost, forward and flyback convertors, specifically combines active clamping and lower power pressure to the element from the boost convertor, increases gain ratio by using the forward convertor and provides output to the load during a switch OFF-state from the combination of the flyback and boost converting circuit. The boost-forward-flyback convertor combines benefits of conventional boost, forward and flyback convertors and not only has very high gain, high converting efficiency and lower power loading for devices, but also is simple, cost less, easy to use and has a small volume.

Abstract: A controller produces high-side and low-side control signals. The high and low-side signals are used to switch high-side and low-side transistors in the power stage to control the voltage across the power stage output capacitor of the power stage. A boost feedback charge pump receives the low or high-side signal to increase the charge on a charge pump output capacitor. The controller is configured to send Pulse Frequency Modulation (PFM) high and low-side signals that control the voltage on the power stage output capacitor and charge the charge pump output capacitor. The controller is also configured to send boost feedback (BFB) high and low-side signals that charge the boost feedback capacitor, but are designed to not significantly change the charge on the power stage output capacitor.

Abstract: A current-mode control type DC-DC converter includes a switching transistor turned on with a clock signal output in predetermined cycles, an inductor supplied with electric current when the switching transistor is turned on, an error amplifier circuit to output an error voltage that is an amplified difference between a predetermined reference voltage and a divided output voltage of the DC-DC converter, a slope voltage generation circuit to generate a slope voltage by performing slope compensation on an inductor current, a PWM comparator to compare the slope voltage with the error voltage and generate a reset pulse to turn off the switching transistor when the slope voltage reaches the error voltage, and a slope voltage maintenance mechanism to keep the slope voltage at the ground voltage from when the reset pulse is generated to when a subsequent clock signal is generated.

Abstract: An example circuit includes a capacitance circuit coupled between a first node and a second node. A regulator circuit is coupled to the capacitance circuit to regulate a supply voltage across the capacitance circuit with a charge current during a normal operation mode of the circuit. A slew rate control circuit is coupled to the capacitance circuit and the regulator circuit. The slew rate control circuit is coupled to set a slew rate of a change in voltage over change in time between the first and second nodes during a power up mode of the circuit. The slew rate control circuit includes a transistor coupled between the first and second nodes to shunt excess current from the charge current.

Abstract: A method, system and apparatus for controlling a pulse width modulator (PMW) converter for direct AC/AC conversion and/or AC voltage regulation. According to some embodiments of the invention, an output voltage may be provided, independent of the input voltage quality, thereby avoiding or minimizing power company irregularities, brownouts and the like. Embodiments of the present invention may be useful, for example, for use in connection with motors and motored devices or other applications.

Abstract: A power system includes a switch, a capacitor and a comparator circuit. The power system receives a signal to turn off power supplied to the power system, turns off the switch that is used to supply power to the system and discharges the capacitor. The power system also compares a voltage across the discharging capacitor to a threshold voltage value, and turns on the switch to allow power to be supplied to the power system when the compared voltage across the discharging capacitor equals the threshold voltage value.

Abstract: A current balancer suitable for a multi-phase power converting device is provided. The current balancer includes an error detection unit and a plurality of pulse control units. Each of the pulse control units includes a current-to-voltage converter, a charging and discharging controller, a capacitor, and a comparator. The error detection unit detects a plurality of channel currents generated by the multi-phase power converting device, and generates a plurality of error currents by calculating. The charging and discharging controller provides a charging voltage or a discharging voltage according to a constant pulse-width modulation (PWM) signal. When the channel currents are balanced, the comparator generates a PWM signal with a constant duty cycle. When the channel currents are not balanced, an error voltage generated by the current-to-voltage converter is used to adjust a voltage level of the charging voltage or the discharging voltage, so that the PWM signal is varied correspondingly.

Abstract: Various exemplary embodiments relate to a power factor corrector for low loads and a related method. The power factor corrector raises power factor at low loads or high mains voltages by having the a greater amount of current delivered to the load during the falling time of the absolute value of the mains AC voltage than during the applicable rising time. Various embodiments achieve this by increasing the switch-on time of a control switch during the falling time so that the majority of the switch-on time during a mains period occurs during the falling time. This may involve using a timing voltage increasing over a period within each half mains cycle to increase the switch-on time of conversion cycles in the falling time. This may also involve shifting the power conversion in time domain during each half mains cycle so that a majority of the time occurs during the falling time. Various embodiments may employ both methods.

Abstract: A control circuit and method are proposed to generate a control signal to operate a buck-boost power stage of a buck-boost power converter to convert an input voltage to an output voltage. The control circuit and method detect the output voltage to generate an error signal, control the frequency of two ramp signals according to the error signal, generate two pulse width modulation signals according to the error signal and the two ramp signals, and generate the control signal according to the two pulse width modulation signals. When the loading of the buck-boost power converter transits from heavy to light, the frequency of the two ramp signals is decreased to improve the efficiency of the buck-boost power converter. The peaks and valleys of the two ramp signals may be adjusted by signals related to the input voltage and the output voltage.

Abstract: Constant current driving circuit includes a latch, an ON timer, and an OFF timer. The latch outputs a switch control signal according to an ON signal and an OFF signal for controlling a power switch. The power switch is coupled between an input voltage source and an inductor. When the switch control signal controls the power switch to turn on/off, the input voltage source is able/unable to couple to the inductor through the power switch. The inductor provides an output current and an output voltage. The ON timer detects if the output current reaches a peak value for accordingly outputting the OFF signal. The OFF timer outputs the ON signal according to the output voltage and the switch control signal for control the interval of the switch control signal representing “OFF”.

Abstract: A system drives one or a plurality of LEDs, regulating their brightness by controlling the LEDs' average current or voltage. The system includes a switching power converter and an integrated digital regulator with at least one of electrical, thermal, and optical feedbacks. The regulator is constructed as a hysteretic peak current mode controller for continuous mode of operation of the power converter. For a discontinuous mode of operation of the power converter, a pulse averaging sliding mode control is used. Average LED current is measured by integrating LED pulse current at off time and hysteretically adjusting on time of the power switch. An input battery is protected from discharging at abnormally low impedance of the output.

Abstract: A pulse width modulation regulator IC is provided for controlling a duty cycle of at least one switch to convert one input voltage signal into an output voltage. An input pin is provided for receiving an input signal different from the input voltage signal. The input signal has a lasting time substantially the same as the time that input voltage signal situated at a high level, but the waveforms of the two signals are different. The input signal is converted into a square wave signal by a conversion unit, and a PWM signal is generated by a PWM controller according to the square wave signal to control the duty cycle of the switch. Therefore, the input pin can be saved by adjusting an internal or external circuit of the IC for the usage of the different kinds of input signals without increasing the number of input pins of the IC.

Abstract: An electronic device is provided which comprises circuitry for DC-DC conversion configured to switch an inductor current through an inductor using slope compensation, wherein the circuitry comprises a slope compensation stage configured to generate a slope compensation signal as a function of an switching frequency of the DC-DC conversion and an input voltage of the DC-DC converter.

Abstract: In one embodiment, a power supply controller forms a compensation current modulates a value of the feedback signal responsively to a value of a timing control signal used to form a clock signal.

Abstract: A control device for a switching converter, the converter having at least one transistor supplied by an input voltage and adapted to supply a load by means of an output voltage. The converter also including a circuit adapted to turn on and off the at least one transistor. The control device includes an operation circuit adapted to change the state of the at least one transistor from turned on to turned off or vice versa, respectively when the output voltage goes down or goes up by a first voltage of a given value by defining a first state; the operation circuit including a further circuit adapted to generate a ramp signal and to change the first state of the at least one transistor from turned on to turned off or vice versa when the ramp voltage is equal to the output voltage of the converter.

Abstract: A method of providing threshold voltage monitoring and control in synchronous power converters is provided. The method includes establishing a threshold voltage level for at least one of a gate drive voltage for an upper and a lower power switch in a synchronous power converter, each threshold voltage level controlling a switching delay time for one of the upper and lower power switches. The method further includes detecting body diode conduction levels for at least one of the upper and lower power switches and adjusting the threshold voltage level for at least one of the upper and lower power switches, based on the detected body diode conduction levels, to fine-tune a body diode conduction time around an equilibrium for the at least one of the upper and lower power switches.

Abstract: An example circuit includes a regulator circuit coupled to first and second nodes. A capacitance circuit and a slew rate control circuit are coupled between the first and second nodes. The regulator circuit is coupled to charge a capacitance of the capacitance circuit with a charge current. The slew rate control circuit is coupled to control a change in voltage over change in time between the first and second nodes during a power up mode of the circuit. The slew rate control circuit further includes a switch and a resistor. The slew rate control circuit is coupled to switch the switch in response to a voltage between the first and second nodes. A voltage drop across the resistor is limited to a base-emitter voltage drop of a transistor coupled between the first and second nodes to set the change in voltage over change in time.

Abstract: An active centerpoint bus balancing system which actively maintains centerpoint voltage balance of the output capacitors in a power supply having a multi-level voltage output. The centerpoint voltage balance is maintained by a novel control circuit which efficiently transfers charge from one capacitor to the other capacitor so as to maintain the same voltage on each output capacitor. The centerpoint voltage balance minimizes the effect of loading conditions. It operates even with no load, and allows severe load unbalance on the two output capacitors without creating voltage unbalance.

Abstract: A voltage booster system of a charge pump type includes a regulator for outputting a constant voltage and a charge pump circuit for boosting a voltage of an output terminal of the regulator. The regulator includes a differential amplifier unit for inputting a reference voltage and a feedback voltage according to the voltage of the output terminal, and an output stage portion including an PN connection element having one end portion connected to an application terminal of a power source voltage and another end portion connected to the output terminal. The PN connection element is configured to be controlled according to an output signal of the differential amplifier unit. The charge pump circuit includes a first capacitor to which the voltage of the output terminal is applied to be charged; a second capacitor; a third capacitor; a first switching section; and a second switching section.

Abstract: A converter controller is disclosed. In one embodiment, a controller for a flyback converter includes a converter and a flyback controller. The converter is coupled to the flyback converter for receiving an auxiliary voltage and for generating a constant power voltage. The flyback controller is powered by the constant power voltage for controlling an output voltage of the flyback converter. Furthermore, the flyback converter comprises a transformer with a primary side and a secondary side. The output voltage and the auxiliary voltage are produced at the transformer.

Abstract: Preferred embodiments of the present invention provide systems and methods that automatically correct the desired on-time of switching elements as the resonant frequency changes, so as to maintain the correct proportional value.

Abstract: A voltage regulator has a switch configured to alternately couple and decouple a voltage source through an inductor to a load, feedback circuitry to generate a feedback current, a current sensor configured to measure the feedback current, and a controller configured to receive the feedback current measurement from the current sensor and, in response thereto, to control a duty cycle of the switch. The feedback circuitry includes an amplifier having a first input configured to receive a desired voltage, a second input, and an output, a capacitor connecting the second input to the output of the amplifier, and a resistor connecting the output of the amplifier and the output terminal such that a feedback current proportional to a difference between the desired voltage and an output voltage at an output terminal flows through the resistor.

Abstract: DC-DC voltage converter structures and methods are provided that employ first and second transistors which are switched to control currents through an inductor and a capacitor to thereby provide an output voltage substantially equal to a predetermined reference voltage. Preferably included is a voltage feedback loop in which an error voltage is fed back to a loop comparator and further included is a current feedback loop that provides to the comparator a first voltage ramp whose amplitude is proportional to the amplitude of the converter's input current. The output signal of the comparator sets the duty cycles of the first and second transistors. In each converter period, the first and second transistors of the voltage converter respectively control, through the inductor, a first current with a rising slope and a second current with a falling slope. Finally, converter stability is enhanced by providing a second voltage ramp having a slope related to a fraction (e.g.

Abstract: A pulse width modulation (PWM) DC operating point of a voltage regulator is configured to be relatively independent of an input voltage and an output voltage of the regulator. A drive transistor of the regulator is periodically switched ON to couple the input voltage to an output capacitor to generate the output voltage. A ramp signal is generated by dividing a signal generated from the input voltage with another signal generated from the output voltage and using the resulting signal to charge a capacitor. The ramp signal is compared to an error voltage indicative of a level of the output voltage to determine when to switch OFF the drive transistor.

Abstract: An output regulation circuit of a power converter without current sensing loss includes a transforming circuit to receive a proportional voltage from the primary winding of the power converter during the on-time period of the power switch. The first proportional voltage is transformed to a charging current signal to charge an energy storage device. Thus, the circuit controls the power switch according to a voltage limited signal of the energy storage device.

Abstract: A system and method of improving the power efficiency of a receiver for low duty cycle applications. In one aspect, the receiver includes a low noise amplifier (LNA) that is capable of being enabled in a relatively quick fashion so as to amplify an incoming signal when needed, and then being disabled to set the LNA in a low power consumption mode. In particular, the LNA includes a pair of complimentary devices, and an enable circuit adapted to quickly cause the complimentary devices to conduct substantially the same current. In another aspect, a bias voltage generating apparatus is provided that uses a residual voltage from a prior operation to establish the current bias voltage for the LNA. In particular, the apparatus includes a controller adapted to tune an adjustable capacitor to a capacitance based on a residual voltage applied to a fixed capacitor, and couple the capacitors together to establish the bias voltage.

Abstract: A control device for a power factor correction device in forced switching power supplies is disclosed; the device for correcting the power factor comprises a converter and said control device is coupled with the converter to obtain from an input alternating line voltage a regulated output voltage. The converter comprises a power transistor and the control device comprises a driving circuit of said power transistor; the driving circuit comprises a timer suitable for setting the switch-off period of said power transistor. The timer is coupled with the alternating line voltage in input to the converter and is suitable for determining the switch-off period of the power transistor in function of the value of the alternating line voltage in input to the converter.

Abstract: A class DH amplifier is provided. The amplifier is generally comprised of a tracking power supply, a class D amplifier section, and a carrier generator. The tracking power supply receives a supply voltage and an analog input signal, and the tracking power supply provides an input for the carrier generator. Based on its input from the tracking power supply, the carrier generator can output a positive ramp signal and a negative ramp signal to the class D amplifier section. The class D amplifier section can generate an output signal base on the analog input signal and the ramp signals from the carrier generator.

Abstract: Systems and devices for ripple reduction in a DC/DC converter are presented. The disclosed systems and methods enable ripple reduction in discontinuous conduction mode (DCM) operation. In DCM, the inductor current peak to peak ripple may be reduced based on the load current. To achieve the reduction of the inductor peak to peak current ripple, a digital counter is used to count the time between consecutive PWM pulses. The digital output of the counter is used to control the pulse width modulation. As the digital output of the counter increases, the PWM on-time decreases. Since the PWM pulse is demanded by the load in DCM mode, the peak to peak inductor ripple is modulated by the counter, or, in turn, modulated by the load current.

Abstract: A voltage regulator generates a regulated output voltage responsive to an input voltage and drive control signals. An error amplifier generates an error voltage signal responsive to the regulated output voltage and a reference voltage. A PWM modulator generates a PWM control signal responsive to the error voltage signal, a ramp voltage and an inverse of the reference voltage. Control circuitry within the PWM modulator maintains the error voltage signal applied to the PWM modulator at substantially a same DC voltage level over the reference voltage operating range and maintains the error voltage signal above a minimum value of the ramp voltage. Driver circuitry generates the drive control signals responsive to the PWM control signal.

Abstract: A circuit may generate a clock signal with a variable period given by a ratio between an initial switching period and a number of phase circuits through which a current of a multi-phase PWM voltage converter flows. The circuit may include an adjustable current generator driven by a signal representing the number of phase circuits through which the current flows and configured to generate a current proportional to the number of phase circuits through which the current flows, and a tank capacitor charged by the adjustable current generator. The circuit may include a comparator of a voltage on the tank capacitor with a threshold value configured to generate a pulse of the clock signal when the threshold value is attained, and a discharge path of the tank capacitor, the discharge path being enabled during the pulses of the clock signal.

Abstract: A voltage converter device includes a voltage regulator having a supply terminal for receiving a supply voltage and an output terminal for providing a regulated voltage. A voltage multiplier is for receiving the regulated voltage and providing a boosted voltage higher in absolute value than the regulated voltage. The voltage multiplier includes circuitry for providing a clock signal that switches periodically between the regulated voltage and a reference voltage, and a sequence of capacitive stages that alternately accumulate and transfer electric charge according to the clock signal for generating the boosted voltage from the regulated voltage. The voltage regulator includes a power transistor and a regulation transistor each having a first conduction terminal, a second conduction terminal and a control terminal.

Abstract: The present invention discloses a voltage mode switching regulator with improved light load efficiency and mode transition characteristic, and a control circuit and a control method therefor. The switching regulator can switch between a pulse width modulation (PWM) mode and a pulse skipping mode. The control method for the switching regulator comprises: comparing a feedback signal relating to an output voltage with a reference signal, to generate an error amplification signal; generating a duty signal according to the error amplification signal and a ramp signal, to control the switching regulator; setting a threshold level of the error amplification signal and a threshold level of the pulse skipping mode according to the error amplification signal in a stable status; and when the error amplification signal is close or equal to the threshold level of the pulse skipping mode, generating a pulse skip signal to enter the pulse skipping mode.

Abstract: A switching regulator comprises a sensing module for sensing an input current of the switching regulator to generate a sensing current, a switch module for determining whether an input end is electrically connected to an output end, a first comparator for comparing a feedback signal and a reference voltage to generate a first comparison result, a compensation module for providing a compensation signal, a sawtooth wave generator for generating a sawtooth wave signal according to the sensing current, a second comparator for comparing the sawtooth wave signal and the compensation signal to generate a second comparison result, a third comparator for comparing the sawtooth wave signal and the first comparison result to generate a third comparison result, and a logic module for generating a switching signal according to the second and the third comparison results.

Abstract: A circuit for regulating the level at a power converter output is disclosed. An example circuit includes an input for receiving a feedback signal. The feedback signal has a first feedback state that represents a level that is above a threshold level and a second feedback state that represents a level that is below the threshold level. An oscillator is included that provides an oscillation signal that cycles between two states. A switch having a first terminal, a second terminal and a control terminal are also included. The switch is operable to couple or decouple the first terminal and the second terminal in response to a control signal received at the control terminal. The control signal is responsive to the oscillation signal and to the first and second feedback states.

Abstract: A method for soft-starting a voltage generator includes disabling an output driver; detecting the voltage on an output node; ramping a reference voltage at a controlled rate from a predetermined first level until the reference voltage reaches a second level that is a predetermined function of said output node voltage; enabling the output driver when the reference voltage reaches said second level; and then ramping the reference voltage and the output node voltage at a controlled rate to a boot voltage level. A soft-start circuit for an output voltage generator includes a comparator for causing a ramp generator to ramp the reference voltage and the voltage on the output node to a boot voltage level at a controlled rate once the comparator detects that the reference voltage is substantially equal to the voltage on the output node.

Abstract: A converter (10) for converting a first DC voltage (VDD) to a second DC voltage (VOUT) includes an output stage (40) for producing the second DC voltage (VOUT) in response to both the first DC voltage (VDD) and an output of an error amplifier (20). A sampling circuit (15) periodically energizes a voltage divider (R0,R1) by periodically coupling a first terminal thereof to the second DC voltage and periodically coupling an output (14) of the energized voltage divider to a feedback conductor (7) to refresh a feed back capacitor (C0) coupled between the second DC voltage and the feedback conductor. The feedback conductor is coupled to an input of the error amplifier.

Abstract: A DC-DC converter circuit includes a boosting circuit having at least part of a DC-DC converter; a control signal circuit that controls the boosting circuit; and a power supply unit being electrically connected to both of the boosting circuit and the control signal circuit and supplying at least the control signal circuit with electric power. The DC-DC converter includes a plurality of capacitors and switching units enabling each of the plurality of capacitors to be electrically independent, and the control signal circuit transmits a signal to the switching units when the DC-DC converter is not operating in intermittent operation thereof, the signal indicating each of the plurality of capacitors being made to be electrically independent.

Abstract: Voltage regulator structures and methods embodiments are provided which employ a high-side N-type switching transistor to thereby enhance system efficiency and also reduce the die area required by these regulator structures. This structure and its advantages, however, require a gate drive signal higher than the input voltage of the voltage regulator. The embodiments resolve this need with a bias capacitor in a bootstrapped arrangement and a control loop arranged to maintain a bias voltage across the capacitor sufficient to always insure rapid switching of the high-side switching transistor during a pulse-width modulation (PWM) operational mode. The embodiments further include a second control loop arranged to insure sufficient voltage across the capacitor during a pulse-frequency modulation (PFM) operational mode.

Abstract: Embodiments for at least one method and apparatus of generating a regulated voltage are disclosed. One method includes generating the regulated voltage though controlled closing and opening of a series switch element and shunt switch element, the series switch element being connected between a first voltage supply and a common node, and the shunt switch being connected between the common node and a second supply voltage. The series switch element includes an NMOS series switching transistor stacked with an NMOS series protection transistor, and closing the series switch element during a first period includes applying a switching gate voltage to a gate of the NMOS series switch transistor of the series switch element, wherein the switching gate voltage has a voltage potential of at least a threshold voltage greater than a voltage potential of the common node.