With Additional Stage Patents (Class 323/314)
  • Patent number: 6509726
    Abstract: A bandgap reference circuit includes at least one transistor, an amplifier and a start-up circuit. The amplifier is coupled to the transistor(s) to establish a bandgap reference voltage. The start-up circuit, in response to the bandgap reference circuit powering up, isolates an output terminal of the amplifier from at least one input terminal of the amplifier and supplies power to the transistor(s) via the output terminal.
    Type: Grant
    Filed: July 30, 2001
    Date of Patent: January 21, 2003
    Assignee: Intel Corporation
    Inventor: Jeongjin Roh
  • Patent number: 6507180
    Abstract: A bandgap reference (BGR) circuit of the present invention includes a first serial circuit made up of a first diode, a first transistor, and a first resistor. A second serial circuit includes a second diode having a greater current feed area than the first diode, a second transistor, and a second resistor. An amplifier amplifies a difference between the voltage drop of the first resistor and that of the second resistor. A third serial circuit includes a third transistor control led by the output of the amplifier, a third resistor and a fourth resistor, and a third diode. Opposite ends of the fourth resistor are respectively connected to the gate of the first transistor and the gate of the second transistor. A reference voltage appears on opposite ends of the portion of the third serial circuit including the third resistor, fourth resistor, and third diode.
    Type: Grant
    Filed: November 6, 2001
    Date of Patent: January 14, 2003
    Assignee: NEC Corporation
    Inventor: Yoshiki Eguchi
  • Patent number: 6504353
    Abstract: A drive power supply method for a semiconductor device is provided. The semiconductor device has an internal supply voltage generating circuit. First and second internal circuits are connected to the internal supply voltage generating circuit. Drive power is supplied to the first and second internal circuits from the internal supply voltage generating circuit. The second internal circuit operates in standby mode, power-down mode and active mode, so that the internal supply voltage is stably retained in the standby mode or power-down mode, and the consumed current is reduced.
    Type: Grant
    Filed: January 30, 2001
    Date of Patent: January 7, 2003
    Assignee: Fujitsu Limited
    Inventors: Isamu Kobayashi, Yoshiharu Kato
  • Patent number: 6465996
    Abstract: A constant voltage circuit robust to the input voltage lowering is disclosed. The invention is applied to a constant voltage circuit fed with an input voltage through first and second power conductors for transferring the input voltage to a load as an output voltage through an output transistor. An inventive constant voltage circuit is provided with a substitute circuit, responsive to a detection of the lowing of the input voltage to a predetermined voltage, for providing a substitute output path that is connected in parallel with the output transistor. Doing this minimize the degree of lowering of the second voltage due to the lowering of said first voltage. The output transistor may be nay of NPN and PNP transistors and P-type and N-type MOS FETs.
    Type: Grant
    Filed: March 6, 2001
    Date of Patent: October 15, 2002
    Assignee: Denso Corporation
    Inventors: Junichi Nagata, Kiyoshi Yamamoto, Hirokazu Itakura, Masahiro Kitagawa, Hiroyuki Ban, Hiroyuki Kawabata, Shinichi Maeda
  • Patent number: 6441593
    Abstract: An apparatus comprising a first device and a second device. The first device may be connected to a first supply voltage. The second device may be connected (i) in series with the first device and (ii) to a second supply voltage. The first device is generally biased to provide enhanced noise suppression performance. The second device is generally configured to switch between the first and second supply voltages.
    Type: Grant
    Filed: December 14, 2000
    Date of Patent: August 27, 2002
    Assignee: Cypress Semiconductor Corp.
    Inventor: Satish C. Saripella
  • Patent number: 6441687
    Abstract: A novel bias voltage generating circuit and method are disclosed. In one embodiment, the bias voltage generating circuit includes a first transistor with a base terminal coupled to the output node and an emitter terminal coupled to ground. The circuit also includes a resistor with a first terminal coupled to a supply voltage node and a second terminal coupled to a collector terminal of the first transistor. A second transistor has an emitter terminal coupled to the collector terminal of the first transistor and a base terminal connected to the collector terminal of the second transistor. A second resistance has a first terminal coupled to the supply voltage node and a second terminal coupled to a collector terminal of the second transistor. A third transistor has a base terminal coupled to the base terminal of the second transistor, a collector terminal coupled to the supply voltage node, and an emitter terminal coupled to the output node.
    Type: Grant
    Filed: August 29, 2000
    Date of Patent: August 27, 2002
    Assignee: TriQuint Semiconductor, Inc.
    Inventor: Thomas R. Apel
  • Patent number: 6433528
    Abstract: A high-impedance current source 100 having an enhanced compliance voltage. The current source 100 preferably has a means for generating a biasing current 105 and a first current mirror stage having a first transistor M6 coupled to a second transistor M1. A second current mirror stage having a third transistor M2 coupled to a fourth transistor M5 acts as a feedback circuit. A stabilization circuit having a fifth transistor M3 coupled to a sixth transistor M4 are also included. The stabilization circuit is coupled between the first and second current mirror stages and an output circuit having a seventh transistor M7 is connected to the stabilization circuit between the first and second current mirror stages. The current mirror circuit has a low compliance voltage, enhanced operating characteristics and enhanced dynamics which eliminate the need for OTAs.
    Type: Grant
    Filed: December 20, 2000
    Date of Patent: August 13, 2002
    Assignee: Texas Instruments Incorporated
    Inventors: Andrea Bonelli, Francois V. E. Bauduin
  • Publication number: 20020105313
    Abstract: A driver circuit drives a power element connected to an inductive load. The driver circuit includes an input terminal coupled to a control terminal of the power element through a trigger block, and a voltage regulator block having a circuit node coupled to a first supply voltage reference, as well as to a second supply voltage reference through a capacitor. A voltage comparator stage includes an operational amplifier having an inverting input connected to the circuit node and a non-inverting input is connected directly to a terminal of the power element, such as to the emitter terminal thereof. The operational amplifier also includes an output connected to the control terminal of the power element.
    Type: Application
    Filed: December 26, 2001
    Publication date: August 8, 2002
    Applicant: STMicroelectronics S.r.l.
    Inventor: Antonino Torres
  • Publication number: 20020093325
    Abstract: A bandgap reference circuit that may use reduced substrate area compared to prior art bandgap reference circuits, while requiring relatively low voltage. The circuit may include a bipolar transistor with a resistor electrically connected across the emitter-base of the bipolar transistor. The resistor sums a first current with a second current and also generates a fractional VEB. The bandgap reference circuit may have a first current proportional to VEB, and a second current proportional to a PTAT current. An impedance booster may be incorporated into the circuit. Also disclosed is a method of regulating a voltage level using embodiments of the bandgap reference circuit.
    Type: Application
    Filed: November 8, 2001
    Publication date: July 18, 2002
    Inventor: Peicheng Ju
  • Publication number: 20020093324
    Abstract: A low temperature coefficient reference current generator has a bandgap reference voltage generator for providing a low temperature coefficient bandgap reference voltage and a positive temperature coefficient current. The low temperature coefficient reference current generator utilizes the low temperature coefficient bandgap reference voltage to drive a positive temperature coefficient resistor disposed in an IC, so as to produce a negative temperature coefficient current. The positive temperature coefficient current and the negative temperature coefficient current are adjusted and combined to produce a low temperature coefficient reference current.
    Type: Application
    Filed: January 18, 2001
    Publication date: July 18, 2002
    Inventor: Dar-Chang Juang
  • Patent number: 6414472
    Abstract: A switching regulator circuit produces a varying reference voltage with temperature and includes at least one band-gap generator for supplying a power stage through an error amplifier and a comparator. The error amplifier is also supplied a regulated voltage which may be produced by the regulator itself. The at least one band-gap generator includes a plurality of band-gap generators being supplied by the regulated voltage and input a fraction of the regulated voltage through a voltage divider. The respective outputs of the band-gap generators are connected to a logic network which has an output connected to the power stage. The error amplifier and comparator may be included within each respective band-gap generator.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: July 2, 2002
    Assignee: STMicroelectronics S.R.L.
    Inventor: Franco Cocetta
  • Patent number: 6407538
    Abstract: A voltage down converter includes a first voltage down converting circuit and a second voltage down converting circuit. The first voltage down converting circuit supplies an internal power supply voltage VCCS1 to an internal circuit only during a period T when the internal power supply voltage VCCS1 falls below a predetermined voltage according to a signal DCE. In the first voltage down converting circuit, P channel MOS transistors are selectively activated according to the levels of the plurality of voltages, and a voltage down converting partial circuit supplies a current of an amount corresponding to the level of the external power supply voltage VCC to a power supply node. As a result, even during the period T, the internal power supply voltage can be maintained at a level of the reference voltage.
    Type: Grant
    Filed: February 27, 2001
    Date of Patent: June 18, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Mitsuya Kinoshita, Fukashi Morishita
  • Patent number: 6407638
    Abstract: The low temperature-corrected constant voltage generator device includes a reference voltage generator, an amplifier connected between the reference voltage generator and an output terminal and a voltage divider connected to an input of the amplifier in order to supply a feedback voltage to the amplifier. The divider includes at least one first resistor in series with an element having, at least in the low temperature range, an impedance with a temperature dependence behavior different from that of the first resistor, to supply a lower feedback in the low temperature range.
    Type: Grant
    Filed: October 31, 2000
    Date of Patent: June 18, 2002
    Assignee: STMicroelectronics S.A.
    Inventor: Paolo Migliavacca
  • Patent number: 6392472
    Abstract: A voltage generation circuit includes a digital type VDC. The digital VDC includes a differential amplify circuit amplifying a voltage deviation of a reference voltage signal from a detection voltage signal to output the amplified voltage to a control node, a signal conversion circuit providing either an H level or an L level according to the voltage level of the control node, and an output transistor connecting an external power supply line and an internal power supply voltage node according to an output voltage of the signal conversion circuit. The center of the range of the varying voltage level of the control node is set by shifting to the logic threshold value of the signal conversion circuit.
    Type: Grant
    Filed: September 18, 2001
    Date of Patent: May 21, 2002
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Mako Kobayashi, Fukashi Morishita
  • Patent number: 6384585
    Abstract: The present invention refers to a current generator able to provide in alternative to a first terminal a first current and a second current in response to a control signal. Particularly it refers to a current generator usable for the adaptive biasing of modulators of the sigma-delta type. In an embodiment the current generator is able to provide in alternative to a first terminal (70) a first current and a second current in response to a control signal (CK), characterized by comprising: a first current generator (40) able to provide said first current; a second current generator (41) able to provide said second current; commutation means (46) able to connect in alternative to said first terminal (70) said first current and said second current in response to said control signal (CK).
    Type: Grant
    Filed: May 11, 2001
    Date of Patent: May 7, 2002
    Assignee: STMicroelectronics, S.R.L.
    Inventors: Paolo Cusinato, Andrea Baschirotto, Vittorio Colonna, Gabriele Gandolfi
  • Patent number: 6380723
    Abstract: A single cell voltage reference operates under low power supply requirements to provide a configurable voltage reference. The single cell voltage reference includes a diode device that is biased as a voltage source. Two series connected resistive devices are connected in parallel with the diode device. The diode is biased with a current that is proportional to delta Vbe/R, such that the impedance of the diode tracks R. Another current source that is also proportional to delta Vbe/R is provided at the junction of the two resistors such that the voltage across one of the two resistors may be employed as a reference voltage that is less than 1.2V. The ratio of the resistors and scales the reference voltage level. Voltages that are below 1.2V are provided that are temperature compensated similar to a band-gap reference. The diode voltage as driven by a current source determines the lower limit of the reference voltage.
    Type: Grant
    Filed: March 23, 2001
    Date of Patent: April 30, 2002
    Assignee: National Semiconductor Corporation
    Inventor: Don R. Sauer
  • Patent number: 6362688
    Abstract: A system and method of biasing a telescopic cascode operational transconductance amplifier is provided to prevent or reduce the likelihood that the inputs to the amplifier do exceed the input common mode voltage range for the amplifier. The system and method provides a bias control circuit for the differential input transistors and tail current transistor of the operational amplifier such that their respective Vds−Vdsat is maintained substantially constant. To accomplish this, the biasing system and method uses a bandgap voltage source that typically produces a highly stable voltage that is substantially temperature and process invariant. The bandgap voltage source is used to generate bias voltages applied to the gates and drains of the differential input transistors that maintains their and the tail current transistor's Vds−Vdsat substantially constant. There are several advantages of the system and method for biasing a telescopic cascode OTA.
    Type: Grant
    Filed: April 26, 2000
    Date of Patent: March 26, 2002
    Assignee: Maxim Integrated Products, Inc.
    Inventor: Stephen Au
  • Patent number: 6362612
    Abstract: An improved bandgap voltage reference circuit for providing a stable reference output voltage, useful in circuits associated with power supply voltage operations as low as approximately 1.3 Volts. The &Dgr;VBE generator is comprised of a pair of bipolar transistors operating at different current densities. Resistors in series with the transistors, in conjunction with an operational amplifier and current sources, produce a larger Voltage drop proportional to the &Dgr;VBE of the transistors. Output from the operational amplifier is connected to the base of a third bipolar transistor. The third bipolar transistor is provided as the bandgap voltage output device.
    Type: Grant
    Filed: January 23, 2001
    Date of Patent: March 26, 2002
    Inventor: Larry L. Harris
  • Patent number: 6362613
    Abstract: An integrated circuit (200, 300, 500) includes a current mirror having high output impedance and also having an output device with a low drain-to-source saturation voltage.
    Type: Grant
    Filed: November 13, 2000
    Date of Patent: March 26, 2002
    Assignee: Gain Technology Corporation
    Inventor: David Rodriguez
  • Patent number: 6359516
    Abstract: A high-frequency amplifier circuit includes an amplifying transistor and a bias circuit coupled to the amplifying transistor. The bias circuit includes a first bias subcircuit for controlling a quiescent current in the amplifying transistor and a second bias subcircuit for independently controlling a bias impedance of the amplifying transistor. Using this configuration, it is possible to set the gain and class of operation of the amplifying transistor, while independently controlling the bias impedance of the amplifying transistor to obtain improved linearity and tuning capability as well as increased efficiency.
    Type: Grant
    Filed: July 21, 2000
    Date of Patent: March 19, 2002
    Assignee: Philips Electronics North America Corporation
    Inventors: Sifen Luo, Tirdad Sowlati
  • Patent number: 6356064
    Abstract: A band-gap reference circuit generates and supplies a predetermined stable voltage (VREF). The band-gap reference circuit is comprised of three major circuits: a start-up circuit, which is comprised of a start-up transistor that is smaller than each of those in a band-gap circuit which generates a predetermined stable voltage and which outputs a start signal; a signal level converter, which converts said start signal to a second start signal that is supplied to said start-up transistor; and the band-gap circuit. The start-up transistor has a threshold voltage with its absolute value being smaller than each of those of the threshold voltages of transistors in said band-gap circuit. Moreover, the start-up transistor is (1/n) the channel length of said reference-voltage generation transistor and (1/n) the channel width of said reference-voltage generation transistor, where said n denotes a certain positive number larger than 1.
    Type: Grant
    Filed: November 17, 2000
    Date of Patent: March 12, 2002
    Assignee: NEC Corporation
    Inventor: Yasuhiro Tonda
  • Patent number: 6340918
    Abstract: An amplifier circuit comprises a first amplifier stage controlling a second gain stage which is coupled between a voltage input node and an output node. A frequency compensating circuit is coupled between a compensating circuit node of the gain stage and a control input of the gain stage. The gain stage comprises first and second output devices arranged such that for a given gate voltage, the output current from the first device is greater than the output current from the second device. The output devices have a common source coupled to the input node and a common gate coupled to the first amplifier stage. The drain of the first output device is coupled to the output node and the drain of the second output device is coupled to the compensating circuit node with a resistance device connected between the two drains.
    Type: Grant
    Filed: November 30, 2000
    Date of Patent: January 22, 2002
    Assignee: Zetex PLC
    Inventor: Craig Taylor
  • Patent number: 6340882
    Abstract: An accurate current source with an adjustable temperature dependence. This type of current source is used in silicon Integrated Circuit (IC) designs requiring supporting reference-voltage sources and/or reference-current sources which may be designed with or without temperature dependence. The circuit generates an accurate current with temperature independence along with another accurate current source with temperature dependence using only one precision external resistors. For the temperature-dependent current source, the temperature dependence can be controlled by setting a temperature dependence factor (TDF).
    Type: Grant
    Filed: October 3, 2000
    Date of Patent: January 22, 2002
    Assignee: International Business Machines Corporation
    Inventors: Paul W. Chung, John T. Contreras
  • Patent number: 6337595
    Abstract: A low-voltage, low-power DC voltage generator system is provided having two negative voltage pump circuits for generating voltages for operating negative wordline and substrate bias charge pump circuits, a reference generator for generating a reference voltage, and a two-stage cascaded positive pump system having a first stage pump circuit and a second stage pump circuit. The first stage converts a supply voltage to a higher voltage level, e.g., one volt to 1.5 volts, to be used for I/O drivers, and the second stage converts the output voltage from the first stage to a higher voltage level, e.g., from 1.5 volts to about 2.5 volts, for operating a boost wordline charge pump circuit. The DC voltage generator system further includes a micro pump circuit for providing a voltage level which is greater than one-volt to be used as reference voltages, even when an operating voltage of the DC voltage generator system is at or near one-volt.
    Type: Grant
    Filed: July 28, 2000
    Date of Patent: January 8, 2002
    Assignee: International Business Machines Corporation
    Inventors: Louis L. Hsu, Rajiv V. Joshi, Russell J. Houghton, Wayne F. Ellis, Jeffrey H. Dreibelbis
  • Patent number: 6329804
    Abstract: A method and apparatus for trimming the level and slope in a voltage reference using current-switching DACs to inject small correction currents into or draw currents from the voltage reference circuit. Each DAC is controlled via a programmable non-volatile memory, which can be programmed after final packaging. Thus, the present technique enables trimming the voltage reference circuit after the circuit has been packaged. For the slope trim, the current is injected into or drawn from one side or the other of the band-gap core cell. The level trim DAC sources a correction current into or sinks a correction current from the resistor chain that sets the voltage level at the base of the transistors in the band-gap core. The level and slope trim DACs generate currents that are precise multiples of the currents through the resistors being trimmed. Thus the corrections are invariant with process and temperature, the necessary trim range is minimized, and the shape of the remaining error (curvature) is not altered.
    Type: Grant
    Filed: October 13, 1999
    Date of Patent: December 11, 2001
    Assignee: National Semiconductor Corporation
    Inventor: Mark J. Mercer
  • Patent number: 6297678
    Abstract: An electronic system, precharge circuit, and method for precharging system net. The system includes a plurality of devices. Each of the devices includes at least one I/O pin driven by an driver circuit. The system further includes a system net connected to at least one of the I/O pins of each of the plurality of devices. A precharge circuit suitable for connecting to the system net is provided. The precharge circuit includes a sense stage and a charging stage. The sense stage is configured to receive the system net voltage as an input and adapted to sense a system net voltage transition. The charging stage is connected to the system net and configured to receive an output of the sense stage. The sense stage is configured to activate the charging stage in response to detecting a system net voltage transition. The charging stage, upon activation, is configured to provide a current path between a supply voltage and the system net for a specified duration.
    Type: Grant
    Filed: October 28, 1999
    Date of Patent: October 2, 2001
    Assignee: International Business Machines Corporation
    Inventor: Ghadir Robert Gholami
  • Patent number: 6297624
    Abstract: An internal power supply circuit produces an internal power supply voltage from an external power supply voltage. A voltage level control circuit controls a voltage level and a temperature characteristic of the internal power supply voltage generated by the internal power supply circuit. The internal power supply circuit produces the internal power supply voltage having a negative or zero temperature characteristic in a low temperature region and a positive temperature characteristic in a high temperature region. The voltage level control circuit includes a structure optimizing a capacitance value of a sense power supply line stabilizing capacitance for driving a sense amplifier circuit, a level converting circuit determining the lowest operable region of the external power supply voltage of the internal power supply circuit, or a structure forcedly operating the internal voltage down converter upon power-on.
    Type: Grant
    Filed: February 26, 1999
    Date of Patent: October 2, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Katsuyoshi Mitsui, Kiyohiro Furutani, Takashi Kono
  • Patent number: 6294902
    Abstract: A bandgap reference circuit provides an output reference voltage that is generally insensitive to fluctuations in supply voltage, ambient temperature, and output load current. A current regulator establishes an output whose variations are reduced, preferably logarithmically, relative to variations in a supply voltage. A bandgap generator fed by the output current provides an output reference voltage with similarly suppressed variations. A control amplifier biases the bandgap generator to provide a high level common-mode rejection of various error sources.
    Type: Grant
    Filed: August 11, 2000
    Date of Patent: September 25, 2001
    Assignee: Analog Devices, Inc.
    Inventors: Carl W. Moreland, Marvin J. Young
  • Publication number: 20010020842
    Abstract: Briefly, in accordance with one embodiment of the invention, an integrated circuit includes: a voltage regulator, the voltage regulator having the capability to both sink and source current while maintaining a substantially predetermined voltage level.
    Type: Application
    Filed: January 28, 1999
    Publication date: September 13, 2001
    Inventor: MITCHEL BECK
  • Patent number: 6288526
    Abstract: A voltage regulator circuit in an integrated circuit (IC) device such as a Complex Programmable Logic Device (CPLD) comprises a reference voltage generator, a tuning circuit, and an output driver circuit. The reference voltage generator converts an external supply voltage provided to the IC device into a stable reference voltage. The tuning circuit converts the stable reference voltage into a desired internal supply voltage, such as the reduced voltage required by deep sub-micron transistors. The output driver circuit provides the desired internal supply voltage with sufficient current to properly power the circuits of the IC device. The tuning circuit includes an op-amp and resistive elements configured in a voltage divider configuration in the negative feedback loop of the op-amp. The output of the op-amp can be set to the desired internal supply voltage by properly sizing the resistive elements.
    Type: Grant
    Filed: May 30, 2000
    Date of Patent: September 11, 2001
    Assignee: Xilinx, Inc.
    Inventor: Robert A. Olah
  • Patent number: 6285245
    Abstract: A constant voltage generating circuit, with a negative temperature coefficient, is able to generate a stable voltage despite variations in the power supply voltage. The constant voltage generating circuit comprises a reference current source circuit 10B, a diode DX, an amplifier circuit AMP that amplifies the voltage across diode DX and outputs voltage VCS, and current control circuit 20 that controls the current flowing into node N1. Current control circuit 20 comprises transistors QB1 and QB2, which form a current-mirror constant-current source, and a diode QB3 which has the same characteristics as said diode DX. The current control circuit sinks current from node N1 to transistor QB1 and maintains the temperature coefficient of voltage VCS at a negative value. Reference current source circuit 10B is not affected by the change in the power supply voltage VCC and is able to supply a constant current to node N1.
    Type: Grant
    Filed: October 12, 1999
    Date of Patent: September 4, 2001
    Assignee: Texas Instruments Incorporated
    Inventor: Hiroshi Watanabe
  • Patent number: 6285244
    Abstract: A cross-coupled bandgap circuit (10, 30) generates a stable voltage reference (Vref) at an output port (12, 32). The circuit comprises a cross-coupled current source (14, 34) coupled to a Wilson current mirror (16,36) mirroring a first current through the current source (14,34) to a current sink (18, 38), and also to a voltage generator generating the stable voltage reference. The circuit may be implemented in bi-polar, Bi-CMOS or CMOS circuitry, and is very stable across varying temperatures, varying and noisy operating voltages, between low and high operating voltages, and is stable at low operating currents.
    Type: Grant
    Filed: October 2, 1999
    Date of Patent: September 4, 2001
    Assignee: Texas Instruments Incorporated
    Inventor: Daniel E. Goldberg
  • Publication number: 20010010459
    Abstract: A drive power supply method for a semiconductor device is provided. The semiconductor device has an internal supply voltage generating circuit. First and second internal circuits are connected to the internal supply voltage generating circuit. Drive power is supplied to the first and second internal circuits from the internal supply voltage generating circuit. The second internal circuit operates in standby mode, power-down mode and active mode, so that the internal supply voltage is stably retained in the standby mode or power-down mode, and the consumed current is reduced.
    Type: Application
    Filed: January 30, 2001
    Publication date: August 2, 2001
    Applicant: FUJITSU LIMITED
    Inventors: Isamu Kobayashi, Yoshiharu Kato
  • Patent number: 6265858
    Abstract: A voltage adjusting circuit includes a half VCC generator that generates a first voltage of a half VCC level or the like in accordance with a precharge input signal, and voltage compensator coupled respectively to output terminals of the half VCC generator. The voltage compensator compensates for a variation of the first voltage generated due to variations of a power supply voltage and a load. The first voltage is increased by supplying electric charges to the output terminals if the first voltage is less than a predetermined level, and the first voltage is decreased by sending the electric charges of the output terminal to the ground if the first voltage is greater than a predetermined level.
    Type: Grant
    Filed: July 25, 2000
    Date of Patent: July 24, 2001
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Byoung Kwon Park
  • Patent number: 6259324
    Abstract: A bias network for a radio frequency signal power amplifier. A current source is connected to a source of band gap voltage and produces a current proportional to the voltage. A reference voltage circuit receives the current and produces a voltage which is proportional to the current, as well as changes in temperature. An operational amplifier is used to connect the reference voltage to the power amplifier, so that the power amplifier is effectively isolated from the reference voltage circuit and current bearer circuit. A power amplifier breakdown protection circuit is connected across the output of the operational amplifier for diverting avalanche current produced form the power amplifier away from the power amplifier when the power amplifier output is mismatched through the antenna. Baseband signal transmission from the power amplifier to the bias network circuit is also significantly reduced, thus avoiding the generation of spurious radiation components.
    Type: Grant
    Filed: June 23, 2000
    Date of Patent: July 10, 2001
    Assignee: International Business Machines Corporation
    Inventors: Phillip Antognetti, Jim Griffiths, David Helms, James Moniz, Scott Munro, Joshua Park, Carl Stuebing, Xiangdong Zhang
  • Patent number: 6255807
    Abstract: A temperature curvature compensation technique and circuit can be realized through the generation of a temperature curvature compensation voltage provided by measuring the difference between the base-emitter voltage Vbe of two different transistors operating at two different temperature coefficient quiescent currents. This voltage difference measured between two such transistors results in a scaled voltage that is representative of the temperature curvature of the base-emitter voltage Vbe of a transistor, and which can then be summed to the bandgap reference output to provide a temperature compensated, bandgap reference voltage. The above method can be carried out in an amplifier circuit configured to receive and sum the temperature curvature compensation voltage and the bandgap reference output voltage into the temperature compensated, bandgap reference voltage.
    Type: Grant
    Filed: October 18, 2000
    Date of Patent: July 3, 2001
    Assignee: Texas Instruments Tucson Corporation
    Inventors: Jerry L. Doorenbos, David M. Jones
  • Patent number: 6252385
    Abstract: An integrated control and regulation circuit for a power stage of a regulated power supply, includes a current generator which, when the power supply is switched on, charges a decoupling capacitor to decouple a power stage of the power supply, through a first switch. The output from a logic circuit controls this first switch, and opens it when the regulated output voltage from the power stage reaches its nominal value. Preferably, a second switch controlled by the same output from the logic circuit deactivates a regulation loop of the power stage during the start up phase and in the case of a short circuit.
    Type: Grant
    Filed: January 28, 2000
    Date of Patent: June 26, 2001
    Assignee: STMicroelectronics S.A.
    Inventor: Pascal Mellot
  • Patent number: 6236273
    Abstract: A monolithic integrated circuit amplifier has a gain stage and a buffer stage. The buffer stage includes an output stage and two separate voltage supplies, the second of which has a greater magnitude than the first. Switching circuitry is included that is connected to the output stage via a regulator bus. When an output demand voltage is less than a switch-over threshold, current to the output stage is provided substantially entirely from the first voltage supply; when the output demand voltage is greater than the switch-over threshold, current to the output stage is provided substantially entirely from the second voltage supply. Collector voltage at the output stage can be maintained greater than the emitter voltage by a predetermined, substantially constant amount.
    Type: Grant
    Filed: November 18, 1999
    Date of Patent: May 22, 2001
    Assignee: Pairgain Technologies, Inc.
    Inventor: Lanny L. Lewyn
  • Patent number: 6232757
    Abstract: An embodiment of the invention is directed to a voltage regulator that provides a conditioned reference voltage with high supply noise rejection. A reference circuit provides an input reference voltage. An operational amplifier (opamp) has a first opamp input coupled to the reference circuit, a second opamp input, and an opamp output to provide the conditioned reference voltage based on the input reference voltage. A differential MOS amplifier has a first input coupled to the opamp output and an output coupled to the second opamp input. The reference voltage is conditioned in accordance with the size of transistors in the differential amplifier. The voltage regulator may be used in different types of analog-to-digital converters, including those built for use with camera chips.
    Type: Grant
    Filed: August 10, 2000
    Date of Patent: May 15, 2001
    Assignee: Intel Corporation
    Inventors: Morteza Afghahi, Yueming He
  • Patent number: 6215291
    Abstract: A control circuit is provided to minimize the charging cycle time of a battery charging system by maximizing the length of time that high constant charging current is applied to a discharged battery. The control circuit includes a constant current (CC) error amplifier, a constant voltage (CV) error amplifier, an output amplifier, and two pole-splitting compensation networks. The control circuit works in conjunction with a power source to charge a secondary battery. The pole-splitting compensation networks allow the CC, CV, and output amplifiers to be configured for high gain, without sacrificing output stability. The control circuit provides a sharp transition between the CC mode and CV mode of operation. In the CC mode, fast bulk battery charging is provided. In the CV mode, the control circuit initially provides a “top-off” charge to the battery and subsequently safely maintains the battery at its fully charged state.
    Type: Grant
    Filed: April 17, 2000
    Date of Patent: April 10, 2001
    Assignee: National Semiconductor Incorporated
    Inventor: Mark J. Mercer
  • Patent number: 6211661
    Abstract: A tunable constant current source having temperature and power supply compensation is provided. The tunable constant current source includes a voltage regulator, a differential amplifier, a current source and a compensating load. The voltage regulator provides a substantially constant bias voltage VB. The differential amplifier receives the bias voltage VB and maintains a load voltage VL substantially equal to the bias voltage VB by way of a negative feedback. The current source generates a substantially constant current IREF from the differential amplifier. The compensating load varies with temperature changes to maintain the current IREF substantially constant, whereby the tunable constant current source may operate in a supply voltage range between about 0.5 volts to about 1.8 volts.
    Type: Grant
    Filed: April 14, 2000
    Date of Patent: April 3, 2001
    Assignee: International Business Machines Corporation
    Inventor: James P. Eckhardt
  • Patent number: 6184670
    Abstract: A temperature-related voltage generating circuit has an input terminal receiving a control voltage independent of temperature, and an output terminal delivering a temperature-related control voltage. The input and output terminals are connected together through at least an amplifier stage adapted to set an output reference voltage from a comparison of input voltages. The voltage generating circuit also includes a generator element generating a varying voltage with temperature and connected between a ground voltage reference and a non-inverting input terminal of the amplifier stage. The amplifier stage has an output terminal adapted to deliver a multiple of the varying voltage with temperature to an inverting input terminal of a comparator stage.
    Type: Grant
    Filed: November 4, 1998
    Date of Patent: February 6, 2001
    Assignee: STMicroelectronics S.r.l.
    Inventors: Jacopo Mulatti, Matteo Zammattio, Andrea Ghilardelli, Marcello Carrera
  • Patent number: 6184745
    Abstract: A reference voltage generating circuit generates a reference voltage by using a voltage difference of a PMOS transistor, to thereby exclude the reliability of a back-bias voltage. The reference voltage generating circuit includes a reference voltage generating unit which generates a first reference voltage with respect to a power supply voltage, and a level converting unit which converts the first reference voltage applied from the reference voltage generating unit to a second reference voltage with respect to a ground voltage.
    Type: Grant
    Filed: October 26, 1998
    Date of Patent: February 6, 2001
    Assignee: LG Semicon Co., Ltd.
    Inventor: Tae-Hoon Kim
  • Patent number: 6181121
    Abstract: An apparatus comprising a first circuit, a second circuit and a third circuit. The first circuit may be configured to generate a first current in response to a reference voltage. The first current may vary as a function of temperature. The second circuit may be configured to generate a second current to counteract for the variations of the first current. The second current may vary as a function of temperature. The third circuit may be configured to generate a third current in response to the first current and the second current.
    Type: Grant
    Filed: March 4, 1999
    Date of Patent: January 30, 2001
    Assignee: Cypress Semiconductor Corp.
    Inventors: Brian Kirkland, Steven Meyers, Bertrand J. Williams
  • Patent number: 6175224
    Abstract: A regulator (200) has a pass transistor (250) for transferring a voltage from an input (202) to an output (205). A voltage sensor (231) at the output (205) carries a PTAT current (IA) A generator with diode or transistor chains (271, 272) derives a voltage VRES from serially coupled base-emitter path of transistors (381-386) having different current densities. The generator (271, 272) and a transistor pair (273) form a bandgap reference circuit. Each chain (271, 272) has transistors alternatively of a first type (pnp) and second type (npn). The value ratio (R4/R3) of resistances (240, 230) in the voltage sensor (231) can be chosen such, that the noise components of the voltage VOUT at the output (205) is low.
    Type: Grant
    Filed: June 29, 1998
    Date of Patent: January 16, 2001
    Assignee: Motorola, Inc.
    Inventor: Petr Kadanka
  • Patent number: 6166590
    Abstract: Circuit useful as current mirror and/or current divider has a circuit topology containing mirror and reference transistor pairs, respectively provided by MOS P and N type transistors for the up and down mirrors. The mirror transistor in each pair is followed by a buffer transistor which provides the current output. The topology obtains equal input and output currents through the DC biasing of the reference and mirror transistors by providing equality of the D to S and G to S voltages operative in both the reference and mirror transistors of both mirrors. The topology provides matched performance for the up and down current mirrors with very high mirroring accuracy, design insensitive up and down mirrored current, excellent operation over a wide power supply range, temperature insensitive precision, and the possibility of conveniently obtaining a wide range of current divisions.
    Type: Grant
    Filed: May 14, 1999
    Date of Patent: December 26, 2000
    Assignee: The University of Rochester
    Inventors: Eby Friedman, Radu M. Secareanu
  • Patent number: 6147479
    Abstract: A voltage down converter for converting an external power voltage into an internal power voltage and providing the internal power voltage to an internal circuitry, comprising: a reference voltage generation means for receiving the external power voltage and generating a constant reference voltage where variation of the external power voltage and change of circumstance temperature are compensated; a reference voltage converting means for converting the reference voltage from the reference voltage generation means into a reference voltage for stress mode or a reference voltage for normal mode; and a driving means for receiving the reference voltage from the reference voltage converting means to generate the internal power voltage required to operation of the internal circuitry.
    Type: Grant
    Filed: June 30, 1999
    Date of Patent: November 14, 2000
    Assignee: Hyundai Electronics Industries Co., Ltd.
    Inventor: Jung Seop Lee
  • Patent number: 6144195
    Abstract: An embodiment of the invention is directed to a voltage regulator that provides a conditioned reference voltage with high supply noise rejection. A reference circuit provides an input reference voltage. An operational amplifier (opamp) has a first opamp input coupled to the reference circuit, a second opamp input, and an opamp output to provide the conditioned reference voltage based on the input reference voltage. A differential MOS amplifier has a first input coupled to the opamp output and an output coupled to the second opamp input. The reference voltage is conditioned in accordance with the size of transistors in the differential amplifier. The voltage regulator may be used in different types of analog-to-digital converters, including those built for use with camera chips.
    Type: Grant
    Filed: August 20, 1999
    Date of Patent: November 7, 2000
    Assignee: Intel Corporation
    Inventors: Morteza Afghahi, Yueming He
  • Patent number: 6137341
    Abstract: A temperature sensor circuit generates an output voltage that is linearly proportional to temperature over a desired temperature range with a desired offset voltage. The temperature sensor includes two Proportional To Absolute Temperature (PTAT) current sources that generate PTAT currents and two transistors which conduct the PTAT currents with different current densities to establish a basic voltage PTAT across a resistor. An offset resistor coupled between the bases of the two transistors and a circuit node, shifts the basic PTAT voltage by an offset voltage. A first gain circuit couples to the collector of the first transistor and the offset resistor and generates a servo current (i.e., a current that tends to move the circuit to the desired state by correcting an error) to servo the base of the first transistor when there is a difference between the first transistor's collector current and the PTAT current.
    Type: Grant
    Filed: September 3, 1998
    Date of Patent: October 24, 2000
    Assignee: National Semiconductor Corporation
    Inventors: Jay Friedman, Robert Allen Pease
  • Patent number: 6133718
    Abstract: A first current generator which generates a current that is based on the threshold difference of enhancement-type and native-type transistors therein. A second current generator which generates a current that is based on the thermal voltage. The currents generated by the first and second current generators are linearly combined to produce a highly temperature-stable current.
    Type: Grant
    Filed: February 5, 1999
    Date of Patent: October 17, 2000
    Assignee: STMicroelectronics S.r.l.
    Inventors: Carmela Calafato, Maurizio Gaibotti