Abstract: Systems, methods and apparatus for wireless charging are disclosed. A charging apparatus has an amplifier stage, a power switching stage and a controller. The amplifier stage has a choke that receives a current from an input of the amplifier stage, a resonant network coupled to an output of the choke and that provides an output current to a load, and a first switch configured to short the output of the choke to circuit ground when turned on. The power switching stage may be configured to couple a power supply to the input of the amplifier stage and may have a second switch operable to couple the input of the amplifier stage to circuit ground when turned on. The controller may be configured to control operation of the first switch and the second switch in accordance with a timing sequence that defines a cycle of the output current.

Abstract: This power semiconductor module includes: a bus bar to which each of first main electrodes of semiconductor switching elements is joined; a heat-dissipating metal substrate to which each of second main electrodes of the semiconductor switching elements is joined; and a control gate terminal connected to each of gate pads of the semiconductor switching elements by a bonding wire, wherein at least two of the plurality of semiconductor switching elements are arranged adjacently to each other on the heat-dissipating metal substrate and electrically connected in parallel to form one arm.

Abstract: A voltage regulator can include an operational amplifier powered by a supply voltage and configured to generate a first gate voltage. The voltage regulator can also include a first transistor configured to receive the first gate voltage and generate a first driving voltage. The voltage regulator can further include a second transistor configured to receive a second gate voltage and generate a second driving voltage. The first gate voltage can be generated based on feedback provided to the operational amplifier. The second gate voltage can be generated from the first gate voltage.

Abstract: A load protection and control apparatus (1) for protecting and controlling an electrical load connected to the load protection and control apparatus (1) comprising an overcurrent protection circuit (1A) having a power switch (5) through which the electrical load receives an electrical load current (IL) and having a sensor component (4) connected in series with the power switch (5) and adapted to generate directly a voltage drop (?U4) corresponding to the current rise speed of the electrical load current (IL) flowing from an input terminal (2) of the load protection and control apparatus (1) via the sensor component (4) and the power switch (5) to the output terminal (3) and having a driver circuit (6) adapted to detect an occurring overcurrent depending on the voltage drop (?U4) generated by the sensor component (4) and/or depending on a voltage drop (?U5) along the power switch (5) and adapted to switch off said power switch (5) upon detection of an overcurrent within a switch-off period of less than one mil

Abstract: A logic process-based level conversion circuit of a flash flash field programmable gate array (FPGA) performs three-stage level conversion by using three conversion modules. A first-stage conversion module is configured to convert an input first signal of a VDD-GND voltage domain into a second signal of a VP1-GND voltage domain, an intermediate-stage conversion module is configured to convert the input second signal of the VP1-GND voltage domain into a third signal of a VP1-VN voltage domain, and a drive-stage conversion module is configured to convert the input third signal of the VP1-VN voltage domain into a drive signal of a VP2-VN voltage domain and output a drive word line. The logic process-based level conversion circuit reduces the pressure of conversion at each stage, ensures a capability of driving the next stage, increases the conversion speed, and provides a large driving capability at the last stage.

Abstract: A system, method, and solar photovoltaic (PV) network for solar PV variability reduction with reduced time delays and battery storage optimization are described. The system includes a Moving Regression (MR) filter; a State of Charge (SoC) feedback control; and a Battery Energy Storage System (BESS). The MR filter, SoC feedback control and BESS are configured to provide smoothing of solar PV variabilities. The MR filter is a non-parametric smoother that utilizes a machine learning concept of linear regression to smooth out solar PV variations at every time step.

Abstract: A reactor includes a first and second winding, a coupling core portion, and a first and second core portion. The coupling core portion forms a coupling magnetic path, through which a magnetic flux generated by the first winding when the first winding is energized and a magnetic flux generated by the second winding when the second winding is energized pass, which magnetically couples the first winding and the second winding together. The first core portion forms a first magnetic path, through which the magnetic flux generated by the first winding when the first winding is energized passes and is aligned with a first plane. The second core portion forms a second magnetic path, through which the magnetic flux generated by the second winding when the second winding is energized passes and is aligned with a second plane. The coupling plane intersects at right angles with the first and second plane.

Abstract: An electronic fuse circuit for safeguarding a multi-channel electronic power distributor includes a driver circuit for each channel of the power distributor configured to control an electronic switch of a corresponding channel to assume a certain state, and a microcontroller interface configured to receive from a microcontroller a command for setting the state of the electronic switch of a corresponding channel. The driver circuit of the corresponding channel is configured to set the state of the electronic switch of the corresponding channel according to the command from the microcontroller. The electronic fuse circuit further includes a safety circuit for detecting a malfunction in the microcontroller and/or the power distributor. In the event of a detected malfunction in the microcontroller and/or the power distributor, the driver circuit of each channel is configured to set the state of the electronic switch of the corresponding channel according to a channel-specific preconfigured safety state.

Abstract: A voltage conversion circuit and a display device are provided. The voltage conversion circuit includes a voltage conversion module, a comparison module, and a control module. The voltage conversion module includes at least two voltage conversion units, and the voltage conversion unit converts the input voltage into a target voltage. The comparison module compares each of testing voltages with a reference voltage to generate a feedback signal. The control module receives the feedback signal and controls the voltage conversion unit to convert the input voltage to the target voltage based on the feedback signal.

Abstract: Circuits and methods to mitigate or eliminate potentially damaging events (e.g., damaging current spikes from in-rush current, charge transfer current, short circuits, etc.) in DC-DC power converters. Embodiments enable dynamic switching of conversion ratios in reconfigurable power converters while under load without turning off the power converter circuitry or suspending switching of the charge pump power switches. Embodiments selectively increase the ON resistance, RON, for at least some power FETs in a power converter by actively controlling the driver voltage to the gates of the power FETs. During normal operation, the power FET driver voltage may be set to overdrive the FET gate to lower RON to a desired level that allows high current flow. For other scenarios, the power FET driver voltage may be reduced so as to increase RON while ON and thus impede current flow to provide protection against potentially damaging events.

Abstract: A method for protecting a circuit includes steps of: providing a first current source connected to a capacitor of the circuit through a second switch; providing a detection and control unit for turning on the second switch at a first time, and let the first current source to charge the capacitor; detecting a voltage value of the capacitor by the detection and control unit; wherein when the voltage value is greater than or equal to a reference voltage value, the detection and control unit turns off the second switch and turns on a first switch of the circuit, and when the voltage value is lower than the reference voltage value, the detection and control unit turns off the second switch and continue turns off the first switch.

Abstract: In an embodiment, a switching converter includes: a switching stage including first and second switching devices for receiving an input voltage and for providing an output voltage; a driving stage including first and second driving devices for driving the first and second switching devices, respectively; a current sensing arrangement for sensing an output current provided by the switching stage; a voltage generation arrangement configured to generate a supply voltage for powering the driving stage, the voltage generation arrangement being configured to adjust the supply voltage according to the sensed output current; and a charge recovery stage configured to store a first electric charge being lost from the first driving device during driving of the first switching device and to release at least partially the stored first electric charge to the second driving device during driving of the second switching device.

Abstract: A signal detection circuit is provided, and includes an input switch circuit, an amplitude detection circuit, a clock generating circuit, and an integration circuit. The input switch circuit receives a reference voltage and an input voltage and selectively outputs the reference voltage or the input voltage. The amplitude detection circuit detects an output of the input switch circuit to generate an amplitude voltage. The clock generating circuit controls the input switch circuit to alternately enter first and second phases, the input switch circuit is controlled to output the reference voltage in the first phase, and output the input voltage in the second phase. The integration circuit receives the amplitude voltage as an input, and generates an integration voltage corresponding to an accumulation result within a predetermined time interval. The predetermined time interval includes at least one period that cycles between the first phase and the second phase.

Abstract: Example implementations include a method of generating a ramp down compensation voltage based at least partially on the a current sense voltage and an inductor voltage of an inductor at an inductor node, applying the ramp down compensation voltage to the inductor node, and in accordance with a first determination that the valley current sense voltage and the inductor voltage are not equal, modifying a predetermined capacitance of a system capacitor operatively coupled to the inductor node to a first modified capacitance.

Abstract: A secondary side controller for a flyback converter includes an integrated circuit (IC), which in turn includes: a synchronous rectifier (SR) sense pin coupled to a drain of an SR transistor on a secondary side of the flyback converter; a capacitor having a first side coupled to the SR sense pin, the capacitor to charge or discharge responsive to a voltage sensed at the SR sense pin; a diode-connected transistor coupled between a second side of the capacitor and ground; a first current mirror coupled to the diode-connected transistor and configured to receive, as input current, a reference current from a variable current source; and a peak detect transistor coupled to the diode-connected transistor and to an output of the first current mirror. The peak detect transistor is to output a peak detection signal in response to detecting current from the capacitor drop below the reference current.

Abstract: A power supply circuit that outputs an electric power that is input from a vibration-driven energy harvesting element to an external load, includes: a negative half-wave rectifying circuit that half-wave rectifies an alternating current power that is input from the vibration-driven energy harvesting element, into a negative voltage output; an inverting chopper circuit that inverts and outputs the negative voltage output which is output from the negative half-wave rectifying circuit, into a positive voltage output.

Abstract: A semiconductor device that normally-off drives a first transistor that normally-on drives, the semiconductor device includes a first circuitry, a second circuitry, and a first diode. The first circuitry that is connected with a power supply voltage and a ground voltage, detects the power supply voltage, and outputs a transition state of the power supply voltage. The second circuitry that is connected with the power supply voltage, the ground voltage, the first circuitry, and a second transistor, and outputs a drive voltage of a second transistor connected in series with the first transistor, based on an output of the first circuitry. The first diode having an anode connected with a drive terminal of the first transistor and a cathode connected with an output terminal of the second transistor.

Abstract: According to an example, an electronic device includes a component, a supply line providing a supply voltage, a transistor with a control input, a linear first control loop, and a non-linear second control loop. The transistor outputs an output voltage to the component depending on a signal applied to the control input. The linear first control loop includes an ADC to convert an analog output voltage level into a digital measurement signal, a controller to generate a digital control signal for the transistor depending on the digital measurement signal, and a DAC to convert the digital control signal into a first analog control signal. The non-linear second control loop is configured to generate a second analog control signal depending on the analog output voltage level. The second analog control signal is superimposed with the first analog control signal and the combined control signals are fed to the control input of the transistor.

Abstract: A semiconductor device includes: a first transistor provided with an electron transit layer made of a nitride semiconductor, a first gate electrode, a first source electrode, and a first drain electrode; and a second transistor that includes a second gate electrode, a second source electrode, and a second drain electrode. The first gate electrode and the second drain electrode are electrically connected to each other, while the first source electrode and the second source electrode are not electrically connected to each other.

Abstract: A voltage regulator can include an operational amplifier powered by a supply voltage and configured to generate a first gate voltage. The voltage regulator can also include a first transistor configured to receive the first gate voltage and generate a first driving voltage. The voltage regulator can further include a second transistor configured to receive a second gate voltage and generate a second driving voltage. The first gate voltage can be generated based on feedback provided to the operational amplifier. The second gate voltage can be generated from the first gate voltage.

Abstract: Systems, apparatuses, and methods are described for power conversion. In some examples, the power conversion may be done by an inverter configured to convert a direct current (DC) input to an alternating current (AC) output. The inverter may include a plurality of capacitors connected at the input of a DC/AC module. The system may include a housing configured to house the inverter. Voltage control circuitry may be configured to increase a voltage at the input of the DC/AC module inside the housing of the inverter.

Abstract: A micro-energy acquisition device is provided. The radio frequency circuit generates a ground voltage according to the micro-energy voltage and output the ground voltage through the ground terminal; the first unidirectional conduction component makes the ground voltage to be unidirectionally conductive to generate the first voltage; the microprocessor generates the supply voltage according to the first voltage and is operated according to the supply voltage; the first input/output port of the microprocessor is connected with the first unidirectional conduction component; since the microprocessor and the radio frequency circuit are connected in series, an electrical energy consumption speed of the micro-energy voltage is slower, the capability of data transmission is improved and an error rate of data transmission is reduced.

Abstract: A Schmitt trigger circuit includes a first and second set of transistors, a first and second feedback transistor, and a first and second circuit. The first set of transistors is connected between a first voltage supply and an output node. The first voltage supply has a first voltage. The second set of transistors is connected between the output node and a second voltage supply. The second voltage supply has a second voltage. The first feedback transistor is connected to the output node, a first node and a second node. The second feedback transistor is connected to the output node, a third node and a fourth node. The first circuit is coupled to and configured to supply the second supply voltage to the second node. The second circuit is coupled to and configured to supply the first supply voltage to the fourth node.

Abstract: A resonant switching power converter includes: plural capacitors; plural switches; at least one charging inductor; at least one discharging inductor; a controller which generates a charging operation signal and at least one discharging operation signal; and at least one zero current detection circuit which detects a charging resonant current flowing through the charging inductor in a charging process and/or detect a discharging resonant current flowing through the discharging inductor in a discharging process. When detecting that a level of the charging resonant current or a level of the discharging resonant current is zero, the zero current detection circuit generates at least one zero current detection signal which is sent to the controller. The controller determines start time points and end time points of the charging process and the discharging process according to the zero current detection signal. There can be plural discharging processes.

Abstract: The invention relates to a modular pulse source consisting of a main module and at least one additional module which are connected in series to each other in the sense of two-terminal circuits. The modules each comprise an energy storage device. The energy storage device of the main module is initially charged by a charging circuit. A stimulation coil is connected at the two ends of the series connection and as a result of a voltage pulse delivered by the chain of modules generates a magnetic field which in turn causes an induced electrical pulse or a respective electric field.

Abstract: A bandgap reference correction circuit comprising a bandgap reference circuit comprising a first resistor; a first oscillator comprising a second resistor, wherein a frequency of a first oscillator output signal of the first oscillator depends on a resistance of the second resistor; and a compensation module configured to: receive the first oscillator output signal from the first oscillator and a reference frequency signal from a reference oscillator; determine the frequency of the first oscillator output signal using the reference frequency signal; and set a resistance of the first resistor based on the frequency of the first oscillator output signal.

Abstract: Reference circuits are described. In particular reference circuits that use a plurality of cascaded proportional to absolute temperature, PTAT, cells are described. In the circuits disclosed, currents of the low current density arm of first PTAT cell are mirrored into the high current density arms of a second PTAT cell such that any deviation of current in the low current density arm of the first cell will be replicated as the current in the high current density arm of the second cell. In this way low noise circuits can be provided.

Abstract: The switching power supply device includes first and second switches connected in series between an application end of an input voltage and an application end of a low voltage lower than the input voltage, and third and fourth switches connected in series between an application end of the input voltage and an application end of the low voltage, and a control unit configured to control the on/off state of each of the first to fourth switches. The first to fourth switches are configured such that an inductor is provided between a first connection node connecting the first switch and the second switch and a second connection node connecting the third switch and the fourth switch.

Abstract: The present document relates to a power converter configured to convert an input voltage at an input of the power converter into an output voltage at an output of the power converter. The power converter may comprise a power stage, a voltage controlled voltage source VCVS, a first feedback path and a second feedback path. The power stage may be coupled to the output of the power converter. The VCVS may be configured to generate, at an output of the VCVS, an error voltage by comparing a reference voltage with a feedback voltage indicative of the output voltage. The first feedback path may extend from the output of the power converter, via the VCVS, via the power stage, to the output of the power converter. The second feedback path may extend from the output of the VCVS to the output of the power converter.

Abstract: A resonant switching power converter includes: at least one capacitor; switches coupled to the at least one capacitor; at least one charging inductor; at least one discharging inductor; and a zero current estimation circuit. The switches switch electrical connection relationships of capacitors according to an operation signal. The zero current estimation circuit estimates a time point at which a charging resonant current is zero during a charging process and/or estimate a time point at which a discharging resonant current is zero during at least one discharging process according to voltage differences across two ends of the charging inductor and/or the discharging inductor, so as to correspondingly generate a zero current estimation signal. The zero current estimation signal is adopted to generate the operation signal.

Abstract: A band gap reference voltage generating circuit includes a reference voltage generating circuit, a current generating circuit, a current divider circuit, and a first connection path switching circuit. The reference voltage generating circuit forms a reference voltage on first and second current input terminals thereof. First and second input terminals of the current generating circuit are connected to the first and second current input terminals, respectively. The current generating circuit generates a first current to bias the reference voltage generating circuit. The current divider circuit includes a current input terminal, a first current output terminal, and a second current output terminal. The first connection path switching circuit switches connection paths between the first input terminal and the second input terminal of the current generating circuit, and the first current input terminal and the second current input terminal of the current divider circuit.

Abstract: The invention provides a gate drive device, a gate drive method, a power semiconductor module, and an electric power conversion device capable of reducing a negative gate surge voltage. The gate drive device drives a semiconductor device constituting an arm in an electric power conversion device. Before a turn-off start of a drive arm, in a counter arm, a voltage between one main terminal of the semiconductor device and a gate terminal of the semiconductor device is charged to a voltage value that is larger, in a positive direction, than a negative voltage of a negative gate power supply and smaller than a gate threshold voltage of the semiconductor device.

Abstract: Wireless power transfer systems, disclosed, include one or more circuits to facilitate high power transfer at high frequencies. Such wireless power transfer systems may include a damping circuit, configured to dampen a wireless power signal such that communications fidelity is upheld at high power. Additionally or alternatively, such wireless power transfer systems may include voltage isolation circuits, to isolate components of the wireless receiver systems from high voltage signals intended for a load associated with the receiver. Utilizing such systems enables wireless power transfer at high frequency, such as 13.56 MHz, at voltages over 1 Watt, while maintaining fidelity of in-band communications associated with the higher power wireless power signal.

Abstract: A semiconductor device includes: a first transistor provided with an electron transit layer made of a nitride semiconductor, a first gate electrode, a first source electrode, and a first drain electrode; and a second transistor that includes a second gate electrode, a second source electrode, and a second drain electrode. The first gate electrode and the second drain electrode are electrically connected to each other, while the first source electrode and the second source electrode are not electrically connected to each other.

Abstract: Wireless power transfer systems, disclosed, include one or more circuits to facilitate high power transfer at high frequencies. Such wireless power transfer systems may include a damping circuit, configured to dampen a wireless power signal such that communications fidelity is upheld at high power. Additionally or alternatively, such wireless power transfer systems may include voltage isolation circuits, to isolate components of the wireless receiver systems from high voltage signals intended for a load associated with the receiver. Utilizing such systems enables wireless power transfer at high frequency, such as 13.56 MHz, at voltages over 1 Watt, while maintaining fidelity of in-band communications associated with the higher power wireless power signal.

Abstract: A power converter includes: capacitors; switches coupled to the corresponding capacitors, wherein the switches switch electrical connection relationships of corresponding capacitors according to operation signals; one or more charging inductors connected in series to one or more corresponding capacitors; one or more discharging inductors connected in series to one or more corresponding capacitors. In a charging process, by switching the switches, a series connection of the capacitors and the corresponding charging inductor(s) is formed between the input voltage and the output voltage, so as to form a charging path. In a discharging process, by switching the switches, each capacitor and one of the corresponding discharging inductors are connected in series between the output voltage and ground voltage level, so as to form plural discharging paths. The charging process and the discharging process are arranged in alternating and repetitive manner, to convert the input voltage to the output voltage.

Abstract: A switching power supply device includes first to fourth switches sequentially connected in series, an inductor, a first capacitor whose first end is connected to a connection node of the first switch and the second switch and whose second end is connected to a connection node of the third switch, the fourth switch, and the inductor, a second capacitor whose first end is connected to a connection node of the second switch and the third switch, and a controller that controls switching on and off of the first to fourth switches. In at least one of a first pair configured with the first switch and the third switch and a second pair configured with the second switch and the fourth switch, the controller shifts a timing of switching from off to on between two switches.

Abstract: The present disclosure provides a circuit for generating a complimentary to absolute temperature (CTAT) voltage reference. The primary contributor to the voltage reference is first bipolar junction transistor, which is configured in diode mode, to produce the CTAT voltage. Such references include a non-linear component. A pair of bipolar junction transistors are coupled to the first bipolar junction transistor, and are configured to generate a delta base-emitter voltage. By coupling one of the pair to a proportional to absolute temperature current source, and the other to a current course which is substantially independent of absolute temperature, a further non-linear component is introduced, which is complimentary to the non-linear component introduced by the first bipolar junction transistor. The pair of bipolar transistors share a common emitter area size.

Abstract: A semiconductor device according to embodiments includes a normally-off transistor having a first electrode, a second electrode, and a first control electrode, a normally-on transistor having a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode, a first element having a first end portion electrically connected to the first control electrode and a second end portion electrically connected to the first electrode, and the first element including a first capacitance component; and, a second element having a third end portion electrically connected to the first control electrode and the first end portion and a fourth end portion, and the second element including a second capacitance component, wherein, when a threshold voltage of the normally-off transistor is denoted by Vth, a maximum rated gate voltage of the normally-off transistor is denoted by Vg_max, a voltage of the fourth end portion is denoted by Vg_on, the first capacitance component is deno

Abstract: A DC-DC converter includes an input voltage source in series with a parasitic capacitance. The voltage changes and causes resonant ringing, wherein the input voltage source is connected to a rectifier means which is connected to an output circuit. A passive clamp circuit across the rectifier means includes a clamp diode, a clamp capacitor, and an auxiliary circuit. The auxiliary circuit includes first and second rectifiers in series with an electronic component having first and second terminals. The first rectifier has an anode connected with the passive clamp circuit, and a cathode connected to the second terminal of the electronic component. The second rectifier has a cathode connected with the anode of the first rectifier, and an anode connected with the first terminal of the electronic component. Some of the leakage inductance transfers to an auxiliary energy storage and damps the resonant ringing.

Abstract: Reliability of a semiconductor device is improved. In the semiconductor device SA1, a snubber capacitor pad SNP electrically connected to the capacitor electrode of the snubber capacitor is formed on the surface of the semiconductor chip CHP.

Abstract: A band gap reference voltage generating circuit includes a reference voltage generating circuit, a current generating circuit, a current divider circuit, and a first connection path switching circuit. The reference voltage generating circuit forms a reference voltage on first and second current input terminals thereof. First and second input terminals of the current generating circuit are connected to the first and second current input terminals, respectively. The current generating circuit generates a first current to bias the reference voltage generating circuit. The current divider circuit includes a current input terminal, a first current output terminal, and a second current output terminal. The first connection path switching circuit switches connection paths between the first input terminal and the second input terminal of the current generating circuit, and the first current input terminal and the second current input terminal of the current divider circuit.

Abstract: Methods, systems, and apparatus to facilitate a fault triggered diode emulation mode of a transistor. An example apparatus includes a driver to output a control signal to a gate terminal of a transistor of a power converter; and a diode emulation control circuit to, in response to determining a fault corresponding to the transistor, enable the transistor when current flows in a direction from a source terminal of the transistor to a drain terminal of the transistor.

Abstract: An inverter-converter system includes a DC source, a DC to DC boost converter, a DC link capacitor, an inverter circuit, a variable speed electric machine, and a controller. The DC to DC boost converter receives an input DC voltage from the DC source. The inverter circuit converts the variable boosted voltage to an AC voltage to drive the variable speed electric machine. The controller senses a plurality of parameters from the variable speed electric machine, and controls the DC to DC boost converter to boost up the input DC voltage to a variable output voltage based on the plurality of parameters and/or the voltage (or load) needed by the variable speed electric machine. The design of the inverter-converter system can achieve an electrical efficiency and cost savings for the overall system.

Abstract: The power conversion device includes: a boosting unit for boosting DC voltage, the boosting unit including a second switching element, a third switching element, a second reverse-current blocking element, and a third reverse-current blocking element which are connected in series, the boosting unit including an intermediate capacitor connected between a connection point between the second reverse-current blocking element and the third reverse-current blocking element, and a connection point between the third switching element and the second switching element; a smoothing capacitor which is connected in parallel to the boosting unit and smooths the DC voltage boosted by the boosting unit; and a control unit for turning on the third switching element so that the intermediate capacitor is charged to charge completion voltage of the intermediate capacitor.

Abstract: A semiconductor module includes: a semiconductor substrate; a switching element having a first electrode, a second electrode, and a gate electrode, and the switching element configured to perform turning on/off between the first electrode and the second electrode in response to applying of a predetermined gate voltage to the gate electrode; a control circuit part configured to control the gate voltage; and a current detection element configured to detect a current which flows between the first electrode and the second electrode of the switching element, wherein the switching element, the control circuit part, and the current detection element are mounted on the semiconductor substrate, and the current detection element is formed of a Rogowski coil.

Abstract: A power conversion device capable of suppressing current backflow while also improving current responsiveness and power conversion efficiency is achieved. A snubber capacitor capable of absorbing switching surge is connected to a low-voltage side switching circuit that includes switching elements. Until a predetermined time elapses from when a request to start switching is received, a controller determines that the snubber capacitor has not reached full charge or near-full charge, and asynchronously controls the low-voltage side switching circuit and a high-voltage side switching circuit that includes switching elements.

Abstract: An energy supply for a test device includes an energy source configured to provide energy via an inductive element for use by test circuitry; and an energy recovery circuit electrically couplable to the energy source and configured to direct unused energy from the inductive element to the energy source.

Abstract: Circuits and devices are provided for reliably maintaining a normally-off Gate Injection Transistor (GIT), or similar, in a non-conducting state when a gate of the GIT is not driven with a turn-on control signal. This is accomplished using a failsafe pulldown coupled to the GIT's gate. The failsafe pulldown includes a resistance modulation circuit, which varies the effective gate resistance of the GIT, such that a low resistance is provided for an interval immediately after a turn-on transition of the GIT, thereby facilitating a high-current pulse for charging the GIT's gate. Subsequently, a high resistance is provided, such that a much lower current is driven to maintain the GIT in its on state. The failsafe pulldown enables a GIT, or similar, to be driven with a relatively simple driver, which may be provided external to the power switch device or integrated in the same die as the power switch.

Abstract: A COT control circuit used for realizing current sharing in multi-phase DC-DC converter. The multi-phase DC-DC converter has N switching circuits, N controllers, and a trimming current generator receiving N switching voltage signals of the N switching circuits to generate N trimming current signals. The N trimming current signals are respectively sent to the N controllers to regulate on time of at least one controllable switch of each of the N switching circuits so as to finally realize current sharing in the multi-phase circuits.