Using A Three Or More Terminal Semiconductive Device As The Final Control Device Patents (Class 323/311)
  • Patent number: 11381168
    Abstract: A switching power supply device includes first to fourth switches sequentially connected in series, an inductor, a first capacitor whose first end is connected to a connection node of the first switch and the second switch and whose second end is connected to a connection node of the third switch, the fourth switch, and the inductor, a second capacitor whose first end is connected to a connection node of the second switch and the third switch, and a controller that controls switching on and off of the first to fourth switches. In at least one of a first pair configured with the first switch and the third switch and a second pair configured with the second switch and the fourth switch, the controller shifts a timing of switching from off to on between two switches.
    Type: Grant
    Filed: October 15, 2020
    Date of Patent: July 5, 2022
    Assignee: ROHM Co., LTD.
    Inventors: Akihiro Kawano, Yuhei Yamaguchi
  • Patent number: 11320319
    Abstract: The present disclosure provides a circuit for generating a complimentary to absolute temperature (CTAT) voltage reference. The primary contributor to the voltage reference is first bipolar junction transistor, which is configured in diode mode, to produce the CTAT voltage. Such references include a non-linear component. A pair of bipolar junction transistors are coupled to the first bipolar junction transistor, and are configured to generate a delta base-emitter voltage. By coupling one of the pair to a proportional to absolute temperature current source, and the other to a current course which is substantially independent of absolute temperature, a further non-linear component is introduced, which is complimentary to the non-linear component introduced by the first bipolar junction transistor. The pair of bipolar transistors share a common emitter area size.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: May 3, 2022
    Assignee: Analog Devices International Unlimited Company
    Inventor: Viorel Bucur
  • Patent number: 11264899
    Abstract: A semiconductor device according to embodiments includes a normally-off transistor having a first electrode, a second electrode, and a first control electrode, a normally-on transistor having a third electrode electrically connected to the second electrode, a fourth electrode, and a second control electrode, a first element having a first end portion electrically connected to the first control electrode and a second end portion electrically connected to the first electrode, and the first element including a first capacitance component; and, a second element having a third end portion electrically connected to the first control electrode and the first end portion and a fourth end portion, and the second element including a second capacitance component, wherein, when a threshold voltage of the normally-off transistor is denoted by Vth, a maximum rated gate voltage of the normally-off transistor is denoted by Vg_max, a voltage of the fourth end portion is denoted by Vg_on, the first capacitance component is deno
    Type: Grant
    Filed: January 17, 2020
    Date of Patent: March 1, 2022
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Akira Yoshioka, Toru Sugiyama, Masaaki Iwai, Naonori Hosokawa, Masaaki Onomura, Hung Hung, Yasuhiro Isobe
  • Patent number: 11218078
    Abstract: A DC-DC converter includes an input voltage source in series with a parasitic capacitance. The voltage changes and causes resonant ringing, wherein the input voltage source is connected to a rectifier means which is connected to an output circuit. A passive clamp circuit across the rectifier means includes a clamp diode, a clamp capacitor, and an auxiliary circuit. The auxiliary circuit includes first and second rectifiers in series with an electronic component having first and second terminals. The first rectifier has an anode connected with the passive clamp circuit, and a cathode connected to the second terminal of the electronic component. The second rectifier has a cathode connected with the anode of the first rectifier, and an anode connected with the first terminal of the electronic component. Some of the leakage inductance transfers to an auxiliary energy storage and damps the resonant ringing.
    Type: Grant
    Filed: April 5, 2021
    Date of Patent: January 4, 2022
    Assignee: Rompower Technology Holdings, LLC
    Inventor: Ionel Jitaru
  • Patent number: 11195782
    Abstract: Reliability of a semiconductor device is improved. In the semiconductor device SA1, a snubber capacitor pad SNP electrically connected to the capacitor electrode of the snubber capacitor is formed on the surface of the semiconductor chip CHP.
    Type: Grant
    Filed: April 10, 2019
    Date of Patent: December 7, 2021
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Naoki Fujita, Hiroyuki Nakamura
  • Patent number: 11188113
    Abstract: A band gap reference voltage generating circuit includes a reference voltage generating circuit, a current generating circuit, a current divider circuit, and a first connection path switching circuit. The reference voltage generating circuit forms a reference voltage on first and second current input terminals thereof. First and second input terminals of the current generating circuit are connected to the first and second current input terminals, respectively. The current generating circuit generates a first current to bias the reference voltage generating circuit. The current divider circuit includes a current input terminal, a first current output terminal, and a second current output terminal. The first connection path switching circuit switches connection paths between the first input terminal and the second input terminal of the current generating circuit, and the first current input terminal and the second current input terminal of the current divider circuit.
    Type: Grant
    Filed: March 16, 2020
    Date of Patent: November 30, 2021
    Assignee: NUVOTON TECHNOLOGY CORPORATION
    Inventors: Chang-Xian Wu, Chun-Ku Lin
  • Patent number: 11183832
    Abstract: Methods, systems, and apparatus to facilitate a fault triggered diode emulation mode of a transistor. An example apparatus includes a driver to output a control signal to a gate terminal of a transistor of a power converter; and a diode emulation control circuit to, in response to determining a fault corresponding to the transistor, enable the transistor when current flows in a direction from a source terminal of the transistor to a drain terminal of the transistor.
    Type: Grant
    Filed: March 27, 2019
    Date of Patent: November 23, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Serkan Dusmez, Nathan Richard Schemm, Salil Chellappan
  • Patent number: 11128247
    Abstract: An inverter-converter system includes a DC source, a DC to DC boost converter, a DC link capacitor, an inverter circuit, a variable speed electric machine, and a controller. The DC to DC boost converter receives an input DC voltage from the DC source. The inverter circuit converts the variable boosted voltage to an AC voltage to drive the variable speed electric machine. The controller senses a plurality of parameters from the variable speed electric machine, and controls the DC to DC boost converter to boost up the input DC voltage to a variable output voltage based on the plurality of parameters and/or the voltage (or load) needed by the variable speed electric machine. The design of the inverter-converter system can achieve an electrical efficiency and cost savings for the overall system.
    Type: Grant
    Filed: November 7, 2018
    Date of Patent: September 21, 2021
    Assignee: Thermo King Corporation
    Inventors: Ryan Wayne Schumacher, Marcelo Andrade Dias
  • Patent number: 11108319
    Abstract: The power conversion device includes: a boosting unit for boosting DC voltage, the boosting unit including a second switching element, a third switching element, a second reverse-current blocking element, and a third reverse-current blocking element which are connected in series, the boosting unit including an intermediate capacitor connected between a connection point between the second reverse-current blocking element and the third reverse-current blocking element, and a connection point between the third switching element and the second switching element; a smoothing capacitor which is connected in parallel to the boosting unit and smooths the DC voltage boosted by the boosting unit; and a control unit for turning on the third switching element so that the intermediate capacitor is charged to charge completion voltage of the intermediate capacitor.
    Type: Grant
    Filed: May 10, 2018
    Date of Patent: August 31, 2021
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Tatsuki Matsunaga, Shuta Ishikawa, Akihiko Iwata
  • Patent number: 11088686
    Abstract: A semiconductor module includes: a semiconductor substrate; a switching element having a first electrode, a second electrode, and a gate electrode, and the switching element configured to perform turning on/off between the first electrode and the second electrode in response to applying of a predetermined gate voltage to the gate electrode; a control circuit part configured to control the gate voltage; and a current detection element configured to detect a current which flows between the first electrode and the second electrode of the switching element, wherein the switching element, the control circuit part, and the current detection element are mounted on the semiconductor substrate, and the current detection element is formed of a Rogowski coil.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: August 10, 2021
    Assignee: SHINDENGEN ELECTRIC MANUFACTURING CO., LTD.
    Inventors: Kenichi Suzuki, Wataru Miyazawa
  • Patent number: 11050353
    Abstract: A power conversion device capable of suppressing current backflow while also improving current responsiveness and power conversion efficiency is achieved. A snubber capacitor capable of absorbing switching surge is connected to a low-voltage side switching circuit that includes switching elements. Until a predetermined time elapses from when a request to start switching is received, a controller determines that the snubber capacitor has not reached full charge or near-full charge, and asynchronously controls the low-voltage side switching circuit and a high-voltage side switching circuit that includes switching elements.
    Type: Grant
    Filed: April 11, 2018
    Date of Patent: June 29, 2021
    Assignee: Hitachi Automotive Systems, Ltd.
    Inventors: Sho Yaegaki, Kenji Kubo, Takuma Ono, Yuki Yamabe
  • Patent number: 11009540
    Abstract: An energy supply for a test device includes an energy source configured to provide energy via an inductive element for use by test circuitry; and an energy recovery circuit electrically couplable to the energy source and configured to direct unused energy from the inductive element to the energy source.
    Type: Grant
    Filed: March 10, 2017
    Date of Patent: May 18, 2021
    Inventors: Steven T. Clauter, Gary B. Rogers, Norvell Eric Austin, Bradley T. Wolford
  • Patent number: 10979032
    Abstract: Circuits and devices are provided for reliably maintaining a normally-off Gate Injection Transistor (GIT), or similar, in a non-conducting state when a gate of the GIT is not driven with a turn-on control signal. This is accomplished using a failsafe pulldown coupled to the GIT's gate. The failsafe pulldown includes a resistance modulation circuit, which varies the effective gate resistance of the GIT, such that a low resistance is provided for an interval immediately after a turn-on transition of the GIT, thereby facilitating a high-current pulse for charging the GIT's gate. Subsequently, a high resistance is provided, such that a much lower current is driven to maintain the GIT in its on state. The failsafe pulldown enables a GIT, or similar, to be driven with a relatively simple driver, which may be provided external to the power switch device or integrated in the same die as the power switch.
    Type: Grant
    Filed: January 8, 2020
    Date of Patent: April 13, 2021
    Assignee: Infineon Technologies Austria AG
    Inventors: Kennith Kin Leong, Petio Natzkin
  • Patent number: 10972009
    Abstract: A COT control circuit used for realizing current sharing in multi-phase DC-DC converter. The multi-phase DC-DC converter has N switching circuits, N controllers, and a trimming current generator receiving N switching voltage signals of the N switching circuits to generate N trimming current signals. The N trimming current signals are respectively sent to the N controllers to regulate on time of at least one controllable switch of each of the N switching circuits so as to finally realize current sharing in the multi-phase circuits.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: April 6, 2021
    Assignee: Chengdu Monolithic Power Systems Co., Ltd.
    Inventor: Tianzhu Zhang
  • Patent number: 10957370
    Abstract: A magnetic memory array having an epitaxially grown vertical semiconductor selector connected with a two terminal resistive switching memory element via a bottom electrode such as TaN. An electrically conductive contact such as tungsten (W) or TaN can be included between the vertical semiconductor channel and the TaN bottom electrode. The electrically conductive contact and the TaN bottom electrode can both be formed by a damascene process wherein an opening is formed in an oxide layer and a metal is deposited into the opening. A chemical mechanical polishing process can then be performed to remove portions of the metal that extend out of the opening in the oxide layer over the oxide surface.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: March 23, 2021
    Assignee: SPIN MEMORY, INC.
    Inventors: Dafna Beery, Amitay Levi, Andrew J. Walker
  • Patent number: 10937479
    Abstract: A magnetic memory array having an epitaxially grown vertical semiconductor selector connected with a memory element via a bottom electrode such as TaN. An electrically conductive contact such as tungsten (W) or TaN can be included between the vertical semiconductor channel and the TaN bottom electrode. The electrically conductive contact and the TaN bottom electrode can both be formed by a damascene process wherein an opening is formed in an oxide layer and a metal is deposited into the opening. A chemical mechanical polishing process can then be performed to remove portions of the metal that extend out of the opening in the oxide layer over the oxide surface.
    Type: Grant
    Filed: August 29, 2019
    Date of Patent: March 2, 2021
    Assignee: SPIN MEMORY, INC.
    Inventors: Dafna Beery, Amitay Levi, Andrew J. Walker
  • Patent number: 10930325
    Abstract: A two-stage gated-diode sense amplifier includes a first transistor connected to an input node, a second transistor connected to a boost node, the input node and a setting line, a first inverter including a third transistor connected to a power supply voltage (VDD), a first output corresponding to the first inverter and the setting line, and a fourth transistor connected to ground, the first output and the setting line, a fifth transistor connected to the first output, the first transistor and the boost node, and a second associated with a second output corresponding to the second inverter, the second inverter including a sixth transistor connected to VDD, the second output and the first output, and a seventh transistor connected to ground, the second output and the first output.
    Type: Grant
    Filed: January 25, 2019
    Date of Patent: February 23, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Yutaka Nakamura
  • Patent number: 10923297
    Abstract: A switch monitoring device includes a constant current source which supplies a current to an input line or extracts a current from the input line, a switch which connects the input line to a supply voltage or to a ground voltage, a comparator which compares a voltage on the input line with a reference voltage, a logic which receives an output voltage of the comparator, a base current source which generates a base current, and a bias current circuit which generates a bias current by adjusting the base current as a base in accordance with a current control signal from the logic and the output voltage of the comparator. The constant current source generates a current by adjusting the bias current as a base.
    Type: Grant
    Filed: August 23, 2018
    Date of Patent: February 16, 2021
    Assignee: Rohm Co., Ltd.
    Inventors: Hiroyoshi Ishida, Hideki Matsubara, Hiroki Yamakami
  • Patent number: 10811985
    Abstract: A system including a converter is disclosed. The converter includes a first switch having one or more first controllable switches coupled in parallel across at least one diode. A first controlling unit is operatively coupled to the converter. The first controlling unit is configured to determine a temperature of the one or more first controllable switches. The first controlling unit is further configured to compare the determined temperature of the one or more first controllable switches with a transition temperature at which a first power loss of the one or more first controllable switches is equal to a second power loss of the at least one diode and control a switching state of the one or more first controllable switches based on the comparison of the determined temperature with the transition temperature.
    Type: Grant
    Filed: August 8, 2017
    Date of Patent: October 20, 2020
    Assignee: General Electric Company
    Inventors: Prashanth Manikumar Chennamsetty, Rien William O'Steen, Pradeep Vijayan, Arvind Kumar Tiwari
  • Patent number: 10686370
    Abstract: A multi-level voltage converter having a first switching circuit including a flying capacitor coupled in parallel with first switches coupled in series, the first switches configured to be driven by a first duty command having a first duty cycle; a second switching circuit including the flying and second switches coupled in series between input voltage terminals of an input voltage, the second switches configured to be driven by a second duty command having a second duty cycle; and a control circuit configured to balance a voltage of the flying capacitor by controlling an interleaved constant frequency modulator to generate the first and second duty cycle commands such that the first and second duty cycles are the same.
    Type: Grant
    Filed: December 13, 2018
    Date of Patent: June 16, 2020
    Assignee: Infineon Technologies AG
    Inventors: Giovanni Bonnano, Matteo Agostinelli, Luca Corradini, Abdelhamid Eslam, Paolo Mattavelli
  • Patent number: 10651731
    Abstract: A power supply system comprises: multiple switched-capacitor converters and a controller. The multiple switched-capacitor converters include at least a first switched-capacitor converter interleaved with a second switched-capacitor converter. During operation, the controller produces control signals. The control signals control the interleaved first switched-capacitor converter and the second switched-capacitor converter to produce an output voltage to power a load.
    Type: Grant
    Filed: January 31, 2019
    Date of Patent: May 12, 2020
    Assignee: Infineon Technologies Austria AG
    Inventors: Christian S. Rainer, Matthew A. Hunter
  • Patent number: 10516343
    Abstract: A power semiconductor package includes a reference voltage terminal, a supply voltage terminal, a phase terminal, a first power transistor and a second power transistor. The first power transistor and the second power transistor are connected in series and form a low side switch and a high side switch of a half bridge circuit.
    Type: Grant
    Filed: March 1, 2017
    Date of Patent: December 24, 2019
    Assignee: Infineon Technologies AG
    Inventors: Juergen Kositza, Herbert Gietler, Harald Huber, Michael Lenz
  • Patent number: 10496591
    Abstract: A drive circuit for a serial communications system is provided. The drive circuit may include a mode controller, a pre-drive circuit, and a main drive circuit. The main drive circuit includes multiple mode control switches and at least one pair of differential switches. The mode controller is configured to: generate a mode control signal, and transmit the mode control signal to the main drive circuit. The pre-drive circuit is configured to: convert a differential digital signal into a differential control signal, and transmit the differential control signal to the main drive circuit. The main drive circuit controls on/off states of the multiple mode control switches according to the mode control signal, and works in corresponding working modes. The drive circuit controls the states of the mode control switches in the main drive circuit, so that the main drive circuit works in different working modes.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: December 3, 2019
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Junming Han, Bingzhao Zhang, Jie Peng, Yongwang Liu
  • Patent number: 10491102
    Abstract: An object of the present invention is to provide a semiconductor device that can enhance the safety when feeding to a USB device. Provided is a semiconductor device including: a first power source circuit that generates an output voltage supplied to a USB device coupled to a USB connector; an abnormality detection circuit that determines the state of a supply route of the output voltage generated by the first power source circuit; and a control circuit that controls supply of the output voltage from the first power source circuit to the USB device on the basis of a determination result of the abnormality detection circuit.
    Type: Grant
    Filed: March 22, 2017
    Date of Patent: November 26, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Dan Aoki
  • Patent number: 10404181
    Abstract: A modular power conversion device includes at least one first-type energy storage device (ESD) configured to induce a first direct current (DC) voltage, and at least one active power link module (APLM) string coupled to the at least one first-type ESD. The at least one APLM string includes a plurality of APLMs coupled to each other. Each APLM of the plurality of APLMs has a plurality of switching devices including a first switching device and a second switching device coupled to each other in electrical series. Each APLM of the plurality of APLMs also has at least one second-type ESD coupled in electrical parallel with both of the first switching device and the second switching device. The at least one second-type ESD is configured to induce a second DC voltage.
    Type: Grant
    Filed: August 16, 2016
    Date of Patent: September 3, 2019
    Assignee: General Electric Company
    Inventors: Zhi Zhou, Di Zhang, Dong Dong, Tomas Sadilek
  • Patent number: 10303195
    Abstract: Voltage balancing and extracted output power circuit topologies use maximum power point and maximum power point tracking to provide voltage balancing and voltage and current adjustment to optimize extracted output power for corresponding DC voltage source strings (120a, 130a). The topologies used to control power generation include one or more voltage balancing circuits and/or power system optimizer circuits (102a) to reduce decreased power utilization and enable independent operating voltages of DC voltage source strings (120a, 130a) to provide voltage balancing and to deliver a maximum power independent of the voltage and current of other DC voltage source strings (120a, 130a). The current flowing in each DC voltage source string is controlled by the duty ratio of the corresponding switch (101a, 108a). The circuit topologies can include a plurality of voltage balancing/power system optimizer circuits (102a).
    Type: Grant
    Filed: November 6, 2015
    Date of Patent: May 28, 2019
    Inventors: Shehab Ahmed, Ahmed A. Elserougi, Ahmed M. Massoud, Ahmed Salah Morsy
  • Patent number: 10274981
    Abstract: A voltage dropping apparatus may include: a voltage dropping unit receiving an input voltage, outputting the input voltage in a first mode, and dropping a level of the input voltage in a second mode; a voltage output unit connected to the voltage dropping unit, receiving and outputting the input voltage in the first mode, and receiving and outputting the dropped voltage in the second mode; and a control unit receiving a mode signal and controlling a mode change of the voltage dropping unit and the voltage output unit based on a value of the mode signal.
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: April 30, 2019
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Hyun Hwan Yoo, Jong Myeong Kim, Yoo Hwan Kim, Yoo Sam Na, Dae Seok Jang, Hyun Jin Yoo
  • Patent number: 10243069
    Abstract: The present description relates to a gallium nitride transistor which includes at least one source/drain structure having low contact resistance between a 2D electron gas of the gallium nitride transistor and the source/drain structure. The low contact resistance may be a result of at least a portion of the source/drain structure being a single-crystal structure abutting the 2D electron gas. In one embodiment, the single-crystal structure is grown with a portion of a charge inducing layer of the gallium nitride transistor acting as a nucleation site.
    Type: Grant
    Filed: October 30, 2014
    Date of Patent: March 26, 2019
    Assignee: Intel Corporation
    Inventors: Han Wui Then, Sansaptak Dasgupta, Marko Radosavljevic, Seung Hoon Sung, Sanaz Gardner, Robert S. Chau
  • Patent number: 10224826
    Abstract: A control unit capable of accurately calculating a magnetization bias of a transformer is provided, thereby appropriately reducing the magnetization bias. The control unit acquires first and second currents that flow through a transformer during a period where either first or second switches individually turn ON. The control unit predicts an amount of magnetization bias in either positive side or negative side of the excitation current that flows through the transformer. The control unit reduces the magnetization bias of the transformer based on the predicted amount of magnetization bias.
    Type: Grant
    Filed: May 23, 2018
    Date of Patent: March 5, 2019
    Assignees: SOKEN, INC., DENSO CORPORATION
    Inventors: Seiji Iyasu, Yuji Hayashi, Yuichi Handa
  • Patent number: 10193446
    Abstract: A transformation system capable of efficiently transforming electrical power from one dc voltage to a second dc voltage or of regulating power flow within a network of constant nominal voltage; in each case without intermediate magnetic transformation. The transformation system is based on periodic and resonant delivery of charge from the first of two dc nodes to a system of capacitors, electrical reconfiguration of those capacitors, then delivery of power to a second dc node.
    Type: Grant
    Filed: October 7, 2016
    Date of Patent: January 29, 2019
    Assignees: ElecTranix Corporation
    Inventors: Lionel Barthold, Dennis Woodford, Maryam Salimi
  • Patent number: 10079535
    Abstract: A voltage control apparatus includes a boost converter configured to convert an input voltage to a voltage equal to or higher than a first voltage in an operative state and directly output the input voltage in an inoperative state, a buck-boost converter coupled with the boost converter in parallel and configured to convert the input voltage to a second voltage lower than the first voltage, a memory, and a processor coupled to the memory and configured to keep the buck-boost converter in the operative state, set the boost converter to the inoperative state when the input voltage is equal to or higher than the first voltage, and change the boost converter to the operative state when the input voltage is lower than the first voltage.
    Type: Grant
    Filed: June 6, 2017
    Date of Patent: September 18, 2018
    Assignee: FUJITSU LIMITED
    Inventors: Shogo Hiyama, Kentarou Yuasa
  • Patent number: 10079538
    Abstract: A circuit includes a charge pump to generate an output reference voltage. A first bootstrap refresh circuit receives the reference voltage from the charge pump and is coupled between first and second bootstrap nodes of a DC/DC converter. The first bootstrap refresh circuit supplies first charge current that is sourced from the first bootstrap node to the second bootstrap node based on a control signal indicating a first operating mode of the DC/DC converter. A second bootstrap refresh circuit receives the reference voltage from the charge pump and is coupled between the first and second bootstrap nodes of the DC/DC converter. The second bootstrap refresh circuit supplies second charge current from the second bootstrap node to the first bootstrap node based on the control signal indicating a second operating mode of the DC/DC converter.
    Type: Grant
    Filed: October 18, 2016
    Date of Patent: September 18, 2018
    Assignee: Texas Instruments Incorporated
    Inventors: Xiaochun Zhao, Hasibur Rahman, Artur Lewinski, Tulong Yang
  • Patent number: 10020660
    Abstract: The present invention relates to a technique for implementing a bidirectional DC-DC converter applied to an energy storage system. The bidirectional DC-DC converter includes a magnetically coupled inductor and a charging/discharging voltage storage unit between a DC link power supply and a battery power supply, and implements a high gain through a two-step voltage transformation process when a charging process or discharging process is performed. Thus, the bidirectional DC-DC converter can reduce the construction cost of the battery cell, guarantee a high voltage available range, and reduce the influence of leakage inductance.
    Type: Grant
    Filed: October 28, 2016
    Date of Patent: July 10, 2018
    Assignee: POSTECH ACADEMY-INDUSTRY FOUNDATION
    Inventors: Bong Koo Kang, Sang Won Lee, Kyung Min Lee, Yoon Geol Choi
  • Patent number: 9991776
    Abstract: A method and apparatus for switched mode power supply (SMPS) system includes circuitry configured to produce a voltage output based on an input voltage, the SMPS circuitry includes inductive, capacitive and switching elements configured to generate the voltage output. The switching elements include at least one set of cascode coupled devices, each set of cascode coupled devices including a high electron mobility transistor (HEMT) and one of a diode and a field effect transistor (FET) in a cascode coupling. A controller produces a signal to a gate terminal of the FET of the sets of cascode coupled devices to drive the HEMT switching rate to adjust the output voltage. The circuitry of the SMPS further includes circuitry to couple the substrate of at least one HEMT to a high voltage node of the SMPS system to reduce large voltage spikes or dv/dts.
    Type: Grant
    Filed: April 27, 2016
    Date of Patent: June 5, 2018
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Jaume Roig-Guitart, Filip Bauwens
  • Patent number: 9946291
    Abstract: A reference voltage generation circuit includes a loading block suitable for generating a reference current and first and second mirroring currents obtained by mirroring the reference current based on a power source voltage, a biasing block suitable for generating a first bias voltage controlled corresponding to variations in the power source voltage and a second bias voltage controlled corresponding to variations in temperature based on the first mirroring current, a compensation block suitable for compensating for the reference current based on the first and second bias voltages, and an output load block suitable for generating a reference voltage which corresponds to the reference current based on the second mirroring current.
    Type: Grant
    Filed: February 28, 2017
    Date of Patent: April 17, 2018
    Assignee: SK Hynix Inc.
    Inventor: Tae-Gyu Kim
  • Patent number: 9941686
    Abstract: Provided is a sensor device that suppresses a malfunction caused by a negative surge or a voltage drop. A sensor device includes a sensor element having an electrical characteristic varying according to a physical amount, a signal processing circuit configured to process an output signal of the sensor element, a transistor element interposed between a power source terminal and the signal processing circuit, a resistive element configured to connect a drain and a gate of the transistor element, or a collector and a base of the transistor element, and an element having threshold voltage for connecting the gate or the base of the transistor element to a GND. The element regulates current flowing from the resistive element in a direction of the GND, in a case in which supply voltage to the signal processing circuit falls below the threshold voltage.
    Type: Grant
    Filed: October 3, 2014
    Date of Patent: April 10, 2018
    Assignee: Hitachi Automotive Systems, Ltd.
    Inventors: Satoshi Asano, Masahiro Matsumoto, Hiroshi Nakano, Shinobu Tashiro
  • Patent number: 9923557
    Abstract: A first switching element and a gate of a voltage-driven switching element are connected by a gate turn-on wiring through a first resistor. The gate of the voltage-driven switching element and a second switching element are connected by a gate turn-off wiring through a second resistor. A charge pump unit has a first capacitor, and a second capacitor configured to output a negative voltage. A resistor unit is arranged in at least one of a first wiring configured to connect the gate turn-on wiring and the first capacitor and a second wiring configured to connect the gate turn-off wiring and the first capacitor, and is configured to charge the first capacitor through the first wiring when the first switching element is turned on and to discharge the first capacitor through the second wiring when the second switching element is turned on.
    Type: Grant
    Filed: November 2, 2016
    Date of Patent: March 20, 2018
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Yosuke Osanai
  • Patent number: 9921288
    Abstract: Electronic modules with small and flexible interfaces are disclosed. One example electronic module includes a power supply terminal configured to receive power for the electronic module and circuitry configured to carry out various functions. The functions carried out by the electronic module circuitry include simultaneously receiving both of the following via the power supply terminal: a power signal for carrying out a mission mode operation of the electronic module, and a data signal.
    Type: Grant
    Filed: April 28, 2016
    Date of Patent: March 20, 2018
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventor: Timothy J. Warneck
  • Patent number: 9917037
    Abstract: A semiconductor device PKG includes a semiconductor chip CP, a lead LD3, a wire BW5 electrically connecting a pad electrode PD2 of the semiconductor chip CP to the lead LD3, a wire BW3 electrically connecting a pad electrode PD3 of the semiconductor chip CP to the lead LD3, and a sealing body sealing them with a resin. The semiconductor chip CP includes internal circuits 5b and 5c, and a switch circuit unit SW. Signal transmission is possible between the internal circuit 5c and the pad electrode PD3. The switch circuit unit SW is a circuit capable of being set in a first state in which signal transmission is possible between the internal circuit 5b and the pad electrode PD2, and in a second state in which signal transmission is not possible between the internal circuit 5b and the pad electrode PD2. The switch circuit unit SW is fixed to the second state during operation of the semiconductor device PKG.
    Type: Grant
    Filed: January 22, 2015
    Date of Patent: March 13, 2018
    Assignee: Renesas Electronics Corporation
    Inventors: Yuichiro Ikeda, Satoshi Kotani
  • Patent number: 9917435
    Abstract: A power switching circuit provides temperature compensation for an insulated gate power switching device. A timing circuit determines a switch timing signal comprising desired on and off switching times of the switching device. A temperature monitor quantifies a device temperature. A gate drive profile generator generates a switching device drive signal according to the switch timing signal and having a dv/dt phase and a di/dt phase. The drive signal has a profile during the di/dt phase that is adjusted in response to the device temperature, and the drive signal has a profile during the dv/dt phase that is not adjusted in response to the device temperature.
    Type: Grant
    Filed: September 13, 2016
    Date of Patent: March 13, 2018
    Assignee: FORD GLOBAL TECHNOLOGIES, LLC
    Inventors: Xi Lu, Chingchi Chen, Michael W. Degner, Zhuxian Xu, Ke Zou
  • Patent number: 9896866
    Abstract: An electronic lock with power failure control circuit includes a lock mechanism having a latchbolt movable between extended and retracted positions and an electrically powered lock actuator to lock and unlock the latchbolt. The power failure control circuit includes a microcontroller and the lock is connected to a primary power source and an auxiliary power source, preferably supercapacitors and charger that can be turned on by the microcontroller and off when the charger signals a full charge. A power monitor circuit detects low voltage on the primary power supply and sets a power failure interrupt causing the microcontroller to execute power failure instructions that control the actuator so that the lock is placed into a desired locked or unlocked final state during the power failure. Upon detection of the return of good power, the system resets the lock.
    Type: Grant
    Filed: February 25, 2015
    Date of Patent: February 20, 2018
    Assignee: SARGENT MANUFACTURING COMPANY
    Inventors: Mark Bryla, Steve Morse, John C. Wren
  • Patent number: 9870175
    Abstract: A control chip for memory power sequence including input pins, a control circuit and output pins is provided. The control chip is compatible with a plurality of processor platforms. The input pins are configured to receive control signals corresponding to each of the processor platforms. The control circuit is configured to determine a selected processor platform among the processor platforms in which the control chip for memory power sequence is operated, and generate corresponding power switching signals according to the control signals of the selected processor platform. The output pins are configured to output the corresponding power switching signals to control a power sequence of a memory on the selected processor platform.
    Type: Grant
    Filed: May 3, 2017
    Date of Patent: January 16, 2018
    Assignee: Nuvoton Technology Corporation
    Inventors: Hsin-Lung Yang, Ming-Che Hung
  • Patent number: 9823734
    Abstract: A circuit includes a pulse generator coupled to a switch mode power supply. The switch mode power supply includes a switching component configured for transferring a charge to an energy storage component in response to pulses provided by the pulse generator. A pulse counter is coupled to the pulse generator or the switching component and configured to count pulses over a time period and thereby generate a pulse count. A converter coupled to the pulse counter is configured to generate a power measurement for the time period based on the pulse count. If the switch mode power supply has different modes of operation, a different counter may be used for each mode.
    Type: Grant
    Filed: August 18, 2014
    Date of Patent: November 21, 2017
    Assignee: Atmel Corporation
    Inventors: Ingar Hanssen, Frode Milch Pedersen
  • Patent number: 9806720
    Abstract: An inverter based on a compound semiconductor uses a depletion mode transistor as the pull-up device, and a current source to bias the pull-up device. The current source is electrically coupled to a source terminal of the pull-up device. As a result, the current source continues to conduct current through the pull-up device, whether the inverter output is high or low, to ensure rapid response of the inverter.
    Type: Grant
    Filed: October 7, 2016
    Date of Patent: October 31, 2017
    Assignee: Analog Devices Global
    Inventors: Bilal Tarik Cavus, Ozgun Serttek, Mehmet Bati
  • Patent number: 9787295
    Abstract: Disclosed herein is a power supply circuit for a gate driver. The power supply circuit for the gate driver includes a negative voltage generator configured to generate a negative voltage by receiving an input voltage, wherein the negative voltage generator includes a tank capacitor configured to be charged by receiving the input voltage through a charge path, a discharge switch configured to form a discharge path when the tank capacitor is discharged, and a negative voltage generation capacitor arranged on the discharge path and configured to generate the negative voltage by storing electric charges discharged from the tank capacitor when the tank capacitor is discharged.
    Type: Grant
    Filed: April 14, 2016
    Date of Patent: October 10, 2017
    Assignee: Research & Business Foundation Sungkyunkwan University
    Inventors: Chung Yuen Won, Jong Mu Lee, Song Wook Hyun
  • Patent number: 9673698
    Abstract: The invention provides a voltage regulator with multiple output ranges. The voltage regulator includes a voltage divider that has at least a first resistor and a second resistor. The resistance ratio of the first resistor to the second resistor is 1:(X?1). The input of the regulator is connected to the first resistor, and the output is connected to the second resistor. A voltage source may provide a reference voltage Vref to a connecting point between the first resistor and the second resistor. At least one working circuit is connected to the output to provide the output voltage as Vout=Vin?X(Vin?Vref), wherein Vin is the input voltage. As another option, the at least one working circuit may be deactivated and the output may be coupled to ground.
    Type: Grant
    Filed: November 9, 2014
    Date of Patent: June 6, 2017
    Assignee: CISTA SYSTEM CORP.
    Inventors: Li Guo, Guangbin Zhang
  • Patent number: 9638734
    Abstract: An electronic open-circuit current measuring circuit is configured to measure a current delivered between a current source and a load during an open circuit condition. The electronic open-circuit current measuring circuit includes an electronic voltage drop component electrically connected between a first buffer output and an electrical voltage difference calculating circuit. The voltage drop component is configured to reduce a first voltage level of the first buffered output voltage below a second voltage level of the second buffered output voltage in response to an open circuit condition.
    Type: Grant
    Filed: November 26, 2014
    Date of Patent: May 2, 2017
    Assignee: HAMILTON SUNDSTRAND CORPORATION
    Inventors: John Rajczewski, David J. Manna
  • Patent number: 9618956
    Abstract: A power supply for an electronic circuit enables a low effort retention mode. During a normal mode a circuit module is supplied a first voltage sufficient for a controlled circuit to operate. During the low effort retention mode the circuit module is supplied with a second voltage lower than the first voltage. The second voltage is sufficient for flop-flops to retain their state but not sufficient to guarantee proper circuit operation. The second voltage is produced by a voltage drop (droop) from the first voltage. The preferred embodiment includes a System On Chip and one external voltage regulator and an on-chip droop circuit for each circuit module.
    Type: Grant
    Filed: June 8, 2015
    Date of Patent: April 11, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Michael Gill, Ramakrishnan Venkatasubramanian, Shane Stelmach, Jose Luis Flores
  • Patent number: 9501081
    Abstract: A proportional-to-absolute-temperature (“PTAT”) circuit includes a bias component; first, second, third, and fourth transistors; an output transistor; and a first resistive component. A first terminal of the bias component is coupled to a voltage supply node. The first and second transistors are connected to a second terminal of the bias component. The third and fourth transistors have different current densities. The first transistor is coupled to the third transistor. The second transistor is coupled to the fourth transistor. The fourth transistor and the first resistive component are coupled to a voltage common node. The output transistor has a control terminal coupled to the second and fourth transistors, a first current terminal connected to an output node, and a second current terminal coupled to the third transistor and the first resistive component. The PTAT circuit is configured to generate at least a portion of a PTAT current at the output node.
    Type: Grant
    Filed: December 16, 2014
    Date of Patent: November 22, 2016
    Assignee: Freescale Semiconductor, Inc.
    Inventor: John M. Pigott
  • Patent number: 9450491
    Abstract: A circuit including: a three-level buck converter having: a plurality of input switches and an inductor configured to receive a voltage from the plurality of input switches, the plurality of input switches coupled with a first capacitor and configured to charge and discharge the first capacitor; a second capacitor at an output of the buck converter; and a switched capacitor at an input node of the inductor, wherein the switched capacitor is smaller than either the first capacitor or the second capacitor.
    Type: Grant
    Filed: February 24, 2015
    Date of Patent: September 20, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Chuang Zhang, James Thomas Doyle, Farsheed Mahmoudi, Amirali Shayan Arani