With Additional Stage Patents (Class 323/314)
  • Patent number: 8058862
    Abstract: A basic structure of a reference voltage generation circuit is formed by a buffer amplifier (21) and a resistive element (22) without using a band gap regulator. Thus, an influence of a noise of the band gap regulator as in the conventional art is eliminated. There are provided comparators (23) and (24) for comparing an input voltage of the buffer amplifier (21) with an output voltage of a band gap regulator (10), and a control circuit (25) for variably controlling a resistance value of the resistive element (22) in response to comparison signals. Consequently, even if an output voltage (Vout) of the buffer amplifier (21) temporarily fluctuates with a change in a source voltage (VDD), it returns into a desirable voltage range and converges through a variable control of the resistance value.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: November 15, 2011
    Assignee: Ricoh Co., Ltd.
    Inventors: Takeshi Ikeda, Hiroshi Miyagi
  • Patent number: 8054059
    Abstract: A current sense circuit includes a power transistor, a first level shifter, an operational transconductance amplifier (OTA), a second level shifter, and a dummy transistor. The power transistor has a first terminal and a power control terminal coupled to a control voltage. The first level shifter is coupled to the first terminal and pulls up a voltage of the first terminal to an operating voltage. The OTA is coupled to the first level shifter and converts the operating voltage into an operating current. The second level shifter is coupled to the OTA and pulls down the operating voltage to the voltage of the first terminal. The dummy transistor has a dummy control terminal with the control voltage, and a third terminal coupled to the second level shifter and having the same voltage as the voltage of the first terminal.
    Type: Grant
    Filed: September 4, 2008
    Date of Patent: November 8, 2011
    Assignee: Himax Analogic, Inc.
    Inventor: Kuo-Hung Wu
  • Patent number: 8044647
    Abstract: A voltage down converter includes a voltage comparator for comparing a first reference voltage and an internal voltage to provide a first driving signal; a driving signal controller coupled with the voltage comparator, the driving signal controller configured to generate a second driving signal in response to an external voltage and selectively providing any one of the first and second driving signals; and a voltage supply coupled with the driving signal controller, the voltage supply configured to receive the selectively provided first and second driving signals, wherein the voltage supply is activated in accordance with the first or second driving signal, thereby providing the internal voltage.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: October 25, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventor: Dong-Keum Kang
  • Patent number: 8040123
    Abstract: A reference voltage circuit that obtains a precisely constant voltage by compensating a temperature variation of a reference voltage circuit using band gap voltage. A p-type MOS transistor (PNP) outputs a reference voltage according to a control voltage, and provides respective PNPs having diode connections with currents corresponding to the reference voltage. A temperature compensation unit adds compensation currents proportional to the second power of absolute current to currents flowing in the respective PNPs, so that both voltages generated corresponding to the currents flowing in the respective PNPs become the same in the case where the band gap unit has temperature characteristics including a peak value. The band gap unit has a differential amplifier for outputting the control voltage. In the case where the band gap unit has a bottom value, the compensation unit subtracts the above compensation currents from the currents flowing in the respective PNPs.
    Type: Grant
    Filed: July 18, 2008
    Date of Patent: October 18, 2011
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Kenji Yanagawa
  • Patent number: 8026702
    Abstract: The present disclosure includes circuits, systems and methods for regulating voltage. One voltage regulator system embodiment includes a voltage regulator having an output and a number of stages coupled in parallel to the output of the voltage regulator. Each stage includes a source follower circuit, and a sample and hold circuit coupled in series between the output of the voltage regulator and an input of the source follower circuit.
    Type: Grant
    Filed: August 28, 2008
    Date of Patent: September 27, 2011
    Assignee: Micron Technology, Inc.
    Inventor: Toru Tanzawa
  • Patent number: 8026710
    Abstract: A system includes a device configured to operate in a first mode and a second mode. The device includes a first circuit configured to receive a first band gap voltage potential from a first band gap circuit when the device is operating in the first mode, and a second circuit configured to receive a second band gap voltage potential from a second band gap circuit when the device is operating in the second mode. The device is configured to generate a mode select signal to selectively turn on and off the first band gap circuit and the second band gap circuit. A calibration circuit is configured to compare the second band gap voltage potential to the first band gap voltage potential, output a calibration signal to the second band gap circuit to adjust the second band gap voltage potential based on the comparison, and turn off the first band gap circuit in response to the second band gap voltage potential being within a predetermined range of the first band gap voltage potential.
    Type: Grant
    Filed: September 10, 2010
    Date of Patent: September 27, 2011
    Assignee: Marvell International Ltd.
    Inventors: Sehat Sutardja, Jiancheng Zhang
  • Publication number: 20110227555
    Abstract: A buffer is provided. The buffer includes a buffering stage that receives an enable signal and an input signal and that provides an output signal and a bandgap stage that is coupled to the buffering stage and that is activated and deactivated by the enable signal. In particular, the buffering stage includes a buffering substage that includes a buffering transistor that is coupled to the input stage, wherein the buffering transistor is formed on a substrate, and wherein the buffering transistor has a channel with a doping concentration that is approximately the same as the substrate.
    Type: Application
    Filed: March 2, 2011
    Publication date: September 22, 2011
    Applicant: Texas Instruments Deutschland GmbH
    Inventor: Puneet Sareen
  • Patent number: 8022685
    Abstract: A circuit and a method for regulating a voltage supply where the method includes the steps of concurrently measuring temperature, IR drop and frequency response within the circuit, adjusting voltage supplied to the circuit in response to the measured temperature, IR drop and frequency response, and determining a correction value based on the variance of the measured frequency response from an expected frequency response and providing a correction for subsequent predetermined frequency response values. The frequency response measurement is dependent upon the constant bandgap voltage source which may very according to temperature. Upon a determination that corrections may be required for the bandgap voltage source to compensate for temperature variations, the measurement process which uses the bandgap voltage source can be altered to compensate for the temperature variations.
    Type: Grant
    Filed: February 6, 2007
    Date of Patent: September 20, 2011
    Assignee: International Business Machines Corporation
    Inventors: Deepak K. Singh, Francois Ibrahim Atallah
  • Publication number: 20110221419
    Abstract: The semiconductor integrated circuit device includes load circuits and internal voltage generators for generating internal source voltages for driving the load circuits. Each of the internal voltage generators includes a reference voltage generating circuit for generating reference voltages, and regulator circuits for generating the internal source voltages with reference to the reference voltages. The regulator circuit is formed over an SOI substrate and includes a preamplifier circuit for detecting and amplifying a difference between each of the internal source voltages and each of the reference voltages, a main amplifier circuit for amplifying the output of the preamplifier circuit and generating a control signal, and a driver circuit for generating the internal source voltage in response to the control signal. An input stage of the main amplifier circuit is configured by MOS transistors coupling the gates and bodies of the MOS transistors.
    Type: Application
    Filed: May 25, 2011
    Publication date: September 15, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Fukashi Morishita
  • Patent number: 8013668
    Abstract: A compensation device that can include a bias-able device, a bias circuit that provides the bias-able device with a bias current, a signal conditioner selectively coupled to the bias-able device, and an emulator. The signal conditioner and emulator can divert current from the bias-able device in an operational and calibration mode, respectively. In calibration mode, the emulator generates a compensation current that is combined with a sense current so that the sense current equals the bias current.
    Type: Grant
    Filed: May 21, 2010
    Date of Patent: September 6, 2011
    Assignee: Marvell International Ltd.
    Inventor: Kan Li
  • Patent number: 8008904
    Abstract: A current supply circuit provides current that is substantially invariant with voltage supply and temperature changes. The current supply circuit has an input node connectable to a voltage supply and an output node operable to provide an output current. The current supply circuit includes a current source circuit coupled to a reference voltage node and configured to provide the output current at the output node, wherein a voltage at the reference voltage node controls current output of the current source circuit. The current supply circuit also includes a reference-setting circuit coupled to the reference voltage node and operable to establish a reference current level of the current source circuit, a common-emitter circuit coupled to the input node, and an emitter-follower circuit coupled to the input node, the emitter-follower circuit having an input coupled to an output of the common-emitter circuit and an output coupled to the reference voltage node.
    Type: Grant
    Filed: July 31, 2008
    Date of Patent: August 30, 2011
    Assignee: Gigoptix, Inc.
    Inventor: Vikas Manan
  • Patent number: 8004265
    Abstract: A voltage generating circuit for generating a plurality of associated voltages includes a constant current source for generating a constant current; a plurality of resistors connected in series to the constant current source in series for generating a plurality of associated reference voltages; and a first controlled switch connected to a first resistor in parallel, wherein the plurality of associated reference voltages are changed by optionally conducting the first controlled switch to control the flow of the constant current through the first resistor.
    Type: Grant
    Filed: October 10, 2008
    Date of Patent: August 23, 2011
    Assignee: MStar Semiconductor, Inc.
    Inventors: Chun Kai Derrick Wei, Kuan-Yeu Chen, Hung I Wang, Song-Yi Lin
  • Patent number: 8004266
    Abstract: A chopper stabilized bandgap voltage reference circuit comprises current mirror circuitry mirroring first and second currents into first and second networks to generate a forward diode voltage signal and a PTAT (proportional to absolute temperature) component signal, and a third current having a derived temperature coefficient into a third network to generate a reference voltage signal for a regulator. An amplifier amplifies a differential signal of the forward diode voltage signal and the PTAT component signal to output a fourth current to control the first and second currents. According to a chopper clock, a modulator modulates the differential signal to be supplied to the amplifier and a demodulator demodulates the fourth current. A gain loop compensation circuit is coupled to the demodulator to compensate the amplifier, and filter the fourth current for noise components, and a bypass circuit is also provided to the third network for filtering the third current.
    Type: Grant
    Filed: May 22, 2009
    Date of Patent: August 23, 2011
    Assignee: Linear Technology Corporation
    Inventor: Kelly Joel Consoer
  • Patent number: 7990128
    Abstract: Embodiments of the invention concern a circuit for pulling a potential at a node towards a feed potential which is present at a potential feed. The circuit has a first transistor with a controllable conductive path and in addition a resistive element. The controllable conductive path of the first transistor and the resistive element are coupled in series between the potential feed and the node. Furthermore, the circuit has a control element configured to control the first transistor so that a resistance of the controllable conductive path of the first transistor can be changed depending on a voltage drop at the resistive element. Furthermore, a method for pulling a potential at a node towards a feed potential and an integrated circuit with a pad which is pulled to the feed potential in the absence of an information carrying signal which is received or send by a functional circuitry of the integrated circuit.
    Type: Grant
    Filed: April 25, 2008
    Date of Patent: August 2, 2011
    Assignee: Infineon Technologies AG
    Inventor: Bernd Zimek
  • Patent number: 7977932
    Abstract: The present invention provides a regulator circuit that can fast-respond to a variation in load current and supply a sufficient drive current so as to be capable of generating a stable internal source voltage. The regulator circuit includes a preamplifier circuit that detects and amplifies a different between a reference voltage and an internal source voltage, a clamp circuit that limits the amplitude of an output of the preamplifier circuit, a main amplifier circuit that amplifies the amplitude-limited output of the preamplifier circuit, and a driver circuit that outputs the internal source voltage according to the output of the main amplifier. Even though the internal source voltage varies abruptly, the regulator circuit does not oscillate owing to the effect of the clamp circuit.
    Type: Grant
    Filed: September 9, 2008
    Date of Patent: July 12, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Fukashi Morishita
  • Patent number: 7977931
    Abstract: Power efficient power supply regulator circuits are disclosed. The circuits are configured to modify their overhead current according to current load. This is particularly advantageous for use in display devices with widely varying current loads. Such displays include bi-stable displays, such as interferometric modulation displays, LCD displays, and DMD displays.
    Type: Grant
    Filed: March 18, 2008
    Date of Patent: July 12, 2011
    Assignee: QUALCOMM MEMS Technologies, Inc.
    Inventor: Sameer Wadhwa
  • Patent number: 7973526
    Abstract: A reference voltage generator for improving setup voltage characteristics without an increase in a standby current and a method of controlling the same, in which the reference voltage generator includes: a reference voltage generation unit including a resistor connected between a power supply voltage and an output node, for dividing the power voltage, and generating a reference voltage fed to the output node thereof; a voltage detector receiving a feedback of the reference voltage and detecting a level of the reference voltage; and a bypass circuit connected in parallel to the resistor of the reference voltage generation unit and bypassing the resistor in response to an output signal of the voltage detector.
    Type: Grant
    Filed: February 27, 2008
    Date of Patent: July 5, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jun-phyo Lee
  • Patent number: 7969136
    Abstract: A semiconductor device includes: a first reference voltage generator for generating a first reference voltage; a first band gap circuit for dividing a voltage at a second reference voltage output node to produce a first and a second band gap voltages having a property relative to temperature variations; a first comparator for receiving the first reference voltage as a bias input and comparing the first band gap voltage with the second band gap voltage; and a first driver for pull-up driving the second reference voltage output node in response to an output signal of the first comparator.
    Type: Grant
    Filed: December 6, 2007
    Date of Patent: June 28, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventors: Khil-Ohk Kang, Sang-Jin Byeon
  • Patent number: 7960959
    Abstract: An arrangement having a first converting element configured to convert an input current linearly into an auxiliary current, a second converting element configured to convert the auxiliary current into an output voltage, and a separating element configured to separate slow changes of the auxiliary current from fast changes of the auxiliary current, wherein the first, second, and separating elements are arranged as a dynamic control loop regulating the input current with the slow changes.
    Type: Grant
    Filed: March 12, 2007
    Date of Patent: June 14, 2011
    Assignees: Infineon Technologies Austria AG, Technische Universitaet Graz
    Inventors: Albert Missoni, Christian Klapf
  • Publication number: 20110133719
    Abstract: According to one embodiment, a voltage reference circuit operable with a low voltage supply comprises an op-amp powered by the low voltage supply and a feedback branch including a transistor driven by an output of the op-amp. The feedback branch couples the low voltage supply to ground through the transistor and at least a rectifying device situated between a reference node of the feedback branch and ground. An input of the op-amp is coupled to the reference node by a voltage divider. In one embodiment, the voltage reference circuit further comprises a reference branch coupling a second reference node to ground through at least a second rectifying device, and wherein a second input of the op-amp is coupled to the second reference node by a second voltage divider.
    Type: Application
    Filed: December 4, 2009
    Publication date: June 9, 2011
    Inventors: Alvin Leng Sun Loke, Tin Tin Wee, Chad Owen Lackey, Bruce Andrew Doyle
  • Patent number: 7952342
    Abstract: A constant current source apparatus is provided that includes a complementary switching section that selectively outputs a reference voltage or a driving voltage according to a control signal and a constant current source circuit that causes a constant current determined by the reference voltage to flow to a load in a case where the reference voltage is received from the complementary switching section and cuts off the current flowing to the load in a case where the driving voltage is received from the complementary switching section.
    Type: Grant
    Filed: October 17, 2007
    Date of Patent: May 31, 2011
    Assignee: Advantest Corporation
    Inventor: Hiroyuki Satoh
  • Patent number: 7944194
    Abstract: A reference current generator circuit suitable for low-voltage applications is provided. The generator circuit is fabricated in a chip for generating a precise reference current based on a precise reference voltage and a precise external resistor. The generator circuit provides an equivalent resistance coupled in parallel with the external resistor to provide resistance compensation and reduce the impedance of seeing into the chip from a chip pad. In addition to the resistance compensation, only moderate capacitance compensation is required to enhance the phase margin of the generator circuit, so as to achieve a stable loop. Therefore, chip area and cost can be reduced in low-voltage applications. In addition, the generator circuit reproduces the reference current generated by the external resistor by utilizing current mirrors, so as to eliminate the effect on currents caused by parallel coupling of the equivalent resistance and the external resistor.
    Type: Grant
    Filed: December 1, 2008
    Date of Patent: May 17, 2011
    Assignee: Faraday Technology Corp.
    Inventors: Ting-Chun Huang, Kuan-Yu Chen, Yuan-Hsun Chang
  • Patent number: 7944195
    Abstract: Embodiments relate to a start-up circuit for a reference voltage generation circuit. According to embodiments, a start-up circuit may include a start-up start unit allowing current to flow in the reference voltage generation circuit to initiate a start-up process in response to a start-up start signal, a reference current generation unit decreasing a variable voltage depending on whether the reference voltage generation circuit is started up and generating start-up reference current corresponding to the variable voltage, and a start-up controller detecting current flowing in the reference voltage generation circuit, comparing the detected result with the start-up reference current, and outputting the compared result as a start-up start signal. Current consumption may be decreased after start-up. A BRG circuit may be stably started up. If a high supply voltage is used, current consumption may decrease, and if a low supply voltage is used, a BGR circuit may be stably started up.
    Type: Grant
    Filed: December 14, 2008
    Date of Patent: May 17, 2011
    Assignee: Dongbu HiTek Co., Ltd.
    Inventor: Byung-Tak Jang
  • Patent number: 7940037
    Abstract: An electronic device is provided comprising a driver for light emitting semiconductor devices. The driver includes a first MOS transistor (MN1) coupled with a channel to the light emitting semiconductor device at an output node. The first MOS transistor (MN1) is configured to determine a current through the light emitting semiconductor device (LED). A control loop is provided so as to control the first MOS transistor to maintain the magnitude of the current through the light emitting semiconductor device at a target value when a voltage drop across the first MOS transistor (MN1) changes. A second MOS transistor is coupled to the output node and biased so as to supply an auxiliary current to the output node, when the voltage drop across the first MOS transistor drops below a minimum voltage level and a feedback loop is provided to reduce the current through the light emitting semiconductor device by an amount proportional to the auxiliary current.
    Type: Grant
    Filed: October 7, 2008
    Date of Patent: May 10, 2011
    Assignee: Texas Instruments Deutschland GmbH
    Inventor: Franz Prexl
  • Patent number: 7936161
    Abstract: In a conventional bias circuit, as a power supply voltage increases, a current supplied to a bandgap reference becomes unstable due to a fluctuation of the power supply voltage, which makes it impossible for the bias circuit to perform stable bias operations in some cases. A bias circuit of the present invention has a bandgap reference, and includes a first current path supplying a drive current to the bandgap reference, and a second current path supplying a current to the bandgap reference for a predetermined period of time after power-on.
    Type: Grant
    Filed: June 9, 2008
    Date of Patent: May 3, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Kurao Nakagawa
  • Patent number: 7936207
    Abstract: An internal voltage generating circuit includes an internal voltage generating unit configured to generate an internal voltage that corresponds to a target voltage level by driving an internal voltage terminal with an external power supply voltage, and current sinking unit configured to adjust leakage current introduced to the internal voltage terminal in response to the external power supply voltage.
    Type: Grant
    Filed: December 24, 2008
    Date of Patent: May 3, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventor: Jae-Hyuk Im
  • Patent number: 7936204
    Abstract: A temperature sensing circuit includes a temperature-dependent voltage generating block configured to generate a plurality temperature-dependent voltages having voltage levels that are changed according to temperature; and a comparing block configured to compare each voltage level of the temperature-dependent voltages with a voltage level of a predetermined voltage to output thermal codes.
    Type: Grant
    Filed: June 19, 2009
    Date of Patent: May 3, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventor: Jong-Man Im
  • Patent number: 7928709
    Abstract: A voltage regulator is provided. An input node receives an input voltage. An output node provides a supply voltage. A first transistor is coupled between the input node and a node. A first resistor is coupled between the input node and a gate of the first transistor. A second transistor is coupled between the node and the output node. An amplifier includes a non-inverting input terminal for receiving a reference voltage and an inverting input terminal. A second resistor is coupled between the inverting input terminal and a ground. A third transistor is coupled between the second resistor and a gate of the second transistor, wherein the third transistor is controlled by an output of the amplifier. A fourth transistor is coupled between the third transistor and the first node, wherein a gate of the fourth transistor is coupled to the gate of the second transistor.
    Type: Grant
    Filed: February 4, 2009
    Date of Patent: April 19, 2011
    Assignee: Vanguard International Semiconductor Corporation
    Inventor: Rogelio L. Erbito, Jr.
  • Patent number: 7928708
    Abstract: A differential amplifier receives a reference voltage and a divided voltage dividing an output voltage, and outputs a control voltage in accordance with the difference between the reference voltage and the divided voltage. The control voltage output from the differential amplifier is supplied to an output amplifier. The output amplifier generates a stabilized output voltage from a high-potential-side power supply voltage in accordance with the control voltage. A P-type MOS transistor is connected to a node of the output voltage, and the MOS transistor carries a current from the node of the output voltage. A current control circuit controls a gate of the P-type MOS transistor so that the current flowing through the P-type MOS transistor becomes a constant value.
    Type: Grant
    Filed: April 24, 2008
    Date of Patent: April 19, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Shuichi Takada, Takeshi Abiru
  • Publication number: 20110080154
    Abstract: A temperature compensation circuit, comprises a temperature sensor circuit. The circuit comprises two or more temperature sensitive devices. In use, the devices are operated at different current densities and sense virtually the same ambient temperature. The devices provide temperature dependent signals having linear components with slopes of identical signs. The circuit further comprises one of more differential signal providing device for generating a difference of the signals generated by the temperature sensitive devices. A method for generating a voltage reference with a well-defined temperature behaviour, comprises applying different current densities to two or more temperature sensitive devices of a temperature sensor circuit; sensing virtually the same ambient temperature with the two or more temperature sensitive devices.
    Type: Application
    Filed: June 18, 2008
    Publication date: April 7, 2011
    Applicant: Freescale Semiconductor, Inc.
    Inventors: YI YIN, Ralf Reuter
  • Patent number: 7920015
    Abstract: In a traditional, fully-isolated bandgap reference circuits, it was difficult to detect currents that are proportional to absolute temperature (PTAT). Here, a PTAT reference in a fully isolated NPN-based bandgap references are disclosed. These circuits in particular are able to make detections using various current without the need for stand-along operational amplifiers.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: April 5, 2011
    Assignee: Texas Instruments Incorporated
    Inventor: Ananthasayanam Chellappa
  • Patent number: 7915882
    Abstract: A current reference circuit is disclosed. A small startup current is defined as the base current into a bipolar transistor with its collector-emitter path connected in series with a resistor between the power supply voltage and ground. This startup current is conducted via a diode-connected MOS transistor in a first leg of a current mirror. Temperature compensation is maintained by a reference leg in the current mirror that includes a bipolar transistor having an emitter area N times larger than that of a bipolar transistor in a second leg of the current mirror, to establish a temperature-compensated current in the reference leg. A compensation capacitor connected between the collector and base of a bipolar transistor in the first leg suppresses oscillation, and can be modest in size due to the Miller effect.
    Type: Grant
    Filed: August 28, 2008
    Date of Patent: March 29, 2011
    Assignee: Texas Instruments Incorporated
    Inventor: James R. Hellums
  • Patent number: 7907003
    Abstract: An electronic circuit may comprise an input stage powered by a supply voltage and configured to receive a reference signal. The circuit may further comprise an output stage powered by the supply voltage and coupled to the input stage, and configured to generate an error signal based on: the reference signal, and a feedback signal based on an output signal. The circuit may also include a pass transistor powered by the supply voltage and configured to generate the output signal based on the error signal. A capacitor coupled between the supply voltage and the output stage may increase the current flowing in the output stage, resulting in the output stage conducting current even during a rising edge of the supply voltage, preventing the output signal from reaching the level of the supply voltage during the rising edge of the supply voltage.
    Type: Grant
    Filed: January 14, 2009
    Date of Patent: March 15, 2011
    Assignee: Standard Microsystems Corporation
    Inventors: Srinivas K. Pulijala, Paul F. Illegems
  • Patent number: 7902808
    Abstract: In order to prevent interference of signals in a plurality of outputs from a current mirror circuit, the current mirror circuit comprises a current mirror input transistor Q1 through which a constant current flows and a plurality of current mirror output transistors Q7 and Q8 which have control ends commonly connected to a control end of the current mirror input transistor Q1. The constant current is supplied from the plurality of current mirror output transistors Q7 and Q8 to a plurality of operating circuits. Further, at least one of the plurality of current mirror output transistors Q7 and Q8 is equipped with a low pass filter for removing a high-frequency component contained in a current output from the at least one of the plurality of current mirror output transistors Q7 and Q8.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: March 8, 2011
    Assignees: Sanyo Electric Co., Ltd., Sanyo Semiconductor Co., Ltd.
    Inventor: Fuminori Hashimoto
  • Patent number: 7893670
    Abstract: A voltage regulator may comprise a regulator output configured to provide a regulated voltage, which may be controlled by an error amplifier based on the regulated voltage and a reference voltage. The error amplifier may control a source-follower stage to mirror a multiple of the current flowing in the source-follower stage into an internal pass device. A voltage developed by the mirror current may control an external pass device configured to deliver the load current into the regulator output. A first resistor may be configured to decouple a load capacitor coupled between the regulator output and reference ground, when the load current is below a specified value. A second resistor may be configured to create a bias current in the internal pass device even when the external pass device is close to cut-off region. A third resistor may be configured to counter the effects of negative impedance at the control terminal of the external pass device caused by the current-gain of the external pass device.
    Type: Grant
    Filed: February 20, 2009
    Date of Patent: February 22, 2011
    Assignee: Standard Microsystems Corporation
    Inventors: Srinivas K. Pulijala, Scott C. McLeod
  • Patent number: 7884594
    Abstract: Inventive embodiments described here provide for accurately distributing a voltage reference to multiple cores of an integrated circuit (IC). A quasi-differential interface is used to transmit the voltage reference, and a virtual ground is established at a receiver located at each core location on the integrated circuit. In one embodiment, the receiver is an operational transconductance amplifier (OTA) that converts a virtual-ground-referenced voltage input to a current. In one embodiment, the OTA converts the virtual-ground-referenced voltage into three currents via three driving current sources operating relative to the virtual ground and the local ground of the core. Negative feedback controls the accuracy of this conversion and provides a way to cancel the effects of the distribution resistance. The current is sourced across the voltage domains between the virtual ground and the VSS, which is the IC ground. An I*R drop across a resistor converts the current to a voltage referenced to VSS at the output.
    Type: Grant
    Filed: July 31, 2008
    Date of Patent: February 8, 2011
    Assignee: International Business Machines Corporation
    Inventor: Todd M. Rasmus
  • Patent number: 7880534
    Abstract: A reference circuit for providing a precision voltage and a precision current includes a bandgap voltage reference circuit, a positive temperature coefficient calibrating circuit, a threshold voltage superposing circuit and precision current generator interconnected in cascade. From the bandgap voltage reference circuit, a bandgap voltage is outputted as the precision voltage, and a PTAT current is outputted to the positive temperature coefficient calibrating circuit along with the bandgap voltage for generating a PTAT voltage. In response to the PTAT voltage from the positive temperature coefficient calibrating circuit, the threshold voltage superposing circuit generates a first voltage which is equal to the PTAT voltage plus a threshold voltage. Then the precision current generator outputs a reference current as the precision current in response to the first voltage.
    Type: Grant
    Filed: May 8, 2009
    Date of Patent: February 1, 2011
    Assignee: Faraday Technology Corp.
    Inventors: Din-Jiun Huang, Kuan-Yu Chen, Yuan-Hsun Chang
  • Publication number: 20110012582
    Abstract: A low-pass filter that filters an input signal input to a filter input terminal to output a filtered output signal to a filter output terminal includes a capacitor, a first field-effect transistor, a first resistor, and a first current source. The capacitor is connected between the filter output terminal and ground. The first field-effect transistor has a gate terminal, a first conduction terminal connected to the filter input terminal, and a second conduction terminal connected to the filter output terminal. The first resistor is connected between the gate and first conduction terminals of the first transistor. The first current source is connected to the first resistor to supply a first current to the first resistor. The first resistor generates a first voltage thereacross based on the supplied first current for electrically biasing the gate terminal of the first transistor.
    Type: Application
    Filed: July 13, 2010
    Publication date: January 20, 2011
    Applicant: RICOH COMPANY, LTD.
    Inventor: Katsuhiko AISU
  • Patent number: 7872462
    Abstract: A bandgap reference circuit is provided. An input node receives a supply voltage. An output node provides a reference voltage. A first transistor is coupled between the input node and the output node and has a first control terminal. A resistor is coupled between the input node and the first control terminal. A second transistor is coupled to the first control terminal and has a second control terminal coupled to the output node. A third transistor is coupled between the second transistor and a ground terminal and has a third control terminal. A voltage dividing unit provides a first voltage and a second voltage according to the reference voltage. A differential amplifier provides a signal to the third control terminal according to a difference between the first and second voltages.
    Type: Grant
    Filed: October 27, 2008
    Date of Patent: January 18, 2011
    Assignee: Vanguard International Semiconductor Corporation
    Inventor: Rogelio L. Erbito, Jr.
  • Publication number: 20110006750
    Abstract: A band gap voltage reference circuit includes a first band gap circuit configured to generate a first band gap voltage potential. A second band gap circuit includes a variable resistance. The second band gap circuit is configured to output a second band gap voltage potential based on a value of the variable resistance. A calibration circuit is configured to adjust the variable resistance of the second band gap circuit based on the first band gap voltage potential and the second band gap voltage potential. The first band gap circuit is shut down in response to the second band gap voltage potential being within a predetermined range of the first band gap voltage potential.
    Type: Application
    Filed: September 10, 2010
    Publication date: January 13, 2011
    Inventors: Sehat Sutardja, Jiancheng Zhang
  • Publication number: 20100315060
    Abstract: A basic structure of a reference voltage generation circuit is formed by a buffer amplifier (21) and a resistive element (22) without using a band gap regulator. Thus, an influence of a noise of the band gap regulator as in the conventional art is eliminated. There are provided comparators (23) and (24) for comparing an input voltage of the buffer amplifier (21) with an output voltage of a band gap regulator (10), and a control circuit (25) for variably controlling a resistance value of the resistive element (22) in response to comparison signals. Consequently, even if an output voltage (Vout) of the buffer amplifier (21) temporarily fluctuates with a change in a source voltage (VDD), it returns into a desirable voltage range and converges through a variable control of the resistance value.
    Type: Application
    Filed: November 30, 2007
    Publication date: December 16, 2010
    Applicants: NSC CO., LTD., Ricoh Co., Ltd.
    Inventors: Takeshi Ikeda, Hiroshi Miyagi
  • Publication number: 20100301832
    Abstract: Embodiments of the present invention include systems and methods for generating a curvature compensated bandgap voltage reference. In an embodiment, a curvature compensated bandgap reference voltage is achieved by injecting a temperature dependent current at different points in the bandgap reference voltage circuit. In an embodiment, the temperature dependent current is injected in the proportional to absolute temperature (PTAT) and complementary to absolute temperature (CTAT) current generation block of the bandgap circuit. Alternatively, or additionally, the temperature dependent current is injected at the output stage of the bandgap circuit. In an embodiment, the temperature dependent current is a linear piecewise continuous function of temperature. In another embodiment, the temperature dependent current has opposite dependence on temperature to that of the bandgap voltage reference before curvature compensation.
    Type: Application
    Filed: July 7, 2009
    Publication date: December 2, 2010
    Applicant: Broadcom Corporation
    Inventors: Vipul KATYAL, Mark RUTHERFORD
  • Patent number: 7843254
    Abstract: Generating a bandgap reference by generating a first current in a first circuit and a second current in a second circuit, a control circuit forcing the first and second currents to have a first magnitude proportional-to-temperature. Generating a third current in a third circuit having a second magnitude based on a first voltage associated with the first circuit, the second magnitude being complementary-to-temperature. Adding the first and second magnitudes in a fourth circuit to form a third magnitude substantially constant over change in temperature, the fourth circuit generating a fourth current having the third magnitude. Adding the first and second magnitudes to generate a fifth current having the first magnitude in a fifth circuit and a sixth current having the second magnitude in a sixth circuit, the fifth and sixth circuits sinking current from the fourth circuit.
    Type: Grant
    Filed: October 31, 2007
    Date of Patent: November 30, 2010
    Assignee: Texas Instruments Incorporated
    Inventor: Ananthasayanam Chellappa
  • Publication number: 20100283516
    Abstract: A reference voltage generation circuit includes a driving control unit configured to output an enable signal during a first time period in response to a power-on reset (POR) signal, a reference voltage generation unit configured to have an initial operation determined in response to the enable signal and to output a reference voltage maintained at a constant voltage level after the first time period, and a reference voltage control unit configured to fix the voltage level of the reference voltage to a first voltage upon a voltage level of the reference voltage being increased to at least a set voltage level.
    Type: Application
    Filed: December 28, 2009
    Publication date: November 11, 2010
    Inventor: Won Beom CHOI
  • Patent number: 7821245
    Abstract: A voltage transformation circuit comprising a first input, a second input, a first output, first and second impedances and a current mirror having master and slave terminals, wherein the first impedance is connected between the first input and the master terminal of the current mirror, the second impedance is connected between the second input and the slave terminal of the current mirror, and the first output is connected to the slave terminal of the current mirror.
    Type: Grant
    Filed: August 6, 2007
    Date of Patent: October 26, 2010
    Assignee: Analog Devices, Inc.
    Inventor: Peter James Tonge
  • Patent number: 7804286
    Abstract: An amplifier/comparator includes a multitude of output stages all sharing the same input stage. One or more of the output stages are amplification stages and have compensated output signals. A number of other output stages are not compensated and provide comparison signals. Each uncompensated output stage is adapted to switch to a first state if it detects a first input signal as being greater than a second signal, and further to switch to a second state if it detects the first input signal as being smaller than the second signal. By varying the channel-width (W) to channel-length (L) ratio (W/L) of the transistors disposed in the output stages, the trip points of the comparators and/or the electrical characteristics of the amplifiers are selectively varied.
    Type: Grant
    Filed: September 5, 2007
    Date of Patent: September 28, 2010
    Assignee: Linear Technology Corporation
    Inventor: Damon Lee
  • Patent number: 7804354
    Abstract: A system and method for extending the operating life of a device susceptible to defects caused by total ionizing dose radiation and/or bias dependent degradation are described. The device is replicated at least once and at least one switching mechanism is used to cycle between the devices such that only one device is operating normally. While the first device is operating normally, the other devices are biased. The bias condition may slow, eliminate, or even reverse device shifts that occur due to total ionizing dose radiation or bias effects.
    Type: Grant
    Filed: October 24, 2007
    Date of Patent: September 28, 2010
    Assignee: Honeywell International Inc.
    Inventor: David O. Erstad
  • Patent number: 7795857
    Abstract: A band gap voltage reference circuit includes a first band gap circuit configured to generate a first band gap voltage potential. A second band gap circuit includes a variable resistance. The second band gap circuit is configured to output a second band gap voltage potential based on a value of the variable resistance. A calibration circuit is configured to adjust the variable resistance of the second band gap circuit based on the first band gap voltage potential and the second band gap voltage potential. The first band gap circuit is shut down in response to the second band gap voltage potential being within a predetermined range of the first band gap voltage potential.
    Type: Grant
    Filed: August 24, 2009
    Date of Patent: September 14, 2010
    Assignee: Marvell International Ltd.
    Inventors: Sehat Sutardja, Jiancheng Zhang
  • Publication number: 20100213918
    Abstract: A layout of a voltage/current reference system is disclosed. A first voltage/current reference circuit (for example, a bandgap reference circuit) and a second voltage/current reference circuit are respectively laid out on either side of a substrate, such as edges or perimeter sides of the substrate. A reference voltage/current is derived by averaging respective output reference voltage/current values of the first and the second voltage/current reference circuits. Accordingly, the noise influence on the voltage/current reference system is minimized.
    Type: Application
    Filed: February 26, 2009
    Publication date: August 26, 2010
    Inventors: Yi-Chang Lu, Cheng-Hung Li, Chung-Yui Kuo, Tsung-Yu Wu
  • Patent number: 7782042
    Abstract: A reference voltage supply circuit includes a first supply circuit that includes a reference-voltage first-type operational amplifier and supplies an analog reference voltage to a first analog reference voltage line, and a second supply circuit that includes a reference-voltage second-type operational amplifier and supplies the analog reference voltage to a second analog reference voltage line. When a channel width and a channel length of a differential-stage transistor of a differential section of the reference-voltage first-type operational amplifier are respectively referred to as W1a and L1a, a bias current flowing through the differential section is referred to as Ia, a channel width and a channel length of a differential-stage transistor of a differential section of the reference-voltage second-type operational amplifier are respectively referred to as W1b and L1b, and a bias current flowing through the differential section is referred to as Ib, W1b×L1b>W1a×L1a and Ia>Ib are satisfied.
    Type: Grant
    Filed: November 8, 2007
    Date of Patent: August 24, 2010
    Assignee: Seiko Epson Corporation
    Inventor: Akihiro Fukuzawa