Using Radiant Energy Patents (Class 324/501)
  • Publication number: 20100156430
    Abstract: The present invention relates to a measuring instrument for a photovoltaic system; the system is of the type comprising at least one photovoltaic module (FM1; FM2) and at least one conversion module (CM1; CM2) connected to the output of the photovoltaic module (FM1; FM2); the instrument comprises first measuring means (MM1, MM3) adapted to be connected to the photovoltaic module (FM1; FM2) and to determine electric generation efficiency values, as well as second measuring means (MM1, MM2) adapted to be connected to the conversion module (CM1; CM2) and to determine electric conversion efficiency values.
    Type: Application
    Filed: March 19, 2009
    Publication date: June 24, 2010
    Inventors: Giuliano Quaini, Marco Bettani, Paolo Spelta
  • Publication number: 20100153033
    Abstract: A junction-photovoltage method and apparatus for contactless determination of an electrical/physical parameter of a semiconductor structure having at least one p-n junction located at a surface is disclosed. In one aspect, the method includes illuminating the surface with the p-n junction with a light beam of a first wavelength to create excess carriers at the surface. The method also includes modulating the light intensity of the light beam at a single predefined frequency. The method also includes determining a first photo-voltage at a first position inside the illuminated area and a second photo-voltage at least a second position outside the illuminated area. The method also includes calculating an electrical/physical parameter of the semiconductor structure based on the first and second photo-voltage.
    Type: Application
    Filed: November 17, 2009
    Publication date: June 17, 2010
    Applicant: IMEC
    Inventors: Frederic Schaus, Trudo Clarysse
  • Publication number: 20100148790
    Abstract: To analyse an electric component in depth, provision is made to submit said component to focused laser radiation. It is shown that by modifying the altitude of the focus in the component, some internal parts of said component can be characterized more easily.
    Type: Application
    Filed: April 18, 2007
    Publication date: June 17, 2010
    Applicant: Eurpoean Aeronautic Defence and Space Company EADA France
    Inventors: Florent Miller, Nadine Buard, Imad Lahoud, Thierry Carriere, Patrick Heins
  • Publication number: 20100150428
    Abstract: A process detects defects in a semiconductor device, particularly a solar cell or solar cell arrangement, having at least one pn junction in a semiconductor layer of a semiconductor material with an indirect band junction. A voltage is applied to the at least one pn junction to operate it in the transmitting direction; and the radiation behavior of the semiconductor layer generated by the applied voltage, at least for partial ranges of the semiconductor layer, is optically detected and automatically examined for essentially one-dimensional intensity changes in order to detect mechanical defects.
    Type: Application
    Filed: January 1, 2008
    Publication date: June 17, 2010
    Applicant: Astrium GmbH
    Inventors: Thomas Andreev, Claus Zimmermann
  • Publication number: 20100141263
    Abstract: A gradation image capture is used to test one or more image sensors. The integration periods for the rows of pixels in the array, or for groups of rows of pixels, are varied during each single still frame image capture. The S rows of pixels are reset either simultaneously or successively to a predetermined level, and then begin accumulating charges. The rows of pixels, or groups of rows of pixels, are read out at different times to vary the integration periods of the pixels. Some or all of the signals are analyzed or measured to detect any design or manufacturing problems.
    Type: Application
    Filed: December 10, 2008
    Publication date: June 10, 2010
    Inventor: Fumiki Nakamura
  • Patent number: 7733109
    Abstract: A test structure for resistive open detection using voltage contrast (VC) inspection and method for using such structure are disclosed. The test structure may include a comparator within the IC chip for comparing a resistance value of a resistive element under test to a reference resistance and outputting a result of the comparing that indicates whether the resistive open exists in the resistive element under test, wherein the result is detectable by the voltage contrast inspection.
    Type: Grant
    Filed: October 15, 2007
    Date of Patent: June 8, 2010
    Assignee: International Business Machines Corporation
    Inventors: Ishtiaq Ahsan, Mark B. Ketchen, Kevin McStay, Oliver D. Patterson
  • Publication number: 20100123474
    Abstract: There are provided an inspection apparatus and method that can locally perform sample temperature regulation, so that the sample drift can be suppressed. There are included a sample stage 109 that holds a semiconductor sample 118, multiple probes 106 used to measure electrical characteristics of a semiconductor device on the semiconductor sample 118, a power source that applies voltage and/or current to the probe 106, a detector that measures electrical characteristics of the semiconductor device on the sample with which the probe is brought into contact, and an electromagnetic wave irradiating mechanism that irradiates electromagnetic wave on a measurement section of the semiconductor sample 118.
    Type: Application
    Filed: January 25, 2010
    Publication date: May 20, 2010
    Applicant: Hitachi High-Technologies Corporation
    Inventors: Takeshi Sunaoshi, Kouichi Kurosawa, Takeshi Sato, Masaaki Komori
  • Publication number: 20100109673
    Abstract: A heat-resistant lens kit configured within the pogo tower of the wafer tester is disclosed. The heat-resistant lens kit has two parallel lenses and a main body with a through hole. The main body and two parallel lenses enclose a vacuum room within the through hole.
    Type: Application
    Filed: January 5, 2010
    Publication date: May 6, 2010
    Inventor: PI-HUI TAI
  • Patent number: 7701222
    Abstract: A method for testing a printed circuit board to determining the dielectric loss associated with the circuit board material relative to a standard. Dielectric losses in the material generate heat when a high frequency electronic signal, such as a microwave frequency signal, is communicated through a microstrip that is embedded within the printed circuit board. The temperature or spectrum at the surface of printed circuit board is measured and compared against the temperature or spectrum of the standard to determine whether the material under test is acceptable. While various temperature measurement devices may be used, the temperature is preferably measured without contacting the surface, such as using an infrared radiation probe.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: April 20, 2010
    Assignee: International Business Machines Corporation
    Inventors: Moises Cases, Bradley Donald Herrman, Kent Barclay Howieson, Erdem Matoglu, Bhyrav Murthy Mutnury, Pravin Patel, Nam Huu Pham, Caleb James Wesley
  • Patent number: 7692151
    Abstract: A device (10) for analyzing a circuit (14) includes at least one element (22) for observing light emitted by at least one localized observation zone of the circuit resulting from the electric current flowing in the zone; elements (26) for exciting the circuit. The circuit exciting elements include a laser source (26) and elements (30) for applying a laser beam generated by the source on the observation zone (22). The device includes members (M1, M2) for protecting the observation zone (22) against the incident and reflected laser beams.
    Type: Grant
    Filed: October 2, 2006
    Date of Patent: April 6, 2010
    Assignee: Centre National d'Etudes Spatiales
    Inventor: Romain Desplats
  • Publication number: 20100079147
    Abstract: A method of inline inspection of photovoltaic material for electrical anomalies. A first electrical connection is formed to a first surface of the photovoltaic material, and a second electrical connection is formed to an opposing second surface of the photovoltaic material. A localized current is induced in the photovoltaic material and properties of the localized current in the photovoltaic material are sensed using the first and second electrical connections. The properties of the sensed localized current are analyzed to detect the electrical anomalies in the photovoltaic material.
    Type: Application
    Filed: December 4, 2009
    Publication date: April 1, 2010
    Applicant: KLA-TENCOR CORPORATION
    Inventors: George H. Zapalac, Jr., Kirk J. Bertsche, David L. Brown, J. Kirkwood H. Rough, David A. Soltz, Yehiel Gotkis
  • Publication number: 20100066382
    Abstract: The invention relates to a test device for a PV concentrator module, comprising a first light source for generating a light that simulates solar irradiation, a lens system which concentrates the light beams emitted by the first light source to a pencil of rays whose individual light beams diverge by less than 2° while being suited to direct said pencil of rays to an incident light surface of the PV concentrator module, and an instrument for measuring an output signal of the PV concentrator module irradiated by the pencil of rays.
    Type: Application
    Filed: December 30, 2006
    Publication date: March 18, 2010
    Applicant: SOLARTEC AG
    Inventor: Erich W. MERKLE
  • Patent number: 7656170
    Abstract: Disclosed is a method of inspecting a sample. The sample is scanned in a first direction with at least one particle beam. The sample is scanned in a second direction with at least one particle beam. The second direction is at an angle to the first direction. The number of defects per an area of the sample are found as a result of the first scan, and the position of one or more of the found defects is determined from the second scan. In a specific embodiment, the sample includes a test structure having a plurality of test elements thereon. A first portion of the test elements is exposed to the beam during the first scan to identify test elements having defects, and a second portion of the test elements is exposed during the second scan to isolate and characterize the defect.
    Type: Grant
    Filed: February 14, 2007
    Date of Patent: February 2, 2010
    Assignee: KLA-Tencor Technologies Corporation
    Inventors: Gustavo A. Pinto, Brian C. Leslie, David L. Adler, Akella V. S. Satya, Padma A. Satya, legal representative, Robert Thomas Long, David J. Walker
  • Patent number: 7651874
    Abstract: The invention relates to a method and to an arrangement for localizing production errors in a semiconductor component part by generating excess charge carriers in the semiconductor component part and by determining the electric potential in said part. In order to be able to localize production errors with simple measures and without damaging the semiconductor component part, it is suggested that the semiconductor component part be stimulated to become luminescent and that the locally resolved luminescence intensity distribution be determined in order to determine the locally resolved distribution of the electric potential in the semiconductor component part.
    Type: Grant
    Filed: August 21, 2006
    Date of Patent: January 26, 2010
    Assignee: Schott Solar AG
    Inventor: Henning Nagel
  • Publication number: 20100007352
    Abstract: Embodiments of the present invention are directed to a method and fault detection system for detecting and identifying the location of faults in underground power lines that can effectively and quickly identify faults in underground power lines. Embodiments can provide a method and fault detection system that quickly identify faults in a power grid that result from open circuits or short circuits in underground conduits. A specific system for fault detection of power lines in a network having one or more substations and corresponding one or more manholes for access to underground lines, includes: a sensor device for each manhole, wherein the sensor device is capable of detecting a magnetic field generated by a power line and can send a signal through a fiber optic cable, the signal including a unique wavelength identifier; and a communication device for each substation for transmitting the signal from the sensor device to an operator.
    Type: Application
    Filed: December 6, 2007
    Publication date: January 14, 2010
    Applicant: University of Florida Research Foundation , Inc.
    Inventors: Huikai Xie, David Clark Gibson, Darko Kovac
  • Publication number: 20100001738
    Abstract: An apparatus for a user to conduct an accelerated soft error test (ASER) on a semiconductor sample is provided. The apparatus comprises a first component for holding the radiation source, where the radiation source may be either an alpha-particle or neutron-particle source. The apparatus comprises a second component for holding the semiconductor sample, where the semiconductor sample may be either a silicon wafer or semiconductor chip. The apparatus comprises a connecting assembly for placing the first component and the second component relative to each other at a plurality of positions that subject the semiconductor sample to a radiation stress from the radiation source at a plurality of stress efficiencies. Among the benefits provided are improved repeatability and credibility of ASER tests and reduced radiation exposures to operators of ASER tests.
    Type: Application
    Filed: August 25, 2008
    Publication date: January 7, 2010
    Applicant: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Jung-Che Chang, Wei-Ting Chien
  • Publication number: 20090325325
    Abstract: A method is provided for detecting laser optical paths in integrated circuit (IC) packages. The method provides an IC die encapsulated as a package in a compound of glass spheres and epoxy. Power is supplied to the IC. The IC is scanned with a laser. Typically, a laser wavelength is used that is minimally absorbed by the glass spheres in the epoxy compound of the IC package, and changes in current to the IC are detected. A detected current change is cross-referenced against a scanned IC package surface region. This process identifies an optical pathway underlying the scanned IC package surface region. In some aspects, this process leads to the identification of a glass sphere-collecting package structure underlying the optical pathway. Examples of a glass sphere-collecting structure might include an inner lead wire, lead frame edge, or die edge.
    Type: Application
    Filed: June 25, 2008
    Publication date: December 31, 2009
    Inventor: Joesph Martin Patterson
  • Publication number: 20090322343
    Abstract: A reflector tool and a method are provided for three-dimensional integrated circuit (IC) failure analysis. An IC (die) has top and bottom surfaces, a perimeter, and a first side. The IC is electrically connected to a current sensing amplifier. The first side of the IC is scanned in the X plane with an infrared laser beam while changes in IC current flow are sensed. The sensed current changes are cross-referenced to the location of the infrared laser beam in the X plane. In one aspect, a plurality of scans are performed on the first side in the X plane, with at a corresponding plurality of steps in the Y plane, so that current changes can be cross-referenced to locations in the X and Y planes. Using this 2-D analysis through the IC side, a human operator or software program can determine defects in the IC.
    Type: Application
    Filed: February 18, 2009
    Publication date: December 31, 2009
    Inventor: Joseph Martin Patterson
  • Publication number: 20090309606
    Abstract: A method for testing light-emitting devices in a batch-wise, associated with a system for the same purpose, comprises the steps of: preparing the light-emitting devices on a moving carrier unit in a manner of aligning a predetermined longitudinal direction of the light-emitting devices with a predetermined transportation direction of the moving carrier unit, each of the light-emitting devices further having plural light-emitting elements; transporting orderly the light-emitting devices to pass a test area on a base of the system, in which the base energizes only the light-emitting elements within the test area; and, a solar cell module detecting continuously the energized light-emitting elements within the test area and further forming signals with respect to photo energy received in the test area.
    Type: Application
    Filed: April 24, 2009
    Publication date: December 17, 2009
    Applicant: CHROMA ATE INC.
    Inventors: I-SHIH TSENG, JEFF LEE, MIN-HUNG CHANG
  • Patent number: 7623982
    Abstract: A method of testing an electronic circuit is provided. The method comprises radiating a laser beam onto the electronic circuit, and determining a plurality of samples of a response signal output by the electronic circuit during the period when the laser beam is radiated. The method further comprises accumulating the plurality of samples to generate a value, and generating a test result based on the value.
    Type: Grant
    Filed: November 5, 2007
    Date of Patent: November 24, 2009
    Assignee: Semicaps Pte Ltd
    Inventors: Choon Meng Chua, Alfred Cheng Teck Quah, Soon Huat Tan, Lian Ser Koh, Jacob Chee Hong Phang
  • Publication number: 20090278546
    Abstract: A solar cell testing apparatus including a stage, a movable chuck, a light source and a plurality of probes is provided. The movable chuck is disposed on the stage and capable of carrying a sample sheet to move. The sample sheet has a light incident side, a rear side opposite to the light incident side, and a plurality of electrodes disposed on the rear side. The light source is disposed above the stage and capable of providing testing light to the light incident side of the sample sheet. The probes are located on the rear side of the sample sheet and capable of contacting the electrodes of the sample sheet. The present invention not only can be used to test a substrate type solar cell, but also can be used to test a superstrate type solar cell.
    Type: Application
    Filed: March 2, 2009
    Publication date: November 12, 2009
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventor: Yi-Chan Chen
  • Publication number: 20090268869
    Abstract: The invention provides an automatic system and method using x-ray inspection to image arrays of electrical interconnections on electronic devices. The electron beam of a rotating anode X-ray tube is deflected relative to the anode to cause emission of x-rays from different regions of the anode at different times. The x-ray tube is located at an inspection station for the electronic devices and disposed to irradiate a first part of the array of interconnections with x-rays emitted from a first region of the anode and to irradiate a further part of the array of interconnections with x-rays emitted from another region of the anode. X-rays emerging from the array of interconnections are detected and used to image part at least of the array in order to automatically register interconnection integrity failures and/or detect a performance trend in the formation of the connections.
    Type: Application
    Filed: May 22, 2007
    Publication date: October 29, 2009
    Applicant: X-Tek Systems Limited
    Inventor: Rogert Hadland
  • Publication number: 20090261840
    Abstract: A method of time resolved radiation assisted device alteration testing of a semiconductor circuit which includes performing spatially resolved radiation assisted circuit testing on the semiconductor circuit while applying a test pattern to determine a pass-fail modulation location, asynchronously scanning the semiconductor circuit with radiation while repeatedly applying the test pattern and providing pass-fail results, combining corresponding pass-fail results provided during the asynchronously scanning to determine a shifted pass-fail modulation indication, determining time shift information between the pass-fail modulation location and the shifted pass-fail modulation indication, and identifying at least one of the test vectors based on the time shift information. The radiation may be a continuous wave laser beam.
    Type: Application
    Filed: April 22, 2008
    Publication date: October 22, 2009
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Kent B. Erington, John E. Asquith
  • Patent number: 7602197
    Abstract: A method and apparatus for wafer inspection. The apparatus is capable of testing a sample having a first layer that is at least partly conductive and a second, dielectric layer formed over the first layer, following production of contact openings in the second layer, the apparatus includes: (i) an electron beam source adapted to direct a high current beam of charged particles to simultaneously irradiate a large number of contact openings at multiple locations distributed over an area of the sample; (ii) a current measuring device adapted to measure a specimen current flowing through the first layer in response to irradiation of the large number of contact openings at the multiple locations; and (iii) a controller adapted to provide an indication of the at least defective hole in response to the measurement.
    Type: Grant
    Filed: June 7, 2004
    Date of Patent: October 13, 2009
    Assignee: Applied Materials, Israel, Ltd.
    Inventors: Alexander Kadyshevitch, Dmitry Shur, Christopher Talbot
  • Patent number: 7601941
    Abstract: Disclosed is a method for evaluating the performance of a solar cell which comprises a silicon semiconductor as the main component. This method comprises a current introduction step for introducing a direct current into a solar cell element constituting the solar cell in the forward direction, and an emission sensing step for sensing emission characteristics of the light emitted from the solar cell element due to the current introduction step. By this method, the photoelectric conversion performance of a solar cell can be simply and accurately evaluated without requiring large-sized equipment.
    Type: Grant
    Filed: November 29, 2005
    Date of Patent: October 13, 2009
    Assignee: National University Corporation Nara Institute of Science and Technology
    Inventor: Takashi Fuyuki
  • Publication number: 20090212783
    Abstract: An apparatus for supporting BGA packages for one or more testing processes is disclosed. The apparatus includes a substrate member. The substrate member has a plurality of contact pads, with each of the contact pads being spatially disposed around a peripheral region of the substrate. The apparatus further includes a plurality of contact regions spatially configured on a portion of the substrate member. Each of the plurality of contact regions is numbered from 1 through N being electrically connected to respective contact pads numbered from 1 through N. The plurality of contact regions is configured to provide electrical contact to respective plurality of balls provided on a BGA package. The apparatus additionally includes a holder device coupled to the substrate member. The holder device is adapted to mechanically hold the BGA package in place to provide mechanical contact between the plurality of balls and respective plurality of contact regions.
    Type: Application
    Filed: May 7, 2009
    Publication date: August 27, 2009
    Applicant: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Shan An Liang, Chun Kui Ji, Ping Lung Liao, Tian Qin
  • Patent number: 7573271
    Abstract: An apparatus for measuring electric characteristics of a semiconductor includes a light irradiating means for irradiating light to a characteristic measured semiconductor, an alternating-current voltage source, an electric potential measuring means and an impedance regulator wherein impedance is regulated by an impedance regulator in such a manner that electric potential at an electric potential measuring point of the characteristic measured semiconductor may become zero electric potential in the state in which light is not irradiated on the characteristic measured semiconductor by the light irradiating means. Electric characteristics of the characteristic measured semiconductor are measured based on measurement of electric potential obtained with or without irradiation of light onto the characteristic measured semiconductor. With this arrangement, semiconductor electric characteristics can be measured with high accuracy by a simple arrangement.
    Type: Grant
    Filed: August 25, 2005
    Date of Patent: August 11, 2009
    Assignee: National University Corporation Tokyo University of Agriculture and Technology
    Inventors: Toshiyuki Samejima, Hajime Watakabe
  • Publication number: 20090179651
    Abstract: Embodiments of the present invention relate to a solar simulator module of a solar cell production line. In one embodiment the solar simulator receives a solar cell module in a horizontal position and reorients the module into a vertical position. A light source is oriented to emit a flash of light in a substantially horizontal orientation toward the vertically oriented solar cell module. In one embodiment, an automated labeling device affixes a label including the electrical characteristics measured onto a back surface of the solar cell module. In one embodiment, a plurality of solar cell modules are received and tested simultaneously.
    Type: Application
    Filed: January 9, 2009
    Publication date: July 16, 2009
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Yacov Elgar, Danny Cam Toan Lu, Tzay-Fa Su, Jeffrey S. Sullivan, David Tanner, Harry Whitesell
  • Patent number: 7550961
    Abstract: Systems and methods for evaluating electromagnetic interference that may be employed, for among other things, to evaluate electronic system immunity to radiated electromagnetic fields and/or to identify particular electronic system areas that are susceptible to electromagnetic radiation.
    Type: Grant
    Filed: May 31, 2007
    Date of Patent: June 23, 2009
    Assignee: Dell Products, L.P.
    Inventor: Gary S. Thomason
  • Patent number: 7538333
    Abstract: Systems and methods for determining a property of a specimen are provided. The specimen may be a product wafer. The method may include biasing a focused spot on the specimen. The method may also include measuring a parameter of a measurement spot on the specimen. The measurement spot may overlap the focused spot. In addition, the method may include determining the property of the specimen from the measured parameter. Systems and methods for varying the performance of a corona source are also provided. The method may include altering a property of the environment within the corona source. The property may include, but is not limited to, temperature, pressure, humidity, and/or partial pressure of a gas within the corona source.
    Type: Grant
    Filed: July 27, 2006
    Date of Patent: May 26, 2009
    Assignee: KLA-Tencor Technologies Corporation
    Inventors: Amin Samsavar, John M. Schmidt, Rainer Schierle, Gregory S. Horner, Thomas G. Miller, Zhiwei Xu, Xiaofeng Hu, Jianou Shi, Sergio Edelstein
  • Patent number: 7528612
    Abstract: A system, in one embodiment, includes a power distribution center having an enclosure with an access door configured to move between a closed position and an open position. The power distribution center includes a non-contact sensor disposed inside the enclosure, wherein the non-contact sensor includes a non-contact voltage sensor, or a non-contact temperature sensor, or a combination thereof. The power distribution center also includes an indicator viewable outside of the enclosure while the door is in the closed position, wherein the indicator is coupled to the non-contact sensor.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: May 5, 2009
    Assignee: Rockwell Automation Technologies, Inc.
    Inventors: Neil Gollhardt, David L. Jensen, Fahed Awad, Jie Shen, David D. Brandt, David T. Rollay
  • Publication number: 20090102487
    Abstract: A method for testing a printed circuit board to determining the dielectric loss associated with the circuit board material relative to a standard. Dielectric losses in the material generate heat when a high frequency electronic signal, such as a microwave frequency signal, is communicated through a microstrip that is embedded within the printed circuit board. The temperature or spectrum at the surface of printed circuit board is measured and compared against the temperature or spectrum of the standard to determine whether the material under test is acceptable. While various temperature measurement devices may be used, the temperature is preferably measured without contacting the surface, such as using an infrared radiation probe.
    Type: Application
    Filed: October 19, 2007
    Publication date: April 23, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Moises Cases, Bradley Donald Herrman, Kent Barclay Howieson, Erdem Matoglu, Bhyrav Murthy Mutnury, Pravin Patel, Nam Huu Pham, Celeb James Wesley
  • Publication number: 20090096461
    Abstract: A test structure for resistive open detection using voltage contrast (VC) inspection and method for using such structure are disclosed. The test structure may include a comparator within the IC chip for comparing a resistance value of a resistive element under test to a reference resistance and outputting a result of the comparing that indicates whether the resistive open exists in the resistive element under test, wherein the result is detectable by the voltage contrast inspection.
    Type: Application
    Filed: October 15, 2007
    Publication date: April 16, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ishtiaq Ahsan, Mark B. Ketchen, Kevin McStay, Oliver D. Patterson
  • Publication number: 20090096462
    Abstract: A wafer testing method for wafer testing system comprises the steps: loading a wafer and then positioning the wafer relatively to a map file image stored in a map file. The map file is of a first file type. The next step is inspecting the appearance of the wafer. When the user detects defects on the wafer, the positions of the defects are directly recorded in the map file and then the modified map file is saved. The map file can be directly modified when the wafer is in the testing procedure so that the testing time is reduced. Furthermore, the precision of the testing is improved.
    Type: Application
    Filed: January 22, 2008
    Publication date: April 16, 2009
    Inventors: Bily Wang, Hsin-Cheng Chen, Ming-Hao Chou
  • Patent number: 7514681
    Abstract: One embodiment relates to a method of inspecting a substrate using electrons. Mirror-mode electron-beam imaging is performed on a region of the substrate at multiple voltage differences between an electron source and a substrate, and image data is stored corresponding to the multiple voltage differences. A calculation is made of a measure of variation of an imaged aspect of a feature in the region with respect to the voltage difference between the electron source and the substrate. Other embodiments and features are also disclosed.
    Type: Grant
    Filed: June 13, 2006
    Date of Patent: April 7, 2009
    Assignee: KLA-Tencor Technologies Corporation
    Inventors: Paul F. Marella, Mark A. McCord, Marian Mankos, David L. Adler
  • Publication number: 20090072837
    Abstract: The property of CIS based thin-film solar cell modules that the modules recover their conversion efficiency, etc. upon irradiation with a weak light is correctly evaluated. A CIS based thin-film solar cell module is subjected to a conventional damp heat test with a constant-light solar simulator (solar simulator) 1D in such a manner that the power of the light source 1E is regulated so that the solar simulator 1D emits a weak light corresponding to the amount of solar radiation in cloudy weather, i.e., resulting in an irradiance of 100-300 W/m2, and the module is continuously irradiated with the weak light throughout the test period under the same temperature, humidity, and storage period conditions as those in the conventional conditions for the test (1,000-hour storage in the dark at a temperature of 85° C. and a relative humidity of 85%).
    Type: Application
    Filed: March 29, 2007
    Publication date: March 19, 2009
    Applicant: SHOWA SHELL SEKIYU K.K.
    Inventors: Katsumi Kushiya, Satoru Kuriyagawa
  • Publication number: 20090066357
    Abstract: An apparatus for detecting an impairment of a solar array. The apparatus comprises an impairment detection module for performing a comparison of a power production profile and at least one reference profile, wherein the power production profile and the at least one reference profile are for at least one of the solar array, at least one solar subarray of the solar array, or at least one solar panel of the solar array. The apparatus determines, based on the comparison, whether the impairment exists.
    Type: Application
    Filed: August 26, 2008
    Publication date: March 12, 2009
    Inventor: Martin Fornage
  • Patent number: 7495449
    Abstract: A non-destructive testing method of improved efficiency. Two one-dimensional images are obtained by scanning an optical line over an object to be tested in an X- and Y-directions each for one scan in lieu of conducting a prior art method of two-dimensionally scanning a optical spot on the object to be tested. A two-dimensional image is reconstructed from the obtained two one-dimensional images. Since only two relative scans between the object to be tested and the optical line is necessary, scanning time is remarkably shortened in comparison with that of the prior art.
    Type: Grant
    Filed: October 31, 2006
    Date of Patent: February 24, 2009
    Assignee: NEC Electronics Corporation
    Inventor: Kiyoshi Nikawa
  • Patent number: 7495457
    Abstract: In order to provide a semiconductor device evaluation method and a semiconductor device evaluation apparatus for correctly detecting an error position and providing a substrate for observing a cross section without difficulties, a transport unit of a SEM apparatus moves a substrate on a stage. A detection unit detects electric information of observed objects including an error position arranged on the substrate.
    Type: Grant
    Filed: March 4, 2008
    Date of Patent: February 24, 2009
    Assignee: Elpida Memory, Inc.
    Inventor: Masayoshi Danbata
  • Publication number: 20090010526
    Abstract: A first embodiment of the invention relates to a method for evaluating the quality of structures on an integrated circuit wafer. Test structures formed on either on the integrated or on a test wafer are exposed to an electron beam and an electron-beam activated chemical etch. The electron-beam activated etching gas or vapor etches the test structures, which are analyzed after etching to determine a measure of quality of the test structures. The measure of quality may be used in a statistical process control to adjust the parameters used to form device structures on the integrated circuit wafer. The test structures are formed on an integrated circuit wafer having two or more die. Each die has one or more integrated circuit structures. The test structures are formed on scribe lines between two or more adjacent die. Each test structure may correspond in dimensions and/or composition to one or more of the integrated circuit structures.
    Type: Application
    Filed: January 12, 2007
    Publication date: January 8, 2009
    Applicant: KLA Tencor Technologies Corporation
    Inventors: Yehiel Gotkis, Sergey Lopatin, Mehran Nasser-Ghodsi
  • Patent number: 7473911
    Abstract: A method for process monitoring includes receiving a sample having a first layer that is at least partly conductive and a second layer formed over the first layer, following production of contact openings in the second layer. A beam of charged particles is directed along a beam axis that deviates substantially in angle from a normal to a surface of the sample, so as to irradiate one or more of the contact openings in each of a plurality of locations distributed over at least a region of the sample. A specimen current flowing through the first layer is measured in response to irradiation of the one or more of the contact openings at each of the plurality of locations. A map of at least the region of the sample is created, indicating the specimen current measured in response to the irradiation at the plurality of the locations.
    Type: Grant
    Filed: October 27, 2003
    Date of Patent: January 6, 2009
    Assignee: Applied Materials, Israel, Ltd.
    Inventors: Alexander Kadyshevitch, Dror Shemesh, Yaniv Brami, Dmitry Shur
  • Patent number: 7466852
    Abstract: A system for probe-less non-invasive detection of electrical signals from integrated circuit devices is disclosed. The system includes an illumination source, collection optics, imaging optics, and a photon sensor. In a navigation mode, the light source is activated and the imaging optics is used to identify the target area on the chip and appropriately position the collection optics. Once the collection optics is appropriately positioned, the light source is deactivated and the photon sensor is used to detect photons emitted from the chip. No mention of cooling (active device measurement capability) and advanced optics to detect the features (SIL).
    Type: Grant
    Filed: May 8, 2007
    Date of Patent: December 16, 2008
    Assignee: DCG Systems, Inc.
    Inventors: Daniel Murdoch Cotton, Nader Pakdaman, James Squire Vickers, Thomas Wong
  • Patent number: 7449898
    Abstract: In a traditional method for automatically obtaining high-magnification images of defects by using an electron microscope for defect-reviewing of a semiconductor wafer, high-magnification images of a voltage contrast changing part are obtained in the case of defects generating voltage contrast change, this made difficult to observe defects themselves generating voltage contrast change. In the present invention, based on energy of secondary electron to be detected, after obtaining two types of images, namely an image making voltage contrast conspicuous easily, and an image not making it easily, and acquiring a shape change area adjacent to a voltage contrast change area based on this area as a defect location, a high-magnification image can automatically be obtained.
    Type: Grant
    Filed: February 9, 2007
    Date of Patent: November 11, 2008
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Toshifumi Honda, Takehiro Hirai
  • Patent number: 7443170
    Abstract: A device determines at least one characteristic of electromagnetic radiation emitted from a test object. A support receives the object. A network of probes is distributed along a substantially circular arc, and the support is disposed in a plane formed by the network of probes or in a plane parallel to the plane formed by the network of probes. The network of probes or the support is pivoted in the plane formed by the network of probes or in the plane parallel to the plane formed by the network of probes about a point located in that plane to vary an angle formed between a given one of the network of probes and the support, and thereby allow measurements to be taken at plural angular positions of the network of probes relative to the test object.
    Type: Grant
    Filed: August 13, 2004
    Date of Patent: October 28, 2008
    Assignee: Ste D'Applications Technologies de L'Imagerie Micro Ondes
    Inventors: Philippe Garreau, Luc Duchesne, Per Olav Iversen, Arnaud Gandois
  • Publication number: 20080238435
    Abstract: A diagnostic tool for testing an integrated circuit device directs a beam of laser energy to stimulate at least a portion of the device. In one mode, electromagnetic waves from said device may be detected at the same time in response to the stimulation. A processor collects image data and determines as a function of the collected image data whether the device has a defect. Other embodiments are described and claimed.
    Type: Application
    Filed: March 26, 2007
    Publication date: October 2, 2008
    Inventors: Daniel Richard Bockelman, Yuan-Chuan Steven Chen, Christopher John Brookreson, Md Asifur Rahman
  • Patent number: 7425704
    Abstract: An inspection method and apparatus irradiates a sample on which a pattern is formed with an electron beam, so that an inspection image and a reference image can be generated on the basis of a secondary electron or a reflected electron emitted by the sample. An abnormal pattern is determined based on a difference in halftone values of each pixel between the inspection image and the reference image. A plurality of feature quantities of the abnormal pattern are obtained from an image of the abnormal pattern, and, based on the distribution of the plurality of feature quantities of the abnormal pattern, a range for classifying the type of the abnormal pattern is designated. Thus, a desired defect can be extracted from many defects extracted by inspection.
    Type: Grant
    Filed: February 15, 2006
    Date of Patent: September 16, 2008
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Hiroshi Miyai, Ryuichi Funatsu, Taku Ninomiya, Yasuhiko Nara
  • Publication number: 20080208507
    Abstract: A mechanism for diagnosing broken scan chains based on leakage light emission is provided. An image capture mechanism detects light emission from leakage current in complementary metal oxide semiconductor (CMOS) devices. The diagnosis mechanism identifies devices with unexpected light emission. An unexpected amount of light emission may indicate that a transistor is turned off when it should be turned on or vice versa. All possible inputs may be tested to determine whether a problem exists with transistors in latches or with transistors in clock buffers. Broken points in the scan chain may then be determined based on the locations of unexpected light emission.
    Type: Application
    Filed: May 6, 2008
    Publication date: August 28, 2008
    Inventors: PEILIN SONG, Tian Xia, Alan J. Weger, Franco Stellari, Stanislav V. Polonsky
  • Patent number: 7397263
    Abstract: Disclosed is an apparatus and method for diagnostically testing circuitry within a device. The apparatus and method incorporate the use of energy (e.g., light, heat, magnetic, electric, etc.) applied directly to any location on the device that can affect the electrical activity within the circuitry being tested in order to produce an indicator of a response. A local sensor (e.g., photonic, magnetic, etc.) is positioned at another location on the device where the sensor can detect the indicator of the response within the circuitry. A correlator is configured with response location correlation software and/or circuit tracing software so that when the indicator is detected, the correlator can determine the exact location of a response causing a device failure and/or trace the connectivity of the circuitry, based upon the location of the energy source and the location of the sensor.
    Type: Grant
    Filed: February 1, 2007
    Date of Patent: July 8, 2008
    Assignee: International Business Machines Corporation
    Inventors: Kevin L. Condon, Theodore M. Levin, Leah M. Pastel, David P. Vallett
  • Publication number: 20080129303
    Abstract: When bonding a workpiece to a substrate, processed parts of the substrate and the workpiece are observed and behavior such as the production of voids and the flowing of resin is observed. An apparatus for observing an assembled state of components includes: a stage on which a substrate is set; a head mechanism that bonds, by applying heat and pressure, an observation workpiece made of a transparent material to the substrate via resin supplied between the substrate and the observation workpiece; a light source that irradiates an observed part of the substrate and the observation workpiece mounted on the stage with light; and a camera that takes, from the observation workpiece side, an image of the observed part when the observation workpiece is bonded to the substrate set on the stage.
    Type: Application
    Filed: August 31, 2007
    Publication date: June 5, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Shuichi Takeuchi, Hidehiko Kira
  • Publication number: 20080129304
    Abstract: The present invention provides a photosensor testing device with a built-in light source and a tester provided with said device, which has a base and an upper cover disposed above the base, characterized in that the upper cover is equipped with at least one light emitting diode (LED) assembly used as a light source for a photosensor under test to undergo testing operation. Therefore, the components such as high intensity discharge lamps and optical processing devices are unnecessary any more, reducing the bulk volume of the testing device and its related cost. Besides, the testing process would be speeded up and the testing accuracy could be improved, as well as the time consumed in replacing the light source would be saved.
    Type: Application
    Filed: November 30, 2007
    Publication date: June 5, 2008
    Applicant: CHROMA ATE INC.
    Inventors: Joy Ou, Albert Fan