Abstract: A method of testing a cabling system is disclosed. The method may include discharging an input filter capacitor associated with an accessory component, charging an accessory bus capacitor to a desired voltage level, and connecting the accessory bus capacitor to the input filter capacitor. The method may also include continuously monitoring a voltage waveform associated with the accessory bus capacitor. The method may further include determining a difference between the voltage waveform and a nominal voltage profile, and detecting a fault if the difference is greater than a threshold value.

Abstract: Each sensor of a linear array of sensors includes, in part, a sensing electrode and an associated feedback circuit. The sensing electrodes are adapted to be brought in proximity to a flat panel having formed thereon a multitude of pixel electrodes in order to capacitively measure the voltage of the pixel electrodes. Each feedback circuit is adapted to actively drive its associated electrode via a feedback signal so as to maintain the voltage of its associated electrode at a substantially fixed bias. Each feedback circuit may include an amplifier having a first input terminal coupled to the sensing electrode and a second input terminal coupled to receive a biasing voltage. The output signal of the amplification circuit is used to generate the feedback signal that actively drives the sensing electrode. The biasing voltage may be the ground potential.

Abstract: A switched capacitance detection circuit is responsive to changes in the fringing capacitance of a capacitive proximity sensor having at least one capacitive sensor element. In cases where the sensor has a single sensor element, the switching frequency of the detection circuit is controlled to maintain measurement accuracy in the presence of sensor moisture while minimizing power consumption and electromagnetic radiation. In cases where the sensor has multiple sensor elements, the capacitance values for each sensor element are differenced, absolute-valued and summed to form an output in which common-mode effects due to sensor moisture, temperature and sensor aging are canceled out.

Abstract: A vehicular power supply apparatus includes a capacitor, an idling stop means for stopping an engine at a halt of the vehicle and restarting the engine at driver's preset driving operation by supplying current to an engine starter with the capacitor, a current detecting means for detecting the current, a cumulative value calculating means for calculating cumulative value of the current on the basis of the detected current after starting of the engine starter until a set time elapses, and an abnormality determining means for determining, when engine revolution speed at the time the set time has elapsed is outside a preset range and the cumulative value is equal to or less than a preset value, that the capacitor is abnormal.

Abstract: A circuit for measuring an unknown capacitance includes a reference capacitor having a known capacitance, an oscillator timing circuit, a variable frequency oscillator and a microcontroller. The oscillator timing circuit includes switches which selectively couple the unknown capacitance and the reference capacitor to the oscillator timing circuit. The variable frequency oscillator generates time varying signals which vary in frequency proportionally to the unknown capacitance and reference capacitor selectively coupled to the oscillator timing circuit. The microcontroller receives the time varying signals from the oscillator, and compares the periods of the time varying signals to determine the value of the unknown capacitance.

Abstract: A method of testing a cabling system is disclosed. The method may include discharging an input filter capacitor associated with an accessory component, charging an accessory bus capacitor to a desired voltage level, and connecting the accessory bus capacitor to the input filter capacitor. The method may also include continuously monitoring a voltage waveform associated with the accessory bus capacitor. The method may further include determining a difference between the voltage waveform and a nominal voltage profile, and detecting a fault if the difference is greater than a threshold value.

Abstract: A system configured to detect faults in signal lines. A system includes a first component configured to communicate with a second component via a signal path including one or more signal traces. Sense signal lines are manufactured such that at some point they are in close proximity to a signal trace which is to be monitored. The sense signal lines are configured to use parasitic coupling to redirect a portion of a signal conveyed via a signal trace to a monitoring component. The first component is configured to convey a test signal indicative of a type of test via the signal path, and a reference signal to the monitoring component. The monitoring component is configured to utilize the reference signal to ascertain a presence or absence, or characteristics of a received redirected signal. The monitoring component may optionally utilize a locally generated reference signal.

Abstract: A device and method provides for measuring the electrical properties of electronic signal paths, including wires and wireless channels. The device can be used for detecting open circuits, short circuits, and the lengths of wires. The device can include a sensor configured to measure a bulk electrical inductance of said wire to produce a measurement result and a processor configured to extract a length of the wire from the measurement result of the sensor.

Abstract: An open seal check system for a multi-chamber supply container having at least one elongated seal, the system includes: (i) a base configured to support the multi chamber container; (ii) a plurality of electrodes positioned on the base so as to be at least substantially parallel with the elongated seal; and (iii) electronics connected to the electrodes, the electrodes each forming a capacitor with the multi-chamber supply container when the container is placed on the base, the electronics configured to output a single indication of a dielectric associated with each capacitor.

Abstract: An apparatus, system, and method for measuring parameters, measuring or determining capacitance, producing a digital output that is dependent upon a capacitance, or converting a variable capacitance output, of a sensor capacitor for example, into a digital format. By activating and deactivating pins, a microprocessor may form various circuits, for instance, each containing a resistor and a different capacitor and, in some embodiments, without the use of intermediate switching components. The microprocessor may alternately measure the time to change the charge of each of the capacitors and then calculate the capacitance of one of the capacitors using the measured times and known capacitances of one or more reference capacitors. Certain embodiments use two reference capacitors and alternately charge and discharge the capacitors, and a simple formula may be used to calculate capacitance using times to reach a threshold voltage. A measured parameter may be humidity or pressure, for example.

Abstract: In a method and system for testing a presence of a crack (240) in a device under test (DUT) (190), a test system includes a bridge circuit (BC) (120) coupled to an electrical signal source (ESS) (110) capable of generating an electrical signal (102). The BC (120) includes four impedances that are coupled in a bridge structure having two floating nodes (132, 134). The DUT (190) includes a test bond pad (TBP) (192) and an access bond pad (ABP) (194). An impedance measurable across the TBP (192) and the ABP (194) is selectable as one of the four impedances. A stimulus (140) is provided to the DUT (190) to induce stress. A sensor (130) coupled across the two floating nodes (132, 134) detects a change in a value of the electrical signal measured across the two floating nodes (132, 134) in response to the stimulus (140). The change is triggered by the presence of the crack (240) under the TBP (192) caused by the stress, the crack (240) changing the impedance.

Abstract: The present invention provides for a system and method of characterizing the integrity of a barrier structure. The barrier structure is an interconnect comprising a porous dielectric layer sandwiched between at least one barrier layer and at least one conducting layer. The method of characterizing the integrity of such an interconnect includes providing an interconnect, infiltrating the interconnect with a solution comprising electrolytes, applying an external bias to the infiltrated interconnect, and characterizing the integrity of the interconnect after application of the external bias.

Abstract: A method for testing at least one multi-layer ceramic capacitor part includes charging, holding, and/or discharging at least one part with respect to a programmed voltage over a predetermined period of time, periodically measuring at least one value corresponding to quality of each part to be tested while each part is being charged, held, and discharged. The at least one value can be selected from a group consisting of voltage value, current value, leakage current value, capacitance value, dissipation factor value, and any combination thereof. Curves can be digitized from the periodically measured values collected while each part is being charged, held, and discharged with respect to the programmed voltage.

Abstract: A method and apparatus for detecting open defects on non-probed node under test of an electrical device using capacitive lead frame technology is presented. In accordance with the method of the invention, a probed node neighboring the non-probed node under test is stimulated with a known source signal. A sensor of a capacitive sensing probe is capacitively coupled to at least the probed node and non-probed node under test of the electrical device, and a measuring device coupled to the capacitive sensing probe measures a capacitively coupled signal present between the sensor of the probe and at least the probed and non-probed node of the electrical device. Based on the value of the capacitively sensed signal, a known expected “defect-free” capacitively sensed signal measurement and/or a known expected “open” capacitively sensed signal measurement, a determination is made of whether an open defect exists on the non-probed node under test of the electrical device.

Abstract: A circuit and method for measuring capacitance and capacitance mismatch of at least one capacitor pair are provided. The circuit includes a first switch, a second switch, a third switch and a P-type transistor. A terminal of the first switch is connected to a terminal of a first capacitor, and a terminal of the second switch is connected to a terminal of a second capacitor. A terminal of the third switch is connected to another terminal of the first capacitor and another terminal of the second capacitor, and a gate of the P-type transistor is connected to another terminal of the third switch. When the first, second and third switches are turned on, a capacitance of the first capacitor, a capacitance of the second capacitor, or a capacitance mismatch between the first and second capacitances is measured.

Abstract: A method and apparatus is presented for gaining socket testability through the use of a capacitive interposer engineered to create capacitive coupling between signal nodes of a circuit assembly that the tester has access to and nodes of the socket that would not otherwise have any coupling to a testable signal node of the socket. Generally, coupling capacitance is engineered into the interposer by trace and via routing between the signal node of the socket and a location in close proximity to the inaccessible socket node such that their proximity to each other couples them together.

Abstract: A method and apparatus for detecting open defects on grounded nodes of an electrical device using capacitive lead frame technology is presented. In accordance with the method of the invention, an accessible signal node that is capacitively coupled the grounded node is stimulated with a known source signal. A capacitive sense plate is capacitively coupled to the stimulated node and grounded node of the electrical device, and a measuring device coupled to the capacitive sense plate capacitively senses a resulting signal. The value of the capacitively sensed signal is indicative of the presence or non-presence of an open defect on one or both of the grounded node and stimulated signal node.

Abstract: The invention relates to a circuit arrangement for monitoring the function of a fill level measuring apparatus, and particularly of a vibration level switch, comprising a first piezo-electric vibration device (SP) as a transmitting device, a second piezo-electric vibration device (EP) as a receiving device, an oscillator circuit (O), the input (P0) and output (P4) of which during normal operation are connected to the vibration devices (EP, SP), the second connections of which devices are at common ground potential, and a monitoring circuit for monitoring the function.

Abstract: The invention relates to a method of examining the authenticity of a document provided with an optico-diffractively effective element or hologram by subjecting the hologram to capacitive coupling of a voltage and deriving a signal representative of the voltage for comparison with a reference signal representative of a hologram of an authentic document. The method may be improved by providing, between individual segments of the hologram, additional security indicia providing a signal in response to being irradiated by electromagnetic radiation of a predetermined frequency.

Abstract: A method and apparatus for determining capacitance of wires in an integrated circuit is described. The capacitance information derived according to the invention can be used, for example, to calibrate a parasitic extraction engine or to calibrate an integrated circuit fabrication process. The capacitance information can also be used for timing and noise circuit simulations, particularly for deep sub-micron circuit design simulations. Briefly, the invention allows measurement of both total capacitance of a line and cross coupling capacitance between two lines by applying predetermined voltage signals to specific circuit elements. The resulting current allows simple computation of total capacitance and cross coupling capacitance. Multiple cross coupling capacitance can be measured with a single device, thus improving the art of library generation, and the overall method is free of uncertainties related to transistor capacitance couplings.

Abstract: A measuring apparatus having a probe that faces a surface of a target and is configured to supply AC current to the surface, measuring a voltage drop through a space between the probe and the surface, and obtaining a distance between the probe and the surface in accordance with the measured voltage drop. The apparatus includes a ground member facing, and apart from, the surface and configured to ground the surface by capacitive coupling, and a stage configured to hold either of the target and the probe and to move to define a measurement area on the surface. The ground member is configured so that the ground member faces all areas of the surface with respect to each of a plurality of measurement areas on the surface defined by a position of the stage.

Abstract: A method and apparatus for detecting shorts between accessible and inaccessible signal nodes (e.g., integrated circuit pins) of an electrical device (e.g., an integrated circuit), using capacitive lead frame technology is presented. In accordance with the method of the invention, an accessible node under test is stimulated with a known source signal. A capacitive sense plate is capacitively coupled to at least one of the accessible node and inaccessible node of the electrical device, and a measuring device coupled to the capacitive sense plate capacitively senses a signal present on the at least one of the accessible node and inaccessible node of the electrical device. Based on the value of the capacitively sensed signal, a known expected “defect-free” capacitively sensed signal measurement and/or a known expected “shorted” capacitively sensed signal measurement, one can determine whether a short fault exists between the accessible node and inaccessible node of the electrical device.

Abstract: A method for determining the deterioration of a capacitor that increases the measurement accuracy to have an improved reliability is disclosed. In this method for determining the deterioration of a capacitor, the deterioration of a capacitor including a pair of electrode bodies and electrolytic solution provided between the electrode bodies is determined by applying an AC voltage to the capacitor to measure an impedance characteristic at a frequency of the AC voltage. An inflection point appearing in the impedance characteristic due to the deterioration of the electrolytic solution is previously calculated to make comparison with an impedance value in the frequency region lower than the inflection point, thereby determining the deterioration.

Abstract: A method for testing for a defect condition on a node-under-implicit-test of an electrical device is presented. The technique according to the invention includes stimulating a first node of the electrical device that is capacitively coupled to the node-under-implicit-test with a known source signal, and capacitively sensing a signal on a second node of the electrical device that is capacitively coupled to the node-under-implicit-test. A defect condition such as a short or open can be determined from the capacitively sensed signal.

Abstract: A method for determining capacitance includes alternately charging a capacitor to a first voltage and discharging the capacitor to a second voltage, generating an output signal having a frequency that is a function of a time period, and determining the capacitance based on the frequency of the output signal. The time period is selected from at least one of: (a) a time period needed to charge the capacitor from the second voltage to the first voltage and (b) a time period needed to discharge the capacitor from the first voltage to the second voltage.

Abstract: The present invention provides an inspection apparatus and an inspection method, capable of, when supplying an inspection signal to a circuit wiring, eliminating any need for a pin to be brought into contact with the circuit wiring and detecting any defects including an invisible microscopic defect. An inspection apparatus A for inspecting a circuit wiring of a circuit board 100 comprises a conductive member 1 adapted to be disposed on the side of one of surfaces of the circuit board 100 and to be supplied with an inspection signal, a signal source 2 for supplying the inspection signal to the conductive member 1, a sensor unit 3 including a plurality of cells 3a to be disposed the opposed to the conductive member 1 on the side of the other surface of the circuit board 100, and a computer 5 for acquiring each signal appearing at the cells 3a in response to the inspection signal supplied to the conductive member 1.

Abstract: Disclosed is a novel method and apparatus for acquiring multiple capacitively sensed measurements from a circuit under test. Multiple digital sources are respectively connected to stimulate multiple respective first ends of multiple respective nets of interest. Respective second ends of the multiple respective nets of interest are capacitively sensed. The respective capacitively coupled signals are digitally sampled and shift correlated with respective expected digital signatures. If a high level of correlation is found for a given net, the net is electrically intact; otherwise, the net is characterized by either an open or some other fault that prevents it from meeting specification.

Abstract: The invention relates to a method of examining the authenticity of a document provided with an optico-diffractively effective element or hologram by subjecting the hologram to capacitive coupling of a voltage and deriving a signal representative of the voltage for comparison with a reference signal representative of a hologram of an authentic document. The method may be improved by providing, between individual segments of the hologram, additional security indicia providing a signal in response to being irradiated by electromagnetic radiation of a predetermined frequency.

Abstract: A method and apparatus for detecting metal extrusion associated with electromigration (EM) under high current density situations within an EM test line by measuring changes in capacitance associated with metal extrusion that occurs in the vicinity of the charge carrying surfaces of one or more capacitors situated in locations of close physical proximity to anticipated sites of metal extrusion on an EM test line are provided. The capacitance of each of the one or more capacitors is measured prior to and then during or after operation of the EM test line so as to detect capacitance changes indicating metal extrusion.

Abstract: In order to simulate the input or output load of an analog circuit, the output of the analog circuit is connected to the input of a driver stage. A measuring element is placed between the input of the driver stage and the reference potential, in order to record the output voltage of the analog circuit. A digital simulator controls a controllable transfer impedance, arranged between the output of the driver stage and the reference potential, in order to simulate various output loads. An alternative is to connect the output of the driver stage to the input of the analog circuit. The input of the driver stage has a shunt connection of a controllable current or voltage source, a first resistance and a first capacitance. The digital simulator controls the controllable current or voltage source, in order to simulate various output loads. The driver stage is switched off when appropriate.

Abstract: The present invention is a method an apparatus for diagnosing short defects on inaccessible or non-contacted nodes of an integrated circuit device using capacitive coupling techniques. In accordance with the invention, an alternating current (AC) signal generator is connected to apply an alternating current (AC) signal to an accessible node of an IC device under test. Preferably, all remaining accessible nodes of the IC device under test are grounded. A sensor plate of a capacitive sensing probe is placed in signal coupling proximity to the inaccessible node of interest on the integrated circuit device. If a signal is present on the inaccessible node of interest, it is capacitively coupled to the sensor plate of the probe. A measurement device obtains a measurement representative of an amount of current flow capacitively coupled to the sensor plate by the capacitive sensing probe.

Abstract: A device for enabling testing of electrical paths through a circuit assembly is presented. The device may include a test facilitating shipping and handling cover for a socket of the circuit assembly. The test facilitating shipping and handling cover may have a conductive layer for capacitively coupling to an array of pins in the socket during testing. A method for testing continuity of electrical paths through a circuit assembly is presented. In the method, one or more nodes of the circuit assembly are stimulated, contacts of a socket on the circuit assembly are capacitively coupled with a conductive layer of a shipping and handling cover mated with the socket, and an electrical characteristic is measured by a tester coupled to the shipping and handling cover to determine continuity of electrical paths through the circuit assembly.

Abstract: An object of the present invention is to provide a seal condition inspection apparatus capable of reliably inspecting seal condition. The seal condition inspection apparatus includes an electrically-variable-quantity detecting section for detecting an electrically variable quantity at a portion (F) to be inspected for seal condition; a seal condition indicator value calculation processing means for calculating, on the basis of the electrically variable quantity, a seal condition indicator value indicative of seal condition of the portion (F) to be inspected; and a seal condition judgment processing means for judging from the seal condition indicator value whether seal condition is good or defective. In this case, the seal condition indicator value of the portion (F) to be inspected is calculated on the basis of the electrically variable value of the portion (F) to be inspected, and whether seal condition is good or defective is judged on the basis of the seal condition indicator value.

Abstract: An optical submarine communication system has a land cable connected to a terminal apparatus which is installed on land near the seashore for transmitting an optical signal and electric power. The land cable is connected to an optical submarine cable through a beach manhole, and a repeater is connected to the optical submarine cable. The optical submarine communication system has a surge suppressor provided on the land cable, whereby a surge generated from the terminal apparatus side because of a lightning stroke or an insulation failure is suppressed and prevented from reaching and damaging the repeater.

Abstract: A method and apparatus for diagnosing open defects on non-contacted nodes of an electrical device is presented. Actual and expected signal measurements are collected for various contacted nodes of the electrical device. Nodes whose actual measurements are out of range of their respective expected measurements are deemed abnormal nodes. Non-contacted nodes may then be assessed as having, or as likely to have, open defects based on knowledge of the degree of coupling of the non-contacted node to the abnormal contacted nodes. In the preferred embodiment, abnormal nodes are identified using a linear regression analysis, and the non-contacted nodes indicted as having open defects are identified using a weighting scheme.

Abstract: Disclosed is a novel method and apparatus for acquiring multiple capacitively sensed measurements from a circuit under test. Multiple digital sources are respectively connected to stimulate multiple respective first ends of multiple respective nets of interest. Respective second ends of the multiple respective nets of interest are capacitively sensed. The respective capacitively coupled signals are digitally sampled and shift correlated with respective expected digital signatures. If a high level of correlation is found for a given net, the net is electrically intact; otherwise, the net is characterized by either an open or some other fault that prevents it from meeting specification.

Abstract: Disclosed is a circuit-pattern inspection apparatus for inspecting a comb-shaped pattern 20 having an edge region formed as a plurality of finger pattern segments and a base region formed as an integral connection pattern segment, and a plurality of discrete patterns 30 each disposed between the adjacent finger pattern segments in a non-connecting manner and being not in connecting with the remaining discrete patterns. The inspection apparatus comprises means for supplying an AC signal alternately to either one of the finger pattern segments and both the finger pattern segments and the discrete patterns while maintaining the other at a ground potential, and sensors 131, 132, 133 for detecting the AC signal disposed in the edge region. The inspection apparatus can reliably detect the presence of defects in a circuit board without any difficulties.

Abstract: PMISFETs and NMISFETs are placed in a capacitance measuring circuit. Each of interconnects is connected via the corresponding PMISFET through a charging voltage supply part to a power supply pad and via the corresponding NMISFET through a current sampling part to a current-monitoring pad. A current I can be measured by bringing a probe of an ammeter into contact with the current-monitoring pad.

Abstract: A plasma processing system having a grounded chamber and an RF power feed connected to a bottom electrode is tested. A first capacitance between the bottom electrode and the grounded chamber is measured at atmosphere. Consumable hardware parts are installed in the chamber. A second capacitance between the bottom electrode and the grounded chamber is measured at vacuum with the grounded chamber including all of the installed consumable hardware parts. The first capacitance measurement and the second capacitance measurement are respectively compared with a first reference value and a second reference value to identify and determine any defects in the plasma processing system. The first and second reference value respectively are representative of the capacitance of a defect-free chamber at atmosphere and the capacitance of a defect-free chamber including all of the installed consumable hardware parts at vacuum.

Abstract: The invention relates to a method for monitoring a capacitor bushing (1) to which an electrical operating voltage (UB) is applied and in which a voltage divider is formed with an electrically conductive insert (4), whereby at least one measured value (UM1) of an electrical measured quantity (UM) is recorded and stored by using a measuring tap (7), which is connected to the insert (4), and by using each potential. The aim of the invention is to improve the method so that it is only slightly influenced by changes in the operating voltage. To this end, the impedance (ZE) between the measuring tap (7) and the earth potential is modified after recording the at least one measured value (UM1), and at least one signal value (US1) of a measurement signal (US) subsequently formed is recorded and stored using the measuring tap (7) and the earth potential.

Abstract: A self-compensating fault locator (10) broadly comprises a testing unit (16) to take measurements across two test points (18), a processing unit (20) to locate faults by analyzing the measurements, and a switching unit (22) that can connect termination points (14) of an electrical circuit (12) to the test points (18) in a sequence controlled by the processing unit (20). The fault locator (10) may also include a harness (24) to connect the electrical circuit (12) to the switching unit (22). The processing unit (20) is preferably programed with the electrical circuit's (12) interconnection information. The processing unit (20) also preferably stores internal characteristics of the fault locator (10). Using the interconnection information and the internal characteristics, the processing unit (20) may accurately locate faults within the electrical circuit (12). Additionally, the processing unit (20) may locate faults within the fault locator (10) and/or the harness (24).

Abstract: A characterization method for a device under test includes applying a bias voltage to a test circuit. The test circuit includes a first transistor coupled to the device under test, a second transistor coupled to the device under test and to the first transistor. A third transistor is coupled to a dummy device, a fourth transistor is coupled to the dummy device and to the third transistor. The transistors are of a common type. The characterization method further includes applying non-overlapping clocking signals to transistors of the test circuit to produce test signals for application to the device under test and detecting a current in one or more transistors from the device under test. The bias voltage is further varied to characterize the device under test.

Abstract: A capacitance monitoring system includes a capacitance gauge head for monitoring the capacitance between a measuring electrode and an electric cable travelling along a path parallel to the measuring electrode. The output from the capacitor gauge head is fed to a Fast Fourier Transform device (40) to produce, to indicate discrete cyclical faults in the cable and the frequencies to which they would be relevant. A cable speed detector (44) feeds a reference table device which stores different correction factors to correct the amplitude of the cyclical faults detected due to the attenuation imposed on the measured signal because of the specific length of the electrode. A multiplier (46) multiplies the cyclical fault signals detected by the relevant factors from the reference table device (42).

Abstract: The present invention is a process for measuring semiconductor device output capacitance and slew rate from switching-induced hot carrier luminescence. The process for determining the output capacitive loading of a semiconductor device includes measuring the peak switching-induced hot carrier luminescence and comparing it to previously correlated capacitance data. The process for determining the output slew rate of a semiconductor device by measuring the switching-induced hot carrier luminescence as a function of time, calculating a standard deviation of the luminescence data, and comparing it to previously correlated output slew rate data. The peak of a switching-induced hot carrier luminescence pulse directly relates to the driving capacitance and the standard deviation of a pulse relates to the rate of change of output voltage or slew rate.

Abstract: A method for detecting a change in capacitance of a capacitive sensing element having a nominal capacitance value is disclosed. In an exemplary embodiment, the method includes coupling the sensing element to a first oscillator, the first oscillator generating a first frequency dependent upon the capacitance value of the sensing element. The first frequency is compared to a reference frequency generated by a second oscillator. The change in capacitance from the nominal capacitance value is detected if the first frequency differs from said reference frequency by a determined frequency value.

Abstract: Disclosed is a circuit-pattern inspection apparatus for inspecting a comb-shaped pattern 20 having an edge region formed as a plurality of finger pattern segments and a base region formed as an integral connection pattern segment, and a plurality of discrete patterns 30 each disposed between the adjacent finger pattern segments in a non-connecting manner and being not in connecting with the remaining discrete patterns. The inspection apparatus comprises means for supplying an AC signal alternately to either one of the finger pattern segments and both the finger pattern segments and the discrete patterns while maintaining the other at a ground potential, and sensors 131, 132, 133 for detecting the AC signal disposed in the edge region. The inspection apparatus can reliably detect the presence of defects in a circuit board without any difficulties.

Abstract: The measuring precision of an electric power measuring apparatus is improved. A voltage measuring apparatus for sheathed power cable is disclosed as including; a first conductive member arranged to contact the sheathing material for sheathing a power cable conductor, a second conductive member for forming a capacitance between the ground and itself, current voltage converting operation for converting a current signal flowing between the first conductive member and the second conductive member into a voltage signal having a waveform proportional to the current signal, and a voltage value calculating operation for calculating the voltage value applied to the power cable from the signal converted by the current voltage converting operation.

Abstract: In the method and system for non-contact measurements of microwave capacitance of test structures patterned on wafers used for production of modern integrated circuits, a near-field balanced two-conductor probe is brought into close proximity to a test structure, and the resonant frequency of the probe for the test structure is measured. The probe is then positioned at the same distance from the uniform metallic pad, and the resonance frequency of the probe for the uniform metallic pad is measured. A shear force distance control mechanism maintains the distance between the tip of the probe and the metallic pad equal to the distance between the tip of the probe and the test structure. The microwave capacitance of the test structure is then calculated in accordance with a predefined formula. The obtained microwave capacitance may be further used for determining possible defects of the test structure.

Abstract: A capacitance measurement method is provided which is capable of measuring an accurate capacitance value even if a leakage current on a level that cannot be ignored occurs in a capacitance to be measured. In step S1, a test current ICnorm is measured by using a normal PMOS gate potential as a PMOS gate potential for providing on/off control of PMOS transistors in a predetermined cycle. In step S2, a current ICrat is measured by using, as the PMOS gate potential, a multiplied on-time PMOS gate potential, the “L” period and fall time of which are integral multiples of those of the normal PMOS gate potential. In step S3, based on the currents ICnorm, ICrat, a leakage current IRt is eliminated and the amount of capacity current CIC consisting only of a capacitance current component ICt is calculated. In step S5, a target capacitance is obtained based on the capacity current CIC and a charge frequency frat obtained in step S4.

Abstract: The directional element, following enablement under selected input current conditions, calculates a zero sequence impedance, in response to values of zero sequence voltage and zero sequence current. The current value is selected between two possible values, one being the value from an associated current transformer, the other being the sum of the currents IA+IB+IC. The calculated zero sequence impedance is then compared against sensitive selected threshold values, established particularly for ungrounded systems. A forward fault indication is provided when the calculated zero sequence impedance is above a first established sensitive threshold value, and a reverse fault indication is provided when the calculated zero sequence impedance is below a second established sensitive threshold value.