Abstract: Reporting and/or analyzing test data from a plurality of tests of an array structure using a data array. One method includes obtaining the test data, and reporting the test data in a data array, which includes at least two portions representing different tests. Data stored in the data array is organized according to a translation table, which describes the locations of data for tests and criteria for data to be analyzed within the data array. Numerous other data arrangements such as a coordinate file listing a pre-defined maximum number of fail points, or a chip report including fail points by chip may also be generated. The data array reports all test data in a more easily generated and stored form, and may be converted to an image. A data analysis method for analyzing data using the data array is also presented.

Abstract: A residual current device (RCD) protects a circuit by tripping in response to an imbalance signal representative of residual current imbalance in the circuit. The RCD trips the circuit when the imbalance signal exceeds a predetermined threshold rating. The RCD includes a sense coil for generating the imbalance signal and a test coil for introducing a simulation residual current imbalance into the device so as to increase the imbalance signal. A processor monitors the imbalance signal and determines the simulation residual current imbalance required to increase the imbalance signal to a level that corresponds to the predetermined threshold rating so that the sense coil senses the sum of any residual current imbalance in the circuit being protected and the simulation residual current imbalance in order to test operation of the RCD against the predetermined threshold rating.

Abstract: The location of high resistance ground faults within buried co-axial power cables can be detected by transmitting a combined signal along the cable at a primary frequency of 0.718 Hz and a primary amplitude in the order of 4,500 volts peak to peak. This combined signal also has an interlocked secondary frequency of 11,780 Hz superimposed on the primary frequency. The ratio between the reactive impedance and resistive impedance is such as to create a condition where the 0.718 Hz primary frequency's single source caused resistive current is usually larger than the sum or total of all that cable's per foot of length's 0.718 Hz reactive currents. This condition then enables the detection of the resistive ground faults by a manually transported Receiver. When needed the effective resistance and/or capacitance of the cable can be increased by a remote end connection circuit.

Abstract: A method of performing transducer self-diagnostics and self-healing on an array of sensor transducers bonded to a structure for health monitoring includes measuring impedance to detect whether a transducer is missing, or a connection is damaged. Pitch-catch signals generated between one or more pairs of transducers are analyzed for detecting defects according to selected criteria of defect size and location to determine whether the sensors are damaged or partially/fully disbanded. Based on the resulting map of operational transducers, signal transmission paths are added/extended between additional pairs of transducers to maintain inspection coverage of the structure according to the selected criteria.

Abstract: A method and system are disclosed, in a simulation of a design of a digital integrated circuit chip, to limit a number of scan test clocks and chip ports used for testing the chip. Clock domains are identified within the design of the chip that are independent of each other. The independent clock domains are grouped together, within said chip design, to form clock domain groups. A timing analysis is performed on the design of the chip by clocking the clock domain groups each with an independent scan test clock. The scan test clocks originate externally to the design and by-pass, within the chip design, the corresponding internal clocks. Capture mode violations are recorded from the timing analysis and are used to go back and form new clock domain groups, thereby repeating the method until no capture mode violations are generated.

Abstract: The present invention is a technique for locating and identifying a failed filter/arrester in an underground conveyance such as a fiber optic cable. A sensor is installed in the filter/arrester housing to sense grounding of a cable locating frequency. The sensor will monitor the cable locating signal that is normally on the cable and blocked by the filter arrester to ground. A small radio frequency oscillator (85 to 88 Hz), also installed inside the filter housing, is activated by the sensor. The RF signal is detected above ground with standard cable locating equipment. A warning indicator such as an indicator light may also be installed on the outside of the filter housing. The indicator is also activated by the sensor. In that way, the particular failed filter can be identified if multiple filters are installed at that location. The power that will be required to operate the RF transmitter and indicator will be obtained from the voltage passing through the cable.

Abstract: A circuit breaker includes a first lug and second and third acoustic lugs electrically connected to a power circuit. Separable contacts are electrically connected in series between the first lug and the second acoustic lug. An operating mechanism opens and closes the separable contacts. A first acoustic sensor is coupled to the second acoustic lug and senses a first acoustic signal from the second acoustic lug. A second acoustic sensor is coupled to the third acoustic lug and senses a second acoustic signal from the third acoustic lug. The first and second acoustic signals are operatively associated with a power circuit fault. A current sensor senses a current flowing between the first and second lugs. A circuit inputs the sensed acoustic signals and the sensed current and detects and distinguishes a parallel arc fault or a series arc fault from the sensed acoustic signals and the sensed current.

Abstract: According to one aspect of the invention, a circuit for determining the location of a defect in an integrated circuit is described. The circuit comprises a conductor extending from a first node to a second node and a test signal driver coupled to the first node of the conductor. The test signal driver receives a test signal using a first clock signal, while a plurality of detector circuits coupled to the conductor between the first node and the second node to detect an output at the plurality of nodes using a second clock signal. According to other embodiments, circuits for determining the location of a defect in a programmable logic device are disclosed. Finally, various methods for determining the location of a defect in an integrated circuit are described.

Abstract: An inspection apparatus comprises a fixed unit including a control device and a measurement device, and a moving unit including contact terminals, which are brought into contact with contacts formed on a printed board having electrode patterns subjected to electrical inspection (e.g., electrical conduction inspection). The contact terminals are connected to a connection switching device via a plurality of first wires, wherein the connection switching device is arranged in the moving unit for selectively switching over the first wires. A plurality of third wires are arranged for establishing connections between the fixed unit and the selectively-switched first wires, wherein the number of the third wires is smaller than that of the first wires.

Abstract: A breakdown inspection apparatus for a wire includes a power supply applying a voltage to the wire and an electric field sensor detecting an electric field generated around the wire by the applied voltage so as for a user to determine according to variation of the electric field if there is an open defect in the wire.

Abstract: A selector selects an FF pair (FFs, FFe) in circuit information, a calculator calculates value-capturing condition data at FFe, a divider divides a path set that matches the value-capturing condition data from a set of paths between the FF pair (FFs, FFe), and a multi-cycle path detector determines whether all the paths in the path set are multi-cycle paths. When the path set is a multi-cycle path, it is added to a timing exception path list that is output by an output unit.

Abstract: A system and method for sensing the formation of tin whiskers is presented. An assembly substrate includes whisker detectors at various locations for detecting tin whiskers in an X direction, a Y direction, and a Z direction relative to the assembly substrate. Each whisker detector includes sense traces and a trace bridge that produce “planar gaps” and “orthogonal gaps” that are smaller than trace gaps produced by other traces on the assembly substrate. As such, tin whiskers short across the planar gaps and orthogonal gaps before they short across trace gaps. When the assembly substrate is finished with processing steps, a system tester performs a continuity test on the whisker detectors. When the continuity test fails, an operator is notified to check for tin whiskers on the assembly substrate. Once shipped, a processor monitors the whisker detectors for shorts throughout the product's lifecycle.

Abstract: The embodiments of the present invention enable a new metal diagnosis pattern based on a production test pattern to quickly identify open and short circuits of metal lines which cannot be probed, such as the long lines of a programmable logic device, and to further isolates the fault location for physical failure analysis. According to one aspect of the invention, a circuit locally drives a plurality of metal long line segments to determine whether a defect in a line is a short circuit, or further to identify the location of an open circuit.

Abstract: The identification of the path and termination points of copper landlines is performed through the use of natural events without the aid of network provisioning information. At least one sferics detector detects at least one sferics event. A listening device, which may be separate from, or integrated with, the sferics detector, is attached to at least one wire that is capable of detecting a noise related to the at least one sferics event. A computing device, possibly attached to the listening device, is capable of matching the noise to the at least one sferics event. The computing device is further capable of determining the location of at least part of the wire based on the location of the listening device and locations of at least two sferics events.

Abstract: A circuit breaker detects a fault, such as an arc fault or glowing contact, of a power circuit. The circuit breaker includes a first lug and a second acoustic lug adapted to be electrically connected to the power circuit. Separable contacts are electrically connected in series between the first lug and the second acoustic lug. An operating mechanism is adapted to open and close the separable contacts. An acoustic sensor is coupled to the second acoustic lug. The acoustic sensor is adapted to sense an acoustic signal from the second acoustic lug. The acoustic signal is operatively associated with the fault of the power circuit. A circuit inputs the sensed acoustic signal and is adapted to detect the fault therefrom.

Abstract: The present invention is a technique for locating and identifying a failed filter/arrester in an underground conveyance such as a fiber optic cable. A sensor is installed in the filter/arrester housing to sense grounding of a cable locating frequency. The sensor will monitor the cable locating signal that is normally on the cable and blocked by the filter arrester to ground. A small radio frequency oscillator (85 to 88 Hz), also installed inside the filter housing, is activated by the sensor. The RF signal is detected above ground with standard cable locating equipment. A warning indicator such as an indicator light may also be installed on the outside of the filter housing. The indicator is also activated by the sensor. In that way, the particular failed filter can be identified if multiple filters are installed at that location. The power that will be required to operate the RF transmitter and indicator will be obtained from the voltage passing through the cable.

Abstract: A method for fault tracing in automatically operating electronic measurement and test arrangements for a large number of electrochemical elements, wherein holders for the electrochemical elements are provided on the measurement and test arrangements and wherein cell simulators are provided with an external shape and size, including electrical connections, which approximately simulate one of the electrochemical elements to be tested, and contain test electronics, with a behaviour of the cell simulators with inverse polarity differing to a major extent from a behaviour with polarity based on the application, including the steps of inserting of the cell simulators into the holders, activating one of the cell simulators and applying a measurement current applied to it, measuring the voltage on the cell simulator and comparing the voltage with the nominal voltage predetermined for the cell simulator.

Abstract: A method for performing circuit defect analysis and process problem identification includes applying a test signal to a circuit, obtaining a signal generated in response to the test signal, comparing the response signal to reference information, classifying a defect in the circuit based on a result of the comparing step, and identifying a problem in a manufacturing process which caused the defect based on the classification. The reference information may include one or more signal profiles corresponding to predefined types of defects that can occur during the manufacturing process. Defect classification is preferably performed by determining whether the response signal falls within one or more of the signal profiles. If the response signal falls within two or more signal profiles, then probabilities may be determined for each profile. The defect may then be classified as corresponding to the defect type whose signal profile has the highest probability.

Abstract: The present invention provides an inspection apparatus and an inspection method capable of inspecting at a high speed by using a sensor having flexibility and excellent productivity. When a circuit board 100 as a subject of inspection is selected, CAD data of the circuit wiring 101 on this circuit board 100 is analyzed to detect the position of the end of each wiring. Then, two or more sensor elements adjacent to the end (from which the voltage variation can be detected) are specified. The switching circuit 16 is controlled to connect the selected sensor elements to an output terminal 12 and to connect the remaining sensor elements to the GND terminal 15. In this state, when an voltage is applied to one of the selected circuit wirings and then an inspection signal (voltage variation) is output from the output terminal 12, it will be determined that no disconnection exists in the circuit wiring.

Abstract: The present invention provides a method of manufacturing a magnetoresistive read head which reduces electrostatic discharge and allows measurement of gap resistances in the head.

Abstract: A Device for fault identification in an electrical radial network has a section cable and a number of outgoers which can be connected thereto. The device provides that a central control device uses fault direction signals and/or fault signals which are formed by outgoer protective devices which each monitor one of the outgoers to determine the position of the fault in the radial network and, if there is a fault on the section cable, for the central control device to initiate its disconnection.

Abstract: A gate comparator control panel, in accordance with the subject invention, allows a user to define up to four different gate regions that may exist on any of the live waveforms, maths waveforms, or REF waveforms. A menu for each gate controls the position of each gate and selects the source for the signal that is to be gated. All gates must be the same width. A high level application copies the gated region of a waveform into a REF memory. For example, Gate 1 would go into REF 1, gate 2 into REF2 and so on. A user-settable tolerance value is used to determine if difference between the waveforms of the gates reaches a point at which a violation is indicated. A master gate position control causes all gates to move by the same amount, thus maintaining a constant distance between them. A master gate width control causes all gates to change width.

Abstract: A system and method for fault detection including a transmitter adapted to transmit a composite signal on a buried cable so that fault leakage of the composite signal returns to the transmitter through the ground surrounding the buried cable. The composite signal is composed of a low frequency first component that alternates at a first frequency and that defines a phase, and a low frequency second component that alternates at a second frequency higher than the first frequency and that defines a duty cycle having a predetermined relationship with the phase of the first component. A receiver receives the composite signal from the probe and filters the first component, filters the second component, defines an alternating reference signal having a phase based on the duty cycle of the filtered second component, and compares the phase of the reference signal with the phase of the filtered first component.

Abstract: One embodiment of the present invention concerns a test assembly for testing product circuitry of a product die. In one embodiment, the test assembly includes at test die and an interconnection substrate for electrically coupling the test die to a host controller that communicates with the test die. The test die may be designed according to a design methodology that includes the step of concurrently designing test circuitry and a product circuitry in a unified design. The test circuitry can be designed to provide a high degree of fault coverage for the corresponding product circuitry generally without regard to the amount of silicon area that will be required by the test circuitry. The design methodology then partitions the unified design into the test die and the product die. The test die includes the test circuitry and the product die includes the product circuitry. The product and test die may then be fabricated on separate semiconductor wafers.

Abstract: An Addressable Electronic Switch (AES) is disclosed together with unique S/W (software) procedures for a system control to detect, locate, and isolate shorts, overloads, and other troubles, such as temporary breaks or disconnects, on a Vplex or similar 2-wire polling loop. The addressable electronic switches are placed at strategic locations throughout the polling loop, and are individually commanded by the system control to either connect or disconnect its respective branch from the rest of the polling loop, to locate and isolate a troubled area from the rest of the polling loop.

Abstract: Methods and apparatus are disclosed for detecting manufacturing defects on unpopulated printed circuit boards under test (BUT) utilizing reliable single point current measurement. In a first set of preferred embodiments, an AC signal generator is connected to a signal plate placed under the BUT for applying an electrical field and thereby generating signals in conductors of the BUT. An array of pins mounted on an assembly on top of the BUT at fixed intervals samples currents from the test points on the BUT. In a second set of preferred embodiments, the AC signal generator is connected to the pin array, and the pins apply test signals into the conductive elements of the BUT at fixed intervals. The signal plate detects the electrical field on the BUT. The detected signals are analyzed to discern board faults.

Abstract: A testing device for detecting and locating an arcing fault in an electrical system includes a detector circuit for detecting one or more characteristics of the arcing fault proximate the arcing fault and outputting a responsive signal. An annunciator speaker or display annunciates the responsive signal when the detector circuit is proximate the arcing fault, in order to locate the arcing fault in the electrical system.

Abstract: The invention disclosed a method and system for multi-port synchronous high voltage testing, which mainly uses two or more sets of testing circuit with variable output condition and a high voltage generator with zero intermediate voltage for synchronous high voltage testing. Therefore it is not only possible to prevent operators from electric shock but also to provide correct multi-port testing voltages so as not to cause object under test damage. The testing circuit uses a plurality sets of individual high voltage generator and a current detector for providing functions for reading and determining individual voltage and current, so that it is possible to perform several high voltage tests during a single test period and complete tests on electric products. It is therefore possible to achieve both reduction of test-time and safety of operators.

Abstract: A fast error diagnosis system and process for combinational verification is described. The system and process localizes error sites in a combinational circuit implementation that has been shown to be inequivalent to its specification. In the typical case, it is not possible to identify the error location exactly. The invention uses a diagnosis strategy of gradually increasing the level of detail in the analysis algorithm to ultimately derive a small list of potential error sites in a short time. The invention combines the use of simulation, Binary Decision Diagrams, and Boolean satisfiability in a novel way to achieve the goal. The previous approaches have been limited in that they have either been constrained to a specific error model unlike the present invention, or they are inefficient in comparison to the present invention. The present invention allows for the final set of error sites derived to be small, where that set contains the actual error sites, and is derived in a reasonable amount of time.

Abstract: An open circuit detection apparatus is provided for detecting whether a connection is closed between a local node and a remote node having a known impedance. A ping source is connected to the local node. The ping source has an output for transmitting an address unique to the remote node and an input for sensing the impedance of the remote node. A test circuit is connected to the remote node. The test circuit has an address decoder for receiving the address from the output. The address decoder has a unique address and asserts a control signal upon the address matching the unique address of said address decoder. An impedance-varying device is responsive to the control signal and effects a change in the impedance of the remote node. The change in the impedance of the remote node is sensed by the input of the ping source.

Abstract: A computer-based method and computer-readable medium containing computer-executable instructions for assimilating data collected by a time domain reflectometer and displaying more than two waves representing reflections of a pulse on conductors is provided. The method includes a means for wave reversal, wave shifting, multi-wave display, segmented velocity of propagation adjustment, multi-cursor option multi-flagging options and calculating of the total length of wet cable. The combination of these functions provides a highly accurate means for identifying the location of splices, faults, corrosion, cable damage and other anomalies that are typically found on any length of conductor cable. The ability of this method to display a greater number of waves simultaneously adds additional benefit to a technician attempting to locate particular anomalies with multi-conductor cables.

Abstract: The invention relates to a method for measuring fault locations in high frequency cables and lines. A signal with the frequency f0 and a level a0 is emitted from the source. This signal is split up in the splitter and is routed to the same parts in the test piece (DUT=device under test) and to a sink. The signals of the source and the returning wave of the DUT are added, whereby the result of this addition is a signal with the frequency f0 and an amplitude a1. The value of the frequency f0 is changed, and the amplitude of the newly generated sum signal is, in turn, recorded, whereby this is repeatedly carried out in an appropriate frequency domain (Span). An inverse Fourier transformation is applied to the measured values and transforms the signals from the frequency domain into the time domain. The transition point, which appears as the defined peak in the time diagram, can, as a result, be found located while taking the shortening factor into account.

Abstract: A method and apparatus of measuring current in a switching circuit (2) of the two-port type having a first set of terminals connected to a set of terminals of a noise reducing circuit, wherein a second set of terminals of the switching circuit has a switching terminal, which is adapted to be switched between the set of terminals of the noise reducing circuit, including the steps of providing an impedance in parallel with the switching circuit; measuring a current as a transient measurement during switching sequences in the switching circuit, the measurement being performed across an impedance in the noise reducing circuit.

Abstract: A device for tracing electrical cable. The device allows a cable installer or service person not only to identify one wire or cable in a group, but to simultaneously renotely identify as many cables as he desires. The device requires only that the installer connect a test device to each of the cables which he wishes to identify. Additionally, this identification is extremely easy to accomplish, as the “Identifying label” is in the installers own spoken words, and can be heard at the remote end by using existing industry standard test equipment (i.e.: an installer's test set, phone, headset, or amplified probe).

Abstract: The receiver has a casing member and a tip is removably attached to the casing member. A transmitter is connected to a battery and the transmitter produces a transmitter signal by periodically connecting a resistance to the battery. Preferably, the transmitter signal has a frequency of about 20 kHz. A sensor may be placed adjacent to, but not in contact with, an electrically conductive member to take advantage of the air capacitance. An electrical field is created between the sensor and the electrically conductive member. Due to the periodical load on the battery, the sensor may sense the transmitter, signal in the DC carrying conductive member. The transmitter signal is passed through an integrated circuit to filter out all frequencies except the desired 20 kHz and a detection signal is sent to the indicator to activate the indicator.

Abstract: A detection part (B), of a disconnection detection apparatus (1A), detects an open destruction of a detection resistor. An emitter of a transistor (Q5) is connected to an upstream end of a detection resistor (R1) through a diode (connected forward) (D2). A base of the transistor (Q5) is connected to a downstream end of the detection resistor (R1) through a resistor (R8). A collector of the transistor (Q5) is connected to an upstream side of a resistor (R4) of a determination part (3). In the detection part (B), the transistor (Q5) is turned on and off according to the difference in the potential between both ends of the detection resistor (R1). In an open destruction detection state, generated when the transistor (Q5) is ON, electric current supplied by the power supply 4 is fed to the determination part (3) through the transistor (Q5) as a detection result indicating that an open destruction has occurred.

Abstract: The present invention relates to a device for connection of a digital apparatus on a telephone line, comprising a line interface (6) which is connected to the telephone line, and a control circuit (8) to control this line interface (6), which can detect a fault in transmission through the line, the line interface (6) and the control circuit (8) each comprising at least one memory (42, 44, 62,64), and exchanging digital information via a galvanic connection.

Abstract: A method and apparatus for use with an electronic test system to enable the direct testing of buses on a unit under test (UUT). A connection and interface for an electronic test system are provided, which are simple to use, fast to connect and reliable, which may be used as an extra point of test and/or for testing buses remote from the microprocessor of a circuit under test, and which may also be used independently of any devices of the circuit under test. The test apparatus and method may be used to test buses remote from the microprocessor without the use of peripheral devices on the circuit under test, for example I/O chips.

Abstract: A functional verification system which provides information as to whether a signal has reached all possible states. For example, in the case of a signal with 0 and 1 as possible states, a 2 bit variable is initialized to 00. When a value of 1 is received for the signal, the first bit is set to 1 and when a value of 0 is received for the signal, the second bit is set to 1. Accordingly, by examining the two bits, one may determine whether the signal has attained one or both of 0 and 1 states.

Abstract: A distributed battery control network (14) for a battery string (12) has a plurality of sensing modules (SM) each associated with one of the batteries in the battery string (12). Each of the sensing modules has a respective sequencing input (SI) and a sequencing output (50). Said plurality modules have a sequencing input with a predetermined signature type, storing said address in a particular one of said plurality modules with said sequencing input equal to said signature type, and generating an identifying signature at an output of said particular one of plurality modules with said sequencing input equal to said signature type. A network (22) is coupled to each of the sending modules. A controller (24) is coupled to the bus and communicates with each of the sensing modules. The controller (24) loads each of the sensing modules with an address and a signature type.

Abstract: A method and apparatus for detecting interruptions of continuity in a circuit is provided. The method includes transmitting a signal through a brush contacting a conductive band of a slipring, wherein the brush and the slipring have a relative motion. The apparatus is configured to determine a circuit interruption using a plurality of parameters of the signal transmitted through the brush and the slipring, and provide an indication of an interruption when the parameters of the signal transmitted through the brush and slipring are indicative of a circuit interruption.

Abstract: A CATV system in which a technician in the field requests via a field client that a node of the CATV system be tested for ingress. The CATV system includes a headend facility that is coupled to a CATV distribution network. The CATV distribution network includes a plurality of nodes through which upstream signals are transmitted to the headend facility. A method of ingress testing for use in the CATV system includes one step of receiving at the headend facility a first reverse telemetry signal transmitted by a first field client that is coupled to the CATV distribution network at a first location downstream from the headend facility. Another step of the method includes selecting at the headend facility a first test node from the plurality of nodes of the CATV distribution network, wherein the selection is based upon the received first reverse telemetry signal.

Abstract: The invention relates to a method for detecting at least one irregularity in the dielectric around a substantially elongate conductor, comprising of: applying a potential difference between the conductor and the earth; measuring at a first position voltage changes caused by said irregularity and moving in the direction of the first position; measuring at a second position voltage changes caused by said irregularity and moving in the direction of the second position; determining with the use of time registration the difference in arrival time of voltage changes caused by the same irregularity and measured at the first and second position; determining the position of the irregularity in said conductor on the basis of the, difference in arrival time and the length of said conductor between the first and second position.

Abstract: A system and method for locating flaws in cable shields and electromagnetic tubing (shield conduit) without disconnection of the cable or conduit under test is described. The fault location method, using a unique sensor array and fault detection circuit, supplements capabilities of earlier inductance/resistance tester. Previous inductance/resistance testers allow the user to measure very small resistances at cable/connector joints, usually without disconnecting the circuit under test.

Abstract: If outputs of a couple of Hall ICs constituting a throttle valve position sensor are within an operating range of throttle valve position, and if a relationship between the outputs are within a predetermined error range, both the Hall ICs are determined to be normal. In contrast, if the outputs are equal to an upper clamp voltage or a lower clamp voltage, and if a relationship between the outputs is out of the predetermined error range, at least one of the Hall ICs is determined to be abnormal. Furthermore, if the outputs are within a failure reference voltage range, it is determined that there is an abnormality between the throttle valve position sensor and an ECU. In this way, abnormalities in the sensor and abnormalities between the sensor and the ECU can also be detected.

Abstract: A method and apparatus are used for locating cable breaks and resistive faults in cables, including fibre optic cables. The conductive shield or armour of the cable is divided into sections, usually at a splice. A step function voltage is applied to one end of the conductive shield. Remote sensors at the end of each section monitor the voltage and current as a function of time and at steady state. The measured data are encoded as current pulses and transmitted along the armour to the end of the cable. A computer at the cable end calculates from the measured voltages and currents the capacitance of each section of the shield. A broken section is identified by comparing the calculated and original capacitances of the sections and the distance along the broken section to the break is calculated from the calculated and original capacitances of the broken section.

Abstract: A pulse discharge site location (PDSL) system is provided which captures pulses on a conductor without requiring the triggering functions of an oscilloscope. The PDSL system comprises a pulse discharge measurement (PDM) system and is programmed to store the data captured by the PDM system in a reference buffer corresponding in size to the propagation time of a pulse along the length of the conductor. Samples of the captured pulses are scanned to locate the peaks of pulses above a selected noise level. These pulses are stored into a temporary working buffer, along with a selected number of samples, normalized and then added to the reference buffer. The reference buffer provides a statistical average of pulse activity. Primary pulses and their second and higher order reflections, as well as transient interference pulses and radio frequency interference, are indicated at the beginning and end of the reference buffer.

Abstract: A method and system for analyzing a source of data. The system and method involves initially training a system using a selected data signal, calculating at least two levels of sensitivity using a pattern recognition methodology, activating a first mode of alarm sensitivity to monitor the data source, activating a second mode of alarm sensitivity to monitor the data source and generating a first alarm signal upon the first mode of sensitivity detecting an alarm condition and a second alarm signal upon the second mode of sensitivity detecting an associated alarm condition. The first alarm condition and second alarm condition can be acted upon by an operator and/or analyzed by a specialist or computer program.

Abstract: The present invention relates to an electronic system incorporated into a circuit interrupter device to identify the circuit interrupter device associated with a particular power outlet receptacle.

Abstract: In the case of a multichannel monitoring device for monitoring system operating states, a test input (45a, 45b) is provided per channel (2, 3) on an evaluation and monitoring circuit for the purpose of testing the supply leads (7a, 7b) to the signalling units (1a, 1b) for freedom from damage. Either no filters or filters (47a, 47b) with a short settling time are provided in the supply lead to this test input (45a, 45b). As a result, testing requires only a very short time, so that the evaluation of the signalling units (1a, 1b) is interrupted only for a very short time. The time is so short that no dangerous system states can occur.