Abstract: A power receiving apparatus includes a determination unit and a display unit. The determination unit determines whether or not each of a power transmitting apparatus and a cable connected to the power receiving apparatus meets a predetermined condition relating to safety of power transmission. The display unit displays first information indicating that the power transmitting apparatus does not meet the predetermined condition in a case where the power transmitting apparatus does not meet the predetermined condition. The display unit displays second information indicating that the cable does not meet the predetermined condition in a case where the cable does not meet the predetermined condition.

Abstract: In some examples, signal leakage monitoring based quality control may include measuring, by a signal leakage level detector, for a signal leak at a specified location, a signal leakage level. The signal leak may include a status of being open. A geo-location value and a time value associated with the measurement of the signal leakage level may be assigned to the signal leakage level. A signal leakage closure quality analyzer may transmit the signal leakage level, the geo-location value, and the time value to a signal leakage analyzer. Further, the signal leakage closure quality analyzer may receive, from the signal leakage analyzer and based on an analysis of the signal leakage level, the geo-location value, and the time value by the signal leakage analyzer, an indication that the status of the signal leak is changed from being open to closed, or the status of the signal leak remains open.

Abstract: A method determines a fault position on a line of a power supply network. Transient profiles of current and voltage values are measured at the line ends of the line and, by using the transient profiles, after the occurrence of a fault, a fault position is determined. To carry out fault location with high accuracy even in the case of a line having more than two line ends, transient profiles of a node current and a node voltage at a node point are determined by using the current and voltage values of a line end and a traveling wave model for the respective line section, and, for each line section, a two-sided fault position determination is carried out using the transient profile of the current and voltage values measured at its line end and, the node current and the node voltage and the traveling wave model for this line section.

Abstract: A circuit is described that can include: a first register to store a first value that specifies a first subset of a set of scan chains, wherein the first subset of the set of scan chains includes scan cells that are desired to be masked; a second register to store a second value that specifies, in each shift cycle, a second subset of the set of scan chains, wherein the second subset of the set of scan chains includes scan cells that are desired to be masked; and a masking circuit to mask, in each shift cycle, scan cells in a third subset of the set of scan chains that is an intersection of the first subset of the set of scan chains and the second subset of the set of scan chains.

Abstract: An electronic apparatus comprises a detection unit configured to detect electrical characteristics of main power, via a composite cable, changed in accordance with subsidiary power supplied through the composite cable configured to perform power supply and bi-directional signal transmission; and a control unit configured to control the main power supplied through the composite cable in accordance with a result of detection by the detection unit.

Abstract: Systems and methods for managing voltage event alarms in an electrical system are provided. In one aspect of this disclosure, a method for managing voltage event alarms in an electrical system includes processing electrical measurement data from, or derived from, energy-related signals captured by at least one intelligent electronic device (IED) to identify an anomalous voltage condition at a point of installation in the electrical system. The anomalous voltage condition may correspond, for example, to a measured IED voltage being above or greater than one or more upper alarm thresholds or below or less than one or more lower alarm thresholds. The method also includes determining if the electrical system is affected by the identified anomalous voltage condition.

Abstract: An example system includes an input voltage terminal; a power converter integrated circuit (IC) package fuselessly coupled to the input voltage terminal and having first and second pins, the power converter IC package configured to detect a short between the first and second pins; and a load circuit coupled to the power converter IC package.

Abstract: A printed circuit board (PCB) may include a signal layer having a functional region and a PCB signal layer testing region. The PCB signal layer testing region may include a first differential pair having a first length formed on the signal layer, a second differential pair having a second length, different than the first length, formed on the signal layer and a third differential pair having a third length, different than the first length and different than the second length, formed on the signal layer.

Abstract: This antenna includes: a ground plane; a capacitive roof, parallel with the ground plane; a supply probe, which is electrically isolated from the ground plane and runs between the ground plane and the capacitive roof so as to supply the capacitive roof with electricity, the supply probe being intended to be connected to a transmission line; a set of shorting wires, which are arranged in parallel around the supply probe such that each shorting wire electrically connects the capacitive roof to the ground plane, each shorting wire being coated with a magneto-dielectric material.

Abstract: An electrical switch for interrupting a current path. The switch includes a contact point formed from a first and a second contact piece mounted such that it can move about a rotation axis. The contact point is closed when the two contact pieces are in contact and is electrically opened when the two contact pieces are not in contact. The electrical switch includes an actuator unit and an electrically non-conductive separating element which can be moved in a translatory manner by means of the actuator unit and is designed to isolate the two contact pieces and then to keep the two contact pieces apart. The actuator unit includes a movement element mechanically coupled to the separating element, a drive device designed to move the movement element in order to close the contact point, a device for generating and/or storing kinetic energy and an electromagnetic actuator.

Abstract: A device may include a wire interface (e.g., port), a detection circuit and a microcontroller. The detection circuit may include a resistor, a comparator, and wiring connecting the resistor to the wire interface and to a first input of the comparator. The microcontroller may provide a test signal to the resistor, and a threshold signal to a second input of the comparator. The test signal passes through the resistor and continues to the wire connector and the comparator first input with little to no change or attenuation when the wire interface is disconnected, but is attenuated when the wire interface is connected to a wire with capacitance charging and discharging based on the test signal. The comparator may compare the voltage of a resulting signal at the wire interface to the threshold signal voltage, and depending on the comparison may detect if a wire is connected to the wire interface.

Abstract: A test signal is applied from a continuity test source to a photovoltaic (PV) panel string, to test electrical continuity in the PV panel string and between the PV panel string and an inverter that is coupled to the PV panel string. If the test signal is detected at a PV panel disconnect switch that is separate from the continuity test source and switchably couples one or more Direct Current (DC) PV panels in the PV panel string, then the PV panel disconnect switch is controlled to connect the one or more DC PV panels in the PV panel string. Otherwise, the PV panel disconnect switch is controlled to disconnect the one or more DC PV panels from the PV panel string. The test signal could be, for example, an Alternating Current (AC) signal tuned to a PV installation that includes the PV panel string and the inverter.

Abstract: A network apparatus architecture is disclosed that includes one or more isolation circuits to accommodate a predetermined isolation voltage. Each isolation circuit enables an independent DC voltage to be selected along a network signaling path to accommodate different DC voltages of network circuits along the network signaling path. For example, DC isolation may be provided between a physical interface and a network circuit via one or more capacitors, optoelectronic isolators, coupled magnetic devices, or semiconductor devices. A network circuit may be powered by a power supply that is isolated from the rest of the network apparatus. The one or more isolation circuits and network circuits may be included in a system-on-chip, or application-specific integrated circuit.

Abstract: A brushless electric motor of a motor vehicle, in particular an ancillary unit, including a first phase winding, which is connected in series to a first semiconductor switch, and including a second phase winding, which is connected in series to a second semiconductor switch. The brushless electric motor includes a test circuit, which is connected in parallel to the first semiconductor switch and the second semiconductor switch. A method is also provided for operating a brushless electric motor, and also provided is a drive train actuator of a motor vehicle.

Abstract: In one embodiment, a workflow data structure may be generated, updated, or obtained. The workflow data structure may represent system processes, relationships among the system processes, data input to the system processes, data generated by the system processes, and estimated running times associated with the system processes, wherein the data generated by the system processes includes a plurality of metrics. A scheduling map may be generated or updated based, at least in part, on the relationships among the system processes and the estimated running times associated with the system processes, where the scheduling map indicates estimated times at which the metrics are anticipated to be available. The metrics may be monitored based, at least in part, on the scheduling map. Anomalies may be detected according to a result of monitoring the metrics.

Abstract: A test point circuit includes a main RF signal path (e.g., transmission line, lumped-element network, etc.), a test point RF signal circuit, a test point structure having a center conductor and corresponding grounded sleeve and being configured for connecting to a test probe for monitoring the RF signal carried through the main RF signal path, and a switch between the main RF signal path and the test point RF signal circuit. In the open position of the switch, the signal in the main RF signal path is prevented from propagating to the center conductor of the test point structure. In the closed position of the switch, the RF signal can propagate from the main RF signal path to the center conductor of the test point structure. The test probe mated to the test point structure can then measure or monitor the RF signal carried through the main RF signal path.

Abstract: A method for characterizing a fault affecting a cable in which a reference signal s of limited time support is injected and a measurement r of the reflection of the reference signal s in the cable is taken, comprises the following steps: identifying a section of the measurement r corresponding to a fault, this measurement section being called the signature of the fault; generating a modified reference signal s?, of parameterizable amplitude, equal to the sum of the reference signal s and of the reference signal s inverted and delayed by a parameterizable delay; determining conjointly the values of the parameterizable delay and of the parameterizable amplitude that minimize the error between the modified reference signal s? and the signature of the fault; and deducing therefrom an estimation of the length of the fault from the determined value of the delay.

Abstract: The present invention provides a system and method of testing CAMs and RAMs. In an exemplary embodiment, the system includes a multiple input signature register (MISR) logically coupled to digital outputs of a CAM, to digital inputs of a RAM, and to digital outputs of an ABIST controller circuit, where the MISR includes a plurality of L1 latch circuits logically coupled to a plurality of L2 latch circuits, a plurality of multiplexer circuits logically coupled to the plurality of L1 latch circuits, a plurality of exclusive or circuits (inner XOR circuits) logically coupled to the plurality of MUX circuits and to the plurality of L2 latch circuits, and at least two XOR circuits (outer XOR circuits), each of the outer XOR circuits logically coupled to one of the inner XOR circuits, to at least one of the MUX circuits, and to at least one of the L2 latch circuits.

Abstract: Systems and methods are disclosed for classifying a condition of an entity that includes a conductive medium having multiple conductive paths, using a pattern recognition strategy to classify a signature constructed from impedance-interrogation measurements and optionally including inputs from other informative sources which may be external to the system.

Abstract: An audible ground fault detection device may include: a pulse-width modulation (PWM) circuit to produce a pulse signal in response to an occurrence of a ground fault; and a buzzer circuit to emit an audible sound in response to receipt of the pulse signal. The device may include a power circuit configured to transfer power from the power line to the PWM circuit when a ground fault occurs in a load of the power line, and not to transfer the power from the power line to the PWM circuit when no ground fault occurs in any load of the power line. When the PWM circuit has no power, it will not produce the pulse signal. The power circuit may also provide DC power to the buzzer circuit in response to the occurrence of the ground fault. The buzzer circuit may include a passive buzzer.

Abstract: A display device includes a display area, a test pad, a plurality of first test transistors, and at least one outline. The display area includes pixels coupled to data lines and scan lines. The test pad receives a test signal. The first test transistors are coupled between the data lines of the display area and the test pad. The at least one outline is coupled between one of the first test transistors and the test pad. The at least one outline is located in a non-display area outside the display area.

Abstract: The present invention provides a system and method of testing CAMs and RAMs. In an exemplary embodiment, the system includes a multiple input signature register (MISR) logically coupled to digital outputs of a CAM, to digital inputs of a RAM, and to digital outputs of an ABIST controller circuit, where the MISR includes a plurality of L1 latch circuits logically coupled to a plurality of L2 latch circuits, a plurality of multiplexer circuits logically coupled to the plurality of L1 latch circuits, a plurality of exclusive or circuits (inner XOR circuits) logically coupled to the plurality of MUX circuits and to the plurality of L2 latch circuits, and at least two XOR circuits (outer XOR circuits), each of the outer XOR circuits logically coupled to one of the inner XOR circuits, to at least one of the MUX circuits, and to at least one of the L2 latch circuits.

Abstract: A method includes setting a first logical value in a control register provided in a variable delay control circuit that is included in a memory controller, detecting a first stuck-at fault of a second logical value that is a value except for the first logical value, the first stuck-at fault having occurred in one of a plurality of control lines, in accordance with a result of a comparison between a logical value output from the memory controller and an expected value of the logical value, setting the second logical value in the memory controller, and detecting a second stuck-at fault of the first logical value, the second stuck-at fault having occurred in one of the plurality of control lines, in accordance with a result of a comparison between a logical value output from the memory controller and an expected value of the logical value.

Abstract: A connection system includes a flippable cable connector (7) for connecting wires in a cable (5) to a complementary host connector located at a host device (4), the cable connector having a set of cable terminals and a set of duplicate cable terminals corresponding to the set of cable terminals, and configured to be located symmetrically to the set of cable terminals, so that the connector has 180° rotational symmetry. A particular cable terminal (9) is connected to a particular wire (11) in the cable but the corresponding duplicate cable terminal (12) is not connected to it. The cable connector is connectable to the host connector such that either the set of cable terminals or the set of duplicate cable terminals is connected to host terminals of the host connector. The system includes means (18) for determining an orientation of the cable connector relative to the host connector.

Abstract: A movable arm is for a movable arm assembly of an electrical switching apparatus. The movable arm assembly includes a first separable contact. The electrical switching apparatus has a housing, an operating handle coupled to the housing, and a second separable contact located internal the housing and being structured to engage the first separable contact. The movable arm includes a first arm member structured to be coupled to the first separable contact; and a second arm member coupled to the first arm member, the second arm member being structured to be coupled to the operating handle. The first arm member is made from a first copper material and the second arm member is made from a second, different copper material.

Abstract: An input circuit has a plurality of input terminals connected to a plurality of input lines transmitting input signals outputted from a plurality of input signal sources. The input circuit includes a controller which outputs a control signal when performing self-diagnosis of a short-circuit fault between the input lines a pulse circuit which generates pulsed self-diagnosis voltage once, twice or more times based on a control signal of the controller a switch which, when performing the self-diagnosis, applies the pulsed self-diagnosis voltage to any one of the input lines based on the control signal of the controller and a comparing/determining section which, when the self-diagnosis voltage is applied to the any one of the input lines, determines whether the short-circuit fault between the input lines has occurred based on voltage variation in the input line different from the input line to which the self-diagnosis voltage is applied.

Abstract: A substrate includes a join-structure including a semiconductor package, first electrode pad, bump, second electrode pad, and circuit substrate joined in the order named. The substrate also includes a first wire and a second wire formed in a region below a corner of the semiconductor package. The first and second wires are configured to detect a change in electrical resistance value when the first wire or the second wire is disconnected. One of the first and second wires is connected to the first electrode pad or the second electrode pad. A break strength of each of the first wire and the second wire is lower than a break strength of the join-structure.

Abstract: A method of detecting an arc fault in a power circuit includes injecting an AC-signal into the power circuit and measuring a response signal that is related to the injected AC-signal in the power circuit. The method further includes determining a frequency response of the power circuit from the response signal, analyzing the frequency response, and identifying a preferred frequency. A signal related to AC-current flowing in the power circuit within the preferred frequency range is measured and an occurrence of an arc fault in the power circuit is signaled depending on the measured signal. A system for detecting an arc fault is designed to perform a method as described before.

Abstract: A time reversal process for determining a fault location in an electrical power network comprising multi-conductor lines, comprises measuring at an observation point located anywhere along one of the multi-conductor lines, for each of the conductors of the multi-conductor line, respectively a fault-originated electromagnetic transient signal; defining a set of guessed fault locations each having a different determined location in the electrical power network, and each of the guessed fault locations is attributed a same arbitrary fault impedance; defining a network model for the electrical power network, based on its topology and multi-conductor lines electrical parameters capable of reproducing in the network model the electromagnetic traveling waves; and computing for each conductor a time inversion of the measured fault-originated electromagnetic transients signal.

Abstract: A method for establishing at least one fault in connecting lines between electronic connection units and peripheral units, which are independent of one another, includes: outputting a start signal from the control unit to a first of the connection units, to start the establishment of the fault; applying a test signal to an interface of a first one of the connection units, the application of the test signal being monitored and/or controlled by a non-volatile first algorithm of the first connection unit; registering a cross-coupling of the test signal to an interface of a second connection unit and storing a fault value representing the cross-coupling in a first register, the registration and the storage of the fault value being monitored and/or controlled by a nonvolatile second algorithm of the second connection unit.

Abstract: A testing apparatus and a testing method of an electronic device are provided. The testing apparatus includes at least two device transfer plates and a testing circuit. The device transfer plates are electrically and respectively connected to corresponding electronic devices and at least two sockets corresponding to the electronic devices. The testing circuit is electrically connected to the device transfer plates respectively through at least two sets of serial signal wire pairs. According to types of the electronic devices, the testing circuit provides a serial signal to one of the device transfer plates through the corresponding serial signal wire pair and receives a response from another one of the device transfer plates through the corresponding serial signal wire pair, so as to test whether an open circuit is occurred to a bus between the electronic devices respectively corresponding to the device transfer plates.

Abstract: Detection and location of electrical faults in a network of metal structures which can receive electric cables and allow return of current by the cables. The reflectometry-based method involves injecting a probe signal into a cable coupled to the structures and analyzing the signal reflected by the anomalies. A conductive element is provided for carrying the probe signal at a constant distance from each structure. In one aspect, an insulated conductive element is arranged inside the metal structure and is built into a longitudinal groove in a surface for receiving a longitudinal plastic holder wedged into the structure. The reflected signal from the conductive element is compared to a threshold above which an anomaly is detected, and the anomaly is located by topological correlation. The invention is useful for airplane raceways having a composite skin.

Abstract: A power circuit configured to generate and distribute DC electrical power, the power circuit includes a photovoltaic (PV) system that includes an array of PV modules electrically coupled to a combiner box, and an inverter positioned to receive DC electrical power from the array of PV modules and output AC electrical power. The PV system also includes a signal generator coupled to a first portion of the PV system, and a signal detector coupled to a second portion of the PV system, the signal detector configured to detect secondary signals generated at a loose connection of an electrical joint in the PV system, wherein the secondary signals result from a signal generated by the signal generator.

Abstract: An over voltage protection testing apparatus is applied for testing an over voltage protection function of a power supply apparatus. The over voltage protection testing apparatus mainly includes a voltage boost-storage unit and an energy release unit. The voltage boost-storage unit boosts an original output voltage outputted from the power supply apparatus into a testing voltage. Therefore, no extra testing voltage source is required for testing the over voltage protection function of the power supply apparatus. Moreover, the extra energy would be released to the energy release unit after the testing of the over voltage protection function of the power supply apparatus is finished. Therefore, the energy releasing of the present invention is faster than the energy releasing of a related art.

Abstract: System and methods for inferring network topology are described, including a method comprising determining a normalized transmit power of a first device, identifying a second device based upon a parameter of the second device and the normalized transmit power of the first device, and generating a topology including the first device and the second device based upon at least one of the normalized transmit power of the first device and the parameter of the second device.

Abstract: A method of assessing an electrical power distribution system includes establishing a baseline signature for one or more points in the power distribution system and assessing the power distribution system using the baseline signatures. Establishing the baseline signatures includes injecting one or more input signals (for example, a tone) at one or more injection points in the power distribution system, sensing one or more output signals at one or more sensing points in the power distribution system, and establishing a baseline signature for one or more of the points based on one or more of the output signals.

Abstract: A method, apparatus and software related product are presented for adaptive frequency-domain windowing to determine a time-domain crosstalk in a cable and produce effective TDX plots regardless of the frequency of a worst NEXT (near-end crosstalk). An adaptive window such as a low pass or pass band window may be selected based on the frequency of a measured worst NEXT margin for each pair combination.

Abstract: According to an example implementation, a universal tester includes a host interface slot connected to a first pluggable host card during an electrical test mode of operation to provide a stressed electrical signal to a host under test. The host interface slot is connected to a second pluggable host card during an optical test mode of operation, the second pluggable host card including an electrical-optical conversion block to convert a stressed electrical signal to a stressed optical signal that is provided to a host under test. A stressor generator may operation in pass-through mode or a loop-back mode.

Abstract: One embodiment of the present invention sets forth a method for detecting defective solder balls that includes configuring a transmitter pad to transmit a pulse signal, transmitting the pulse signal, configuring transmitter pad to receive a pulse reflection, receiving a pulse reflection, analyzing the pulse reflection; and determining whether the pulse reflection is indicative of a defective solder ball. One advantage of the disclosed method is that solder ball defects may be detected more accurately than in the trial and error approach.

Abstract: In a component-embedded circuit substrate having a plurality of capacitors embedded therein, the capacitors are connected in parallel, inspection electrodes are formed, and the inspection electrodes connect to respective terminal electrodes of the capacitor through via conductors. At the terminal electrodes of the capacitor, the connection position of the via conductors for connecting the inspection electrodes differs from the connection position of via conductors for connecting respective terminal electrodes of the capacitor.

Abstract: Disclosed are advances in the arts with novel methods and apparatus for detecting faulty connections in an electrical system. Exemplary preferred embodiments include basic, ASIC, AC, DC, and RF monitoring techniques and systems for monitoring signals at one or more device loads and analyzing the monitored signals for determining fault conditions at the device loads and/or at the main transmission lines. The invention preferably provides the capability to test and monitor electrical interconnections without fully activating the host system.

Abstract: A method and apparatus is disclosed herein for testing of multiple ring oscillators. In one embodiment, the apparatus comprises at least one ring oscillator structure having a ring oscillator having an inverter chain with an odd number of inverters connected back-to-back and operable to produce an oscillatory output, and a test structure coupled to provide either an observability chain input or a test input to the ring oscillator and to receive the oscillatory output as a feedback from the ring oscillator.

Abstract: An electrosurgical generator includes primary and test sources. The primary source supplies a primary signal and the test source supplies a test signal. The electrosurgical generator includes an output circuit and an abnormality detection circuit. The output circuit is electrically coupled to the primary and test sources. The output circuit receives the primary and test signals from the primary and test sources, respectively. The output circuit is electrically coupled to a load to supply the primary signal thereto. The abnormality detection circuit is electrically coupled to the output circuit to detect an abnormality therein as a function of the test signal. The abnormality detection circuit can also determine a location of the abnormality within the output circuit.

Abstract: In one embodiment, the method for locating a defect in a wired transmission line, which extends between a first end and a second end, includes measuring a first modified noise signal at the first end by a first measuring unit, and making a first representation of the first modified noise signal. A second modified noise signal is measured at the second end by a second measuring unit, and a second representation of the second modified noise signal is made. The location of the defects are derived from the representations.

Abstract: A method includes providing on a substrate having at least two through substrate vias (“TSVs”) a plurality of test structures for de-embedding the measurement of the intrinsic characteristics of a device under test (DUT) including at least two of the TSVs; measuring the intrinsic characteristics [L] for a first and a second test structure on the substrate including two pads coupled with a transmission line of length L; using simultaneous solutions of ABCD matrix or T matrix form equations, and the measured intrinsic characteristics, solving for the intrinsic characteristics of the pads and the transmission lines; de-embedding the measurements of the third and fourth test structures using the intrinsic characteristics of the pads and the transmission lines; and using simultaneous solutions of ABCD matrix or T matrix form equations for BM_L and BM_LX, and the measured intrinsic characteristics, solving for the intrinsic characteristics of the TSVs.

Abstract: A system for inspection of electrical circuits including a calibration subsystem operative to apply a time varying voltage to an electrical circuit being inspected during calibration and to sense differences in an electrical state at various different locations in the electrical circuit being inspected, thereby providing an indication of location of defects therein.

Abstract: Signal egress from a shielding flaw in a cable telecommunication system is detected, even where signals carried by the cable telecommunication system are quadrature amplitude modulated signals that statistically resemble broadband noise by generating a marker signal comprising a double side band, suppressed carrier signal in the fringes of contiguous frequency bands and at a power level which cannot cause perceptible interference with signals in those contiguous frequency bands. The separation of the sidebands comprising the marker signal can unambiguously identify the marker signal and can distinguish between different cable telecommunication systems installed in the same geographic area. The marker signal can be additionally coded by varying the frequency and/or amplitude of the modulating signal used to create the marker signal.

Abstract: A back end of the line (BEOL) fuse structure having a stack of vias. The stacking of vias leads to high aspect ratios making liner and seed coverage inside the vias poorer. The weakness of the liner and seed layers leads to a higher probability of electromigration (EM) failure. The fuse structure addresses failures due to poor liner and seed coverage. Design features permit determining where failures occur, determining the extent of the damaged region after fuse programming and preventing further propagation of the damaged dielectric region.

Abstract: Systems and methods for determining the configuration of a connection between two devices by measuring an electrical characteristic are provided. Using the measured electrical characteristic, a device is able to select an appropriate communication interface, such as serial, Universal Serial Bus (USB), FireWire, parallel, PS/2, etc., and configure itself appropriately. Systems and methods which determine the physical orientation of a connector with respect to another connector may also be provided alone or in combination with such systems and methods for selecting communication interfaces. The physical orientation of a connector can be determined by measuring an electrical characteristic and a device can then configure itself appropriately. In accordance with the principles of the present invention, device designs can decrease in size and cost as well as simplify operation for the end-user.

Abstract: Systems and methods for determining the configuration of a connection between two devices by measuring an electrical characteristic are provided. Using the measured electrical characteristic, a device is able to select an appropriate communication interface, such as serial, Universal Serial Bus (USB), FireWire, parallel, PS/2, etc., and configure itself appropriately. Systems and methods which determine the physical orientation of a connector with respect to another connector may also be provided alone or in combination with such systems and methods for selecting communication interfaces. The physical orientation of a connector can be determined by measuring an electrical characteristic and a device can then configure itself appropriately. In accordance with the principles of the present invention, device designs can decrease in size and cost as well as simplify operation for the end-user.