Testing Device Mounted For Multi-directional Movement Patents (Class 324/750.22)
  • Patent number: 11703475
    Abstract: A method includes mounting an integrated electro-microfluidic probe card to a device area on a bio-sensor device wafer, wherein the electro-microfluidic probe card has a first major surface and a second major surface opposite the first major surface. The method further includes electrically connecting at least one electronic probe tip extending from the first major surface to a corresponding conductive area of the device area. The method further includes stamping a test fluid onto the device area. The method further includes measuring via the at least one electronic probe tip a first electrical property of one or more bio-FETs of the device area based on the test fluid.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: July 18, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yi-Shao Liu, Fei-Lung Lai, Chun-Ren Cheng, Chun-Wen Cheng
  • Patent number: 11674980
    Abstract: Planar error between a probe card and a semiconductor wafer may be reduced with a low-profile gimbal platform. The low-profile gimbal platform may be coupled between a probe card and a tester head. The low-profiled gimbal platform includes a number of linear actuators and pistons that are used to perform high-precision in situ planarity adjustments to the probe card to achieve co-planarity between the probe card and the semiconductor wafer. The in situ planarity adjustments may reduce the likelihood of malfunctions due to misalignment of the probe card.
    Type: Grant
    Filed: August 13, 2020
    Date of Patent: June 13, 2023
    Assignee: Intel Corporation
    Inventors: Paul J. Diglio, Joseph F. Walczyk
  • Patent number: 11391758
    Abstract: A testing apparatus includes a first coordinates obtaining unit, a second coordinates obtaining unit, and a controller that performs determining card gravity center coordinates of a probe card held at a pogo frame opposite to an alignment stage, determining reference coordinates in a target coordinate system of a reference target at predetermined coordinates, determining alignment coordinates when the first coordinates obtaining unit is aligned with the second coordinates obtaining unit, determining wafer gravity center coordinates of a wafer, and calculating contact coordinates by using the determined card gravity center coordinates, the determined alignment coordinates, and the determined wafer gravity center coordinates.
    Type: Grant
    Filed: March 23, 2021
    Date of Patent: July 19, 2022
    Assignee: Tokyo Electron Limited
    Inventor: Tomoya Endo
  • Patent number: 11385257
    Abstract: An apparatus for testing electronic components includes a base, a screw rod structure, a first sliding portion, a second sliding portion, a vacuum-based or similar adsorption structure, and a probe. The screw rod structure is fixedly connected to one side of the base. The first sliding portion is slidably positioned on the screw rod structure. The second sliding portion is slidably positioned on the first sliding portion. The adsorption structure is arranged on the second sliding portion. The adsorption structure gathers and holds an electronic component. The probe and the electronic component are arranged to correspond. The probe is electrically connected to a test device. The test device tests the electronic component through the probe.
    Type: Grant
    Filed: June 23, 2020
    Date of Patent: July 12, 2022
    Assignees: HONGFUJIN PRECISION ELECTRONICS (ZHENGZHOU) CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.
    Inventors: Jun Chen, Wei Wu, Yan-Fang Yan, Zhen-Ke Zhang, Zhi-Qing Liu
  • Patent number: 11353501
    Abstract: A wafer inspection method, wherein a motorized chuck stage is controlled by a control rod to be displaced between an upper position and a lower position along Z-axis direction, to change a relative position of a wafer on the motorized chuck stage relative to a probe. The control rod is movable between an upper and an lower limit positions. The wafer inspection method includes: determining a position of the control rod based on a measurement signal; determining a first moving direction and a moving distance of the control rod based on a change of the measurement signal; generating a control signal based on the moving distance of the control rod; controlling the motorized chuck stage to be displaced along a second moving direction opposite to the first moving direction; and controlling an objective lens module to keep focusing on the wafer when the motorized chuck stage is on the move.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: June 7, 2022
    Assignee: MPI CORPORATION
    Inventors: Lin-Lin Chih, Chien-Hung Chen, Guan-Jhih Liou, Yu-Hsun Hsu
  • Patent number: 11313902
    Abstract: The systems, apparatuses, and methods herein can provide a multi-site positioning mechanism suitable for long-term testing of a device(s) under test (DUT) (e.g. semiconductor wafers) across a range of temperatures with or without a controlled environment. The systems, apparatuses, and methods herein include mounting components, mechanisms, and structures that can provide excellent mechanical stability, permit relatively close working distance optics with high resolution, enable fine positioning at elevated temperature in a controlled environment with minimal thermal perturbation. The systems, apparatuses, and methods herein can be provided with modularity, for example as modular with rails and test sites that can be easily added or removed, and that can permit access to probe modules in a densely packed array.
    Type: Grant
    Filed: April 13, 2020
    Date of Patent: April 26, 2022
    Assignee: CELADON SYSTEMS, INC.
    Inventors: John L. Dunklee, William A. Funk, Bryan J. Root
  • Patent number: 11262380
    Abstract: Provided is a wafer prober. The wafer probing stage of the wafer prober includes: a lower plate; a plurality of lifting pillars mounted on an upper surface of the lower plate; and an upper plate mounted on upper ends of the plurality of lifting pillars, wherein the plurality of lifting pillars are located between the upper plate and the lower plate and ends of the lifting pillars are configured to lift up and down in a vertical direction, and wherein a height and a slope of the upper plate are adjusted according to heights of the lifting pillars. The wafer probing stage can adjust a height of the chuck arranged on the upper plate and a slope or flatness of the chuck by adjusting a height of each lifting pillar according to a weight applied to each lifting pillar.
    Type: Grant
    Filed: January 15, 2019
    Date of Patent: March 1, 2022
    Assignee: SEMICS INC.
    Inventors: Nam Woo Park, Ki Tack Park
  • Patent number: 11262401
    Abstract: A wafer probe station includes a thermal chuck, a chuck stage, a platen, some probes, a first focusing device, a second focusing device and a thermal plate. The thermal chuck heats up to an operational temperature and holds a device under test (DUT). The chuck stage connects with the thermal chuck and moves the thermal chuck. The thermal chuck locates between the chuck stage and the platen. The probes are disposed on the platen and configured to contact with the DUT. The first focusing device is disposed on the platen to focus on the DUT. The second focusing device is disposed on the chuck stage to focus on the probes. The thermal plate locates between the second focusing device and the platen and is configured to heat up to the operational temperature. The thermal plate has a through hole aligning with the second focusing device.
    Type: Grant
    Filed: April 22, 2020
    Date of Patent: March 1, 2022
    Assignee: MPI Corporation
    Inventors: Stojan Kanev, Chia-Hung Hung
  • Patent number: 11255877
    Abstract: A method for testing printed circuit boards (20) in a test apparatus having a carrying apparatus for the printed circuit board (20) and having test modules for measuring physical variables of components (EB) and contact points (29) on the printed circuit board (20), in which the width of the printed circuit board (20) defines an X direction, its length defines a Y direction and its thickness defines a Z direction inside the test apparatus, reference points, the X, Y and Z positions of which relative to the carrying apparatus are known, are present on the printed circuit board (20) or outside the latter, the X and Y positions of the components (EB) and contact points (29) relative to the reference points are known, the measurement of the physical variables depends on an actual Z position of the printed circuit board at the X and Y positions of the component (EB) or contact point (29) to be measured, and the actual Z position of the printed circuit board at the X and Y positions of the component (EB) or cont
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: February 22, 2022
    Assignee: Acculogic Corporation
    Inventors: Karim Dehkordi, Arthur Schott
  • Patent number: 11221363
    Abstract: A test device for testing a needle mark generated in an electrode formed in a test object when a probe needle contacts the electrode includes an imaging part having a binning function, and a controller configured to control at least the imaging part. The controller is configured to perform a high-speed low-precision test process of imaging the electrode, after a contact operation by the probe needle, by the imaging part whose binning function is on, and determining a state of the needle mark of the electrode, based on an imaging result, and a low-speed high-precision test process of imaging the electrode again by the imaging part whose binning function is off, according to a determination result in the high-speed low-precision test process, and determining a state of the needle mark of the electrode imaged again, based on an imaging result.
    Type: Grant
    Filed: July 17, 2018
    Date of Patent: January 11, 2022
    Assignee: TOKYO ELECTRON LIMITED
    Inventor: Muneaki Tamura
  • Patent number: 11137418
    Abstract: A test probe assembly for use in testing a semiconductor wafer includes a probe card, a plurality of test probes mounted to the probe card and one or more piezoelectric elements mounted to each test probe. The piezoelectric elements are configured to move respective probe ends of the individual test probes in at least one direction to facilitate realignment of the probe ends for semiconductor wafer testing.
    Type: Grant
    Filed: March 4, 2019
    Date of Patent: October 5, 2021
    Assignee: International Business Machines Corporation
    Inventors: Kushagra Sinha, Pablo Nieves, Reinaldo Vega
  • Patent number: 11129321
    Abstract: A movement error detection apparatus includes a plurality of marks including a fifth mark (movable region inside mark) arranged in a movable region of a movable conveyor and first to fourth marks (movable region outside marks) arranged outside the movable region of the movable conveyor; a substrate recognition camera (imaging device to move together with a mounting head to image the first to fifth marks; and a projection device (auxiliary device) to assist an imaging. The first to fourth marks are arranged on a horizontal reference plane including a substrate, and the fifth mark is arranged at a position which is lower than the horizontal reference plane and at which the movable conveyor is not interfered. The projection device absorbs a height difference between the fifth mark and the horizontal reference plane to assist the substrate recognition camera in picking up a focused image of the fifth mark.
    Type: Grant
    Filed: January 8, 2016
    Date of Patent: September 21, 2021
    Assignee: YAMAHA HATSUDOKI KABUSHIKI KAISHA
    Inventors: Tarou Kawai, Ryousuke Nakamura
  • Patent number: 11117778
    Abstract: A quality control station (2) for a sheet element processing machine, the station having at least one camera (6) arranged for capturing images of sheet elements (4) transported through the quality control station (2), and further having a camera calibration system (10). The camera calibration system (10) having a target holder (12) for holding an optical target (14), and a drive (15) for the target holder (12). The drive (15) is adapted for displacing the target holder (12) between a rest position, in which it is outside of the viewing area (7) of the camera (6), and a calibration position in which it is arranged in the viewing area (7) of the camera (6).
    Type: Grant
    Filed: May 9, 2017
    Date of Patent: September 14, 2021
    Inventors: Lorenzo Piccardi, Mauro Truscello, Pablo Antolinez
  • Patent number: 10989738
    Abstract: To reduce inspection time by changing an action speed of a movable axis movable part while considering size information of an electrode terminal as a contact destination of a probe. An inspection apparatus of the present disclosure is an inspection apparatus with a plurality of movable probes that brings each of the movable probes into contact with each of a plurality of objects to be inspected on a board to be inspected so as to measure electrical characteristics between the objects to be inspected.
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: April 27, 2021
    Assignee: KABUSHIKI KAISHA NIHON MICRONICS
    Inventor: Yoshiyuki Fukami
  • Patent number: 10890602
    Abstract: A universal multi-pin, adjustable probing assembly or manipulator for use in parametric and reliability testing of devices on a semiconductor wafer. The probing assembly can be mounted and adjusted on a metal platen using a magnetic field. The strength of the magnetic field can be adjusted by a switchable magnetic slab to which a block is connected via an arm. A probe head can be attached to a side face of the block, which includes a tilt control mechanism for tilting the probe head to ensure that probe tips land simultaneously on pads of dies. The probe head also includes four adjusting mechanisms for translation in the X, Y, and Z directions, as well as rotation about the Z axis.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: January 12, 2021
    Assignee: QualiTau, Inc.
    Inventors: Mirtcha Lupashku, Remy Orans
  • Patent number: 10892533
    Abstract: A power sensor system, assembly and method for use as a power sensor standard in the 50 to 75 GHz frequency range. The power sensing system comprises a housing comprising a dual ridged waveguide impedance transformer, and a resistive component attachable to a back side of the housing. The resistive component comprises a terminating element electrically, but not thermally isolated from a sensing element. The sensing element operates at a constant resistance and is perpendicularly oriented to the terminating element.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: January 12, 2021
    Inventor: Jefferson D. Lexa
  • Patent number: 10788513
    Abstract: A test device and a test method are provided. The test device can comprise a movable probe platform, a plurality of signal access points, and a plurality of test probes fixed on the movable probe platform. Each of the plurality of signal access points is correspondingly coupled to one test probe for accessing a corresponding test signal. The plurality of the test probes are configured to contact with test pads on a panel to be tested, and to transmit test signals accessed from the plurality of the signal access points to the test pads, so as to perform an electrical test to the panel to be tested.
    Type: Grant
    Filed: April 25, 2018
    Date of Patent: September 29, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., HEFEI BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Xun Pu, Hongmin Li
  • Patent number: 10761145
    Abstract: An illuminating fixture and a device are provided. The illuminating fixture includes an intelligence control system, a scanning system, wires, and at least two sets of probes. One end of the probe is connected with a probe arm, and the probe arm is configured to control a slide movement of the probe along an up and down direction and rotation of the probe. the scanning system positions a measurement position of a test element group, and the intelligence control system is configured to automatically adjust a position of the probe by the probe arm according to the measurement position positioned by the scanning system.
    Type: Grant
    Filed: November 8, 2017
    Date of Patent: September 1, 2020
    Assignee: WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO., LTD.
    Inventor: Qianwen Xu
  • Patent number: 10620262
    Abstract: The systems, apparatuses, and methods herein can provide a multi-site positioning mechanism suitable for long-term testing of a device(s) under test (DUT) (e.g. semiconductor wafers) across a range of temperatures with or without a controlled environment. The systems, apparatuses, and methods herein include mounting components, mechanisms, and structures that can provide excellent mechanical stability, permit relatively close working distance optics with high resolution, enable fine positioning at elevated temperature in a controlled environment with minimal thermal perturbation. The systems, apparatuses, and methods herein can be provided with modularity, for example as modular with rails and test sites that can be easily added or removed, and that can permit access to probe modules in a densely packed array.
    Type: Grant
    Filed: April 12, 2019
    Date of Patent: April 14, 2020
    Assignee: CELADON SYSTEMS, INC.
    Inventors: John L. Dunklee, William A. Funk, Bryan J. Root
  • Patent number: 10613116
    Abstract: A test device for electrically testing a component having a component body and one or more component contacts adjacent to or extending from a side of the component body orthogonal to a contact direction, the component contacts electrically connected to an electrical circuit disposed in the component body. The test device has two or more test terminals for being electrically connected to at least one of the component contacts, the two or more test terminals being arranged substantially parallel to each other and extending in a terminal direction different from the contact direction.
    Type: Grant
    Filed: April 6, 2018
    Date of Patent: April 7, 2020
    Assignee: MELEXIS TECHNOLOGIES NV
    Inventor: Milen Petrov Cheshmedjiev
  • Patent number: 10613274
    Abstract: Methods and systems for integrated multi-port waveguide photodetectors are disclosed and may include an optical receiver on a chip, where the optical receiver comprises a multi-port waveguide photodetector having three or more input ports. The optical receiver may be operable to receive optical signals via one or more grating couplers, couple optical signals to the photodetector via optical waveguides in the chip, and generate an output electrical signal based on the coupled optical signals using the photodetector. The photodetector may include four ports coupled to two PSGCs. The optical signals may be coupled to the photodetector via S-bends and/or tapers at ends of the optical waveguides. A width of the photodetector on sides that are coupled to the optical waveguides may be wider than a width of the optical waveguides coupled to the sides. Optical signals may be mixed with local oscillator signals using the multi-port waveguide photodetector.
    Type: Grant
    Filed: May 11, 2017
    Date of Patent: April 7, 2020
    Assignee: Luxtera, Inc.
    Inventors: Subal Sahni, Gianlorenzo Masini, Attila Mekis
  • Patent number: 10565910
    Abstract: An adjustment device for light-on testing and a light-on testing device are provided. The adjustment device for light-on testing including a substrate, a first pressing member and a second pressing member disposed on the substrate, wherein, the first pressing member and the second pressing member are disposed on the substrate and capable of moving with respect to each other, so that a distance therebetween is adjustable; and the first pressing member and the second pressing member are respectively provided with a probe for contacting a product to be subjected to the light-on testing.
    Type: Grant
    Filed: January 24, 2017
    Date of Patent: February 18, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
    Inventors: Long Han, Libin Liu
  • Patent number: 10510508
    Abstract: A charged particle beam apparatus includes a sample chamber; a sample stage; an electron beam column for irradiating a sample with an electron beam; and a focused ion beam column for irradiating the sample with a focused ion beam. The apparatus includes a displacement member having an open/close portion displaceable between an insertion position between a beam emitting end portion of the electron beam column and the sample stage, and a withdrawal position away from the insertion position, and a contact portion provided at a contact position capable of contacting the sample before the beam emitting end portion during operation of the sample stage. A driving unit displaces the displacement member, and a conduction sensor detects whether the sample is in contact with the contact portion.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: December 17, 2019
    Assignee: HITACHI HIGH-TECH SCIENCE CORPORATION
    Inventor: Toshiyuki Iwahori
  • Patent number: 10473715
    Abstract: An IC handler (4) of the present invention is provided with: a contact head (7), which holds a plurality of IC devices, and which presses the IC devices to a plurality of sockets (3); and a movable arm (6) that moves the contact head (7). The movable arm (6) has power supply ports (VO, HO) that are connected to supply sources (VS, HS) of power for generating operations of the contact head (7), and the contact head (7) has a plurality of operating sections (70) that operate with the power, and a supporting section (71), which supports the operating sections (70), and which is removably attached to the movable arm (6). The supporting section (71) of the contact head (7) has: connecting ports (VC, HC) that are removably connected to the supply ports (VO, HO); and supply paths (71a, 71d) for supplying the power to the operating sections (70) from the connecting ports (VC, HC) connected to the supply ports (VO, HO).
    Type: Grant
    Filed: December 3, 2013
    Date of Patent: November 12, 2019
    Assignee: HappyJapan Inc.
    Inventors: Shouhei Matsumoto, Yoshinori Arai, Satoshi Ueno, Keitaro Harada, Masayoshi Yokoo
  • Patent number: 10429341
    Abstract: A method for testing a partially fabricated bio-sensor device wafer includes aligning the partially fabricated bio-sensor device wafer on a wafer stage of a wafer-level bio-sensor processing tool. The method further includes mounting an integrated electro-microfluidic probe card to a device area on the partially fabricated bio-sensor device wafer, wherein the electro-microfluidic probe card has a first major surface. The method further includes electrically connecting one or more electronic probe tips disposed on the first major surface of the integrated electro-microfluidic probe card to conductive areas of the device area. The method further includes flowing a test fluid from a fluid supply to the integrated electro-microfluidic probe card. The method further includes electrically measuring via the one or more electronic probe tips a first electrical property of one or more bio-FETs of the device area based on the test fluid flow.
    Type: Grant
    Filed: November 14, 2016
    Date of Patent: October 1, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yi-Shao Liu, Fei-Lung Lai, Chun-Ren Cheng, Chun-Wen Cheng
  • Patent number: 10395372
    Abstract: Systems, methods, and media for pre-processing and post-processing in additive manufacturing are provided. A method includes receiving object geometry data. The method may further include generating a sectional snapshot and a bounding box. The method may also include performing a boundary tracing operation on the sectional snapshots. Further still, the method may include executing a contour mapping algorithm. The method may additionally include outputting slice contour points with respect to the object to be fabricated.
    Type: Grant
    Filed: June 28, 2017
    Date of Patent: August 27, 2019
    Assignee: University of Cincinnati
    Inventors: Sundararaman Anand, Rohit Vaidya, Sushmit Chowdhury, Kunal Mhapsekar, Matthew McConaha
  • Patent number: 10338006
    Abstract: A method for automated alignment of electronic components with respect to one or more inspection devices for inspecting the electronic components, each electronic component having a plurality of side surfaces. The method comprises: positioning each electronic component relative to an imaging device; determining, by the imaging device, an angular offset and a linear offset between each side surface of the electronic component and the one or more inspection devices; positioning each electronic component relative to the inspection devices; effecting alignment between each side surface and the one or more inspection devices in accordance with the respective angular and linear offsets; and inspecting each side surface after effecting alignment between the side surface and the inspection devices.
    Type: Grant
    Filed: June 15, 2017
    Date of Patent: July 2, 2019
    Assignee: ASM TECHNOLOGY SINGAPORE PTE LTD
    Inventors: Chi Wah Cheng, Kai Fung Lau, Hoi Shuen Tang
  • Patent number: 10215797
    Abstract: A printed circuit board (PCB) test apparatus and testing method are described. The PCB test apparatus includes a motor connected to a gearbox that includes a gear that is directly connected to an output shaft. The test apparatus includes two printed circuit board connections for testing an electric-component connector that includes two circuit boards. One connection port includes a plurality of contact pins for attaching one of the PCBs while the other connector port is part of a position encoder that includes a diametrically magnetized magnet that tests the other PCB's ability to detect changes in magnetic fields. The apparatus is configured such that both PCBs of the electric-component connector are tested in tandem.
    Type: Grant
    Filed: April 5, 2017
    Date of Patent: February 26, 2019
    Assignee: Hall Labs LLC
    Inventors: David R. Hall, Emily Brimhall, Austin Carlson, Mark Madsen, Lloyd J. Wilson
  • Patent number: 9989557
    Abstract: A system for analyzing electronic devices is described. An input station receives a plurality of electronic devices. A pick-and-place transport apparatus having a pick up tip for engaging and transporting one of the electronic devices at a time from the input station to the electric machine interface station, disengaging from the electronic device, and moving away from the electronic device The pick up tip is movable for engaging the electronic device while at the electric machine interface station and transporting the electronic device away from the electric machine interface station to disengage the electronic devices from the electric machine interface. First and second thermal devices secured to the support structure on opposing sides of the electronic device when the electronic device is at the electric machine interface station to simultaneously transfer heat to or form the electronic device.
    Type: Grant
    Filed: February 17, 2015
    Date of Patent: June 5, 2018
    Assignee: Exatron, Inc.
    Inventor: Robert P. Howell
  • Patent number: 9977053
    Abstract: A wafer probe alignment system and method for aligning a probe to a chip wafer for testing a chip on the wafer are provided. At least two corners of the probe are adjustable in a same direction in relation to a primary corner of the probe. The alignment approach includes providing a grid of signal pins for corresponding contact pads of the chip under test, determining for each signal pin whether an electrical contact is established to a corresponding contact pad of the chip under contact force, and adjusting a position of each of the at least two corners by a corner individual delta position value with respect to the direction depending on a result of the determining in order to establish an electrical contact between each of the pins and the corresponding contact pads of the chip under test.
    Type: Grant
    Filed: June 8, 2016
    Date of Patent: May 22, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Joerg G. Appinger, Eberhard Dengler, Roland Dieterle, Martin Eckert, Gabriele Kuczera, Siegfried Tomaschko, Otto Torreiter, Quintino Lorenzo Trianni
  • Patent number: 9933457
    Abstract: Embodiments of the invention is based on a device for testing electronic components with at least one test socket with test contacts, with a nest, in which at least one electronic component can be placed, and with at least one cleaning unit for the test contacts of the test socket, wherein by means of a relative movement, which can be carried out as a test stroke, between the test socket and nest the electronic component can be pressed against, and lifted from, the test contacts of the test socket. According to embodiments of the invention the at least one cleaning unit is designed in such a manner that during each test stroke the test contacts come into contact with the at least one cleaning unit.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: April 3, 2018
    Assignee: Multitest Elektronische Systeme GmbH
    Inventors: Volker Leikermoser, Gerhard Gschwendtberger
  • Patent number: 9927463
    Abstract: A water probe alignment system and method for aligning a probe to a chip wafer for testing a chip on the wafer are provided. At least two corners of the probe are adjustable in a same direction in relation to a primary corner of the probe. The alignment approach includes providing a grid of signal pins for corresponding contact pads of the chip under test, determining for each signal pin whether an electrical contact is established to a corresponding contact pad of the chip under contact force, and adjusting a position of each of the at least two corners by a corner individual delta position value with respect to the direction depending on a result of the determining in order to establish an electrical contact between each of the pins and the corresponding contact pads of the chip under test.
    Type: Grant
    Filed: October 20, 2015
    Date of Patent: March 27, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Joerg G. Appinger, Eberhard Dengler, Roland Dieterle, Martin Eckert, Gabriele Kuczera, Siegfried Tomaschko, Otto Torreiter, Quintino Lorenzo Trianni
  • Patent number: 9844139
    Abstract: Apparatuses and methods related to the field of microchip assembly and handling, in particular to devices and methods for assembling and handling microchips manufactured with solid edge-to-edge interconnects, such as Quilt Packaging® interconnect technology. Specialized assembly tools are configured to pick up one or more microchips, place the microchips in a specified location aligned to a substrate, package, or another microchip, and facilitate electrical contact through one of a variety of approaches, including solder reflow. This specialized assembly tooling performs heating functions to reflow solder to establish electrical and mechanical interconnections between multiple microchips. Additionally, the interconnected microchips may be arranged in an arbitrarily large array.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: December 12, 2017
    Assignee: Indiana Integrated Circuits, LLC
    Inventors: Jason M. Kulick, Tian Lu
  • Patent number: 9832415
    Abstract: In one aspect, a TV set is provided. A base includes two supporting mounts. One end of the first supporting mount is rotatably connected with a back side of a display screen assembly. The second supporting mount includes two supporting arms symmetrically disposed on two sides of the first supporting mount. One end of each supporting arm is rotatably connected with the first supporting mount respectively at a rotatory connection point. When the base is in a supporting state, for each supporting arm, a triangular supporting structure is formed by the rotatory connection point, the other end of the first supporting mount, and the other end of the supporting arm. When the base is in a retracted state, the first supporting mount is attached to the back side of the display screen assembly, and the second supporting mount is superimposed on an outer side wall of the first supporting mount.
    Type: Grant
    Filed: April 2, 2014
    Date of Patent: November 28, 2017
    Assignees: HISENSE HIVIEW TECH CO., LTD., HISENSE USA CORPORATION
    Inventors: Xuan Wei Zhang, Bin Xu, Di Fei Wang
  • Patent number: 9829659
    Abstract: A photonic integrated circuit (PIC) may be optically aligned to a plurality of optical components (e.g., an optical fiber array). Optical alignment may be facilitated by the use of an optical impedance element coupled between a first input/output (I/O) optical waveguide and a second I/O optical waveguide of the PIC. The optical impedance element me be configured to be transmissive during optical alignment and to be non-transmissive during the regular operation of the PIC.
    Type: Grant
    Filed: October 17, 2016
    Date of Patent: November 28, 2017
    Assignee: Acacia Communications, Inc.
    Inventors: Long Chen, Christopher Doerr, Diedrik Vermeulen
  • Patent number: 9784762
    Abstract: A method for determining a value of a local contact potential difference by noncontact atomic force microscopy. For one or more cantilever positions above a surface of a sample: i) determining two distinct voltage values of DC voltage applied between an oscillating cantilever and the sample, and ii) determining, by one or more processors, a value of a local contact potential difference based, at least in part, on the two distinct voltage values that were determined.
    Type: Grant
    Filed: March 3, 2016
    Date of Patent: October 10, 2017
    Assignee: International Business Machines Corporation
    Inventors: Leo Gross, Gerhard Meyer, Bruno Schuler, Wolfram Steurer
  • Patent number: 9652077
    Abstract: A touch screen testing platform may be used to perform repeatable testing of a touch screen enabled device using a robotic device tester and a controller. The platform may use various types of conductive tips that engage the touch screen, thereby simulating human behavior. The platform may perform multi-touch operations by employing multiple tips that can engage the touch screen simultaneously. The tips activate a touch screen from at least a trace of conductive coating located on nonconductive components of the robotic device tester.
    Type: Grant
    Filed: June 25, 2014
    Date of Patent: May 16, 2017
    Assignee: T-Mobile USA, Inc.
    Inventor: David Ross Jenkinson
  • Patent number: 9622336
    Abstract: A test and measurement probe connection system including an interposer, at least one probe tab connected to the interposer, and a connector that is releasably connectable to the at least one probe tab to measure signals from the interposer.
    Type: Grant
    Filed: October 25, 2013
    Date of Patent: April 11, 2017
    Assignee: Tektronix, Inc.
    Inventor: Martin Rockwell
  • Patent number: 9599665
    Abstract: A method for testing a semiconductor device is disclosed. The method comprises positioning a probe card comprising a plurality of probes above the semiconductor device and moving the probe card in a vertical direction towards the semiconductor device. The plurality of probes are moving in a vertical direction towards a plurality of electrical structures of the semiconductor device until each probe of the plurality of probes has made mechanical contact with a corresponding electrical structure of the plurality of electrical structures with a minimum quantity of force. The each probe of the plurality of probes absorbs a portion of vertical overdrive after contacting their corresponding electrical structures. The probe card absorbs any remaining vertical overdrive. The vertical overdrive is a continuing vertical movement of the plurality of probes after a first probe of the plurality of probes mechanically contacts a first corresponding electrical structure.
    Type: Grant
    Filed: May 21, 2013
    Date of Patent: March 21, 2017
    Assignee: ADVANTEST CORPORATION
    Inventors: Ting Hu, Lakshmikanth Namburi
  • Patent number: 9599663
    Abstract: A probe method includes setting an allowable temperature range, the allowable temperature range including a test temperature and ensuring contact between a pad of a circuit substrate and a needle of a probe card, providing the probe card with a temperature within the allowable temperature range, contacting the needle of the probe card to the pad of the circuit substrate, and supplying a test current to the pad through the needle to test the circuit substrate.
    Type: Grant
    Filed: November 21, 2013
    Date of Patent: March 21, 2017
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sang-Boo Kang, Ki-Sub Lim
  • Patent number: 9494639
    Abstract: An inspection apparatus includes a first tester and a second tester each of which tests a substrate loaded therein, a first stage on which the first tester is mounted, the first stage being movable to a first loading and unloading position and a first test position, the first test position being provided above the first loading and unloading position, a second stage on which the second tester is mounted, the second stage being provided below the first stage and being movable to a second loading and unloading position and a second test position, the second test position being provided below the second loading and unloading position, and a lift mechanism that moves the first stage up and down to the first loading and unloading position and the first test position and moves the second stage up and down to the second loading and unloading position and the second test position.
    Type: Grant
    Filed: April 22, 2014
    Date of Patent: November 15, 2016
    Assignee: FUJI XEROX CO., LTD.
    Inventor: Hiroyasu Watanabe
  • Patent number: 9395404
    Abstract: A semiconductor chip panel includes a plurality of semiconductor chips embedded in an encapsulation material. At least part of the semiconductor chips comprise a first electrical contact element on a first main face and a second electrical contact element on a second main opposite to the first main face, respectively. One of the plurality of semiconductor chips is tested by establishing an electrical contact between a test contact device and the first electrical contact element and between an electrically conductive holder and the second contact element.
    Type: Grant
    Filed: December 14, 2012
    Date of Patent: July 19, 2016
    Assignee: Infineon Technologies AG
    Inventors: Edward Fuergut, Horst Groeninger
  • Patent number: 9366733
    Abstract: Some embodiments herein relate to a sensor package. The sensor package includes a printed circuit board with a laminar current conductor arranged on a first main surface of the printed circuit board. The sensor package also includes a sensor chip adapted to measure a current flowing through the laminar current conductor, wherein the sensor chip comprises a magnetic field sensor. The sensor chip is electrically insulated from the current conductor by the printed circuit board, and is arranged on a second main surface of the printed circuit board opposite to the first main surface. The sensor chip is hermetically sealed between the mold material and the printed circuit board, or is arranged in the printed circuit board and hermetically sealed by the printed circuit board.
    Type: Grant
    Filed: April 11, 2014
    Date of Patent: June 14, 2016
    Assignee: Infineon Technologies AG
    Inventor: Udo Ausserlechner
  • Patent number: 9188634
    Abstract: One example apparatus for isolation testing of semiconductor devices may include an interface portion for making electrical contact with packaged semiconductor devices under test. The interface portion may include an insulating support configured and dimensioned to support multiple semiconductor device packages, each semiconductor device package having a plurality of electrical contacts. The interface portion may further include a first electrically conductive surface to electrically contact a first proper subset of the plurality of electrical contacts of each of the semiconductor device packages supported by the interface portion and a second electrically conductive surface to electrically contact a second proper subset of the plurality of electrical contacts of each of the semiconductor device packages supported by the insulating support.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: November 17, 2015
    Assignee: Power Integrations, Inc.
    Inventor: Andrew W. Bruno
  • Patent number: 9176169
    Abstract: A probe apparatus providing an electrical connection between a device under test and a test apparatus body, comprising a device-side terminal unit including a flexible sheet and device-side connection terminals passing through the sheet and connected to the device under test; an intermediate substrate provided on the test apparatus body side of the device-side terminal unit and including device-side intermediate electrodes electrically connected to the device-side connection terminals and tester-side intermediate electrodes electrically connected to the test apparatus body; a tester-side substrate that is provided on the test apparatus body side of the intermediate substrate and includes, on the intermediate substrate side thereof, tester-side electrodes electrically connected to the test apparatus body; and a contact section provided between the intermediate substrate and the tester-side substrate and including first pins connected to the tester-side intermediate electrodes and second pins connected to the t
    Type: Grant
    Filed: September 13, 2013
    Date of Patent: November 3, 2015
    Assignee: ADVANTEST CORPORATION
    Inventor: Katsushi Sugai
  • Patent number: 9128126
    Abstract: An oscilloscope and a method and system thereof for collecting and displaying signal waveform are disclosed, including a control measuring unit determining a corresponding test command and test parameter according to the selection of test points on a tested object; calculating position coordinate of each test point, and sending the test command and test parameter to an automatic collecting unit; the automatic collecting unit returning test signals of each test point collected by a collecting probe of the automatic collection unit to the control measuring unit according to the test command and test parameter; and the control measuring unit generating corresponding waveform data according to the test signals returned by the automatic collecting unit, storing and displaying the waveform data.
    Type: Grant
    Filed: October 20, 2010
    Date of Patent: September 8, 2015
    Assignee: ZTE Corporation
    Inventors: Guangming Ma, Zhenying Wang
  • Patent number: 9046345
    Abstract: An optical probe having a hand held device with markers, a digital camera for digitally imaging the handheld device with markers, and a computer for calculating the position of the hand held device from the position of the markers in the digital image. This allows the hand held device to be used to take measurements, wherein the digital camera is a high resolution visible light digital camera and the markers are visible light markers.
    Type: Grant
    Filed: April 30, 2010
    Date of Patent: June 2, 2015
    Inventor: Jan Antonis
  • Publication number: 20150145542
    Abstract: An inspection apparatus includes a first tester and a second tester each of which tests a substrate loaded therein, a first stage on which the first tester is mounted, the first stage being movable to a first loading and unloading position and a first test position, the first test position being provided above the first loading and unloading position, a second stage on which the second tester is mounted, the second stage being provided below the first stage and being movable to a second loading and unloading position and a second test position, the second test position being provided below the second loading and unloading position, and a lift mechanism that moves the first stage up and down to the first loading and unloading position and the first test position and moves the second stage up and down to the second loading and unloading position and the second test position.
    Type: Application
    Filed: April 22, 2014
    Publication date: May 28, 2015
    Applicant: FUJI XEROX CO., LTD.
    Inventor: Hiroyasu WATANABE
  • Publication number: 20150115987
    Abstract: An apparatus is disclosed for testing portable devices. The apparatus includes a base upon which the portable device is mounted, and a top mold which fits over the base to immobilize the portable device. Templates can also be formed on the top mold or base. The templates contain test patterns that are defined by a plurality of apertures. A stylus is used to test the portable device by engaging or contacting different locations through the apertures in the test pattern.
    Type: Application
    Filed: October 31, 2013
    Publication date: April 30, 2015
    Applicant: Cellco Partnership d/b/a Verizon Wireless
    Inventor: Thirumalarao VOONA
  • Patent number: 9000798
    Abstract: A system and method for aligning a probe, such as a wafer-level test probe, with wafer contacts is disclosed. An exemplary method includes receiving a wafer containing a plurality of alignment contacts and a probe card containing a plurality of probe points at a wafer test system. A historical offset correction is received. Based on the historical offset correct, an orientation value for the probe card relative to the wafer is determined. The probe card is aligned to the wafer using the orientation value in an attempt to bring a first probe point into contact with a first alignment contact. The connectivity of the first probe point and the first alignment contact is evaluated. An electrical test of the wafer is performed utilizing the aligned probe card, and the historical offset correction is updated based on the orientation value.
    Type: Grant
    Filed: June 13, 2012
    Date of Patent: April 7, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jui-Long Chen, Chien-Chih Liao, Tseng Chin Lo, Hui-Yun Chao, Ta-Yung Lee, Jong-I Mou, Chin-Hsiang Lin